x86/Intel: correct permitted operand sizes for AVX512 scatter/gather
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / f16c-intel.d
1 #objdump: -dwMintel
2 #name: i386 F16C (Intel disassembly)
3 #source: f16c.s
4
5 .*: +file format .*
6
7
8 Disassembly of section .text:
9
10 0+ <foo>:
11 [ ]*[a-f0-9]+: c4 e2 7d 13 e4 vcvtph2ps ymm4,xmm4
12 [ ]*[a-f0-9]+: c4 e2 7d 13 21 vcvtph2ps ymm4,XMMWORD PTR \[ecx\]
13 [ ]*[a-f0-9]+: c4 e2 79 13 f4 vcvtph2ps xmm6,xmm4
14 [ ]*[a-f0-9]+: c4 e2 79 13 21 vcvtph2ps xmm4,QWORD PTR \[ecx\]
15 [ ]*[a-f0-9]+: c4 e3 7d 1d e4 02 vcvtps2ph xmm4,ymm4,0x2
16 [ ]*[a-f0-9]+: c4 e3 7d 1d 21 02 vcvtps2ph XMMWORD PTR \[ecx\],ymm4,0x2
17 [ ]*[a-f0-9]+: c4 e3 79 1d e4 02 vcvtps2ph xmm4,xmm4,0x2
18 [ ]*[a-f0-9]+: c4 e3 79 1d 21 02 vcvtps2ph QWORD PTR \[ecx\],xmm4,0x2
19 [ ]*[a-f0-9]+: c4 e2 7d 13 e4 vcvtph2ps ymm4,xmm4
20 [ ]*[a-f0-9]+: c4 e2 7d 13 21 vcvtph2ps ymm4,XMMWORD PTR \[ecx\]
21 [ ]*[a-f0-9]+: c4 e2 7d 13 21 vcvtph2ps ymm4,XMMWORD PTR \[ecx\]
22 [ ]*[a-f0-9]+: c4 e2 79 13 f4 vcvtph2ps xmm6,xmm4
23 [ ]*[a-f0-9]+: c4 e2 79 13 21 vcvtph2ps xmm4,QWORD PTR \[ecx\]
24 [ ]*[a-f0-9]+: c4 e2 79 13 21 vcvtph2ps xmm4,QWORD PTR \[ecx\]
25 [ ]*[a-f0-9]+: c4 e3 7d 1d e4 02 vcvtps2ph xmm4,ymm4,0x2
26 [ ]*[a-f0-9]+: c4 e3 7d 1d 21 02 vcvtps2ph XMMWORD PTR \[ecx\],ymm4,0x2
27 [ ]*[a-f0-9]+: c4 e3 7d 1d 21 02 vcvtps2ph XMMWORD PTR \[ecx\],ymm4,0x2
28 [ ]*[a-f0-9]+: c4 e3 79 1d e4 02 vcvtps2ph xmm4,xmm4,0x2
29 [ ]*[a-f0-9]+: c4 e3 79 1d 21 02 vcvtps2ph QWORD PTR \[ecx\],xmm4,0x2
30 [ ]*[a-f0-9]+: c4 e3 79 1d 21 02 vcvtps2ph QWORD PTR \[ecx\],xmm4,0x2
31 #pass
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