1 .*: Assembler messages:
357 [ ]*1[ ]+\# Check 32bit unsupported HLE instructions
359 [ ]*3[ ]+\.allow_index_reg
363 [ ]*7[ ]+\# Tests for op imm8 al
364 [ ]*8[ ]+xacquire adc \$100,%al
365 [ ]*9[ ]+xacquire lock adc \$100,%al
366 [ ]*10[ ]+lock xacquire adc \$100,%al
367 [ ]*11[ ]+xrelease adc \$100,%al
368 [ ]*12[ ]+xrelease lock adc \$100,%al
369 [ ]*13[ ]+lock xrelease adc \$100,%al
371 [ ]*15[ ]+\# Tests for op imm16 ax
372 [ ]*16[ ]+xacquire adc \$1000,%ax
373 [ ]*17[ ]+xacquire lock adc \$1000,%ax
374 [ ]*18[ ]+lock xacquire adc \$1000,%ax
375 [ ]*19[ ]+xrelease adc \$1000,%ax
376 [ ]*20[ ]+xrelease lock adc \$1000,%ax
377 [ ]*21[ ]+lock xrelease adc \$1000,%ax
379 [ ]*23[ ]+\# Tests for op imm32 eax
380 [ ]*24[ ]+xacquire adc \$10000000,%eax
381 [ ]*25[ ]+xacquire lock adc \$10000000,%eax
382 [ ]*26[ ]+lock xacquire adc \$10000000,%eax
383 [ ]*27[ ]+xrelease adc \$10000000,%eax
384 [ ]*28[ ]+xrelease lock adc \$10000000,%eax
385 [ ]*29[ ]+lock xrelease adc \$10000000,%eax
387 [ ]*31[ ]+\# Tests for op imm8 regb/m8
388 [ ]*32[ ]+xacquire adcb \$100,%cl
389 [ ]*33[ ]+xacquire lock adcb \$100,%cl
390 [ ]*34[ ]+lock xacquire adcb \$100,%cl
391 [ ]*35[ ]+xrelease adcb \$100,%cl
392 [ ]*36[ ]+xrelease lock adcb \$100,%cl
393 [ ]*37[ ]+lock xrelease adcb \$100,%cl
394 [ ]*38[ ]+xacquire adcb \$100,\(%ecx\)
395 [ ]*39[ ]+xrelease adcb \$100,\(%ecx\)
397 [ ]*41[ ]+\# Tests for op imm16 regs/m16
398 [ ]*42[ ]+xacquire adcw \$1000,%cx
399 [ ]*43[ ]+xacquire lock adcw \$1000,%cx
400 [ ]*44[ ]+lock xacquire adcw \$1000,%cx
401 [ ]*45[ ]+xrelease adcw \$1000,%cx
402 [ ]*46[ ]+xrelease lock adcw \$1000,%cx
403 [ ]*47[ ]+lock xrelease adcw \$1000,%cx
404 [ ]*48[ ]+xacquire adcw \$1000,\(%ecx\)
405 [ ]*49[ ]+xrelease adcw \$1000,\(%ecx\)
407 [ ]*51[ ]+\# Tests for op imm32 regl/m32
408 [ ]*52[ ]+xacquire adcl \$10000000,%ecx
409 [ ]*53[ ]+xacquire lock adcl \$10000000,%ecx
410 [ ]*54[ ]+lock xacquire adcl \$10000000,%ecx
411 [ ]*55[ ]+xrelease adcl \$10000000,%ecx
412 [ ]*56[ ]+xrelease lock adcl \$10000000,%ecx
413 [ ]*57[ ]+lock xrelease adcl \$10000000,%ecx
417 [ ]*58[ ]+xacquire adcl \$10000000,\(%ecx\)
418 [ ]*59[ ]+xrelease adcl \$10000000,\(%ecx\)
420 [ ]*61[ ]+\# Tests for op imm8 regs/m16
421 [ ]*62[ ]+xacquire adcw \$100,%cx
422 [ ]*63[ ]+xacquire lock adcw \$100,%cx
423 [ ]*64[ ]+lock xacquire adcw \$100,%cx
424 [ ]*65[ ]+xrelease adcw \$100,%cx
425 [ ]*66[ ]+xrelease lock adcw \$100,%cx
426 [ ]*67[ ]+lock xrelease adcw \$100,%cx
427 [ ]*68[ ]+xacquire adcw \$100,\(%ecx\)
428 [ ]*69[ ]+xrelease adcw \$100,\(%ecx\)
430 [ ]*71[ ]+\# Tests for op imm8 regl/m32
431 [ ]*72[ ]+xacquire adcl \$100,%ecx
432 [ ]*73[ ]+xacquire lock adcl \$100,%ecx
433 [ ]*74[ ]+lock xacquire adcl \$100,%ecx
434 [ ]*75[ ]+xrelease adcl \$100,%ecx
435 [ ]*76[ ]+xrelease lock adcl \$100,%ecx
436 [ ]*77[ ]+lock xrelease adcl \$100,%ecx
437 [ ]*78[ ]+xacquire adcl \$100,\(%ecx\)
438 [ ]*79[ ]+xrelease adcl \$100,\(%ecx\)
440 [ ]*81[ ]+\# Tests for op imm8 regb/m8
441 [ ]*82[ ]+xacquire adcb \$100,%cl
442 [ ]*83[ ]+xacquire lock adcb \$100,%cl
443 [ ]*84[ ]+lock xacquire adcb \$100,%cl
444 [ ]*85[ ]+xrelease adcb \$100,%cl
445 [ ]*86[ ]+xrelease lock adcb \$100,%cl
446 [ ]*87[ ]+lock xrelease adcb \$100,%cl
447 [ ]*88[ ]+xacquire adcb \$100,\(%ecx\)
448 [ ]*89[ ]+xrelease adcb \$100,\(%ecx\)
450 [ ]*91[ ]+\# Tests for op regb regb/m8
451 [ ]*92[ ]+\# Tests for op regb/m8 regb
452 [ ]*93[ ]+xacquire adcb %al,%cl
453 [ ]*94[ ]+xacquire lock adcb %al,%cl
454 [ ]*95[ ]+lock xacquire adcb %al,%cl
455 [ ]*96[ ]+xrelease adcb %al,%cl
456 [ ]*97[ ]+xrelease lock adcb %al,%cl
457 [ ]*98[ ]+lock xrelease adcb %al,%cl
458 [ ]*99[ ]+xacquire adcb %al,\(%ecx\)
459 [ ]*100[ ]+xrelease adcb %al,\(%ecx\)
460 [ ]*101[ ]+xacquire adcb %cl,%al
461 [ ]*102[ ]+xacquire lock adcb %cl,%al
462 [ ]*103[ ]+lock xacquire adcb %cl,%al
463 [ ]*104[ ]+xrelease adcb %cl,%al
464 [ ]*105[ ]+xrelease lock adcb %cl,%al
465 [ ]*106[ ]+lock xrelease adcb %cl,%al
466 [ ]*107[ ]+xacquire adcb \(%ecx\),%al
467 [ ]*108[ ]+xacquire lock adcb \(%ecx\),%al
468 [ ]*109[ ]+lock xacquire adcb \(%ecx\),%al
469 [ ]*110[ ]+xrelease adcb \(%ecx\),%al
470 [ ]*111[ ]+xrelease lock adcb \(%ecx\),%al
471 [ ]*112[ ]+lock xrelease adcb \(%ecx\),%al
473 [ ]*114[ ]+\# Tests for op regs regs/m16
477 [ ]*115[ ]+\# Tests for op regs/m16 regs
478 [ ]*116[ ]+xacquire adcw %ax,%cx
479 [ ]*117[ ]+xacquire lock adcw %ax,%cx
480 [ ]*118[ ]+lock xacquire adcw %ax,%cx
481 [ ]*119[ ]+xrelease adcw %ax,%cx
482 [ ]*120[ ]+xrelease lock adcw %ax,%cx
483 [ ]*121[ ]+lock xrelease adcw %ax,%cx
484 [ ]*122[ ]+xacquire adcw %ax,\(%ecx\)
485 [ ]*123[ ]+xrelease adcw %ax,\(%ecx\)
486 [ ]*124[ ]+xacquire adcw %cx,%ax
487 [ ]*125[ ]+xacquire lock adcw %cx,%ax
488 [ ]*126[ ]+lock xacquire adcw %cx,%ax
489 [ ]*127[ ]+xrelease adcw %cx,%ax
490 [ ]*128[ ]+xrelease lock adcw %cx,%ax
491 [ ]*129[ ]+lock xrelease adcw %cx,%ax
492 [ ]*130[ ]+xacquire adcw \(%ecx\),%ax
493 [ ]*131[ ]+xacquire lock adcw \(%ecx\),%ax
494 [ ]*132[ ]+lock xacquire adcw \(%ecx\),%ax
495 [ ]*133[ ]+xrelease adcw \(%ecx\),%ax
496 [ ]*134[ ]+xrelease lock adcw \(%ecx\),%ax
497 [ ]*135[ ]+lock xrelease adcw \(%ecx\),%ax
499 [ ]*137[ ]+\# Tests for op regl regl/m32
500 [ ]*138[ ]+\# Tests for op regl/m32 regl
501 [ ]*139[ ]+xacquire adcl %eax,%ecx
502 [ ]*140[ ]+xacquire lock adcl %eax,%ecx
503 [ ]*141[ ]+lock xacquire adcl %eax,%ecx
504 [ ]*142[ ]+xrelease adcl %eax,%ecx
505 [ ]*143[ ]+xrelease lock adcl %eax,%ecx
506 [ ]*144[ ]+lock xrelease adcl %eax,%ecx
507 [ ]*145[ ]+xacquire adcl %eax,\(%ecx\)
508 [ ]*146[ ]+xrelease adcl %eax,\(%ecx\)
509 [ ]*147[ ]+xacquire adcl %ecx,%eax
510 [ ]*148[ ]+xacquire lock adcl %ecx,%eax
511 [ ]*149[ ]+lock xacquire adcl %ecx,%eax
512 [ ]*150[ ]+xrelease adcl %ecx,%eax
513 [ ]*151[ ]+xrelease lock adcl %ecx,%eax
514 [ ]*152[ ]+lock xrelease adcl %ecx,%eax
515 [ ]*153[ ]+xacquire adcl \(%ecx\),%eax
516 [ ]*154[ ]+xacquire lock adcl \(%ecx\),%eax
517 [ ]*155[ ]+lock xacquire adcl \(%ecx\),%eax
518 [ ]*156[ ]+xrelease adcl \(%ecx\),%eax
519 [ ]*157[ ]+xrelease lock adcl \(%ecx\),%eax
520 [ ]*158[ ]+lock xrelease adcl \(%ecx\),%eax
522 [ ]*160[ ]+\# Tests for op regs, regs/m16
523 [ ]*161[ ]+xacquire btcw %ax,%cx
524 [ ]*162[ ]+xacquire lock btcw %ax,%cx
525 [ ]*163[ ]+lock xacquire btcw %ax,%cx
526 [ ]*164[ ]+xrelease btcw %ax,%cx
527 [ ]*165[ ]+xrelease lock btcw %ax,%cx
528 [ ]*166[ ]+lock xrelease btcw %ax,%cx
529 [ ]*167[ ]+xacquire btcw %ax,\(%ecx\)
530 [ ]*168[ ]+xrelease btcw %ax,\(%ecx\)
532 [ ]*170[ ]+\# Tests for op regl regl/m32
533 [ ]*171[ ]+xacquire btcl %eax,%ecx
537 [ ]*172[ ]+xacquire lock btcl %eax,%ecx
538 [ ]*173[ ]+lock xacquire btcl %eax,%ecx
539 [ ]*174[ ]+xrelease btcl %eax,%ecx
540 [ ]*175[ ]+xrelease lock btcl %eax,%ecx
541 [ ]*176[ ]+lock xrelease btcl %eax,%ecx
542 [ ]*177[ ]+xacquire btcl %eax,\(%ecx\)
543 [ ]*178[ ]+xrelease btcl %eax,\(%ecx\)
545 [ ]*180[ ]+\# Tests for op regb/m8
546 [ ]*181[ ]+xacquire decb %cl
547 [ ]*182[ ]+xacquire lock decb %cl
548 [ ]*183[ ]+lock xacquire decb %cl
549 [ ]*184[ ]+xrelease decb %cl
550 [ ]*185[ ]+xrelease lock decb %cl
551 [ ]*186[ ]+lock xrelease decb %cl
552 [ ]*187[ ]+xacquire decb \(%ecx\)
553 [ ]*188[ ]+xrelease decb \(%ecx\)
555 [ ]*190[ ]+\# Tests for op regs/m16
556 [ ]*191[ ]+xacquire decw %cx
557 [ ]*192[ ]+xacquire lock decw %cx
558 [ ]*193[ ]+lock xacquire decw %cx
559 [ ]*194[ ]+xrelease decw %cx
560 [ ]*195[ ]+xrelease lock decw %cx
561 [ ]*196[ ]+lock xrelease decw %cx
562 [ ]*197[ ]+xacquire decw \(%ecx\)
563 [ ]*198[ ]+xrelease decw \(%ecx\)
565 [ ]*200[ ]+\# Tests for op regl/m32
566 [ ]*201[ ]+xacquire decl %ecx
567 [ ]*202[ ]+xacquire lock decl %ecx
568 [ ]*203[ ]+lock xacquire decl %ecx
569 [ ]*204[ ]+xrelease decl %ecx
570 [ ]*205[ ]+xrelease lock decl %ecx
571 [ ]*206[ ]+lock xrelease decl %ecx
572 [ ]*207[ ]+xacquire decl \(%ecx\)
573 [ ]*208[ ]+xrelease decl \(%ecx\)
575 [ ]*210[ ]+\# Tests for op m64
576 [ ]*211[ ]+xacquire cmpxchg8bq \(%ecx\)
577 [ ]*212[ ]+xrelease cmpxchg8bq \(%ecx\)
579 [ ]*214[ ]+\# Tests for op regb, regb/m8
580 [ ]*215[ ]+xacquire cmpxchgb %cl,%al
581 [ ]*216[ ]+xacquire lock cmpxchgb %cl,%al
582 [ ]*217[ ]+lock xacquire cmpxchgb %cl,%al
583 [ ]*218[ ]+xrelease cmpxchgb %cl,%al
584 [ ]*219[ ]+xrelease lock cmpxchgb %cl,%al
585 [ ]*220[ ]+lock xrelease cmpxchgb %cl,%al
586 [ ]*221[ ]+xacquire cmpxchgb %cl,\(%ecx\)
587 [ ]*222[ ]+xrelease cmpxchgb %cl,\(%ecx\)
589 [ ]*224[ ]+\.intel_syntax noprefix
591 [ ]*226[ ]+\# Tests for op imm8 al
592 [ ]*227[ ]+xacquire adc al,100
593 [ ]*228[ ]+xacquire lock adc al,100
597 [ ]*229[ ]+lock xacquire adc al,100
598 [ ]*230[ ]+xrelease adc al,100
599 [ ]*231[ ]+xrelease lock adc al,100
600 [ ]*232[ ]+lock xrelease adc al,100
602 [ ]*234[ ]+\# Tests for op imm16 ax
603 [ ]*235[ ]+xacquire adc ax,1000
604 [ ]*236[ ]+xacquire lock adc ax,1000
605 [ ]*237[ ]+lock xacquire adc ax,1000
606 [ ]*238[ ]+xrelease adc ax,1000
607 [ ]*239[ ]+xrelease lock adc ax,1000
608 [ ]*240[ ]+lock xrelease adc ax,1000
610 [ ]*242[ ]+\# Tests for op imm32 eax
611 [ ]*243[ ]+xacquire adc eax,10000000
612 [ ]*244[ ]+xacquire lock adc eax,10000000
613 [ ]*245[ ]+lock xacquire adc eax,10000000
614 [ ]*246[ ]+xrelease adc eax,10000000
615 [ ]*247[ ]+xrelease lock adc eax,10000000
616 [ ]*248[ ]+lock xrelease adc eax,10000000
618 [ ]*250[ ]+\# Tests for op imm8 regb/m8
619 [ ]*251[ ]+xacquire adc cl,100
620 [ ]*252[ ]+xacquire lock adc cl,100
621 [ ]*253[ ]+lock xacquire adc cl,100
622 [ ]*254[ ]+xrelease adc cl,100
623 [ ]*255[ ]+xrelease lock adc cl,100
624 [ ]*256[ ]+lock xrelease adc cl,100
625 [ ]*257[ ]+xacquire adc BYTE PTR \[ecx\],100
626 [ ]*258[ ]+xrelease adc BYTE PTR \[ecx\],100
628 [ ]*260[ ]+\# Tests for op imm16 regs/m16
629 [ ]*261[ ]+xacquire adc cx,1000
630 [ ]*262[ ]+xacquire lock adc cx,1000
631 [ ]*263[ ]+lock xacquire adc cx,1000
632 [ ]*264[ ]+xrelease adc cx,1000
633 [ ]*265[ ]+xrelease lock adc cx,1000
634 [ ]*266[ ]+lock xrelease adc cx,1000
635 [ ]*267[ ]+xacquire adc WORD PTR \[ecx\],1000
636 [ ]*268[ ]+xrelease adc WORD PTR \[ecx\],1000
638 [ ]*270[ ]+\# Tests for op imm32 regl/m32
639 [ ]*271[ ]+xacquire adc ecx,10000000
640 [ ]*272[ ]+xacquire lock adc ecx,10000000
641 [ ]*273[ ]+lock xacquire adc ecx,10000000
642 [ ]*274[ ]+xrelease adc ecx,10000000
643 [ ]*275[ ]+xrelease lock adc ecx,10000000
644 [ ]*276[ ]+lock xrelease adc ecx,10000000
645 [ ]*277[ ]+xacquire adc DWORD PTR \[ecx\],10000000
646 [ ]*278[ ]+xrelease adc DWORD PTR \[ecx\],10000000
648 [ ]*280[ ]+\# Tests for op imm8 regs/m16
649 [ ]*281[ ]+xacquire adc cx,100
650 [ ]*282[ ]+xacquire lock adc cx,100
651 [ ]*283[ ]+lock xacquire adc cx,100
652 [ ]*284[ ]+xrelease adc cx,100
653 [ ]*285[ ]+xrelease lock adc cx,100
657 [ ]*286[ ]+lock xrelease adc cx,100
658 [ ]*287[ ]+xacquire adc WORD PTR \[ecx\],100
659 [ ]*288[ ]+xrelease adc WORD PTR \[ecx\],100
661 [ ]*290[ ]+\# Tests for op imm8 regl/m32
662 [ ]*291[ ]+xacquire adc ecx,100
663 [ ]*292[ ]+xacquire lock adc ecx,100
664 [ ]*293[ ]+lock xacquire adc ecx,100
665 [ ]*294[ ]+xrelease adc ecx,100
666 [ ]*295[ ]+xrelease lock adc ecx,100
667 [ ]*296[ ]+lock xrelease adc ecx,100
668 [ ]*297[ ]+xacquire adc DWORD PTR \[ecx\],100
669 [ ]*298[ ]+xrelease adc DWORD PTR \[ecx\],100
671 [ ]*300[ ]+\# Tests for op imm8 regb/m8
672 [ ]*301[ ]+xacquire adc cl,100
673 [ ]*302[ ]+xacquire lock adc cl,100
674 [ ]*303[ ]+lock xacquire adc cl,100
675 [ ]*304[ ]+xrelease adc cl,100
676 [ ]*305[ ]+xrelease lock adc cl,100
677 [ ]*306[ ]+lock xrelease adc cl,100
678 [ ]*307[ ]+xacquire adc BYTE PTR \[ecx\],100
679 [ ]*308[ ]+xrelease adc BYTE PTR \[ecx\],100
681 [ ]*310[ ]+\# Tests for op regb regb/m8
682 [ ]*311[ ]+\# Tests for op regb/m8 regb
683 [ ]*312[ ]+xacquire adc cl,al
684 [ ]*313[ ]+xacquire lock adc cl,al
685 [ ]*314[ ]+lock xacquire adc cl,al
686 [ ]*315[ ]+xrelease adc cl,al
687 [ ]*316[ ]+xrelease lock adc cl,al
688 [ ]*317[ ]+lock xrelease adc cl,al
689 [ ]*318[ ]+xacquire adc BYTE PTR \[ecx\],al
690 [ ]*319[ ]+xrelease adc BYTE PTR \[ecx\],al
691 [ ]*320[ ]+xacquire adc al,cl
692 [ ]*321[ ]+xacquire lock adc al,cl
693 [ ]*322[ ]+lock xacquire adc al,cl
694 [ ]*323[ ]+xrelease adc al,cl
695 [ ]*324[ ]+xrelease lock adc al,cl
696 [ ]*325[ ]+lock xrelease adc al,cl
697 [ ]*326[ ]+xacquire adc al,BYTE PTR \[ecx\]
698 [ ]*327[ ]+xacquire lock adc al,BYTE PTR \[ecx\]
699 [ ]*328[ ]+lock xacquire adc al,BYTE PTR \[ecx\]
700 [ ]*329[ ]+xrelease adc al,BYTE PTR \[ecx\]
701 [ ]*330[ ]+xrelease lock adc al,BYTE PTR \[ecx\]
702 [ ]*331[ ]+lock xrelease adc al,BYTE PTR \[ecx\]
704 [ ]*333[ ]+\# Tests for op regs regs/m16
705 [ ]*334[ ]+\# Tests for op regs/m16 regs
706 [ ]*335[ ]+xacquire adc cx,ax
707 [ ]*336[ ]+xacquire lock adc cx,ax
708 [ ]*337[ ]+lock xacquire adc cx,ax
709 [ ]*338[ ]+xrelease adc cx,ax
710 [ ]*339[ ]+xrelease lock adc cx,ax
711 [ ]*340[ ]+lock xrelease adc cx,ax
712 [ ]*341[ ]+xacquire adc WORD PTR \[ecx\],ax
713 [ ]*342[ ]+xrelease adc WORD PTR \[ecx\],ax
717 [ ]*343[ ]+xacquire adc ax,cx
718 [ ]*344[ ]+xacquire lock adc ax,cx
719 [ ]*345[ ]+lock xacquire adc ax,cx
720 [ ]*346[ ]+xrelease adc ax,cx
721 [ ]*347[ ]+xrelease lock adc ax,cx
722 [ ]*348[ ]+lock xrelease adc ax,cx
723 [ ]*349[ ]+xacquire adc ax,WORD PTR \[ecx\]
724 [ ]*350[ ]+xacquire lock adc ax,WORD PTR \[ecx\]
725 [ ]*351[ ]+lock xacquire adc ax,WORD PTR \[ecx\]
726 [ ]*352[ ]+xrelease adc ax,WORD PTR \[ecx\]
727 [ ]*353[ ]+xrelease lock adc ax,WORD PTR \[ecx\]
728 [ ]*354[ ]+lock xrelease adc ax,WORD PTR \[ecx\]
730 [ ]*356[ ]+\# Tests for op regl regl/m32
731 [ ]*357[ ]+\# Tests for op regl/m32 regl
732 [ ]*358[ ]+xacquire adc ecx,eax
733 [ ]*359[ ]+xacquire lock adc ecx,eax
734 [ ]*360[ ]+lock xacquire adc ecx,eax
735 [ ]*361[ ]+xrelease adc ecx,eax
736 [ ]*362[ ]+xrelease lock adc ecx,eax
737 [ ]*363[ ]+lock xrelease adc ecx,eax
738 [ ]*364[ ]+xacquire adc DWORD PTR \[ecx\],eax
739 [ ]*365[ ]+xrelease adc DWORD PTR \[ecx\],eax
740 [ ]*366[ ]+xacquire adc eax,ecx
741 [ ]*367[ ]+xacquire lock adc eax,ecx
742 [ ]*368[ ]+lock xacquire adc eax,ecx
743 [ ]*369[ ]+xrelease adc eax,ecx
744 [ ]*370[ ]+xrelease lock adc eax,ecx
745 [ ]*371[ ]+lock xrelease adc eax,ecx
746 [ ]*372[ ]+xacquire adc eax,DWORD PTR \[ecx\]
747 [ ]*373[ ]+xacquire lock adc eax,DWORD PTR \[ecx\]
748 [ ]*374[ ]+lock xacquire adc eax,DWORD PTR \[ecx\]
749 [ ]*375[ ]+xrelease adc eax,DWORD PTR \[ecx\]
750 [ ]*376[ ]+xrelease lock adc eax,DWORD PTR \[ecx\]
751 [ ]*377[ ]+lock xrelease adc eax,DWORD PTR \[ecx\]
753 [ ]*379[ ]+\# Tests for op regs, regs/m16
754 [ ]*380[ ]+xacquire btc cx,ax
755 [ ]*381[ ]+xacquire lock btc cx,ax
756 [ ]*382[ ]+lock xacquire btc cx,ax
757 [ ]*383[ ]+xrelease btc cx,ax
758 [ ]*384[ ]+xrelease lock btc cx,ax
759 [ ]*385[ ]+lock xrelease btc cx,ax
760 [ ]*386[ ]+xacquire btc WORD PTR \[ecx\],ax
761 [ ]*387[ ]+xrelease btc WORD PTR \[ecx\],ax
763 [ ]*389[ ]+\# Tests for op regl regl/m32
764 [ ]*390[ ]+xacquire btc ecx,eax
765 [ ]*391[ ]+xacquire lock btc ecx,eax
766 [ ]*392[ ]+lock xacquire btc ecx,eax
767 [ ]*393[ ]+xrelease btc ecx,eax
768 [ ]*394[ ]+xrelease lock btc ecx,eax
769 [ ]*395[ ]+lock xrelease btc ecx,eax
770 [ ]*396[ ]+xacquire btc DWORD PTR \[ecx\],eax
771 [ ]*397[ ]+xrelease btc DWORD PTR \[ecx\],eax
773 [ ]*399[ ]+\# Tests for op regb/m8
777 [ ]*400[ ]+xacquire dec cl
778 [ ]*401[ ]+xacquire lock dec cl
779 [ ]*402[ ]+lock xacquire dec cl
780 [ ]*403[ ]+xrelease dec cl
781 [ ]*404[ ]+xrelease lock dec cl
782 [ ]*405[ ]+lock xrelease dec cl
783 [ ]*406[ ]+xacquire dec BYTE PTR \[ecx\]
784 [ ]*407[ ]+xrelease dec BYTE PTR \[ecx\]
786 [ ]*409[ ]+\# Tests for op regs/m16
787 [ ]*410[ ]+xacquire dec cx
788 [ ]*411[ ]+xacquire lock dec cx
789 [ ]*412[ ]+lock xacquire dec cx
790 [ ]*413[ ]+xrelease dec cx
791 [ ]*414[ ]+xrelease lock dec cx
792 [ ]*415[ ]+lock xrelease dec cx
793 [ ]*416[ ]+xacquire dec WORD PTR \[ecx\]
794 [ ]*417[ ]+xrelease dec WORD PTR \[ecx\]
796 [ ]*419[ ]+\# Tests for op regl/m32
797 [ ]*420[ ]+xacquire dec ecx
798 [ ]*421[ ]+xacquire lock dec ecx
799 [ ]*422[ ]+lock xacquire dec ecx
800 [ ]*423[ ]+xrelease dec ecx
801 [ ]*424[ ]+xrelease lock dec ecx
802 [ ]*425[ ]+lock xrelease dec ecx
803 [ ]*426[ ]+xacquire dec DWORD PTR \[ecx\]
804 [ ]*427[ ]+xrelease dec DWORD PTR \[ecx\]
806 [ ]*429[ ]+\# Tests for op m64
807 [ ]*430[ ]+xacquire cmpxchg8b QWORD PTR \[ecx\]
808 [ ]*431[ ]+xrelease cmpxchg8b QWORD PTR \[ecx\]
810 [ ]*433[ ]+\# Tests for op regb, regb/m8
811 [ ]*434[ ]+xacquire cmpxchg al,cl
812 [ ]*435[ ]+xacquire lock cmpxchg al,cl
813 [ ]*436[ ]+lock xacquire cmpxchg al,cl
814 [ ]*437[ ]+xrelease cmpxchg al,cl
815 [ ]*438[ ]+xrelease lock cmpxchg al,cl
816 [ ]*439[ ]+lock xrelease cmpxchg al,cl
817 [ ]*440[ ]+xacquire cmpxchg BYTE PTR \[ecx\],cl
818 [ ]*441[ ]+xrelease cmpxchg BYTE PTR \[ecx\],cl
projects / deliverable / binutils-gdb.git / blob