2 #name: i386 prefetch (Intel disassembly)
7 Disassembly of section .text:
10 \s*[a-f0-9]+: 0f 0d 00 prefetch BYTE PTR \[eax\]
11 \s*[a-f0-9]+: 0f 0d 08 prefetchw BYTE PTR \[eax\]
12 \s*[a-f0-9]+: 0f 0d 10 prefetchwt1 BYTE PTR \[eax\]
13 \s*[a-f0-9]+: 0f 0d 18 prefetch BYTE PTR \[eax\]
14 \s*[a-f0-9]+: 0f 0d 20 prefetch BYTE PTR \[eax\]
15 \s*[a-f0-9]+: 0f 0d 28 prefetch BYTE PTR \[eax\]
16 \s*[a-f0-9]+: 0f 0d 30 prefetch BYTE PTR \[eax\]
17 \s*[a-f0-9]+: 0f 0d 38 prefetch BYTE PTR \[eax\]
19 0+[0-9a-f]+ <intel_prefetch>:
20 \s*[a-f0-9]+: 0f 18 00 prefetchnta BYTE PTR \[eax\]
21 \s*[a-f0-9]+: 0f 18 08 prefetcht0 BYTE PTR \[eax\]
22 \s*[a-f0-9]+: 0f 18 10 prefetcht1 BYTE PTR \[eax\]
23 \s*[a-f0-9]+: 0f 18 18 prefetcht2 BYTE PTR \[eax\]
24 \s*[a-f0-9]+: 0f 18 20 nop/reserved BYTE PTR \[eax\]
25 \s*[a-f0-9]+: 0f 18 28 nop/reserved BYTE PTR \[eax\]
26 \s*[a-f0-9]+: 0f 18 30 nop/reserved BYTE PTR \[eax\]
27 \s*[a-f0-9]+: 0f 18 38 nop/reserved BYTE PTR \[eax\]