x86/Intel: fix fallout from earlier template folding
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-avx512bw_vl-wig.s
1 # Check 64bit AVX512{BW,VL} WIG instructions
2
3 .allow_index_reg
4 .text
5 _start:
6 vpabsb %xmm29, %xmm30 # AVX512{BW,VL}
7 vpabsb %xmm29, %xmm30{%k7} # AVX512{BW,VL}
8 vpabsb %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
9 vpabsb (%rcx), %xmm30 # AVX512{BW,VL}
10 vpabsb 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
11 vpabsb 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
12 vpabsb 2048(%rdx), %xmm30 # AVX512{BW,VL}
13 vpabsb -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
14 vpabsb -2064(%rdx), %xmm30 # AVX512{BW,VL}
15 vpabsb %ymm29, %ymm30 # AVX512{BW,VL}
16 vpabsb %ymm29, %ymm30{%k7} # AVX512{BW,VL}
17 vpabsb %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
18 vpabsb (%rcx), %ymm30 # AVX512{BW,VL}
19 vpabsb 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
20 vpabsb 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
21 vpabsb 4096(%rdx), %ymm30 # AVX512{BW,VL}
22 vpabsb -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
23 vpabsb -4128(%rdx), %ymm30 # AVX512{BW,VL}
24 vpabsw %xmm29, %xmm30 # AVX512{BW,VL}
25 vpabsw %xmm29, %xmm30{%k7} # AVX512{BW,VL}
26 vpabsw %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
27 vpabsw (%rcx), %xmm30 # AVX512{BW,VL}
28 vpabsw 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
29 vpabsw 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
30 vpabsw 2048(%rdx), %xmm30 # AVX512{BW,VL}
31 vpabsw -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
32 vpabsw -2064(%rdx), %xmm30 # AVX512{BW,VL}
33 vpabsw %ymm29, %ymm30 # AVX512{BW,VL}
34 vpabsw %ymm29, %ymm30{%k7} # AVX512{BW,VL}
35 vpabsw %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
36 vpabsw (%rcx), %ymm30 # AVX512{BW,VL}
37 vpabsw 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
38 vpabsw 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
39 vpabsw 4096(%rdx), %ymm30 # AVX512{BW,VL}
40 vpabsw -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
41 vpabsw -4128(%rdx), %ymm30 # AVX512{BW,VL}
42 vpacksswb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
43 vpacksswb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
44 vpacksswb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
45 vpacksswb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
46 vpacksswb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
47 vpacksswb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
48 vpacksswb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
49 vpacksswb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
50 vpacksswb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
51 vpacksswb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
52 vpacksswb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
53 vpacksswb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
54 vpacksswb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
55 vpacksswb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
56 vpacksswb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
57 vpacksswb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
58 vpacksswb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
59 vpacksswb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
60 vpackuswb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
61 vpackuswb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
62 vpackuswb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
63 vpackuswb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
64 vpackuswb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
65 vpackuswb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
66 vpackuswb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
67 vpackuswb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
68 vpackuswb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
69 vpackuswb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
70 vpackuswb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
71 vpackuswb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
72 vpackuswb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
73 vpackuswb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
74 vpackuswb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
75 vpackuswb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
76 vpackuswb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
77 vpackuswb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
78 vpaddb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
79 vpaddb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
80 vpaddb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
81 vpaddb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
82 vpaddb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
83 vpaddb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
84 vpaddb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
85 vpaddb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
86 vpaddb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
87 vpaddb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
88 vpaddb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
89 vpaddb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
90 vpaddb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
91 vpaddb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
92 vpaddb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
93 vpaddb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
94 vpaddb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
95 vpaddb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
96 vpaddsb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
97 vpaddsb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
98 vpaddsb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
99 vpaddsb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
100 vpaddsb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
101 vpaddsb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
102 vpaddsb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
103 vpaddsb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
104 vpaddsb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
105 vpaddsb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
106 vpaddsb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
107 vpaddsb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
108 vpaddsb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
109 vpaddsb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
110 vpaddsb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
111 vpaddsb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
112 vpaddsb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
113 vpaddsb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
114 vpaddsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
115 vpaddsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
116 vpaddsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
117 vpaddsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
118 vpaddsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
119 vpaddsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
120 vpaddsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
121 vpaddsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
122 vpaddsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
123 vpaddsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
124 vpaddsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
125 vpaddsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
126 vpaddsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
127 vpaddsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
128 vpaddsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
129 vpaddsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
130 vpaddsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
131 vpaddsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
132 vpaddusb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
133 vpaddusb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
134 vpaddusb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
135 vpaddusb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
136 vpaddusb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
137 vpaddusb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
138 vpaddusb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
139 vpaddusb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
140 vpaddusb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
141 vpaddusb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
142 vpaddusb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
143 vpaddusb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
144 vpaddusb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
145 vpaddusb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
146 vpaddusb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
147 vpaddusb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
148 vpaddusb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
149 vpaddusb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
150 vpaddusw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
151 vpaddusw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
152 vpaddusw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
153 vpaddusw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
154 vpaddusw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
155 vpaddusw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
156 vpaddusw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
157 vpaddusw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
158 vpaddusw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
159 vpaddusw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
160 vpaddusw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
161 vpaddusw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
162 vpaddusw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
163 vpaddusw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
164 vpaddusw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
165 vpaddusw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
166 vpaddusw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
167 vpaddusw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
168 vpaddw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
169 vpaddw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
170 vpaddw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
171 vpaddw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
172 vpaddw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
173 vpaddw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
174 vpaddw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
175 vpaddw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
176 vpaddw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
177 vpaddw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
178 vpaddw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
179 vpaddw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
180 vpaddw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
181 vpaddw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
182 vpaddw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
183 vpaddw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
184 vpaddw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
185 vpaddw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
186 vpalignr $0xab, %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
187 vpalignr $0xab, %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
188 vpalignr $0xab, %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
189 vpalignr $123, %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
190 vpalignr $123, (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
191 vpalignr $123, 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
192 vpalignr $123, 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
193 vpalignr $123, 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
194 vpalignr $123, -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
195 vpalignr $123, -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
196 vpalignr $0xab, %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
197 vpalignr $0xab, %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
198 vpalignr $0xab, %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
199 vpalignr $123, %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
200 vpalignr $123, (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
201 vpalignr $123, 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
202 vpalignr $123, 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
203 vpalignr $123, 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
204 vpalignr $123, -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
205 vpalignr $123, -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
206 vpavgb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
207 vpavgb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
208 vpavgb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
209 vpavgb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
210 vpavgb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
211 vpavgb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
212 vpavgb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
213 vpavgb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
214 vpavgb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
215 vpavgb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
216 vpavgb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
217 vpavgb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
218 vpavgb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
219 vpavgb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
220 vpavgb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
221 vpavgb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
222 vpavgb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
223 vpavgb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
224 vpavgw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
225 vpavgw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
226 vpavgw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
227 vpavgw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
228 vpavgw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
229 vpavgw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
230 vpavgw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
231 vpavgw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
232 vpavgw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
233 vpavgw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
234 vpavgw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
235 vpavgw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
236 vpavgw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
237 vpavgw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
238 vpavgw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
239 vpavgw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
240 vpavgw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
241 vpavgw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
242 vpcmpeqb %xmm29, %xmm30, %k5 # AVX512{BW,VL}
243 vpcmpeqb %xmm29, %xmm30, %k5{%k7} # AVX512{BW,VL}
244 vpcmpeqb (%rcx), %xmm30, %k5 # AVX512{BW,VL}
245 vpcmpeqb 0x123(%rax,%r14,8), %xmm30, %k5 # AVX512{BW,VL}
246 vpcmpeqb 2032(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
247 vpcmpeqb 2048(%rdx), %xmm30, %k5 # AVX512{BW,VL}
248 vpcmpeqb -2048(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
249 vpcmpeqb -2064(%rdx), %xmm30, %k5 # AVX512{BW,VL}
250 vpcmpeqb %ymm29, %ymm30, %k5 # AVX512{BW,VL}
251 vpcmpeqb %ymm29, %ymm30, %k5{%k7} # AVX512{BW,VL}
252 vpcmpeqb (%rcx), %ymm30, %k5 # AVX512{BW,VL}
253 vpcmpeqb 0x123(%rax,%r14,8), %ymm30, %k5 # AVX512{BW,VL}
254 vpcmpeqb 4064(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
255 vpcmpeqb 4096(%rdx), %ymm30, %k5 # AVX512{BW,VL}
256 vpcmpeqb -4096(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
257 vpcmpeqb -4128(%rdx), %ymm30, %k5 # AVX512{BW,VL}
258 vpcmpeqw %xmm29, %xmm30, %k5 # AVX512{BW,VL}
259 vpcmpeqw %xmm29, %xmm30, %k5{%k7} # AVX512{BW,VL}
260 vpcmpeqw (%rcx), %xmm30, %k5 # AVX512{BW,VL}
261 vpcmpeqw 0x123(%rax,%r14,8), %xmm30, %k5 # AVX512{BW,VL}
262 vpcmpeqw 2032(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
263 vpcmpeqw 2048(%rdx), %xmm30, %k5 # AVX512{BW,VL}
264 vpcmpeqw -2048(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
265 vpcmpeqw -2064(%rdx), %xmm30, %k5 # AVX512{BW,VL}
266 vpcmpeqw %ymm29, %ymm30, %k5 # AVX512{BW,VL}
267 vpcmpeqw %ymm29, %ymm30, %k5{%k7} # AVX512{BW,VL}
268 vpcmpeqw (%rcx), %ymm30, %k5 # AVX512{BW,VL}
269 vpcmpeqw 0x123(%rax,%r14,8), %ymm30, %k5 # AVX512{BW,VL}
270 vpcmpeqw 4064(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
271 vpcmpeqw 4096(%rdx), %ymm30, %k5 # AVX512{BW,VL}
272 vpcmpeqw -4096(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
273 vpcmpeqw -4128(%rdx), %ymm30, %k5 # AVX512{BW,VL}
274 vpcmpgtb %xmm29, %xmm30, %k5 # AVX512{BW,VL}
275 vpcmpgtb %xmm29, %xmm30, %k5{%k7} # AVX512{BW,VL}
276 vpcmpgtb (%rcx), %xmm30, %k5 # AVX512{BW,VL}
277 vpcmpgtb 0x123(%rax,%r14,8), %xmm30, %k5 # AVX512{BW,VL}
278 vpcmpgtb 2032(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
279 vpcmpgtb 2048(%rdx), %xmm30, %k5 # AVX512{BW,VL}
280 vpcmpgtb -2048(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
281 vpcmpgtb -2064(%rdx), %xmm30, %k5 # AVX512{BW,VL}
282 vpcmpgtb %ymm29, %ymm30, %k5 # AVX512{BW,VL}
283 vpcmpgtb %ymm29, %ymm30, %k5{%k7} # AVX512{BW,VL}
284 vpcmpgtb (%rcx), %ymm30, %k5 # AVX512{BW,VL}
285 vpcmpgtb 0x123(%rax,%r14,8), %ymm30, %k5 # AVX512{BW,VL}
286 vpcmpgtb 4064(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
287 vpcmpgtb 4096(%rdx), %ymm30, %k5 # AVX512{BW,VL}
288 vpcmpgtb -4096(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
289 vpcmpgtb -4128(%rdx), %ymm30, %k5 # AVX512{BW,VL}
290 vpcmpgtw %xmm29, %xmm30, %k5 # AVX512{BW,VL}
291 vpcmpgtw %xmm29, %xmm30, %k5{%k7} # AVX512{BW,VL}
292 vpcmpgtw (%rcx), %xmm30, %k5 # AVX512{BW,VL}
293 vpcmpgtw 0x123(%rax,%r14,8), %xmm30, %k5 # AVX512{BW,VL}
294 vpcmpgtw 2032(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
295 vpcmpgtw 2048(%rdx), %xmm30, %k5 # AVX512{BW,VL}
296 vpcmpgtw -2048(%rdx), %xmm30, %k5 # AVX512{BW,VL} Disp8
297 vpcmpgtw -2064(%rdx), %xmm30, %k5 # AVX512{BW,VL}
298 vpcmpgtw %ymm29, %ymm30, %k5 # AVX512{BW,VL}
299 vpcmpgtw %ymm29, %ymm30, %k5{%k7} # AVX512{BW,VL}
300 vpcmpgtw (%rcx), %ymm30, %k5 # AVX512{BW,VL}
301 vpcmpgtw 0x123(%rax,%r14,8), %ymm30, %k5 # AVX512{BW,VL}
302 vpcmpgtw 4064(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
303 vpcmpgtw 4096(%rdx), %ymm30, %k5 # AVX512{BW,VL}
304 vpcmpgtw -4096(%rdx), %ymm30, %k5 # AVX512{BW,VL} Disp8
305 vpcmpgtw -4128(%rdx), %ymm30, %k5 # AVX512{BW,VL}
306 vpmaddubsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
307 vpmaddubsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
308 vpmaddubsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
309 vpmaddubsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
310 vpmaddubsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
311 vpmaddubsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
312 vpmaddubsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
313 vpmaddubsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
314 vpmaddubsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
315 vpmaddubsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
316 vpmaddubsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
317 vpmaddubsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
318 vpmaddubsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
319 vpmaddubsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
320 vpmaddubsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
321 vpmaddubsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
322 vpmaddubsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
323 vpmaddubsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
324 vpmaddwd %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
325 vpmaddwd %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
326 vpmaddwd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
327 vpmaddwd (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
328 vpmaddwd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
329 vpmaddwd 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
330 vpmaddwd 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
331 vpmaddwd -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
332 vpmaddwd -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
333 vpmaddwd %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
334 vpmaddwd %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
335 vpmaddwd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
336 vpmaddwd (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
337 vpmaddwd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
338 vpmaddwd 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
339 vpmaddwd 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
340 vpmaddwd -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
341 vpmaddwd -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
342 vpmaxsb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
343 vpmaxsb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
344 vpmaxsb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
345 vpmaxsb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
346 vpmaxsb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
347 vpmaxsb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
348 vpmaxsb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
349 vpmaxsb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
350 vpmaxsb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
351 vpmaxsb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
352 vpmaxsb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
353 vpmaxsb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
354 vpmaxsb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
355 vpmaxsb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
356 vpmaxsb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
357 vpmaxsb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
358 vpmaxsb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
359 vpmaxsb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
360 vpmaxsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
361 vpmaxsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
362 vpmaxsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
363 vpmaxsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
364 vpmaxsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
365 vpmaxsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
366 vpmaxsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
367 vpmaxsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
368 vpmaxsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
369 vpmaxsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
370 vpmaxsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
371 vpmaxsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
372 vpmaxsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
373 vpmaxsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
374 vpmaxsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
375 vpmaxsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
376 vpmaxsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
377 vpmaxsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
378 vpmaxub %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
379 vpmaxub %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
380 vpmaxub %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
381 vpmaxub (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
382 vpmaxub 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
383 vpmaxub 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
384 vpmaxub 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
385 vpmaxub -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
386 vpmaxub -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
387 vpmaxub %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
388 vpmaxub %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
389 vpmaxub %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
390 vpmaxub (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
391 vpmaxub 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
392 vpmaxub 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
393 vpmaxub 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
394 vpmaxub -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
395 vpmaxub -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
396 vpmaxuw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
397 vpmaxuw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
398 vpmaxuw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
399 vpmaxuw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
400 vpmaxuw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
401 vpmaxuw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
402 vpmaxuw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
403 vpmaxuw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
404 vpmaxuw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
405 vpmaxuw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
406 vpmaxuw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
407 vpmaxuw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
408 vpmaxuw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
409 vpmaxuw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
410 vpmaxuw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
411 vpmaxuw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
412 vpmaxuw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
413 vpmaxuw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
414 vpminsb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
415 vpminsb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
416 vpminsb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
417 vpminsb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
418 vpminsb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
419 vpminsb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
420 vpminsb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
421 vpminsb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
422 vpminsb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
423 vpminsb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
424 vpminsb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
425 vpminsb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
426 vpminsb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
427 vpminsb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
428 vpminsb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
429 vpminsb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
430 vpminsb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
431 vpminsb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
432 vpminsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
433 vpminsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
434 vpminsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
435 vpminsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
436 vpminsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
437 vpminsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
438 vpminsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
439 vpminsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
440 vpminsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
441 vpminsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
442 vpminsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
443 vpminsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
444 vpminsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
445 vpminsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
446 vpminsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
447 vpminsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
448 vpminsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
449 vpminsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
450 vpminub %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
451 vpminub %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
452 vpminub %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
453 vpminub (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
454 vpminub 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
455 vpminub 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
456 vpminub 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
457 vpminub -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
458 vpminub -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
459 vpminub %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
460 vpminub %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
461 vpminub %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
462 vpminub (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
463 vpminub 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
464 vpminub 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
465 vpminub 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
466 vpminub -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
467 vpminub -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
468 vpminuw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
469 vpminuw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
470 vpminuw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
471 vpminuw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
472 vpminuw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
473 vpminuw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
474 vpminuw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
475 vpminuw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
476 vpminuw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
477 vpminuw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
478 vpminuw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
479 vpminuw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
480 vpminuw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
481 vpminuw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
482 vpminuw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
483 vpminuw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
484 vpminuw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
485 vpminuw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
486 vpmovsxbw %xmm29, %xmm30 # AVX512{BW,VL}
487 vpmovsxbw %xmm29, %xmm30{%k7} # AVX512{BW,VL}
488 vpmovsxbw %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
489 vpmovsxbw (%rcx), %xmm30 # AVX512{BW,VL}
490 vpmovsxbw 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
491 vpmovsxbw 1016(%rdx), %xmm30 # AVX512{BW,VL} Disp8
492 vpmovsxbw 1024(%rdx), %xmm30 # AVX512{BW,VL}
493 vpmovsxbw -1024(%rdx), %xmm30 # AVX512{BW,VL} Disp8
494 vpmovsxbw -1032(%rdx), %xmm30 # AVX512{BW,VL}
495 vpmovsxbw %xmm29, %ymm30 # AVX512{BW,VL}
496 vpmovsxbw %xmm29, %ymm30{%k7} # AVX512{BW,VL}
497 vpmovsxbw %xmm29, %ymm30{%k7}{z} # AVX512{BW,VL}
498 vpmovsxbw (%rcx), %ymm30 # AVX512{BW,VL}
499 vpmovsxbw 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
500 vpmovsxbw 2032(%rdx), %ymm30 # AVX512{BW,VL} Disp8
501 vpmovsxbw 2048(%rdx), %ymm30 # AVX512{BW,VL}
502 vpmovsxbw -2048(%rdx), %ymm30 # AVX512{BW,VL} Disp8
503 vpmovsxbw -2064(%rdx), %ymm30 # AVX512{BW,VL}
504 vpmovzxbw %xmm29, %xmm30 # AVX512{BW,VL}
505 vpmovzxbw %xmm29, %xmm30{%k7} # AVX512{BW,VL}
506 vpmovzxbw %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
507 vpmovzxbw (%rcx), %xmm30 # AVX512{BW,VL}
508 vpmovzxbw 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
509 vpmovzxbw 1016(%rdx), %xmm30 # AVX512{BW,VL} Disp8
510 vpmovzxbw 1024(%rdx), %xmm30 # AVX512{BW,VL}
511 vpmovzxbw -1024(%rdx), %xmm30 # AVX512{BW,VL} Disp8
512 vpmovzxbw -1032(%rdx), %xmm30 # AVX512{BW,VL}
513 vpmovzxbw %xmm29, %ymm30 # AVX512{BW,VL}
514 vpmovzxbw %xmm29, %ymm30{%k7} # AVX512{BW,VL}
515 vpmovzxbw %xmm29, %ymm30{%k7}{z} # AVX512{BW,VL}
516 vpmovzxbw (%rcx), %ymm30 # AVX512{BW,VL}
517 vpmovzxbw 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
518 vpmovzxbw 2032(%rdx), %ymm30 # AVX512{BW,VL} Disp8
519 vpmovzxbw 2048(%rdx), %ymm30 # AVX512{BW,VL}
520 vpmovzxbw -2048(%rdx), %ymm30 # AVX512{BW,VL} Disp8
521 vpmovzxbw -2064(%rdx), %ymm30 # AVX512{BW,VL}
522 vpmulhrsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
523 vpmulhrsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
524 vpmulhrsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
525 vpmulhrsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
526 vpmulhrsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
527 vpmulhrsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
528 vpmulhrsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
529 vpmulhrsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
530 vpmulhrsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
531 vpmulhrsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
532 vpmulhrsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
533 vpmulhrsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
534 vpmulhrsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
535 vpmulhrsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
536 vpmulhrsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
537 vpmulhrsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
538 vpmulhrsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
539 vpmulhrsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
540 vpmulhuw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
541 vpmulhuw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
542 vpmulhuw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
543 vpmulhuw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
544 vpmulhuw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
545 vpmulhuw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
546 vpmulhuw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
547 vpmulhuw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
548 vpmulhuw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
549 vpmulhuw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
550 vpmulhuw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
551 vpmulhuw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
552 vpmulhuw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
553 vpmulhuw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
554 vpmulhuw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
555 vpmulhuw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
556 vpmulhuw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
557 vpmulhuw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
558 vpmulhw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
559 vpmulhw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
560 vpmulhw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
561 vpmulhw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
562 vpmulhw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
563 vpmulhw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
564 vpmulhw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
565 vpmulhw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
566 vpmulhw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
567 vpmulhw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
568 vpmulhw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
569 vpmulhw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
570 vpmulhw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
571 vpmulhw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
572 vpmulhw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
573 vpmulhw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
574 vpmulhw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
575 vpmulhw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
576 vpmullw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
577 vpmullw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
578 vpmullw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
579 vpmullw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
580 vpmullw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
581 vpmullw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
582 vpmullw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
583 vpmullw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
584 vpmullw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
585 vpmullw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
586 vpmullw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
587 vpmullw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
588 vpmullw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
589 vpmullw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
590 vpmullw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
591 vpmullw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
592 vpmullw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
593 vpmullw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
594 vpsadbw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
595 vpsadbw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
596 vpsadbw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
597 vpsadbw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
598 vpsadbw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
599 vpsadbw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
600 vpsadbw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
601 vpsadbw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
602 vpsadbw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
603 vpsadbw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
604 vpsadbw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
605 vpsadbw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
606 vpsadbw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
607 vpsadbw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
608 vpshufb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
609 vpshufb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
610 vpshufb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
611 vpshufb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
612 vpshufb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
613 vpshufb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
614 vpshufb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
615 vpshufb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
616 vpshufb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
617 vpshufb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
618 vpshufb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
619 vpshufb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
620 vpshufb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
621 vpshufb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
622 vpshufb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
623 vpshufb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
624 vpshufb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
625 vpshufb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
626 vpshufhw $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
627 vpshufhw $0xab, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
628 vpshufhw $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
629 vpshufhw $123, %xmm29, %xmm30 # AVX512{BW,VL}
630 vpshufhw $123, (%rcx), %xmm30 # AVX512{BW,VL}
631 vpshufhw $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
632 vpshufhw $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
633 vpshufhw $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
634 vpshufhw $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
635 vpshufhw $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
636 vpshufhw $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
637 vpshufhw $0xab, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
638 vpshufhw $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
639 vpshufhw $123, %ymm29, %ymm30 # AVX512{BW,VL}
640 vpshufhw $123, (%rcx), %ymm30 # AVX512{BW,VL}
641 vpshufhw $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
642 vpshufhw $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
643 vpshufhw $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
644 vpshufhw $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
645 vpshufhw $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
646 vpshuflw $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
647 vpshuflw $0xab, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
648 vpshuflw $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
649 vpshuflw $123, %xmm29, %xmm30 # AVX512{BW,VL}
650 vpshuflw $123, (%rcx), %xmm30 # AVX512{BW,VL}
651 vpshuflw $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
652 vpshuflw $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
653 vpshuflw $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
654 vpshuflw $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
655 vpshuflw $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
656 vpshuflw $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
657 vpshuflw $0xab, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
658 vpshuflw $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
659 vpshuflw $123, %ymm29, %ymm30 # AVX512{BW,VL}
660 vpshuflw $123, (%rcx), %ymm30 # AVX512{BW,VL}
661 vpshuflw $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
662 vpshuflw $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
663 vpshuflw $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
664 vpshuflw $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
665 vpshuflw $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
666 vpsllw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
667 vpsllw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
668 vpsllw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
669 vpsllw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
670 vpsllw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
671 vpsllw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
672 vpsllw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
673 vpsllw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
674 vpsllw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
675 vpsllw %xmm28, %ymm29, %ymm30 # AVX512{BW,VL}
676 vpsllw %xmm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
677 vpsllw %xmm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
678 vpsllw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
679 vpsllw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
680 vpsllw 2032(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
681 vpsllw 2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
682 vpsllw -2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
683 vpsllw -2064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
684 vpsraw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
685 vpsraw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
686 vpsraw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
687 vpsraw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
688 vpsraw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
689 vpsraw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
690 vpsraw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
691 vpsraw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
692 vpsraw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
693 vpsraw %xmm28, %ymm29, %ymm30 # AVX512{BW,VL}
694 vpsraw %xmm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
695 vpsraw %xmm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
696 vpsraw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
697 vpsraw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
698 vpsraw 2032(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
699 vpsraw 2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
700 vpsraw -2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
701 vpsraw -2064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
702 vpsrlw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
703 vpsrlw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
704 vpsrlw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
705 vpsrlw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
706 vpsrlw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
707 vpsrlw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
708 vpsrlw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
709 vpsrlw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
710 vpsrlw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
711 vpsrlw %xmm28, %ymm29, %ymm30 # AVX512{BW,VL}
712 vpsrlw %xmm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
713 vpsrlw %xmm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
714 vpsrlw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
715 vpsrlw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
716 vpsrlw 2032(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
717 vpsrlw 2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
718 vpsrlw -2048(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
719 vpsrlw -2064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
720 vpsrldq $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
721 vpsrldq $123, %xmm29, %xmm30 # AVX512{BW,VL}
722 vpsrldq $123, (%rcx), %xmm30 # AVX512{BW,VL}
723 vpsrldq $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
724 vpsrldq $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
725 vpsrldq $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
726 vpsrldq $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
727 vpsrldq $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
728 vpsrldq $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
729 vpsrldq $123, %ymm29, %ymm30 # AVX512{BW,VL}
730 vpsrldq $123, (%rcx), %ymm30 # AVX512{BW,VL}
731 vpsrldq $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
732 vpsrldq $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
733 vpsrldq $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
734 vpsrldq $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
735 vpsrldq $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
736 vpsrlw $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
737 vpsrlw $0xab, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
738 vpsrlw $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
739 vpsrlw $123, %xmm29, %xmm30 # AVX512{BW,VL}
740 vpsrlw $123, (%rcx), %xmm30 # AVX512{BW,VL}
741 vpsrlw $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
742 vpsrlw $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
743 vpsrlw $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
744 vpsrlw $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
745 vpsrlw $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
746 vpsrlw $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
747 vpsrlw $0xab, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
748 vpsrlw $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
749 vpsrlw $123, %ymm29, %ymm30 # AVX512{BW,VL}
750 vpsrlw $123, (%rcx), %ymm30 # AVX512{BW,VL}
751 vpsrlw $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
752 vpsrlw $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
753 vpsrlw $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
754 vpsrlw $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
755 vpsrlw $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
756 vpsraw $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
757 vpsraw $0xab, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
758 vpsraw $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
759 vpsraw $123, %xmm29, %xmm30 # AVX512{BW,VL}
760 vpsraw $123, (%rcx), %xmm30 # AVX512{BW,VL}
761 vpsraw $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
762 vpsraw $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
763 vpsraw $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
764 vpsraw $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
765 vpsraw $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
766 vpsraw $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
767 vpsraw $0xab, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
768 vpsraw $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
769 vpsraw $123, %ymm29, %ymm30 # AVX512{BW,VL}
770 vpsraw $123, (%rcx), %ymm30 # AVX512{BW,VL}
771 vpsraw $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
772 vpsraw $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
773 vpsraw $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
774 vpsraw $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
775 vpsraw $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
776 vpsubb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
777 vpsubb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
778 vpsubb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
779 vpsubb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
780 vpsubb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
781 vpsubb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
782 vpsubb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
783 vpsubb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
784 vpsubb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
785 vpsubb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
786 vpsubb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
787 vpsubb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
788 vpsubb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
789 vpsubb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
790 vpsubb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
791 vpsubb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
792 vpsubb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
793 vpsubb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
794 vpsubsb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
795 vpsubsb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
796 vpsubsb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
797 vpsubsb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
798 vpsubsb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
799 vpsubsb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
800 vpsubsb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
801 vpsubsb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
802 vpsubsb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
803 vpsubsb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
804 vpsubsb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
805 vpsubsb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
806 vpsubsb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
807 vpsubsb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
808 vpsubsb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
809 vpsubsb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
810 vpsubsb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
811 vpsubsb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
812 vpsubsw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
813 vpsubsw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
814 vpsubsw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
815 vpsubsw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
816 vpsubsw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
817 vpsubsw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
818 vpsubsw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
819 vpsubsw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
820 vpsubsw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
821 vpsubsw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
822 vpsubsw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
823 vpsubsw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
824 vpsubsw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
825 vpsubsw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
826 vpsubsw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
827 vpsubsw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
828 vpsubsw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
829 vpsubsw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
830 vpsubusb %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
831 vpsubusb %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
832 vpsubusb %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
833 vpsubusb (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
834 vpsubusb 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
835 vpsubusb 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
836 vpsubusb 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
837 vpsubusb -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
838 vpsubusb -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
839 vpsubusb %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
840 vpsubusb %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
841 vpsubusb %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
842 vpsubusb (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
843 vpsubusb 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
844 vpsubusb 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
845 vpsubusb 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
846 vpsubusb -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
847 vpsubusb -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
848 vpsubusw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
849 vpsubusw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
850 vpsubusw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
851 vpsubusw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
852 vpsubusw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
853 vpsubusw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
854 vpsubusw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
855 vpsubusw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
856 vpsubusw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
857 vpsubusw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
858 vpsubusw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
859 vpsubusw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
860 vpsubusw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
861 vpsubusw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
862 vpsubusw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
863 vpsubusw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
864 vpsubusw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
865 vpsubusw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
866 vpsubw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
867 vpsubw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
868 vpsubw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
869 vpsubw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
870 vpsubw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
871 vpsubw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
872 vpsubw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
873 vpsubw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
874 vpsubw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
875 vpsubw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
876 vpsubw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
877 vpsubw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
878 vpsubw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
879 vpsubw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
880 vpsubw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
881 vpsubw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
882 vpsubw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
883 vpsubw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
884 vpunpckhbw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
885 vpunpckhbw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
886 vpunpckhbw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
887 vpunpckhbw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
888 vpunpckhbw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
889 vpunpckhbw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
890 vpunpckhbw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
891 vpunpckhbw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
892 vpunpckhbw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
893 vpunpckhbw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
894 vpunpckhbw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
895 vpunpckhbw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
896 vpunpckhbw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
897 vpunpckhbw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
898 vpunpckhbw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
899 vpunpckhbw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
900 vpunpckhbw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
901 vpunpckhbw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
902 vpunpckhwd %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
903 vpunpckhwd %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
904 vpunpckhwd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
905 vpunpckhwd (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
906 vpunpckhwd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
907 vpunpckhwd 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
908 vpunpckhwd 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
909 vpunpckhwd -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
910 vpunpckhwd -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
911 vpunpckhwd %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
912 vpunpckhwd %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
913 vpunpckhwd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
914 vpunpckhwd (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
915 vpunpckhwd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
916 vpunpckhwd 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
917 vpunpckhwd 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
918 vpunpckhwd -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
919 vpunpckhwd -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
920 vpunpcklbw %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
921 vpunpcklbw %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
922 vpunpcklbw %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
923 vpunpcklbw (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
924 vpunpcklbw 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
925 vpunpcklbw 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
926 vpunpcklbw 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
927 vpunpcklbw -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
928 vpunpcklbw -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
929 vpunpcklbw %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
930 vpunpcklbw %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
931 vpunpcklbw %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
932 vpunpcklbw (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
933 vpunpcklbw 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
934 vpunpcklbw 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
935 vpunpcklbw 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
936 vpunpcklbw -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
937 vpunpcklbw -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
938 vpunpcklwd %xmm28, %xmm29, %xmm30 # AVX512{BW,VL}
939 vpunpcklwd %xmm28, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
940 vpunpcklwd %xmm28, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
941 vpunpcklwd (%rcx), %xmm29, %xmm30 # AVX512{BW,VL}
942 vpunpcklwd 0x123(%rax,%r14,8), %xmm29, %xmm30 # AVX512{BW,VL}
943 vpunpcklwd 2032(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
944 vpunpcklwd 2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
945 vpunpcklwd -2048(%rdx), %xmm29, %xmm30 # AVX512{BW,VL} Disp8
946 vpunpcklwd -2064(%rdx), %xmm29, %xmm30 # AVX512{BW,VL}
947 vpunpcklwd %ymm28, %ymm29, %ymm30 # AVX512{BW,VL}
948 vpunpcklwd %ymm28, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
949 vpunpcklwd %ymm28, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
950 vpunpcklwd (%rcx), %ymm29, %ymm30 # AVX512{BW,VL}
951 vpunpcklwd 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{BW,VL}
952 vpunpcklwd 4064(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
953 vpunpcklwd 4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
954 vpunpcklwd -4096(%rdx), %ymm29, %ymm30 # AVX512{BW,VL} Disp8
955 vpunpcklwd -4128(%rdx), %ymm29, %ymm30 # AVX512{BW,VL}
956 vpslldq $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
957 vpslldq $123, %xmm29, %xmm30 # AVX512{BW,VL}
958 vpslldq $123, (%rcx), %xmm30 # AVX512{BW,VL}
959 vpslldq $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
960 vpslldq $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
961 vpslldq $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
962 vpslldq $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
963 vpslldq $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
964 vpslldq $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
965 vpslldq $123, %ymm29, %ymm30 # AVX512{BW,VL}
966 vpslldq $123, (%rcx), %ymm30 # AVX512{BW,VL}
967 vpslldq $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
968 vpslldq $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
969 vpslldq $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
970 vpslldq $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
971 vpslldq $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
972 vpsllw $0xab, %xmm29, %xmm30 # AVX512{BW,VL}
973 vpsllw $0xab, %xmm29, %xmm30{%k7} # AVX512{BW,VL}
974 vpsllw $0xab, %xmm29, %xmm30{%k7}{z} # AVX512{BW,VL}
975 vpsllw $123, %xmm29, %xmm30 # AVX512{BW,VL}
976 vpsllw $123, (%rcx), %xmm30 # AVX512{BW,VL}
977 vpsllw $123, 0x123(%rax,%r14,8), %xmm30 # AVX512{BW,VL}
978 vpsllw $123, 2032(%rdx), %xmm30 # AVX512{BW,VL} Disp8
979 vpsllw $123, 2048(%rdx), %xmm30 # AVX512{BW,VL}
980 vpsllw $123, -2048(%rdx), %xmm30 # AVX512{BW,VL} Disp8
981 vpsllw $123, -2064(%rdx), %xmm30 # AVX512{BW,VL}
982 vpsllw $0xab, %ymm29, %ymm30 # AVX512{BW,VL}
983 vpsllw $0xab, %ymm29, %ymm30{%k7} # AVX512{BW,VL}
984 vpsllw $0xab, %ymm29, %ymm30{%k7}{z} # AVX512{BW,VL}
985 vpsllw $123, %ymm29, %ymm30 # AVX512{BW,VL}
986 vpsllw $123, (%rcx), %ymm30 # AVX512{BW,VL}
987 vpsllw $123, 0x123(%rax,%r14,8), %ymm30 # AVX512{BW,VL}
988 vpsllw $123, 4064(%rdx), %ymm30 # AVX512{BW,VL} Disp8
989 vpsllw $123, 4096(%rdx), %ymm30 # AVX512{BW,VL}
990 vpsllw $123, -4096(%rdx), %ymm30 # AVX512{BW,VL} Disp8
991 vpsllw $123, -4128(%rdx), %ymm30 # AVX512{BW,VL}
992
993 .intel_syntax noprefix
994 vpabsb xmm30, xmm29 # AVX512{BW,VL}
995 vpabsb xmm30{k7}, xmm29 # AVX512{BW,VL}
996 vpabsb xmm30{k7}{z}, xmm29 # AVX512{BW,VL}
997 vpabsb xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
998 vpabsb xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
999 vpabsb xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1000 vpabsb xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1001 vpabsb xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1002 vpabsb xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1003 vpabsb ymm30, ymm29 # AVX512{BW,VL}
1004 vpabsb ymm30{k7}, ymm29 # AVX512{BW,VL}
1005 vpabsb ymm30{k7}{z}, ymm29 # AVX512{BW,VL}
1006 vpabsb ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1007 vpabsb ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1008 vpabsb ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1009 vpabsb ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1010 vpabsb ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1011 vpabsb ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1012 vpabsw xmm30, xmm29 # AVX512{BW,VL}
1013 vpabsw xmm30{k7}, xmm29 # AVX512{BW,VL}
1014 vpabsw xmm30{k7}{z}, xmm29 # AVX512{BW,VL}
1015 vpabsw xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1016 vpabsw xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1017 vpabsw xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1018 vpabsw xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1019 vpabsw xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1020 vpabsw xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1021 vpabsw ymm30, ymm29 # AVX512{BW,VL}
1022 vpabsw ymm30{k7}, ymm29 # AVX512{BW,VL}
1023 vpabsw ymm30{k7}{z}, ymm29 # AVX512{BW,VL}
1024 vpabsw ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1025 vpabsw ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1026 vpabsw ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1027 vpabsw ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1028 vpabsw ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1029 vpabsw ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1030 vpacksswb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1031 vpacksswb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1032 vpacksswb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1033 vpacksswb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1034 vpacksswb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1035 vpacksswb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1036 vpacksswb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1037 vpacksswb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1038 vpacksswb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1039 vpacksswb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1040 vpacksswb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1041 vpacksswb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1042 vpacksswb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1043 vpacksswb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1044 vpacksswb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1045 vpacksswb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1046 vpacksswb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1047 vpacksswb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1048 vpackuswb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1049 vpackuswb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1050 vpackuswb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1051 vpackuswb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1052 vpackuswb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1053 vpackuswb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1054 vpackuswb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1055 vpackuswb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1056 vpackuswb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1057 vpackuswb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1058 vpackuswb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1059 vpackuswb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1060 vpackuswb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1061 vpackuswb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1062 vpackuswb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1063 vpackuswb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1064 vpackuswb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1065 vpackuswb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1066 vpaddb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1067 vpaddb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1068 vpaddb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1069 vpaddb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1070 vpaddb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1071 vpaddb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1072 vpaddb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1073 vpaddb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1074 vpaddb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1075 vpaddb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1076 vpaddb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1077 vpaddb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1078 vpaddb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1079 vpaddb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1080 vpaddb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1081 vpaddb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1082 vpaddb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1083 vpaddb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1084 vpaddsb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1085 vpaddsb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1086 vpaddsb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1087 vpaddsb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1088 vpaddsb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1089 vpaddsb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1090 vpaddsb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1091 vpaddsb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1092 vpaddsb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1093 vpaddsb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1094 vpaddsb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1095 vpaddsb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1096 vpaddsb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1097 vpaddsb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1098 vpaddsb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1099 vpaddsb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1100 vpaddsb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1101 vpaddsb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1102 vpaddsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1103 vpaddsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1104 vpaddsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1105 vpaddsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1106 vpaddsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1107 vpaddsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1108 vpaddsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1109 vpaddsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1110 vpaddsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1111 vpaddsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1112 vpaddsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1113 vpaddsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1114 vpaddsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1115 vpaddsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1116 vpaddsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1117 vpaddsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1118 vpaddsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1119 vpaddsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1120 vpaddusb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1121 vpaddusb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1122 vpaddusb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1123 vpaddusb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1124 vpaddusb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1125 vpaddusb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1126 vpaddusb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1127 vpaddusb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1128 vpaddusb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1129 vpaddusb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1130 vpaddusb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1131 vpaddusb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1132 vpaddusb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1133 vpaddusb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1134 vpaddusb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1135 vpaddusb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1136 vpaddusb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1137 vpaddusb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1138 vpaddusw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1139 vpaddusw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1140 vpaddusw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1141 vpaddusw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1142 vpaddusw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1143 vpaddusw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1144 vpaddusw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1145 vpaddusw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1146 vpaddusw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1147 vpaddusw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1148 vpaddusw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1149 vpaddusw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1150 vpaddusw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1151 vpaddusw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1152 vpaddusw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1153 vpaddusw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1154 vpaddusw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1155 vpaddusw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1156 vpaddw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1157 vpaddw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1158 vpaddw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1159 vpaddw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1160 vpaddw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1161 vpaddw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1162 vpaddw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1163 vpaddw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1164 vpaddw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1165 vpaddw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1166 vpaddw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1167 vpaddw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1168 vpaddw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1169 vpaddw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1170 vpaddw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1171 vpaddw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1172 vpaddw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1173 vpaddw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1174 vpalignr xmm30, xmm29, xmm28, 0xab # AVX512{BW,VL}
1175 vpalignr xmm30{k7}, xmm29, xmm28, 0xab # AVX512{BW,VL}
1176 vpalignr xmm30{k7}{z}, xmm29, xmm28, 0xab # AVX512{BW,VL}
1177 vpalignr xmm30, xmm29, xmm28, 123 # AVX512{BW,VL}
1178 vpalignr xmm30, xmm29, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1179 vpalignr xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1180 vpalignr xmm30, xmm29, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1181 vpalignr xmm30, xmm29, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1182 vpalignr xmm30, xmm29, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1183 vpalignr xmm30, xmm29, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1184 vpalignr ymm30, ymm29, ymm28, 0xab # AVX512{BW,VL}
1185 vpalignr ymm30{k7}, ymm29, ymm28, 0xab # AVX512{BW,VL}
1186 vpalignr ymm30{k7}{z}, ymm29, ymm28, 0xab # AVX512{BW,VL}
1187 vpalignr ymm30, ymm29, ymm28, 123 # AVX512{BW,VL}
1188 vpalignr ymm30, ymm29, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1189 vpalignr ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1190 vpalignr ymm30, ymm29, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1191 vpalignr ymm30, ymm29, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1192 vpalignr ymm30, ymm29, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1193 vpalignr ymm30, ymm29, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1194 vpavgb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1195 vpavgb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1196 vpavgb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1197 vpavgb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1198 vpavgb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1199 vpavgb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1200 vpavgb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1201 vpavgb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1202 vpavgb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1203 vpavgb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1204 vpavgb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1205 vpavgb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1206 vpavgb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1207 vpavgb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1208 vpavgb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1209 vpavgb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1210 vpavgb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1211 vpavgb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1212 vpavgw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1213 vpavgw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1214 vpavgw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1215 vpavgw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1216 vpavgw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1217 vpavgw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1218 vpavgw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1219 vpavgw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1220 vpavgw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1221 vpavgw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1222 vpavgw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1223 vpavgw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1224 vpavgw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1225 vpavgw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1226 vpavgw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1227 vpavgw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1228 vpavgw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1229 vpavgw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1230 vpcmpeqb k5, xmm30, xmm29 # AVX512{BW,VL}
1231 vpcmpeqb k5{k7}, xmm30, xmm29 # AVX512{BW,VL}
1232 vpcmpeqb k5, xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1233 vpcmpeqb k5, xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1234 vpcmpeqb k5, xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1235 vpcmpeqb k5, xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1236 vpcmpeqb k5, xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1237 vpcmpeqb k5, xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1238 vpcmpeqb k5, ymm30, ymm29 # AVX512{BW,VL}
1239 vpcmpeqb k5{k7}, ymm30, ymm29 # AVX512{BW,VL}
1240 vpcmpeqb k5, ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1241 vpcmpeqb k5, ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1242 vpcmpeqb k5, ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1243 vpcmpeqb k5, ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1244 vpcmpeqb k5, ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1245 vpcmpeqb k5, ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1246 vpcmpeqw k5, xmm30, xmm29 # AVX512{BW,VL}
1247 vpcmpeqw k5{k7}, xmm30, xmm29 # AVX512{BW,VL}
1248 vpcmpeqw k5, xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1249 vpcmpeqw k5, xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1250 vpcmpeqw k5, xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1251 vpcmpeqw k5, xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1252 vpcmpeqw k5, xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1253 vpcmpeqw k5, xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1254 vpcmpeqw k5, ymm30, ymm29 # AVX512{BW,VL}
1255 vpcmpeqw k5{k7}, ymm30, ymm29 # AVX512{BW,VL}
1256 vpcmpeqw k5, ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1257 vpcmpeqw k5, ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1258 vpcmpeqw k5, ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1259 vpcmpeqw k5, ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1260 vpcmpeqw k5, ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1261 vpcmpeqw k5, ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1262 vpcmpgtb k5, xmm30, xmm29 # AVX512{BW,VL}
1263 vpcmpgtb k5{k7}, xmm30, xmm29 # AVX512{BW,VL}
1264 vpcmpgtb k5, xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1265 vpcmpgtb k5, xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1266 vpcmpgtb k5, xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1267 vpcmpgtb k5, xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1268 vpcmpgtb k5, xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1269 vpcmpgtb k5, xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1270 vpcmpgtb k5, ymm30, ymm29 # AVX512{BW,VL}
1271 vpcmpgtb k5{k7}, ymm30, ymm29 # AVX512{BW,VL}
1272 vpcmpgtb k5, ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1273 vpcmpgtb k5, ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1274 vpcmpgtb k5, ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1275 vpcmpgtb k5, ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1276 vpcmpgtb k5, ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1277 vpcmpgtb k5, ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1278 vpcmpgtw k5, xmm30, xmm29 # AVX512{BW,VL}
1279 vpcmpgtw k5{k7}, xmm30, xmm29 # AVX512{BW,VL}
1280 vpcmpgtw k5, xmm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1281 vpcmpgtw k5, xmm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1282 vpcmpgtw k5, xmm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1283 vpcmpgtw k5, xmm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1284 vpcmpgtw k5, xmm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1285 vpcmpgtw k5, xmm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1286 vpcmpgtw k5, ymm30, ymm29 # AVX512{BW,VL}
1287 vpcmpgtw k5{k7}, ymm30, ymm29 # AVX512{BW,VL}
1288 vpcmpgtw k5, ymm30, YMMWORD PTR [rcx] # AVX512{BW,VL}
1289 vpcmpgtw k5, ymm30, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1290 vpcmpgtw k5, ymm30, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1291 vpcmpgtw k5, ymm30, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1292 vpcmpgtw k5, ymm30, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1293 vpcmpgtw k5, ymm30, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1294 vpmaddubsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1295 vpmaddubsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1296 vpmaddubsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1297 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1298 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1299 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1300 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1301 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1302 vpmaddubsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1303 vpmaddubsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1304 vpmaddubsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1305 vpmaddubsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1306 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1307 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1308 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1309 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1310 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1311 vpmaddubsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1312 vpmaddwd xmm30, xmm29, xmm28 # AVX512{BW,VL}
1313 vpmaddwd xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1314 vpmaddwd xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1315 vpmaddwd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1316 vpmaddwd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1317 vpmaddwd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1318 vpmaddwd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1319 vpmaddwd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1320 vpmaddwd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1321 vpmaddwd ymm30, ymm29, ymm28 # AVX512{BW,VL}
1322 vpmaddwd ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1323 vpmaddwd ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1324 vpmaddwd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1325 vpmaddwd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1326 vpmaddwd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1327 vpmaddwd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1328 vpmaddwd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1329 vpmaddwd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1330 vpmaxsb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1331 vpmaxsb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1332 vpmaxsb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1333 vpmaxsb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1334 vpmaxsb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1335 vpmaxsb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1336 vpmaxsb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1337 vpmaxsb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1338 vpmaxsb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1339 vpmaxsb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1340 vpmaxsb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1341 vpmaxsb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1342 vpmaxsb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1343 vpmaxsb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1344 vpmaxsb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1345 vpmaxsb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1346 vpmaxsb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1347 vpmaxsb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1348 vpmaxsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1349 vpmaxsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1350 vpmaxsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1351 vpmaxsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1352 vpmaxsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1353 vpmaxsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1354 vpmaxsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1355 vpmaxsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1356 vpmaxsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1357 vpmaxsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1358 vpmaxsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1359 vpmaxsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1360 vpmaxsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1361 vpmaxsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1362 vpmaxsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1363 vpmaxsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1364 vpmaxsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1365 vpmaxsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1366 vpmaxub xmm30, xmm29, xmm28 # AVX512{BW,VL}
1367 vpmaxub xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1368 vpmaxub xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1369 vpmaxub xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1370 vpmaxub xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1371 vpmaxub xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1372 vpmaxub xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1373 vpmaxub xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1374 vpmaxub xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1375 vpmaxub ymm30, ymm29, ymm28 # AVX512{BW,VL}
1376 vpmaxub ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1377 vpmaxub ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1378 vpmaxub ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1379 vpmaxub ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1380 vpmaxub ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1381 vpmaxub ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1382 vpmaxub ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1383 vpmaxub ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1384 vpmaxuw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1385 vpmaxuw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1386 vpmaxuw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1387 vpmaxuw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1388 vpmaxuw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1389 vpmaxuw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1390 vpmaxuw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1391 vpmaxuw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1392 vpmaxuw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1393 vpmaxuw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1394 vpmaxuw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1395 vpmaxuw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1396 vpmaxuw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1397 vpmaxuw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1398 vpmaxuw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1399 vpmaxuw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1400 vpmaxuw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1401 vpmaxuw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1402 vpminsb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1403 vpminsb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1404 vpminsb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1405 vpminsb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1406 vpminsb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1407 vpminsb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1408 vpminsb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1409 vpminsb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1410 vpminsb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1411 vpminsb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1412 vpminsb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1413 vpminsb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1414 vpminsb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1415 vpminsb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1416 vpminsb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1417 vpminsb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1418 vpminsb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1419 vpminsb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1420 vpminsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1421 vpminsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1422 vpminsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1423 vpminsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1424 vpminsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1425 vpminsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1426 vpminsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1427 vpminsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1428 vpminsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1429 vpminsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1430 vpminsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1431 vpminsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1432 vpminsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1433 vpminsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1434 vpminsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1435 vpminsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1436 vpminsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1437 vpminsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1438 vpminub xmm30, xmm29, xmm28 # AVX512{BW,VL}
1439 vpminub xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1440 vpminub xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1441 vpminub xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1442 vpminub xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1443 vpminub xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1444 vpminub xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1445 vpminub xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1446 vpminub xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1447 vpminub ymm30, ymm29, ymm28 # AVX512{BW,VL}
1448 vpminub ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1449 vpminub ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1450 vpminub ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1451 vpminub ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1452 vpminub ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1453 vpminub ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1454 vpminub ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1455 vpminub ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1456 vpminuw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1457 vpminuw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1458 vpminuw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1459 vpminuw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1460 vpminuw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1461 vpminuw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1462 vpminuw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1463 vpminuw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1464 vpminuw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1465 vpminuw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1466 vpminuw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1467 vpminuw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1468 vpminuw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1469 vpminuw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1470 vpminuw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1471 vpminuw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1472 vpminuw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1473 vpminuw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1474 vpmovsxbw xmm30, xmm29 # AVX512{BW,VL}
1475 vpmovsxbw xmm30{k7}, xmm29 # AVX512{BW,VL}
1476 vpmovsxbw xmm30{k7}{z}, xmm29 # AVX512{BW,VL}
1477 vpmovsxbw xmm30, QWORD PTR [rcx] # AVX512{BW,VL}
1478 vpmovsxbw xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1479 vpmovsxbw xmm30, QWORD PTR [rdx+1016] # AVX512{BW,VL} Disp8
1480 vpmovsxbw xmm30, QWORD PTR [rdx+1024] # AVX512{BW,VL}
1481 vpmovsxbw xmm30, QWORD PTR [rdx-1024] # AVX512{BW,VL} Disp8
1482 vpmovsxbw xmm30, QWORD PTR [rdx-1032] # AVX512{BW,VL}
1483 vpmovsxbw ymm30, xmm29 # AVX512{BW,VL}
1484 vpmovsxbw ymm30{k7}, xmm29 # AVX512{BW,VL}
1485 vpmovsxbw ymm30{k7}{z}, xmm29 # AVX512{BW,VL}
1486 vpmovsxbw ymm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1487 vpmovsxbw ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1488 vpmovsxbw ymm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1489 vpmovsxbw ymm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1490 vpmovsxbw ymm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1491 vpmovsxbw ymm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1492 vpmovzxbw xmm30, xmm29 # AVX512{BW,VL}
1493 vpmovzxbw xmm30{k7}, xmm29 # AVX512{BW,VL}
1494 vpmovzxbw xmm30{k7}{z}, xmm29 # AVX512{BW,VL}
1495 vpmovzxbw xmm30, QWORD PTR [rcx] # AVX512{BW,VL}
1496 vpmovzxbw xmm30, QWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1497 vpmovzxbw xmm30, QWORD PTR [rdx+1016] # AVX512{BW,VL} Disp8
1498 vpmovzxbw xmm30, QWORD PTR [rdx+1024] # AVX512{BW,VL}
1499 vpmovzxbw xmm30, QWORD PTR [rdx-1024] # AVX512{BW,VL} Disp8
1500 vpmovzxbw xmm30, QWORD PTR [rdx-1032] # AVX512{BW,VL}
1501 vpmovzxbw ymm30, xmm29 # AVX512{BW,VL}
1502 vpmovzxbw ymm30{k7}, xmm29 # AVX512{BW,VL}
1503 vpmovzxbw ymm30{k7}{z}, xmm29 # AVX512{BW,VL}
1504 vpmovzxbw ymm30, XMMWORD PTR [rcx] # AVX512{BW,VL}
1505 vpmovzxbw ymm30, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1506 vpmovzxbw ymm30, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1507 vpmovzxbw ymm30, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1508 vpmovzxbw ymm30, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1509 vpmovzxbw ymm30, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1510 vpmulhrsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1511 vpmulhrsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1512 vpmulhrsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1513 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1514 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1515 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1516 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1517 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1518 vpmulhrsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1519 vpmulhrsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1520 vpmulhrsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1521 vpmulhrsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1522 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1523 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1524 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1525 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1526 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1527 vpmulhrsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1528 vpmulhuw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1529 vpmulhuw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1530 vpmulhuw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1531 vpmulhuw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1532 vpmulhuw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1533 vpmulhuw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1534 vpmulhuw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1535 vpmulhuw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1536 vpmulhuw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1537 vpmulhuw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1538 vpmulhuw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1539 vpmulhuw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1540 vpmulhuw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1541 vpmulhuw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1542 vpmulhuw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1543 vpmulhuw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1544 vpmulhuw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1545 vpmulhuw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1546 vpmulhw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1547 vpmulhw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1548 vpmulhw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1549 vpmulhw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1550 vpmulhw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1551 vpmulhw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1552 vpmulhw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1553 vpmulhw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1554 vpmulhw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1555 vpmulhw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1556 vpmulhw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1557 vpmulhw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1558 vpmulhw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1559 vpmulhw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1560 vpmulhw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1561 vpmulhw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1562 vpmulhw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1563 vpmulhw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1564 vpmullw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1565 vpmullw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1566 vpmullw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1567 vpmullw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1568 vpmullw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1569 vpmullw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1570 vpmullw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1571 vpmullw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1572 vpmullw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1573 vpmullw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1574 vpmullw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1575 vpmullw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1576 vpmullw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1577 vpmullw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1578 vpmullw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1579 vpmullw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1580 vpmullw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1581 vpmullw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1582 vpsadbw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1583 vpsadbw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1584 vpsadbw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1585 vpsadbw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1586 vpsadbw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1587 vpsadbw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1588 vpsadbw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1589 vpsadbw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1590 vpsadbw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1591 vpsadbw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1592 vpsadbw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1593 vpsadbw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1594 vpsadbw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1595 vpsadbw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1596 vpshufb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1597 vpshufb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1598 vpshufb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1599 vpshufb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1600 vpshufb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1601 vpshufb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1602 vpshufb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1603 vpshufb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1604 vpshufb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1605 vpshufb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1606 vpshufb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1607 vpshufb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1608 vpshufb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1609 vpshufb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1610 vpshufb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1611 vpshufb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1612 vpshufb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1613 vpshufb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1614 vpshufhw xmm30, xmm29, 0xab # AVX512{BW,VL}
1615 vpshufhw xmm30{k7}, xmm29, 0xab # AVX512{BW,VL}
1616 vpshufhw xmm30{k7}{z}, xmm29, 0xab # AVX512{BW,VL}
1617 vpshufhw xmm30, xmm29, 123 # AVX512{BW,VL}
1618 vpshufhw xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1619 vpshufhw xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1620 vpshufhw xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1621 vpshufhw xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1622 vpshufhw xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1623 vpshufhw xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1624 vpshufhw ymm30, ymm29, 0xab # AVX512{BW,VL}
1625 vpshufhw ymm30{k7}, ymm29, 0xab # AVX512{BW,VL}
1626 vpshufhw ymm30{k7}{z}, ymm29, 0xab # AVX512{BW,VL}
1627 vpshufhw ymm30, ymm29, 123 # AVX512{BW,VL}
1628 vpshufhw ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1629 vpshufhw ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1630 vpshufhw ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1631 vpshufhw ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1632 vpshufhw ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1633 vpshufhw ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1634 vpshuflw xmm30, xmm29, 0xab # AVX512{BW,VL}
1635 vpshuflw xmm30{k7}, xmm29, 0xab # AVX512{BW,VL}
1636 vpshuflw xmm30{k7}{z}, xmm29, 0xab # AVX512{BW,VL}
1637 vpshuflw xmm30, xmm29, 123 # AVX512{BW,VL}
1638 vpshuflw xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1639 vpshuflw xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1640 vpshuflw xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1641 vpshuflw xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1642 vpshuflw xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1643 vpshuflw xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1644 vpshuflw ymm30, ymm29, 0xab # AVX512{BW,VL}
1645 vpshuflw ymm30{k7}, ymm29, 0xab # AVX512{BW,VL}
1646 vpshuflw ymm30{k7}{z}, ymm29, 0xab # AVX512{BW,VL}
1647 vpshuflw ymm30, ymm29, 123 # AVX512{BW,VL}
1648 vpshuflw ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1649 vpshuflw ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1650 vpshuflw ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1651 vpshuflw ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1652 vpshuflw ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1653 vpshuflw ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1654 vpsllw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1655 vpsllw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1656 vpsllw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1657 vpsllw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1658 vpsllw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1659 vpsllw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1660 vpsllw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1661 vpsllw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1662 vpsllw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1663 vpsllw ymm30, ymm29, xmm28 # AVX512{BW,VL}
1664 vpsllw ymm30{k7}, ymm29, xmm28 # AVX512{BW,VL}
1665 vpsllw ymm30{k7}{z}, ymm29, xmm28 # AVX512{BW,VL}
1666 vpsllw ymm30, ymm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1667 vpsllw ymm30, ymm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1668 vpsllw ymm30, ymm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1669 vpsllw ymm30, ymm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1670 vpsllw ymm30, ymm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1671 vpsllw ymm30, ymm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1672 vpsraw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1673 vpsraw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1674 vpsraw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1675 vpsraw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1676 vpsraw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1677 vpsraw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1678 vpsraw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1679 vpsraw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1680 vpsraw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1681 vpsraw ymm30, ymm29, xmm28 # AVX512{BW,VL}
1682 vpsraw ymm30{k7}, ymm29, xmm28 # AVX512{BW,VL}
1683 vpsraw ymm30{k7}{z}, ymm29, xmm28 # AVX512{BW,VL}
1684 vpsraw ymm30, ymm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1685 vpsraw ymm30, ymm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1686 vpsraw ymm30, ymm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1687 vpsraw ymm30, ymm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1688 vpsraw ymm30, ymm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1689 vpsraw ymm30, ymm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1690 vpsrlw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1691 vpsrlw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1692 vpsrlw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1693 vpsrlw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1694 vpsrlw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1695 vpsrlw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1696 vpsrlw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1697 vpsrlw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1698 vpsrlw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1699 vpsrlw ymm30, ymm29, xmm28 # AVX512{BW,VL}
1700 vpsrlw ymm30{k7}, ymm29, xmm28 # AVX512{BW,VL}
1701 vpsrlw ymm30{k7}{z}, ymm29, xmm28 # AVX512{BW,VL}
1702 vpsrlw ymm30, ymm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1703 vpsrlw ymm30, ymm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1704 vpsrlw ymm30, ymm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1705 vpsrlw ymm30, ymm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1706 vpsrlw ymm30, ymm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1707 vpsrlw ymm30, ymm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1708 vpsrldq xmm30, xmm29, 0xab # AVX512{BW,VL}
1709 vpsrldq xmm30, xmm29, 123 # AVX512{BW,VL}
1710 vpsrldq xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1711 vpsrldq xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1712 vpsrldq xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1713 vpsrldq xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1714 vpsrldq xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1715 vpsrldq xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1716 vpsrldq ymm30, ymm29, 0xab # AVX512{BW,VL}
1717 vpsrldq ymm30, ymm29, 123 # AVX512{BW,VL}
1718 vpsrldq ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1719 vpsrldq ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1720 vpsrldq ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1721 vpsrldq ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1722 vpsrldq ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1723 vpsrldq ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1724 vpsrlw xmm30, xmm29, 0xab # AVX512{BW,VL}
1725 vpsrlw xmm30{k7}, xmm29, 0xab # AVX512{BW,VL}
1726 vpsrlw xmm30{k7}{z}, xmm29, 0xab # AVX512{BW,VL}
1727 vpsrlw xmm30, xmm29, 123 # AVX512{BW,VL}
1728 vpsrlw xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1729 vpsrlw xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1730 vpsrlw xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1731 vpsrlw xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1732 vpsrlw xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1733 vpsrlw xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1734 vpsrlw ymm30, ymm29, 0xab # AVX512{BW,VL}
1735 vpsrlw ymm30{k7}, ymm29, 0xab # AVX512{BW,VL}
1736 vpsrlw ymm30{k7}{z}, ymm29, 0xab # AVX512{BW,VL}
1737 vpsrlw ymm30, ymm29, 123 # AVX512{BW,VL}
1738 vpsrlw ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1739 vpsrlw ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1740 vpsrlw ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1741 vpsrlw ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1742 vpsrlw ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1743 vpsrlw ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1744 vpsraw xmm30, xmm29, 0xab # AVX512{BW,VL}
1745 vpsraw xmm30{k7}, xmm29, 0xab # AVX512{BW,VL}
1746 vpsraw xmm30{k7}{z}, xmm29, 0xab # AVX512{BW,VL}
1747 vpsraw xmm30, xmm29, 123 # AVX512{BW,VL}
1748 vpsraw xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1749 vpsraw xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1750 vpsraw xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1751 vpsraw xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1752 vpsraw xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1753 vpsraw xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1754 vpsraw ymm30, ymm29, 0xab # AVX512{BW,VL}
1755 vpsraw ymm30{k7}, ymm29, 0xab # AVX512{BW,VL}
1756 vpsraw ymm30{k7}{z}, ymm29, 0xab # AVX512{BW,VL}
1757 vpsraw ymm30, ymm29, 123 # AVX512{BW,VL}
1758 vpsraw ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1759 vpsraw ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1760 vpsraw ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1761 vpsraw ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1762 vpsraw ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1763 vpsraw ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1764 vpsubb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1765 vpsubb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1766 vpsubb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1767 vpsubb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1768 vpsubb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1769 vpsubb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1770 vpsubb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1771 vpsubb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1772 vpsubb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1773 vpsubb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1774 vpsubb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1775 vpsubb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1776 vpsubb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1777 vpsubb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1778 vpsubb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1779 vpsubb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1780 vpsubb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1781 vpsubb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1782 vpsubsb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1783 vpsubsb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1784 vpsubsb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1785 vpsubsb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1786 vpsubsb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1787 vpsubsb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1788 vpsubsb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1789 vpsubsb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1790 vpsubsb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1791 vpsubsb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1792 vpsubsb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1793 vpsubsb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1794 vpsubsb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1795 vpsubsb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1796 vpsubsb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1797 vpsubsb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1798 vpsubsb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1799 vpsubsb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1800 vpsubsw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1801 vpsubsw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1802 vpsubsw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1803 vpsubsw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1804 vpsubsw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1805 vpsubsw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1806 vpsubsw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1807 vpsubsw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1808 vpsubsw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1809 vpsubsw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1810 vpsubsw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1811 vpsubsw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1812 vpsubsw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1813 vpsubsw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1814 vpsubsw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1815 vpsubsw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1816 vpsubsw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1817 vpsubsw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1818 vpsubusb xmm30, xmm29, xmm28 # AVX512{BW,VL}
1819 vpsubusb xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1820 vpsubusb xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1821 vpsubusb xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1822 vpsubusb xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1823 vpsubusb xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1824 vpsubusb xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1825 vpsubusb xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1826 vpsubusb xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1827 vpsubusb ymm30, ymm29, ymm28 # AVX512{BW,VL}
1828 vpsubusb ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1829 vpsubusb ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1830 vpsubusb ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1831 vpsubusb ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1832 vpsubusb ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1833 vpsubusb ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1834 vpsubusb ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1835 vpsubusb ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1836 vpsubusw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1837 vpsubusw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1838 vpsubusw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1839 vpsubusw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1840 vpsubusw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1841 vpsubusw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1842 vpsubusw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1843 vpsubusw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1844 vpsubusw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1845 vpsubusw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1846 vpsubusw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1847 vpsubusw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1848 vpsubusw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1849 vpsubusw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1850 vpsubusw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1851 vpsubusw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1852 vpsubusw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1853 vpsubusw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1854 vpsubw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1855 vpsubw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1856 vpsubw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1857 vpsubw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1858 vpsubw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1859 vpsubw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1860 vpsubw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1861 vpsubw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1862 vpsubw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1863 vpsubw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1864 vpsubw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1865 vpsubw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1866 vpsubw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1867 vpsubw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1868 vpsubw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1869 vpsubw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1870 vpsubw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1871 vpsubw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1872 vpunpckhbw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1873 vpunpckhbw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1874 vpunpckhbw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1875 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1876 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1877 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1878 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1879 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1880 vpunpckhbw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1881 vpunpckhbw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1882 vpunpckhbw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1883 vpunpckhbw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1884 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1885 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1886 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1887 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1888 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1889 vpunpckhbw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1890 vpunpckhwd xmm30, xmm29, xmm28 # AVX512{BW,VL}
1891 vpunpckhwd xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1892 vpunpckhwd xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1893 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1894 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1895 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1896 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1897 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1898 vpunpckhwd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1899 vpunpckhwd ymm30, ymm29, ymm28 # AVX512{BW,VL}
1900 vpunpckhwd ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1901 vpunpckhwd ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1902 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1903 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1904 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1905 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1906 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1907 vpunpckhwd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1908 vpunpcklbw xmm30, xmm29, xmm28 # AVX512{BW,VL}
1909 vpunpcklbw xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1910 vpunpcklbw xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1911 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1912 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1913 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1914 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1915 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1916 vpunpcklbw xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1917 vpunpcklbw ymm30, ymm29, ymm28 # AVX512{BW,VL}
1918 vpunpcklbw ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1919 vpunpcklbw ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1920 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1921 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1922 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1923 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1924 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1925 vpunpcklbw ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1926 vpunpcklwd xmm30, xmm29, xmm28 # AVX512{BW,VL}
1927 vpunpcklwd xmm30{k7}, xmm29, xmm28 # AVX512{BW,VL}
1928 vpunpcklwd xmm30{k7}{z}, xmm29, xmm28 # AVX512{BW,VL}
1929 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rcx] # AVX512{BW,VL}
1930 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1931 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rdx+2032] # AVX512{BW,VL} Disp8
1932 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rdx+2048] # AVX512{BW,VL}
1933 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rdx-2048] # AVX512{BW,VL} Disp8
1934 vpunpcklwd xmm30, xmm29, XMMWORD PTR [rdx-2064] # AVX512{BW,VL}
1935 vpunpcklwd ymm30, ymm29, ymm28 # AVX512{BW,VL}
1936 vpunpcklwd ymm30{k7}, ymm29, ymm28 # AVX512{BW,VL}
1937 vpunpcklwd ymm30{k7}{z}, ymm29, ymm28 # AVX512{BW,VL}
1938 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rcx] # AVX512{BW,VL}
1939 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{BW,VL}
1940 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rdx+4064] # AVX512{BW,VL} Disp8
1941 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rdx+4096] # AVX512{BW,VL}
1942 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rdx-4096] # AVX512{BW,VL} Disp8
1943 vpunpcklwd ymm30, ymm29, YMMWORD PTR [rdx-4128] # AVX512{BW,VL}
1944 vpslldq xmm30, xmm29, 0xab # AVX512{BW,VL}
1945 vpslldq xmm30, xmm29, 123 # AVX512{BW,VL}
1946 vpslldq xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1947 vpslldq xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1948 vpslldq xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1949 vpslldq xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1950 vpslldq xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1951 vpslldq xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1952 vpslldq ymm30, ymm29, 0xab # AVX512{BW,VL}
1953 vpslldq ymm30, ymm29, 123 # AVX512{BW,VL}
1954 vpslldq ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1955 vpslldq ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1956 vpslldq ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1957 vpslldq ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1958 vpslldq ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1959 vpslldq ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
1960 vpsllw xmm30, xmm29, 0xab # AVX512{BW,VL}
1961 vpsllw xmm30{k7}, xmm29, 0xab # AVX512{BW,VL}
1962 vpsllw xmm30{k7}{z}, xmm29, 0xab # AVX512{BW,VL}
1963 vpsllw xmm30, xmm29, 123 # AVX512{BW,VL}
1964 vpsllw xmm30, XMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1965 vpsllw xmm30, XMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1966 vpsllw xmm30, XMMWORD PTR [rdx+2032], 123 # AVX512{BW,VL} Disp8
1967 vpsllw xmm30, XMMWORD PTR [rdx+2048], 123 # AVX512{BW,VL}
1968 vpsllw xmm30, XMMWORD PTR [rdx-2048], 123 # AVX512{BW,VL} Disp8
1969 vpsllw xmm30, XMMWORD PTR [rdx-2064], 123 # AVX512{BW,VL}
1970 vpsllw ymm30, ymm29, 0xab # AVX512{BW,VL}
1971 vpsllw ymm30{k7}, ymm29, 0xab # AVX512{BW,VL}
1972 vpsllw ymm30{k7}{z}, ymm29, 0xab # AVX512{BW,VL}
1973 vpsllw ymm30, ymm29, 123 # AVX512{BW,VL}
1974 vpsllw ymm30, YMMWORD PTR [rcx], 123 # AVX512{BW,VL}
1975 vpsllw ymm30, YMMWORD PTR [rax+r14*8+0x1234], 123 # AVX512{BW,VL}
1976 vpsllw ymm30, YMMWORD PTR [rdx+4064], 123 # AVX512{BW,VL} Disp8
1977 vpsllw ymm30, YMMWORD PTR [rdx+4096], 123 # AVX512{BW,VL}
1978 vpsllw ymm30, YMMWORD PTR [rdx-4096], 123 # AVX512{BW,VL} Disp8
1979 vpsllw ymm30, YMMWORD PTR [rdx-4128], 123 # AVX512{BW,VL}
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