3 #name: x86_64 AVX512ER rcig insns
4 #source: x86-64-avx512er-rcig.s
9 Disassembly of section \.text:
12 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 c8 f5[ ]*vexp2ps \{sae\},%zmm29,%zmm30
13 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 c8 f5[ ]*vexp2pd \{sae\},%zmm29,%zmm30
14 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 ca f5[ ]*vrcp28ps \{sae\},%zmm29,%zmm30
15 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 ca f5[ ]*vrcp28pd \{sae\},%zmm29,%zmm30
16 [ ]*[a-f0-9]+:[ ]*62 02 15 70 cb f4[ ]*vrcp28ss \{sae\},%xmm28,%xmm29,%xmm30
17 [ ]*[a-f0-9]+:[ ]*62 02 95 70 cb f4[ ]*vrcp28sd \{sae\},%xmm28,%xmm29,%xmm30
18 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 cc f5[ ]*vrsqrt28ps \{sae\},%zmm29,%zmm30
19 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 cc f5[ ]*vrsqrt28pd \{sae\},%zmm29,%zmm30
20 [ ]*[a-f0-9]+:[ ]*62 02 15 70 cd f4[ ]*vrsqrt28ss \{sae\},%xmm28,%xmm29,%xmm30
21 [ ]*[a-f0-9]+:[ ]*62 02 95 70 cd f4[ ]*vrsqrt28sd \{sae\},%xmm28,%xmm29,%xmm30
22 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 c8 f5[ ]*vexp2ps \{sae\},%zmm29,%zmm30
23 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 c8 f5[ ]*vexp2pd \{sae\},%zmm29,%zmm30
24 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 ca f5[ ]*vrcp28ps \{sae\},%zmm29,%zmm30
25 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 ca f5[ ]*vrcp28pd \{sae\},%zmm29,%zmm30
26 [ ]*[a-f0-9]+:[ ]*62 02 15 70 cb f4[ ]*vrcp28ss \{sae\},%xmm28,%xmm29,%xmm30
27 [ ]*[a-f0-9]+:[ ]*62 02 95 70 cb f4[ ]*vrcp28sd \{sae\},%xmm28,%xmm29,%xmm30
28 [ ]*[a-f0-9]+:[ ]*62 02 7d 78 cc f5[ ]*vrsqrt28ps \{sae\},%zmm29,%zmm30
29 [ ]*[a-f0-9]+:[ ]*62 02 fd 78 cc f5[ ]*vrsqrt28pd \{sae\},%zmm29,%zmm30
30 [ ]*[a-f0-9]+:[ ]*62 02 15 70 cd f4[ ]*vrsqrt28ss \{sae\},%xmm28,%xmm29,%xmm30
31 [ ]*[a-f0-9]+:[ ]*62 02 95 70 cd f4[ ]*vrsqrt28sd \{sae\},%xmm28,%xmm29,%xmm30