Add Intel AVX-512 support
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-avx512pf.d
1 #as:
2 #objdump: -dw
3 #name: x86_64 AVX512PF insns
4
5 .*: +file format .*
6
7
8 Disassembly of section .text:
9
10 0+ <_start>:
11 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
12 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 7b 00 00 00 vgatherpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
13 [ ]*[a-f0-9]+: 62 92 fd 41 c6 4c 39 20 vgatherpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
14 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 8c b9 00 04 00 00 vgatherpf0dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
15 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
16 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 7b 00 00 00 vgatherpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
17 [ ]*[a-f0-9]+: 62 92 7d 41 c6 4c 39 40 vgatherpf0dps 0x100\(%r9,%zmm31,1\)\{%k1\}
18 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 8c b9 00 04 00 00 vgatherpf0dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
19 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
20 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 7b 00 00 00 vgatherpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
21 [ ]*[a-f0-9]+: 62 92 fd 41 c7 4c 39 20 vgatherpf0qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
22 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 8c b9 00 04 00 00 vgatherpf0qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
23 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
24 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 7b 00 00 00 vgatherpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
25 [ ]*[a-f0-9]+: 62 92 7d 41 c7 4c 39 40 vgatherpf0qps 0x100\(%r9,%zmm31,1\)\{%k1\}
26 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 8c b9 00 04 00 00 vgatherpf0qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
27 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
28 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 7b 00 00 00 vgatherpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
29 [ ]*[a-f0-9]+: 62 92 fd 41 c6 54 39 20 vgatherpf1dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
30 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 94 b9 00 04 00 00 vgatherpf1dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
31 [ ]*[a-f0-9]+: 62 92 7d 41 c6 94 fe 7b 00 00 00 vgatherpf1dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
32 [ ]*[a-f0-9]+: 62 92 7d 41 c6 94 fe 7b 00 00 00 vgatherpf1dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
33 [ ]*[a-f0-9]+: 62 92 7d 41 c6 54 39 40 vgatherpf1dps 0x100\(%r9,%zmm31,1\)\{%k1\}
34 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 94 b9 00 04 00 00 vgatherpf1dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
35 [ ]*[a-f0-9]+: 62 92 fd 41 c7 94 fe 7b 00 00 00 vgatherpf1qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
36 [ ]*[a-f0-9]+: 62 92 fd 41 c7 94 fe 7b 00 00 00 vgatherpf1qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
37 [ ]*[a-f0-9]+: 62 92 fd 41 c7 54 39 20 vgatherpf1qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
38 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 94 b9 00 04 00 00 vgatherpf1qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
39 [ ]*[a-f0-9]+: 62 92 7d 41 c7 94 fe 7b 00 00 00 vgatherpf1qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
40 [ ]*[a-f0-9]+: 62 92 7d 41 c7 94 fe 7b 00 00 00 vgatherpf1qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
41 [ ]*[a-f0-9]+: 62 92 7d 41 c7 54 39 40 vgatherpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
42 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 94 b9 00 04 00 00 vgatherpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
43 [ ]*[a-f0-9]+: 62 92 fd 41 c6 ac fe 7b 00 00 00 vscatterpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
44 [ ]*[a-f0-9]+: 62 92 fd 41 c6 ac fe 7b 00 00 00 vscatterpf0dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
45 [ ]*[a-f0-9]+: 62 92 fd 41 c6 6c 39 20 vscatterpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
46 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 ac b9 00 04 00 00 vscatterpf0dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
47 [ ]*[a-f0-9]+: 62 92 7d 41 c6 ac fe 7b 00 00 00 vscatterpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
48 [ ]*[a-f0-9]+: 62 92 7d 41 c6 ac fe 7b 00 00 00 vscatterpf0dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
49 [ ]*[a-f0-9]+: 62 92 7d 41 c6 6c 39 40 vscatterpf0dps 0x100\(%r9,%zmm31,1\)\{%k1\}
50 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 ac b9 00 04 00 00 vscatterpf0dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
51 [ ]*[a-f0-9]+: 62 92 fd 41 c7 ac fe 7b 00 00 00 vscatterpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
52 [ ]*[a-f0-9]+: 62 92 fd 41 c7 ac fe 7b 00 00 00 vscatterpf0qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
53 [ ]*[a-f0-9]+: 62 92 fd 41 c7 6c 39 20 vscatterpf0qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
54 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 ac b9 00 04 00 00 vscatterpf0qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
55 [ ]*[a-f0-9]+: 62 92 7d 41 c7 ac fe 7b 00 00 00 vscatterpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
56 [ ]*[a-f0-9]+: 62 92 7d 41 c7 ac fe 7b 00 00 00 vscatterpf0qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
57 [ ]*[a-f0-9]+: 62 92 7d 41 c7 6c 39 40 vscatterpf0qps 0x100\(%r9,%zmm31,1\)\{%k1\}
58 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 ac b9 00 04 00 00 vscatterpf0qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
59 [ ]*[a-f0-9]+: 62 92 fd 41 c6 b4 fe 7b 00 00 00 vscatterpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
60 [ ]*[a-f0-9]+: 62 92 fd 41 c6 b4 fe 7b 00 00 00 vscatterpf1dpd 0x7b\(%r14,%ymm31,8\)\{%k1\}
61 [ ]*[a-f0-9]+: 62 92 fd 41 c6 74 39 20 vscatterpf1dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
62 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 b4 b9 00 04 00 00 vscatterpf1dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
63 [ ]*[a-f0-9]+: 62 92 7d 41 c6 b4 fe 7b 00 00 00 vscatterpf1dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
64 [ ]*[a-f0-9]+: 62 92 7d 41 c6 b4 fe 7b 00 00 00 vscatterpf1dps 0x7b\(%r14,%zmm31,8\)\{%k1\}
65 [ ]*[a-f0-9]+: 62 92 7d 41 c6 74 39 40 vscatterpf1dps 0x100\(%r9,%zmm31,1\)\{%k1\}
66 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 b4 b9 00 04 00 00 vscatterpf1dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
67 [ ]*[a-f0-9]+: 62 92 fd 41 c7 b4 fe 7b 00 00 00 vscatterpf1qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
68 [ ]*[a-f0-9]+: 62 92 fd 41 c7 b4 fe 7b 00 00 00 vscatterpf1qpd 0x7b\(%r14,%zmm31,8\)\{%k1\}
69 [ ]*[a-f0-9]+: 62 92 fd 41 c7 74 39 20 vscatterpf1qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
70 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 b4 b9 00 04 00 00 vscatterpf1qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
71 [ ]*[a-f0-9]+: 62 92 7d 41 c7 b4 fe 7b 00 00 00 vscatterpf1qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
72 [ ]*[a-f0-9]+: 62 92 7d 41 c7 b4 fe 7b 00 00 00 vscatterpf1qps 0x7b\(%r14,%zmm31,8\)\{%k1\}
73 [ ]*[a-f0-9]+: 62 92 7d 41 c7 74 39 40 vscatterpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
74 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 b4 b9 00 04 00 00 vscatterpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
75 [ ]*[a-f0-9]+: 0f 0d 11 prefetchwt1 \(%rcx\)
76 [ ]*[a-f0-9]+: 42 0f 0d 94 f0 23 01 00 00 prefetchwt1 0x123\(%rax,%r14,8\)
77 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 85 ff ff ff vgatherpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
78 [ ]*[a-f0-9]+: 62 92 fd 41 c6 8c fe 85 ff ff ff vgatherpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
79 [ ]*[a-f0-9]+: 62 92 fd 41 c6 4c 39 20 vgatherpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
80 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 8c b9 00 04 00 00 vgatherpf0dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
81 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 85 ff ff ff vgatherpf0dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
82 [ ]*[a-f0-9]+: 62 92 7d 41 c6 8c fe 85 ff ff ff vgatherpf0dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
83 [ ]*[a-f0-9]+: 62 92 7d 41 c6 4c 39 40 vgatherpf0dps 0x100\(%r9,%zmm31,1\)\{%k1\}
84 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 8c b9 00 04 00 00 vgatherpf0dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
85 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 85 ff ff ff vgatherpf0qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
86 [ ]*[a-f0-9]+: 62 92 fd 41 c7 8c fe 85 ff ff ff vgatherpf0qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
87 [ ]*[a-f0-9]+: 62 92 fd 41 c7 4c 39 20 vgatherpf0qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
88 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 8c b9 00 04 00 00 vgatherpf0qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
89 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 85 ff ff ff vgatherpf0qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
90 [ ]*[a-f0-9]+: 62 92 7d 41 c7 8c fe 85 ff ff ff vgatherpf0qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
91 [ ]*[a-f0-9]+: 62 92 7d 41 c7 4c 39 40 vgatherpf0qps 0x100\(%r9,%zmm31,1\)\{%k1\}
92 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 8c b9 00 04 00 00 vgatherpf0qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
93 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 85 ff ff ff vgatherpf1dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
94 [ ]*[a-f0-9]+: 62 92 fd 41 c6 94 fe 85 ff ff ff vgatherpf1dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
95 [ ]*[a-f0-9]+: 62 92 fd 41 c6 54 39 20 vgatherpf1dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
96 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 94 b9 00 04 00 00 vgatherpf1dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
97 [ ]*[a-f0-9]+: 62 92 7d 41 c6 94 fe 85 ff ff ff vgatherpf1dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
98 [ ]*[a-f0-9]+: 62 92 7d 41 c6 94 fe 85 ff ff ff vgatherpf1dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
99 [ ]*[a-f0-9]+: 62 92 7d 41 c6 54 39 40 vgatherpf1dps 0x100\(%r9,%zmm31,1\)\{%k1\}
100 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 94 b9 00 04 00 00 vgatherpf1dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
101 [ ]*[a-f0-9]+: 62 92 fd 41 c7 94 fe 85 ff ff ff vgatherpf1qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
102 [ ]*[a-f0-9]+: 62 92 fd 41 c7 94 fe 85 ff ff ff vgatherpf1qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
103 [ ]*[a-f0-9]+: 62 92 fd 41 c7 54 39 20 vgatherpf1qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
104 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 94 b9 00 04 00 00 vgatherpf1qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
105 [ ]*[a-f0-9]+: 62 92 7d 41 c7 94 fe 85 ff ff ff vgatherpf1qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
106 [ ]*[a-f0-9]+: 62 92 7d 41 c7 94 fe 85 ff ff ff vgatherpf1qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
107 [ ]*[a-f0-9]+: 62 92 7d 41 c7 54 39 40 vgatherpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
108 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 94 b9 00 04 00 00 vgatherpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
109 [ ]*[a-f0-9]+: 62 92 fd 41 c6 ac fe 85 ff ff ff vscatterpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
110 [ ]*[a-f0-9]+: 62 92 fd 41 c6 ac fe 85 ff ff ff vscatterpf0dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
111 [ ]*[a-f0-9]+: 62 92 fd 41 c6 6c 39 20 vscatterpf0dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
112 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 ac b9 00 04 00 00 vscatterpf0dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
113 [ ]*[a-f0-9]+: 62 92 7d 41 c6 ac fe 85 ff ff ff vscatterpf0dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
114 [ ]*[a-f0-9]+: 62 92 7d 41 c6 ac fe 85 ff ff ff vscatterpf0dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
115 [ ]*[a-f0-9]+: 62 92 7d 41 c6 6c 39 40 vscatterpf0dps 0x100\(%r9,%zmm31,1\)\{%k1\}
116 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 ac b9 00 04 00 00 vscatterpf0dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
117 [ ]*[a-f0-9]+: 62 92 fd 41 c7 ac fe 85 ff ff ff vscatterpf0qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
118 [ ]*[a-f0-9]+: 62 92 fd 41 c7 ac fe 85 ff ff ff vscatterpf0qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
119 [ ]*[a-f0-9]+: 62 92 fd 41 c7 6c 39 20 vscatterpf0qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
120 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 ac b9 00 04 00 00 vscatterpf0qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
121 [ ]*[a-f0-9]+: 62 92 7d 41 c7 ac fe 85 ff ff ff vscatterpf0qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
122 [ ]*[a-f0-9]+: 62 92 7d 41 c7 ac fe 85 ff ff ff vscatterpf0qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
123 [ ]*[a-f0-9]+: 62 92 7d 41 c7 6c 39 40 vscatterpf0qps 0x100\(%r9,%zmm31,1\)\{%k1\}
124 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 ac b9 00 04 00 00 vscatterpf0qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
125 [ ]*[a-f0-9]+: 62 92 fd 41 c6 b4 fe 85 ff ff ff vscatterpf1dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
126 [ ]*[a-f0-9]+: 62 92 fd 41 c6 b4 fe 85 ff ff ff vscatterpf1dpd -0x7b\(%r14,%ymm31,8\)\{%k1\}
127 [ ]*[a-f0-9]+: 62 92 fd 41 c6 74 39 20 vscatterpf1dpd 0x100\(%r9,%ymm31,1\)\{%k1\}
128 [ ]*[a-f0-9]+: 62 b2 fd 41 c6 b4 b9 00 04 00 00 vscatterpf1dpd 0x400\(%rcx,%ymm31,4\)\{%k1\}
129 [ ]*[a-f0-9]+: 62 92 7d 41 c6 b4 fe 85 ff ff ff vscatterpf1dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
130 [ ]*[a-f0-9]+: 62 92 7d 41 c6 b4 fe 85 ff ff ff vscatterpf1dps -0x7b\(%r14,%zmm31,8\)\{%k1\}
131 [ ]*[a-f0-9]+: 62 92 7d 41 c6 74 39 40 vscatterpf1dps 0x100\(%r9,%zmm31,1\)\{%k1\}
132 [ ]*[a-f0-9]+: 62 b2 7d 41 c6 b4 b9 00 04 00 00 vscatterpf1dps 0x400\(%rcx,%zmm31,4\)\{%k1\}
133 [ ]*[a-f0-9]+: 62 92 fd 41 c7 b4 fe 85 ff ff ff vscatterpf1qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
134 [ ]*[a-f0-9]+: 62 92 fd 41 c7 b4 fe 85 ff ff ff vscatterpf1qpd -0x7b\(%r14,%zmm31,8\)\{%k1\}
135 [ ]*[a-f0-9]+: 62 92 fd 41 c7 74 39 20 vscatterpf1qpd 0x100\(%r9,%zmm31,1\)\{%k1\}
136 [ ]*[a-f0-9]+: 62 b2 fd 41 c7 b4 b9 00 04 00 00 vscatterpf1qpd 0x400\(%rcx,%zmm31,4\)\{%k1\}
137 [ ]*[a-f0-9]+: 62 92 7d 41 c7 b4 fe 85 ff ff ff vscatterpf1qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
138 [ ]*[a-f0-9]+: 62 92 7d 41 c7 b4 fe 85 ff ff ff vscatterpf1qps -0x7b\(%r14,%zmm31,8\)\{%k1\}
139 [ ]*[a-f0-9]+: 62 92 7d 41 c7 74 39 40 vscatterpf1qps 0x100\(%r9,%zmm31,1\)\{%k1\}
140 [ ]*[a-f0-9]+: 62 b2 7d 41 c7 b4 b9 00 04 00 00 vscatterpf1qps 0x400\(%rcx,%zmm31,4\)\{%k1\}
141 [ ]*[a-f0-9]+: 0f 0d 11 prefetchwt1 \(%rcx\)
142 [ ]*[a-f0-9]+: 42 0f 0d 94 f0 34 12 00 00 prefetchwt1 0x1234\(%rax,%r14,8\)
143 #pass
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