i386: Also check R12-R15 registers when optimizing testq to testb
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-avx512vnni_vl.s
1 # Check 64bit AVX512{VNNI,VL} instructions
2
3 .allow_index_reg
4 .text
5 _start:
6 vpdpwssd %xmm20, %xmm22, %xmm26 # AVX512{VNNI,VL}
7 vpdpwssd %xmm20, %xmm22, %xmm26{%k3} # AVX512{VNNI,VL}
8 vpdpwssd %xmm20, %xmm22, %xmm26{%k3}{z} # AVX512{VNNI,VL}
9 vpdpwssd 0x123(%rax,%r14,8), %xmm22, %xmm26 # AVX512{VNNI,VL}
10 vpdpwssd 2032(%rdx), %xmm22, %xmm26 # AVX512{VNNI,VL} Disp8
11 vpdpwssd 508(%rdx){1to4}, %xmm22, %xmm26 # AVX512{VNNI,VL} Disp8
12 vpdpwssd %ymm18, %ymm20, %ymm20 # AVX512{VNNI,VL}
13 vpdpwssd %ymm18, %ymm20, %ymm20{%k5} # AVX512{VNNI,VL}
14 vpdpwssd %ymm18, %ymm20, %ymm20{%k5}{z} # AVX512{VNNI,VL}
15 vpdpwssd 0x123(%rax,%r14,8), %ymm20, %ymm20 # AVX512{VNNI,VL}
16 vpdpwssd 4064(%rdx), %ymm20, %ymm20 # AVX512{VNNI,VL} Disp8
17 vpdpwssd 508(%rdx){1to8}, %ymm20, %ymm20 # AVX512{VNNI,VL} Disp8
18
19 vpdpwssds %xmm23, %xmm19, %xmm22 # AVX512{VNNI,VL}
20 vpdpwssds %xmm23, %xmm19, %xmm22{%k7} # AVX512{VNNI,VL}
21 vpdpwssds %xmm23, %xmm19, %xmm22{%k7}{z} # AVX512{VNNI,VL}
22 vpdpwssds 0x123(%rax,%r14,8), %xmm19, %xmm22 # AVX512{VNNI,VL}
23 vpdpwssds 2032(%rdx), %xmm19, %xmm22 # AVX512{VNNI,VL} Disp8
24 vpdpwssds 508(%rdx){1to4}, %xmm19, %xmm22 # AVX512{VNNI,VL} Disp8
25 vpdpwssds %ymm28, %ymm23, %ymm23 # AVX512{VNNI,VL}
26 vpdpwssds %ymm28, %ymm23, %ymm23{%k3} # AVX512{VNNI,VL}
27 vpdpwssds %ymm28, %ymm23, %ymm23{%k3}{z} # AVX512{VNNI,VL}
28 vpdpwssds 0x123(%rax,%r14,8), %ymm23, %ymm23 # AVX512{VNNI,VL}
29 vpdpwssds 4064(%rdx), %ymm23, %ymm23 # AVX512{VNNI,VL} Disp8
30 vpdpwssds 508(%rdx){1to8}, %ymm23, %ymm23 # AVX512{VNNI,VL} Disp8
31
32 vpdpbusd %xmm28, %xmm29, %xmm18 # AVX512{VNNI,VL}
33 vpdpbusd %xmm28, %xmm29, %xmm18{%k3} # AVX512{VNNI,VL}
34 vpdpbusd %xmm28, %xmm29, %xmm18{%k3}{z} # AVX512{VNNI,VL}
35 vpdpbusd 0x123(%rax,%r14,8), %xmm29, %xmm18 # AVX512{VNNI,VL}
36 vpdpbusd 2032(%rdx), %xmm29, %xmm18 # AVX512{VNNI,VL} Disp8
37 vpdpbusd 508(%rdx){1to4}, %xmm29, %xmm18 # AVX512{VNNI,VL} Disp8
38 vpdpbusd %ymm17, %ymm18, %ymm20 # AVX512{VNNI,VL}
39 vpdpbusd %ymm17, %ymm18, %ymm20{%k2} # AVX512{VNNI,VL}
40 vpdpbusd %ymm17, %ymm18, %ymm20{%k2}{z} # AVX512{VNNI,VL}
41 vpdpbusd 0x123(%rax,%r14,8), %ymm18, %ymm20 # AVX512{VNNI,VL}
42 vpdpbusd 4064(%rdx), %ymm18, %ymm20 # AVX512{VNNI,VL} Disp8
43 vpdpbusd 508(%rdx){1to8}, %ymm18, %ymm20 # AVX512{VNNI,VL} Disp8
44
45 vpdpbusds %xmm27, %xmm26, %xmm24 # AVX512{VNNI,VL}
46 vpdpbusds %xmm27, %xmm26, %xmm24{%k4} # AVX512{VNNI,VL}
47 vpdpbusds %xmm27, %xmm26, %xmm24{%k4}{z} # AVX512{VNNI,VL}
48 vpdpbusds 0x123(%rax,%r14,8), %xmm26, %xmm24 # AVX512{VNNI,VL}
49 vpdpbusds 2032(%rdx), %xmm26, %xmm24 # AVX512{VNNI,VL} Disp8
50 vpdpbusds 508(%rdx){1to4}, %xmm26, %xmm24 # AVX512{VNNI,VL} Disp8
51 vpdpbusds %ymm25, %ymm29, %ymm30 # AVX512{VNNI,VL}
52 vpdpbusds %ymm25, %ymm29, %ymm30{%k1} # AVX512{VNNI,VL}
53 vpdpbusds %ymm25, %ymm29, %ymm30{%k1}{z} # AVX512{VNNI,VL}
54 vpdpbusds 0x123(%rax,%r14,8), %ymm29, %ymm30 # AVX512{VNNI,VL}
55 vpdpbusds 4064(%rdx), %ymm29, %ymm30 # AVX512{VNNI,VL} Disp8
56 vpdpbusds 508(%rdx){1to8}, %ymm29, %ymm30 # AVX512{VNNI,VL} Disp8
57
58 .intel_syntax noprefix
59 vpdpwssd xmm21, xmm20, xmm23 # AVX512{VNNI,VL}
60 vpdpwssd xmm21{k6}, xmm20, xmm23 # AVX512{VNNI,VL}
61 vpdpwssd xmm21{k6}{z}, xmm20, xmm23 # AVX512{VNNI,VL}
62 vpdpwssd xmm21, xmm20, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
63 vpdpwssd xmm21, xmm20, XMMWORD PTR [rdx+2032] # AVX512{VNNI,VL} Disp8
64 vpdpwssd xmm21, xmm20, [rdx+508]{1to4} # AVX512{VNNI,VL} Disp8
65 vpdpwssd ymm25, ymm27, ymm17 # AVX512{VNNI,VL}
66 vpdpwssd ymm25{k6}, ymm27, ymm17 # AVX512{VNNI,VL}
67 vpdpwssd ymm25{k6}{z}, ymm27, ymm17 # AVX512{VNNI,VL}
68 vpdpwssd ymm25, ymm27, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
69 vpdpwssd ymm25, ymm27, YMMWORD PTR [rdx+4064] # AVX512{VNNI,VL} Disp8
70 vpdpwssd ymm25, ymm27, [rdx+508]{1to8} # AVX512{VNNI,VL} Disp8
71
72 vpdpwssds xmm30, xmm25, xmm21 # AVX512{VNNI,VL}
73 vpdpwssds xmm30{k6}, xmm25, xmm21 # AVX512{VNNI,VL}
74 vpdpwssds xmm30{k6}{z}, xmm25, xmm21 # AVX512{VNNI,VL}
75 vpdpwssds xmm30, xmm25, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
76 vpdpwssds xmm30, xmm25, XMMWORD PTR [rdx+2032] # AVX512{VNNI,VL} Disp8
77 vpdpwssds xmm30, xmm25, [rdx+508]{1to4} # AVX512{VNNI,VL} Disp8
78 vpdpwssds ymm28, ymm27, ymm27 # AVX512{VNNI,VL}
79 vpdpwssds ymm28{k7}, ymm27, ymm27 # AVX512{VNNI,VL}
80 vpdpwssds ymm28{k7}{z}, ymm27, ymm27 # AVX512{VNNI,VL}
81 vpdpwssds ymm28, ymm27, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
82 vpdpwssds ymm28, ymm27, YMMWORD PTR [rdx+4064] # AVX512{VNNI,VL} Disp8
83 vpdpwssds ymm28, ymm27, [rdx+508]{1to8} # AVX512{VNNI,VL} Disp8
84
85 vpdpbusd xmm26, xmm18, xmm19 # AVX512{VNNI,VL}
86 vpdpbusd xmm26{k6}, xmm18, xmm19 # AVX512{VNNI,VL}
87 vpdpbusd xmm26{k6}{z}, xmm18, xmm19 # AVX512{VNNI,VL}
88 vpdpbusd xmm26, xmm18, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
89 vpdpbusd xmm26, xmm18, XMMWORD PTR [rdx+2032] # AVX512{VNNI,VL} Disp8
90 vpdpbusd xmm26, xmm18, [rdx+508]{1to4} # AVX512{VNNI,VL} Disp8
91 vpdpbusd ymm21, ymm17, ymm27 # AVX512{VNNI,VL}
92 vpdpbusd ymm21{k2}, ymm17, ymm27 # AVX512{VNNI,VL}
93 vpdpbusd ymm21{k2}{z}, ymm17, ymm27 # AVX512{VNNI,VL}
94 vpdpbusd ymm21, ymm17, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
95 vpdpbusd ymm21, ymm17, YMMWORD PTR [rdx+4064] # AVX512{VNNI,VL} Disp8
96 vpdpbusd ymm21, ymm17, [rdx+508]{1to8} # AVX512{VNNI,VL} Disp8
97
98 vpdpbusds xmm28, xmm26, xmm24 # AVX512{VNNI,VL}
99 vpdpbusds xmm28{k1}, xmm26, xmm24 # AVX512{VNNI,VL}
100 vpdpbusds xmm28{k1}{z}, xmm26, xmm24 # AVX512{VNNI,VL}
101 vpdpbusds xmm28, xmm26, XMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
102 vpdpbusds xmm28, xmm26, XMMWORD PTR [rdx+2032] # AVX512{VNNI,VL} Disp8
103 vpdpbusds xmm28, xmm26, [rdx+508]{1to4} # AVX512{VNNI,VL} Disp8
104 vpdpbusds ymm23, ymm18, ymm27 # AVX512{VNNI,VL}
105 vpdpbusds ymm23{k6}, ymm18, ymm27 # AVX512{VNNI,VL}
106 vpdpbusds ymm23{k6}{z}, ymm18, ymm27 # AVX512{VNNI,VL}
107 vpdpbusds ymm23, ymm18, YMMWORD PTR [rax+r14*8+0x1234] # AVX512{VNNI,VL}
108 vpdpbusds ymm23, ymm18, YMMWORD PTR [rdx+4064] # AVX512{VNNI,VL} Disp8
109 vpdpbusds ymm23, ymm18, [rdx+508]{1to8} # AVX512{VNNI,VL} Disp8
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