i386: Also check R12-R15 registers when optimizing testq to testb
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-hle.d
1 #objdump: -dw
2 #name: x86-64 HLE insns
3
4 .*: +file format .*
5
6
7 Disassembly of section .text:
8
9 0+ <_start>:
10 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
11 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
12 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
13 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
14 [ ]*[a-f0-9]+: f0 f2 80 11 64 lock xacquire adcb \$0x64,\(%rcx\)
15 [ ]*[a-f0-9]+: f0 f3 80 11 64 lock xrelease adcb \$0x64,\(%rcx\)
16 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
17 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
18 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
19 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
20 [ ]*[a-f0-9]+: f0 f2 80 01 64 lock xacquire addb \$0x64,\(%rcx\)
21 [ ]*[a-f0-9]+: f0 f3 80 01 64 lock xrelease addb \$0x64,\(%rcx\)
22 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
23 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
24 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
25 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
26 [ ]*[a-f0-9]+: f0 f2 80 21 64 lock xacquire andb \$0x64,\(%rcx\)
27 [ ]*[a-f0-9]+: f0 f3 80 21 64 lock xrelease andb \$0x64,\(%rcx\)
28 [ ]*[a-f0-9]+: f3 c6 01 64 xrelease movb \$0x64,\(%rcx\)
29 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
30 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
31 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
32 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
33 [ ]*[a-f0-9]+: f0 f2 80 09 64 lock xacquire orb \$0x64,\(%rcx\)
34 [ ]*[a-f0-9]+: f0 f3 80 09 64 lock xrelease orb \$0x64,\(%rcx\)
35 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
36 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
37 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
38 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
39 [ ]*[a-f0-9]+: f0 f2 80 19 64 lock xacquire sbbb \$0x64,\(%rcx\)
40 [ ]*[a-f0-9]+: f0 f3 80 19 64 lock xrelease sbbb \$0x64,\(%rcx\)
41 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
42 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
43 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
44 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
45 [ ]*[a-f0-9]+: f0 f2 80 29 64 lock xacquire subb \$0x64,\(%rcx\)
46 [ ]*[a-f0-9]+: f0 f3 80 29 64 lock xrelease subb \$0x64,\(%rcx\)
47 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
48 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
49 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
50 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
51 [ ]*[a-f0-9]+: f0 f2 80 31 64 lock xacquire xorb \$0x64,\(%rcx\)
52 [ ]*[a-f0-9]+: f0 f3 80 31 64 lock xrelease xorb \$0x64,\(%rcx\)
53 [ ]*[a-f0-9]+: 66 f2 f0 81 11 e8 03 xacquire lock adcw \$0x3e8,\(%rcx\)
54 [ ]*[a-f0-9]+: 66 f2 f0 81 11 e8 03 xacquire lock adcw \$0x3e8,\(%rcx\)
55 [ ]*[a-f0-9]+: 66 f3 f0 81 11 e8 03 xrelease lock adcw \$0x3e8,\(%rcx\)
56 [ ]*[a-f0-9]+: 66 f3 f0 81 11 e8 03 xrelease lock adcw \$0x3e8,\(%rcx\)
57 [ ]*[a-f0-9]+: f0 f2 66 81 11 e8 03 lock xacquire adcw \$0x3e8,\(%rcx\)
58 [ ]*[a-f0-9]+: f0 f3 66 81 11 e8 03 lock xrelease adcw \$0x3e8,\(%rcx\)
59 [ ]*[a-f0-9]+: 66 f2 f0 81 01 e8 03 xacquire lock addw \$0x3e8,\(%rcx\)
60 [ ]*[a-f0-9]+: 66 f2 f0 81 01 e8 03 xacquire lock addw \$0x3e8,\(%rcx\)
61 [ ]*[a-f0-9]+: 66 f3 f0 81 01 e8 03 xrelease lock addw \$0x3e8,\(%rcx\)
62 [ ]*[a-f0-9]+: 66 f3 f0 81 01 e8 03 xrelease lock addw \$0x3e8,\(%rcx\)
63 [ ]*[a-f0-9]+: f0 f2 66 81 01 e8 03 lock xacquire addw \$0x3e8,\(%rcx\)
64 [ ]*[a-f0-9]+: f0 f3 66 81 01 e8 03 lock xrelease addw \$0x3e8,\(%rcx\)
65 [ ]*[a-f0-9]+: 66 f2 f0 81 21 e8 03 xacquire lock andw \$0x3e8,\(%rcx\)
66 [ ]*[a-f0-9]+: 66 f2 f0 81 21 e8 03 xacquire lock andw \$0x3e8,\(%rcx\)
67 [ ]*[a-f0-9]+: 66 f3 f0 81 21 e8 03 xrelease lock andw \$0x3e8,\(%rcx\)
68 [ ]*[a-f0-9]+: 66 f3 f0 81 21 e8 03 xrelease lock andw \$0x3e8,\(%rcx\)
69 [ ]*[a-f0-9]+: f0 f2 66 81 21 e8 03 lock xacquire andw \$0x3e8,\(%rcx\)
70 [ ]*[a-f0-9]+: f0 f3 66 81 21 e8 03 lock xrelease andw \$0x3e8,\(%rcx\)
71 [ ]*[a-f0-9]+: 66 f3 c7 01 e8 03 xrelease movw \$0x3e8,\(%rcx\)
72 [ ]*[a-f0-9]+: 66 f2 f0 81 09 e8 03 xacquire lock orw \$0x3e8,\(%rcx\)
73 [ ]*[a-f0-9]+: 66 f2 f0 81 09 e8 03 xacquire lock orw \$0x3e8,\(%rcx\)
74 [ ]*[a-f0-9]+: 66 f3 f0 81 09 e8 03 xrelease lock orw \$0x3e8,\(%rcx\)
75 [ ]*[a-f0-9]+: 66 f3 f0 81 09 e8 03 xrelease lock orw \$0x3e8,\(%rcx\)
76 [ ]*[a-f0-9]+: f0 f2 66 81 09 e8 03 lock xacquire orw \$0x3e8,\(%rcx\)
77 [ ]*[a-f0-9]+: f0 f3 66 81 09 e8 03 lock xrelease orw \$0x3e8,\(%rcx\)
78 [ ]*[a-f0-9]+: 66 f2 f0 81 19 e8 03 xacquire lock sbbw \$0x3e8,\(%rcx\)
79 [ ]*[a-f0-9]+: 66 f2 f0 81 19 e8 03 xacquire lock sbbw \$0x3e8,\(%rcx\)
80 [ ]*[a-f0-9]+: 66 f3 f0 81 19 e8 03 xrelease lock sbbw \$0x3e8,\(%rcx\)
81 [ ]*[a-f0-9]+: 66 f3 f0 81 19 e8 03 xrelease lock sbbw \$0x3e8,\(%rcx\)
82 [ ]*[a-f0-9]+: f0 f2 66 81 19 e8 03 lock xacquire sbbw \$0x3e8,\(%rcx\)
83 [ ]*[a-f0-9]+: f0 f3 66 81 19 e8 03 lock xrelease sbbw \$0x3e8,\(%rcx\)
84 [ ]*[a-f0-9]+: 66 f2 f0 81 29 e8 03 xacquire lock subw \$0x3e8,\(%rcx\)
85 [ ]*[a-f0-9]+: 66 f2 f0 81 29 e8 03 xacquire lock subw \$0x3e8,\(%rcx\)
86 [ ]*[a-f0-9]+: 66 f3 f0 81 29 e8 03 xrelease lock subw \$0x3e8,\(%rcx\)
87 [ ]*[a-f0-9]+: 66 f3 f0 81 29 e8 03 xrelease lock subw \$0x3e8,\(%rcx\)
88 [ ]*[a-f0-9]+: f0 f2 66 81 29 e8 03 lock xacquire subw \$0x3e8,\(%rcx\)
89 [ ]*[a-f0-9]+: f0 f3 66 81 29 e8 03 lock xrelease subw \$0x3e8,\(%rcx\)
90 [ ]*[a-f0-9]+: 66 f2 f0 81 31 e8 03 xacquire lock xorw \$0x3e8,\(%rcx\)
91 [ ]*[a-f0-9]+: 66 f2 f0 81 31 e8 03 xacquire lock xorw \$0x3e8,\(%rcx\)
92 [ ]*[a-f0-9]+: 66 f3 f0 81 31 e8 03 xrelease lock xorw \$0x3e8,\(%rcx\)
93 [ ]*[a-f0-9]+: 66 f3 f0 81 31 e8 03 xrelease lock xorw \$0x3e8,\(%rcx\)
94 [ ]*[a-f0-9]+: f0 f2 66 81 31 e8 03 lock xacquire xorw \$0x3e8,\(%rcx\)
95 [ ]*[a-f0-9]+: f0 f3 66 81 31 e8 03 lock xrelease xorw \$0x3e8,\(%rcx\)
96 [ ]*[a-f0-9]+: f2 f0 81 11 80 96 98 00 xacquire lock adcl \$0x989680,\(%rcx\)
97 [ ]*[a-f0-9]+: f2 f0 81 11 80 96 98 00 xacquire lock adcl \$0x989680,\(%rcx\)
98 [ ]*[a-f0-9]+: f3 f0 81 11 80 96 98 00 xrelease lock adcl \$0x989680,\(%rcx\)
99 [ ]*[a-f0-9]+: f3 f0 81 11 80 96 98 00 xrelease lock adcl \$0x989680,\(%rcx\)
100 [ ]*[a-f0-9]+: f0 f2 81 11 80 96 98 00 lock xacquire adcl \$0x989680,\(%rcx\)
101 [ ]*[a-f0-9]+: f0 f3 81 11 80 96 98 00 lock xrelease adcl \$0x989680,\(%rcx\)
102 [ ]*[a-f0-9]+: f2 f0 81 01 80 96 98 00 xacquire lock addl \$0x989680,\(%rcx\)
103 [ ]*[a-f0-9]+: f2 f0 81 01 80 96 98 00 xacquire lock addl \$0x989680,\(%rcx\)
104 [ ]*[a-f0-9]+: f3 f0 81 01 80 96 98 00 xrelease lock addl \$0x989680,\(%rcx\)
105 [ ]*[a-f0-9]+: f3 f0 81 01 80 96 98 00 xrelease lock addl \$0x989680,\(%rcx\)
106 [ ]*[a-f0-9]+: f0 f2 81 01 80 96 98 00 lock xacquire addl \$0x989680,\(%rcx\)
107 [ ]*[a-f0-9]+: f0 f3 81 01 80 96 98 00 lock xrelease addl \$0x989680,\(%rcx\)
108 [ ]*[a-f0-9]+: f2 f0 81 21 80 96 98 00 xacquire lock andl \$0x989680,\(%rcx\)
109 [ ]*[a-f0-9]+: f2 f0 81 21 80 96 98 00 xacquire lock andl \$0x989680,\(%rcx\)
110 [ ]*[a-f0-9]+: f3 f0 81 21 80 96 98 00 xrelease lock andl \$0x989680,\(%rcx\)
111 [ ]*[a-f0-9]+: f3 f0 81 21 80 96 98 00 xrelease lock andl \$0x989680,\(%rcx\)
112 [ ]*[a-f0-9]+: f0 f2 81 21 80 96 98 00 lock xacquire andl \$0x989680,\(%rcx\)
113 [ ]*[a-f0-9]+: f0 f3 81 21 80 96 98 00 lock xrelease andl \$0x989680,\(%rcx\)
114 [ ]*[a-f0-9]+: f3 c7 01 80 96 98 00 xrelease movl \$0x989680,\(%rcx\)
115 [ ]*[a-f0-9]+: f2 f0 81 09 80 96 98 00 xacquire lock orl \$0x989680,\(%rcx\)
116 [ ]*[a-f0-9]+: f2 f0 81 09 80 96 98 00 xacquire lock orl \$0x989680,\(%rcx\)
117 [ ]*[a-f0-9]+: f3 f0 81 09 80 96 98 00 xrelease lock orl \$0x989680,\(%rcx\)
118 [ ]*[a-f0-9]+: f3 f0 81 09 80 96 98 00 xrelease lock orl \$0x989680,\(%rcx\)
119 [ ]*[a-f0-9]+: f0 f2 81 09 80 96 98 00 lock xacquire orl \$0x989680,\(%rcx\)
120 [ ]*[a-f0-9]+: f0 f3 81 09 80 96 98 00 lock xrelease orl \$0x989680,\(%rcx\)
121 [ ]*[a-f0-9]+: f2 f0 81 19 80 96 98 00 xacquire lock sbbl \$0x989680,\(%rcx\)
122 [ ]*[a-f0-9]+: f2 f0 81 19 80 96 98 00 xacquire lock sbbl \$0x989680,\(%rcx\)
123 [ ]*[a-f0-9]+: f3 f0 81 19 80 96 98 00 xrelease lock sbbl \$0x989680,\(%rcx\)
124 [ ]*[a-f0-9]+: f3 f0 81 19 80 96 98 00 xrelease lock sbbl \$0x989680,\(%rcx\)
125 [ ]*[a-f0-9]+: f0 f2 81 19 80 96 98 00 lock xacquire sbbl \$0x989680,\(%rcx\)
126 [ ]*[a-f0-9]+: f0 f3 81 19 80 96 98 00 lock xrelease sbbl \$0x989680,\(%rcx\)
127 [ ]*[a-f0-9]+: f2 f0 81 29 80 96 98 00 xacquire lock subl \$0x989680,\(%rcx\)
128 [ ]*[a-f0-9]+: f2 f0 81 29 80 96 98 00 xacquire lock subl \$0x989680,\(%rcx\)
129 [ ]*[a-f0-9]+: f3 f0 81 29 80 96 98 00 xrelease lock subl \$0x989680,\(%rcx\)
130 [ ]*[a-f0-9]+: f3 f0 81 29 80 96 98 00 xrelease lock subl \$0x989680,\(%rcx\)
131 [ ]*[a-f0-9]+: f0 f2 81 29 80 96 98 00 lock xacquire subl \$0x989680,\(%rcx\)
132 [ ]*[a-f0-9]+: f0 f3 81 29 80 96 98 00 lock xrelease subl \$0x989680,\(%rcx\)
133 [ ]*[a-f0-9]+: f2 f0 81 31 80 96 98 00 xacquire lock xorl \$0x989680,\(%rcx\)
134 [ ]*[a-f0-9]+: f2 f0 81 31 80 96 98 00 xacquire lock xorl \$0x989680,\(%rcx\)
135 [ ]*[a-f0-9]+: f3 f0 81 31 80 96 98 00 xrelease lock xorl \$0x989680,\(%rcx\)
136 [ ]*[a-f0-9]+: f3 f0 81 31 80 96 98 00 xrelease lock xorl \$0x989680,\(%rcx\)
137 [ ]*[a-f0-9]+: f0 f2 81 31 80 96 98 00 lock xacquire xorl \$0x989680,\(%rcx\)
138 [ ]*[a-f0-9]+: f0 f3 81 31 80 96 98 00 lock xrelease xorl \$0x989680,\(%rcx\)
139 [ ]*[a-f0-9]+: f2 f0 48 81 11 80 96 98 00 xacquire lock adcq \$0x989680,\(%rcx\)
140 [ ]*[a-f0-9]+: f2 f0 48 81 11 80 96 98 00 xacquire lock adcq \$0x989680,\(%rcx\)
141 [ ]*[a-f0-9]+: f3 f0 48 81 11 80 96 98 00 xrelease lock adcq \$0x989680,\(%rcx\)
142 [ ]*[a-f0-9]+: f3 f0 48 81 11 80 96 98 00 xrelease lock adcq \$0x989680,\(%rcx\)
143 [ ]*[a-f0-9]+: f0 f2 48 81 11 80 96 98 00 lock xacquire adcq \$0x989680,\(%rcx\)
144 [ ]*[a-f0-9]+: f0 f3 48 81 11 80 96 98 00 lock xrelease adcq \$0x989680,\(%rcx\)
145 [ ]*[a-f0-9]+: f2 f0 48 81 01 80 96 98 00 xacquire lock addq \$0x989680,\(%rcx\)
146 [ ]*[a-f0-9]+: f2 f0 48 81 01 80 96 98 00 xacquire lock addq \$0x989680,\(%rcx\)
147 [ ]*[a-f0-9]+: f3 f0 48 81 01 80 96 98 00 xrelease lock addq \$0x989680,\(%rcx\)
148 [ ]*[a-f0-9]+: f3 f0 48 81 01 80 96 98 00 xrelease lock addq \$0x989680,\(%rcx\)
149 [ ]*[a-f0-9]+: f0 f2 48 81 01 80 96 98 00 lock xacquire addq \$0x989680,\(%rcx\)
150 [ ]*[a-f0-9]+: f0 f3 48 81 01 80 96 98 00 lock xrelease addq \$0x989680,\(%rcx\)
151 [ ]*[a-f0-9]+: f2 f0 48 81 21 80 96 98 00 xacquire lock andq \$0x989680,\(%rcx\)
152 [ ]*[a-f0-9]+: f2 f0 48 81 21 80 96 98 00 xacquire lock andq \$0x989680,\(%rcx\)
153 [ ]*[a-f0-9]+: f3 f0 48 81 21 80 96 98 00 xrelease lock andq \$0x989680,\(%rcx\)
154 [ ]*[a-f0-9]+: f3 f0 48 81 21 80 96 98 00 xrelease lock andq \$0x989680,\(%rcx\)
155 [ ]*[a-f0-9]+: f0 f2 48 81 21 80 96 98 00 lock xacquire andq \$0x989680,\(%rcx\)
156 [ ]*[a-f0-9]+: f0 f3 48 81 21 80 96 98 00 lock xrelease andq \$0x989680,\(%rcx\)
157 [ ]*[a-f0-9]+: f3 48 c7 01 80 96 98 00 xrelease movq \$0x989680,\(%rcx\)
158 [ ]*[a-f0-9]+: f2 f0 48 81 09 80 96 98 00 xacquire lock orq \$0x989680,\(%rcx\)
159 [ ]*[a-f0-9]+: f2 f0 48 81 09 80 96 98 00 xacquire lock orq \$0x989680,\(%rcx\)
160 [ ]*[a-f0-9]+: f3 f0 48 81 09 80 96 98 00 xrelease lock orq \$0x989680,\(%rcx\)
161 [ ]*[a-f0-9]+: f3 f0 48 81 09 80 96 98 00 xrelease lock orq \$0x989680,\(%rcx\)
162 [ ]*[a-f0-9]+: f0 f2 48 81 09 80 96 98 00 lock xacquire orq \$0x989680,\(%rcx\)
163 [ ]*[a-f0-9]+: f0 f3 48 81 09 80 96 98 00 lock xrelease orq \$0x989680,\(%rcx\)
164 [ ]*[a-f0-9]+: f2 f0 48 81 19 80 96 98 00 xacquire lock sbbq \$0x989680,\(%rcx\)
165 [ ]*[a-f0-9]+: f2 f0 48 81 19 80 96 98 00 xacquire lock sbbq \$0x989680,\(%rcx\)
166 [ ]*[a-f0-9]+: f3 f0 48 81 19 80 96 98 00 xrelease lock sbbq \$0x989680,\(%rcx\)
167 [ ]*[a-f0-9]+: f3 f0 48 81 19 80 96 98 00 xrelease lock sbbq \$0x989680,\(%rcx\)
168 [ ]*[a-f0-9]+: f0 f2 48 81 19 80 96 98 00 lock xacquire sbbq \$0x989680,\(%rcx\)
169 [ ]*[a-f0-9]+: f0 f3 48 81 19 80 96 98 00 lock xrelease sbbq \$0x989680,\(%rcx\)
170 [ ]*[a-f0-9]+: f2 f0 48 81 29 80 96 98 00 xacquire lock subq \$0x989680,\(%rcx\)
171 [ ]*[a-f0-9]+: f2 f0 48 81 29 80 96 98 00 xacquire lock subq \$0x989680,\(%rcx\)
172 [ ]*[a-f0-9]+: f3 f0 48 81 29 80 96 98 00 xrelease lock subq \$0x989680,\(%rcx\)
173 [ ]*[a-f0-9]+: f3 f0 48 81 29 80 96 98 00 xrelease lock subq \$0x989680,\(%rcx\)
174 [ ]*[a-f0-9]+: f0 f2 48 81 29 80 96 98 00 lock xacquire subq \$0x989680,\(%rcx\)
175 [ ]*[a-f0-9]+: f0 f3 48 81 29 80 96 98 00 lock xrelease subq \$0x989680,\(%rcx\)
176 [ ]*[a-f0-9]+: f2 f0 48 81 31 80 96 98 00 xacquire lock xorq \$0x989680,\(%rcx\)
177 [ ]*[a-f0-9]+: f2 f0 48 81 31 80 96 98 00 xacquire lock xorq \$0x989680,\(%rcx\)
178 [ ]*[a-f0-9]+: f3 f0 48 81 31 80 96 98 00 xrelease lock xorq \$0x989680,\(%rcx\)
179 [ ]*[a-f0-9]+: f3 f0 48 81 31 80 96 98 00 xrelease lock xorq \$0x989680,\(%rcx\)
180 [ ]*[a-f0-9]+: f0 f2 48 81 31 80 96 98 00 lock xacquire xorq \$0x989680,\(%rcx\)
181 [ ]*[a-f0-9]+: f0 f3 48 81 31 80 96 98 00 lock xrelease xorq \$0x989680,\(%rcx\)
182 [ ]*[a-f0-9]+: 66 f2 f0 83 11 64 xacquire lock adcw \$0x64,\(%rcx\)
183 [ ]*[a-f0-9]+: 66 f2 f0 83 11 64 xacquire lock adcw \$0x64,\(%rcx\)
184 [ ]*[a-f0-9]+: 66 f3 f0 83 11 64 xrelease lock adcw \$0x64,\(%rcx\)
185 [ ]*[a-f0-9]+: 66 f3 f0 83 11 64 xrelease lock adcw \$0x64,\(%rcx\)
186 [ ]*[a-f0-9]+: f0 f2 66 83 11 64 lock xacquire adcw \$0x64,\(%rcx\)
187 [ ]*[a-f0-9]+: f0 f3 66 83 11 64 lock xrelease adcw \$0x64,\(%rcx\)
188 [ ]*[a-f0-9]+: 66 f2 f0 83 01 64 xacquire lock addw \$0x64,\(%rcx\)
189 [ ]*[a-f0-9]+: 66 f2 f0 83 01 64 xacquire lock addw \$0x64,\(%rcx\)
190 [ ]*[a-f0-9]+: 66 f3 f0 83 01 64 xrelease lock addw \$0x64,\(%rcx\)
191 [ ]*[a-f0-9]+: 66 f3 f0 83 01 64 xrelease lock addw \$0x64,\(%rcx\)
192 [ ]*[a-f0-9]+: f0 f2 66 83 01 64 lock xacquire addw \$0x64,\(%rcx\)
193 [ ]*[a-f0-9]+: f0 f3 66 83 01 64 lock xrelease addw \$0x64,\(%rcx\)
194 [ ]*[a-f0-9]+: 66 f2 f0 83 21 64 xacquire lock andw \$0x64,\(%rcx\)
195 [ ]*[a-f0-9]+: 66 f2 f0 83 21 64 xacquire lock andw \$0x64,\(%rcx\)
196 [ ]*[a-f0-9]+: 66 f3 f0 83 21 64 xrelease lock andw \$0x64,\(%rcx\)
197 [ ]*[a-f0-9]+: 66 f3 f0 83 21 64 xrelease lock andw \$0x64,\(%rcx\)
198 [ ]*[a-f0-9]+: f0 f2 66 83 21 64 lock xacquire andw \$0x64,\(%rcx\)
199 [ ]*[a-f0-9]+: f0 f3 66 83 21 64 lock xrelease andw \$0x64,\(%rcx\)
200 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 39 64 xacquire lock btcw \$0x64,\(%rcx\)
201 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 39 64 xacquire lock btcw \$0x64,\(%rcx\)
202 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 39 64 xrelease lock btcw \$0x64,\(%rcx\)
203 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 39 64 xrelease lock btcw \$0x64,\(%rcx\)
204 [ ]*[a-f0-9]+: f0 f2 66 0f ba 39 64 lock xacquire btcw \$0x64,\(%rcx\)
205 [ ]*[a-f0-9]+: f0 f3 66 0f ba 39 64 lock xrelease btcw \$0x64,\(%rcx\)
206 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 31 64 xacquire lock btrw \$0x64,\(%rcx\)
207 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 31 64 xacquire lock btrw \$0x64,\(%rcx\)
208 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 31 64 xrelease lock btrw \$0x64,\(%rcx\)
209 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 31 64 xrelease lock btrw \$0x64,\(%rcx\)
210 [ ]*[a-f0-9]+: f0 f2 66 0f ba 31 64 lock xacquire btrw \$0x64,\(%rcx\)
211 [ ]*[a-f0-9]+: f0 f3 66 0f ba 31 64 lock xrelease btrw \$0x64,\(%rcx\)
212 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 29 64 xacquire lock btsw \$0x64,\(%rcx\)
213 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 29 64 xacquire lock btsw \$0x64,\(%rcx\)
214 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 29 64 xrelease lock btsw \$0x64,\(%rcx\)
215 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 29 64 xrelease lock btsw \$0x64,\(%rcx\)
216 [ ]*[a-f0-9]+: f0 f2 66 0f ba 29 64 lock xacquire btsw \$0x64,\(%rcx\)
217 [ ]*[a-f0-9]+: f0 f3 66 0f ba 29 64 lock xrelease btsw \$0x64,\(%rcx\)
218 [ ]*[a-f0-9]+: 66 f3 c7 01 64 00 xrelease movw \$0x64,\(%rcx\)
219 [ ]*[a-f0-9]+: 66 f2 f0 83 09 64 xacquire lock orw \$0x64,\(%rcx\)
220 [ ]*[a-f0-9]+: 66 f2 f0 83 09 64 xacquire lock orw \$0x64,\(%rcx\)
221 [ ]*[a-f0-9]+: 66 f3 f0 83 09 64 xrelease lock orw \$0x64,\(%rcx\)
222 [ ]*[a-f0-9]+: 66 f3 f0 83 09 64 xrelease lock orw \$0x64,\(%rcx\)
223 [ ]*[a-f0-9]+: f0 f2 66 83 09 64 lock xacquire orw \$0x64,\(%rcx\)
224 [ ]*[a-f0-9]+: f0 f3 66 83 09 64 lock xrelease orw \$0x64,\(%rcx\)
225 [ ]*[a-f0-9]+: 66 f2 f0 83 19 64 xacquire lock sbbw \$0x64,\(%rcx\)
226 [ ]*[a-f0-9]+: 66 f2 f0 83 19 64 xacquire lock sbbw \$0x64,\(%rcx\)
227 [ ]*[a-f0-9]+: 66 f3 f0 83 19 64 xrelease lock sbbw \$0x64,\(%rcx\)
228 [ ]*[a-f0-9]+: 66 f3 f0 83 19 64 xrelease lock sbbw \$0x64,\(%rcx\)
229 [ ]*[a-f0-9]+: f0 f2 66 83 19 64 lock xacquire sbbw \$0x64,\(%rcx\)
230 [ ]*[a-f0-9]+: f0 f3 66 83 19 64 lock xrelease sbbw \$0x64,\(%rcx\)
231 [ ]*[a-f0-9]+: 66 f2 f0 83 29 64 xacquire lock subw \$0x64,\(%rcx\)
232 [ ]*[a-f0-9]+: 66 f2 f0 83 29 64 xacquire lock subw \$0x64,\(%rcx\)
233 [ ]*[a-f0-9]+: 66 f3 f0 83 29 64 xrelease lock subw \$0x64,\(%rcx\)
234 [ ]*[a-f0-9]+: 66 f3 f0 83 29 64 xrelease lock subw \$0x64,\(%rcx\)
235 [ ]*[a-f0-9]+: f0 f2 66 83 29 64 lock xacquire subw \$0x64,\(%rcx\)
236 [ ]*[a-f0-9]+: f0 f3 66 83 29 64 lock xrelease subw \$0x64,\(%rcx\)
237 [ ]*[a-f0-9]+: 66 f2 f0 83 31 64 xacquire lock xorw \$0x64,\(%rcx\)
238 [ ]*[a-f0-9]+: 66 f2 f0 83 31 64 xacquire lock xorw \$0x64,\(%rcx\)
239 [ ]*[a-f0-9]+: 66 f3 f0 83 31 64 xrelease lock xorw \$0x64,\(%rcx\)
240 [ ]*[a-f0-9]+: 66 f3 f0 83 31 64 xrelease lock xorw \$0x64,\(%rcx\)
241 [ ]*[a-f0-9]+: f0 f2 66 83 31 64 lock xacquire xorw \$0x64,\(%rcx\)
242 [ ]*[a-f0-9]+: f0 f3 66 83 31 64 lock xrelease xorw \$0x64,\(%rcx\)
243 [ ]*[a-f0-9]+: f2 f0 83 11 64 xacquire lock adcl \$0x64,\(%rcx\)
244 [ ]*[a-f0-9]+: f2 f0 83 11 64 xacquire lock adcl \$0x64,\(%rcx\)
245 [ ]*[a-f0-9]+: f3 f0 83 11 64 xrelease lock adcl \$0x64,\(%rcx\)
246 [ ]*[a-f0-9]+: f3 f0 83 11 64 xrelease lock adcl \$0x64,\(%rcx\)
247 [ ]*[a-f0-9]+: f0 f2 83 11 64 lock xacquire adcl \$0x64,\(%rcx\)
248 [ ]*[a-f0-9]+: f0 f3 83 11 64 lock xrelease adcl \$0x64,\(%rcx\)
249 [ ]*[a-f0-9]+: f2 f0 83 01 64 xacquire lock addl \$0x64,\(%rcx\)
250 [ ]*[a-f0-9]+: f2 f0 83 01 64 xacquire lock addl \$0x64,\(%rcx\)
251 [ ]*[a-f0-9]+: f3 f0 83 01 64 xrelease lock addl \$0x64,\(%rcx\)
252 [ ]*[a-f0-9]+: f3 f0 83 01 64 xrelease lock addl \$0x64,\(%rcx\)
253 [ ]*[a-f0-9]+: f0 f2 83 01 64 lock xacquire addl \$0x64,\(%rcx\)
254 [ ]*[a-f0-9]+: f0 f3 83 01 64 lock xrelease addl \$0x64,\(%rcx\)
255 [ ]*[a-f0-9]+: f2 f0 83 21 64 xacquire lock andl \$0x64,\(%rcx\)
256 [ ]*[a-f0-9]+: f2 f0 83 21 64 xacquire lock andl \$0x64,\(%rcx\)
257 [ ]*[a-f0-9]+: f3 f0 83 21 64 xrelease lock andl \$0x64,\(%rcx\)
258 [ ]*[a-f0-9]+: f3 f0 83 21 64 xrelease lock andl \$0x64,\(%rcx\)
259 [ ]*[a-f0-9]+: f0 f2 83 21 64 lock xacquire andl \$0x64,\(%rcx\)
260 [ ]*[a-f0-9]+: f0 f3 83 21 64 lock xrelease andl \$0x64,\(%rcx\)
261 [ ]*[a-f0-9]+: f2 f0 0f ba 39 64 xacquire lock btcl \$0x64,\(%rcx\)
262 [ ]*[a-f0-9]+: f2 f0 0f ba 39 64 xacquire lock btcl \$0x64,\(%rcx\)
263 [ ]*[a-f0-9]+: f3 f0 0f ba 39 64 xrelease lock btcl \$0x64,\(%rcx\)
264 [ ]*[a-f0-9]+: f3 f0 0f ba 39 64 xrelease lock btcl \$0x64,\(%rcx\)
265 [ ]*[a-f0-9]+: f0 f2 0f ba 39 64 lock xacquire btcl \$0x64,\(%rcx\)
266 [ ]*[a-f0-9]+: f0 f3 0f ba 39 64 lock xrelease btcl \$0x64,\(%rcx\)
267 [ ]*[a-f0-9]+: f2 f0 0f ba 31 64 xacquire lock btrl \$0x64,\(%rcx\)
268 [ ]*[a-f0-9]+: f2 f0 0f ba 31 64 xacquire lock btrl \$0x64,\(%rcx\)
269 [ ]*[a-f0-9]+: f3 f0 0f ba 31 64 xrelease lock btrl \$0x64,\(%rcx\)
270 [ ]*[a-f0-9]+: f3 f0 0f ba 31 64 xrelease lock btrl \$0x64,\(%rcx\)
271 [ ]*[a-f0-9]+: f0 f2 0f ba 31 64 lock xacquire btrl \$0x64,\(%rcx\)
272 [ ]*[a-f0-9]+: f0 f3 0f ba 31 64 lock xrelease btrl \$0x64,\(%rcx\)
273 [ ]*[a-f0-9]+: f2 f0 0f ba 29 64 xacquire lock btsl \$0x64,\(%rcx\)
274 [ ]*[a-f0-9]+: f2 f0 0f ba 29 64 xacquire lock btsl \$0x64,\(%rcx\)
275 [ ]*[a-f0-9]+: f3 f0 0f ba 29 64 xrelease lock btsl \$0x64,\(%rcx\)
276 [ ]*[a-f0-9]+: f3 f0 0f ba 29 64 xrelease lock btsl \$0x64,\(%rcx\)
277 [ ]*[a-f0-9]+: f0 f2 0f ba 29 64 lock xacquire btsl \$0x64,\(%rcx\)
278 [ ]*[a-f0-9]+: f0 f3 0f ba 29 64 lock xrelease btsl \$0x64,\(%rcx\)
279 [ ]*[a-f0-9]+: f3 c7 01 64 00 00 00 xrelease movl \$0x64,\(%rcx\)
280 [ ]*[a-f0-9]+: f2 f0 83 09 64 xacquire lock orl \$0x64,\(%rcx\)
281 [ ]*[a-f0-9]+: f2 f0 83 09 64 xacquire lock orl \$0x64,\(%rcx\)
282 [ ]*[a-f0-9]+: f3 f0 83 09 64 xrelease lock orl \$0x64,\(%rcx\)
283 [ ]*[a-f0-9]+: f3 f0 83 09 64 xrelease lock orl \$0x64,\(%rcx\)
284 [ ]*[a-f0-9]+: f0 f2 83 09 64 lock xacquire orl \$0x64,\(%rcx\)
285 [ ]*[a-f0-9]+: f0 f3 83 09 64 lock xrelease orl \$0x64,\(%rcx\)
286 [ ]*[a-f0-9]+: f2 f0 83 19 64 xacquire lock sbbl \$0x64,\(%rcx\)
287 [ ]*[a-f0-9]+: f2 f0 83 19 64 xacquire lock sbbl \$0x64,\(%rcx\)
288 [ ]*[a-f0-9]+: f3 f0 83 19 64 xrelease lock sbbl \$0x64,\(%rcx\)
289 [ ]*[a-f0-9]+: f3 f0 83 19 64 xrelease lock sbbl \$0x64,\(%rcx\)
290 [ ]*[a-f0-9]+: f0 f2 83 19 64 lock xacquire sbbl \$0x64,\(%rcx\)
291 [ ]*[a-f0-9]+: f0 f3 83 19 64 lock xrelease sbbl \$0x64,\(%rcx\)
292 [ ]*[a-f0-9]+: f2 f0 83 29 64 xacquire lock subl \$0x64,\(%rcx\)
293 [ ]*[a-f0-9]+: f2 f0 83 29 64 xacquire lock subl \$0x64,\(%rcx\)
294 [ ]*[a-f0-9]+: f3 f0 83 29 64 xrelease lock subl \$0x64,\(%rcx\)
295 [ ]*[a-f0-9]+: f3 f0 83 29 64 xrelease lock subl \$0x64,\(%rcx\)
296 [ ]*[a-f0-9]+: f0 f2 83 29 64 lock xacquire subl \$0x64,\(%rcx\)
297 [ ]*[a-f0-9]+: f0 f3 83 29 64 lock xrelease subl \$0x64,\(%rcx\)
298 [ ]*[a-f0-9]+: f2 f0 83 31 64 xacquire lock xorl \$0x64,\(%rcx\)
299 [ ]*[a-f0-9]+: f2 f0 83 31 64 xacquire lock xorl \$0x64,\(%rcx\)
300 [ ]*[a-f0-9]+: f3 f0 83 31 64 xrelease lock xorl \$0x64,\(%rcx\)
301 [ ]*[a-f0-9]+: f3 f0 83 31 64 xrelease lock xorl \$0x64,\(%rcx\)
302 [ ]*[a-f0-9]+: f0 f2 83 31 64 lock xacquire xorl \$0x64,\(%rcx\)
303 [ ]*[a-f0-9]+: f0 f3 83 31 64 lock xrelease xorl \$0x64,\(%rcx\)
304 [ ]*[a-f0-9]+: f2 f0 48 83 11 64 xacquire lock adcq \$0x64,\(%rcx\)
305 [ ]*[a-f0-9]+: f2 f0 48 83 11 64 xacquire lock adcq \$0x64,\(%rcx\)
306 [ ]*[a-f0-9]+: f3 f0 48 83 11 64 xrelease lock adcq \$0x64,\(%rcx\)
307 [ ]*[a-f0-9]+: f3 f0 48 83 11 64 xrelease lock adcq \$0x64,\(%rcx\)
308 [ ]*[a-f0-9]+: f0 f2 48 83 11 64 lock xacquire adcq \$0x64,\(%rcx\)
309 [ ]*[a-f0-9]+: f0 f3 48 83 11 64 lock xrelease adcq \$0x64,\(%rcx\)
310 [ ]*[a-f0-9]+: f2 f0 48 83 01 64 xacquire lock addq \$0x64,\(%rcx\)
311 [ ]*[a-f0-9]+: f2 f0 48 83 01 64 xacquire lock addq \$0x64,\(%rcx\)
312 [ ]*[a-f0-9]+: f3 f0 48 83 01 64 xrelease lock addq \$0x64,\(%rcx\)
313 [ ]*[a-f0-9]+: f3 f0 48 83 01 64 xrelease lock addq \$0x64,\(%rcx\)
314 [ ]*[a-f0-9]+: f0 f2 48 83 01 64 lock xacquire addq \$0x64,\(%rcx\)
315 [ ]*[a-f0-9]+: f0 f3 48 83 01 64 lock xrelease addq \$0x64,\(%rcx\)
316 [ ]*[a-f0-9]+: f2 f0 48 83 21 64 xacquire lock andq \$0x64,\(%rcx\)
317 [ ]*[a-f0-9]+: f2 f0 48 83 21 64 xacquire lock andq \$0x64,\(%rcx\)
318 [ ]*[a-f0-9]+: f3 f0 48 83 21 64 xrelease lock andq \$0x64,\(%rcx\)
319 [ ]*[a-f0-9]+: f3 f0 48 83 21 64 xrelease lock andq \$0x64,\(%rcx\)
320 [ ]*[a-f0-9]+: f0 f2 48 83 21 64 lock xacquire andq \$0x64,\(%rcx\)
321 [ ]*[a-f0-9]+: f0 f3 48 83 21 64 lock xrelease andq \$0x64,\(%rcx\)
322 [ ]*[a-f0-9]+: f2 f0 48 0f ba 39 64 xacquire lock btcq \$0x64,\(%rcx\)
323 [ ]*[a-f0-9]+: f2 f0 48 0f ba 39 64 xacquire lock btcq \$0x64,\(%rcx\)
324 [ ]*[a-f0-9]+: f3 f0 48 0f ba 39 64 xrelease lock btcq \$0x64,\(%rcx\)
325 [ ]*[a-f0-9]+: f3 f0 48 0f ba 39 64 xrelease lock btcq \$0x64,\(%rcx\)
326 [ ]*[a-f0-9]+: f0 f2 48 0f ba 39 64 lock xacquire btcq \$0x64,\(%rcx\)
327 [ ]*[a-f0-9]+: f0 f3 48 0f ba 39 64 lock xrelease btcq \$0x64,\(%rcx\)
328 [ ]*[a-f0-9]+: f2 f0 48 0f ba 31 64 xacquire lock btrq \$0x64,\(%rcx\)
329 [ ]*[a-f0-9]+: f2 f0 48 0f ba 31 64 xacquire lock btrq \$0x64,\(%rcx\)
330 [ ]*[a-f0-9]+: f3 f0 48 0f ba 31 64 xrelease lock btrq \$0x64,\(%rcx\)
331 [ ]*[a-f0-9]+: f3 f0 48 0f ba 31 64 xrelease lock btrq \$0x64,\(%rcx\)
332 [ ]*[a-f0-9]+: f0 f2 48 0f ba 31 64 lock xacquire btrq \$0x64,\(%rcx\)
333 [ ]*[a-f0-9]+: f0 f3 48 0f ba 31 64 lock xrelease btrq \$0x64,\(%rcx\)
334 [ ]*[a-f0-9]+: f2 f0 48 0f ba 29 64 xacquire lock btsq \$0x64,\(%rcx\)
335 [ ]*[a-f0-9]+: f2 f0 48 0f ba 29 64 xacquire lock btsq \$0x64,\(%rcx\)
336 [ ]*[a-f0-9]+: f3 f0 48 0f ba 29 64 xrelease lock btsq \$0x64,\(%rcx\)
337 [ ]*[a-f0-9]+: f3 f0 48 0f ba 29 64 xrelease lock btsq \$0x64,\(%rcx\)
338 [ ]*[a-f0-9]+: f0 f2 48 0f ba 29 64 lock xacquire btsq \$0x64,\(%rcx\)
339 [ ]*[a-f0-9]+: f0 f3 48 0f ba 29 64 lock xrelease btsq \$0x64,\(%rcx\)
340 [ ]*[a-f0-9]+: f3 48 c7 01 64 00 00 00 xrelease movq \$0x64,\(%rcx\)
341 [ ]*[a-f0-9]+: f2 f0 48 83 09 64 xacquire lock orq \$0x64,\(%rcx\)
342 [ ]*[a-f0-9]+: f2 f0 48 83 09 64 xacquire lock orq \$0x64,\(%rcx\)
343 [ ]*[a-f0-9]+: f3 f0 48 83 09 64 xrelease lock orq \$0x64,\(%rcx\)
344 [ ]*[a-f0-9]+: f3 f0 48 83 09 64 xrelease lock orq \$0x64,\(%rcx\)
345 [ ]*[a-f0-9]+: f0 f2 48 83 09 64 lock xacquire orq \$0x64,\(%rcx\)
346 [ ]*[a-f0-9]+: f0 f3 48 83 09 64 lock xrelease orq \$0x64,\(%rcx\)
347 [ ]*[a-f0-9]+: f2 f0 48 83 19 64 xacquire lock sbbq \$0x64,\(%rcx\)
348 [ ]*[a-f0-9]+: f2 f0 48 83 19 64 xacquire lock sbbq \$0x64,\(%rcx\)
349 [ ]*[a-f0-9]+: f3 f0 48 83 19 64 xrelease lock sbbq \$0x64,\(%rcx\)
350 [ ]*[a-f0-9]+: f3 f0 48 83 19 64 xrelease lock sbbq \$0x64,\(%rcx\)
351 [ ]*[a-f0-9]+: f0 f2 48 83 19 64 lock xacquire sbbq \$0x64,\(%rcx\)
352 [ ]*[a-f0-9]+: f0 f3 48 83 19 64 lock xrelease sbbq \$0x64,\(%rcx\)
353 [ ]*[a-f0-9]+: f2 f0 48 83 29 64 xacquire lock subq \$0x64,\(%rcx\)
354 [ ]*[a-f0-9]+: f2 f0 48 83 29 64 xacquire lock subq \$0x64,\(%rcx\)
355 [ ]*[a-f0-9]+: f3 f0 48 83 29 64 xrelease lock subq \$0x64,\(%rcx\)
356 [ ]*[a-f0-9]+: f3 f0 48 83 29 64 xrelease lock subq \$0x64,\(%rcx\)
357 [ ]*[a-f0-9]+: f0 f2 48 83 29 64 lock xacquire subq \$0x64,\(%rcx\)
358 [ ]*[a-f0-9]+: f0 f3 48 83 29 64 lock xrelease subq \$0x64,\(%rcx\)
359 [ ]*[a-f0-9]+: f2 f0 48 83 31 64 xacquire lock xorq \$0x64,\(%rcx\)
360 [ ]*[a-f0-9]+: f2 f0 48 83 31 64 xacquire lock xorq \$0x64,\(%rcx\)
361 [ ]*[a-f0-9]+: f3 f0 48 83 31 64 xrelease lock xorq \$0x64,\(%rcx\)
362 [ ]*[a-f0-9]+: f3 f0 48 83 31 64 xrelease lock xorq \$0x64,\(%rcx\)
363 [ ]*[a-f0-9]+: f0 f2 48 83 31 64 lock xacquire xorq \$0x64,\(%rcx\)
364 [ ]*[a-f0-9]+: f0 f3 48 83 31 64 lock xrelease xorq \$0x64,\(%rcx\)
365 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
366 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
367 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
368 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
369 [ ]*[a-f0-9]+: f0 f2 80 11 64 lock xacquire adcb \$0x64,\(%rcx\)
370 [ ]*[a-f0-9]+: f0 f3 80 11 64 lock xrelease adcb \$0x64,\(%rcx\)
371 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
372 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
373 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
374 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
375 [ ]*[a-f0-9]+: f0 f2 80 01 64 lock xacquire addb \$0x64,\(%rcx\)
376 [ ]*[a-f0-9]+: f0 f3 80 01 64 lock xrelease addb \$0x64,\(%rcx\)
377 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
378 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
379 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
380 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
381 [ ]*[a-f0-9]+: f0 f2 80 21 64 lock xacquire andb \$0x64,\(%rcx\)
382 [ ]*[a-f0-9]+: f0 f3 80 21 64 lock xrelease andb \$0x64,\(%rcx\)
383 [ ]*[a-f0-9]+: f3 c6 01 64 xrelease movb \$0x64,\(%rcx\)
384 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
385 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
386 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
387 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
388 [ ]*[a-f0-9]+: f0 f2 80 09 64 lock xacquire orb \$0x64,\(%rcx\)
389 [ ]*[a-f0-9]+: f0 f3 80 09 64 lock xrelease orb \$0x64,\(%rcx\)
390 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
391 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
392 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
393 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
394 [ ]*[a-f0-9]+: f0 f2 80 19 64 lock xacquire sbbb \$0x64,\(%rcx\)
395 [ ]*[a-f0-9]+: f0 f3 80 19 64 lock xrelease sbbb \$0x64,\(%rcx\)
396 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
397 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
398 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
399 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
400 [ ]*[a-f0-9]+: f0 f2 80 29 64 lock xacquire subb \$0x64,\(%rcx\)
401 [ ]*[a-f0-9]+: f0 f3 80 29 64 lock xrelease subb \$0x64,\(%rcx\)
402 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
403 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
404 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
405 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
406 [ ]*[a-f0-9]+: f0 f2 80 31 64 lock xacquire xorb \$0x64,\(%rcx\)
407 [ ]*[a-f0-9]+: f0 f3 80 31 64 lock xrelease xorb \$0x64,\(%rcx\)
408 [ ]*[a-f0-9]+: f2 f0 10 01 xacquire lock adc %al,\(%rcx\)
409 [ ]*[a-f0-9]+: f2 f0 10 01 xacquire lock adc %al,\(%rcx\)
410 [ ]*[a-f0-9]+: f3 f0 10 01 xrelease lock adc %al,\(%rcx\)
411 [ ]*[a-f0-9]+: f3 f0 10 01 xrelease lock adc %al,\(%rcx\)
412 [ ]*[a-f0-9]+: f0 f2 10 01 lock xacquire adc %al,\(%rcx\)
413 [ ]*[a-f0-9]+: f0 f3 10 01 lock xrelease adc %al,\(%rcx\)
414 [ ]*[a-f0-9]+: f2 f0 00 01 xacquire lock add %al,\(%rcx\)
415 [ ]*[a-f0-9]+: f2 f0 00 01 xacquire lock add %al,\(%rcx\)
416 [ ]*[a-f0-9]+: f3 f0 00 01 xrelease lock add %al,\(%rcx\)
417 [ ]*[a-f0-9]+: f3 f0 00 01 xrelease lock add %al,\(%rcx\)
418 [ ]*[a-f0-9]+: f0 f2 00 01 lock xacquire add %al,\(%rcx\)
419 [ ]*[a-f0-9]+: f0 f3 00 01 lock xrelease add %al,\(%rcx\)
420 [ ]*[a-f0-9]+: f2 f0 20 01 xacquire lock and %al,\(%rcx\)
421 [ ]*[a-f0-9]+: f2 f0 20 01 xacquire lock and %al,\(%rcx\)
422 [ ]*[a-f0-9]+: f3 f0 20 01 xrelease lock and %al,\(%rcx\)
423 [ ]*[a-f0-9]+: f3 f0 20 01 xrelease lock and %al,\(%rcx\)
424 [ ]*[a-f0-9]+: f0 f2 20 01 lock xacquire and %al,\(%rcx\)
425 [ ]*[a-f0-9]+: f0 f3 20 01 lock xrelease and %al,\(%rcx\)
426 [ ]*[a-f0-9]+: f3 88 01 xrelease mov %al,\(%rcx\)
427 [ ]*[a-f0-9]+: f2 f0 08 01 xacquire lock or %al,\(%rcx\)
428 [ ]*[a-f0-9]+: f2 f0 08 01 xacquire lock or %al,\(%rcx\)
429 [ ]*[a-f0-9]+: f3 f0 08 01 xrelease lock or %al,\(%rcx\)
430 [ ]*[a-f0-9]+: f3 f0 08 01 xrelease lock or %al,\(%rcx\)
431 [ ]*[a-f0-9]+: f0 f2 08 01 lock xacquire or %al,\(%rcx\)
432 [ ]*[a-f0-9]+: f0 f3 08 01 lock xrelease or %al,\(%rcx\)
433 [ ]*[a-f0-9]+: f2 f0 18 01 xacquire lock sbb %al,\(%rcx\)
434 [ ]*[a-f0-9]+: f2 f0 18 01 xacquire lock sbb %al,\(%rcx\)
435 [ ]*[a-f0-9]+: f3 f0 18 01 xrelease lock sbb %al,\(%rcx\)
436 [ ]*[a-f0-9]+: f3 f0 18 01 xrelease lock sbb %al,\(%rcx\)
437 [ ]*[a-f0-9]+: f0 f2 18 01 lock xacquire sbb %al,\(%rcx\)
438 [ ]*[a-f0-9]+: f0 f3 18 01 lock xrelease sbb %al,\(%rcx\)
439 [ ]*[a-f0-9]+: f2 f0 28 01 xacquire lock sub %al,\(%rcx\)
440 [ ]*[a-f0-9]+: f2 f0 28 01 xacquire lock sub %al,\(%rcx\)
441 [ ]*[a-f0-9]+: f3 f0 28 01 xrelease lock sub %al,\(%rcx\)
442 [ ]*[a-f0-9]+: f3 f0 28 01 xrelease lock sub %al,\(%rcx\)
443 [ ]*[a-f0-9]+: f0 f2 28 01 lock xacquire sub %al,\(%rcx\)
444 [ ]*[a-f0-9]+: f0 f3 28 01 lock xrelease sub %al,\(%rcx\)
445 [ ]*[a-f0-9]+: f2 f0 86 01 xacquire lock xchg %al,\(%rcx\)
446 [ ]*[a-f0-9]+: f2 f0 86 01 xacquire lock xchg %al,\(%rcx\)
447 [ ]*[a-f0-9]+: f2 86 01 xacquire xchg %al,\(%rcx\)
448 [ ]*[a-f0-9]+: f3 f0 86 01 xrelease lock xchg %al,\(%rcx\)
449 [ ]*[a-f0-9]+: f3 f0 86 01 xrelease lock xchg %al,\(%rcx\)
450 [ ]*[a-f0-9]+: f3 86 01 xrelease xchg %al,\(%rcx\)
451 [ ]*[a-f0-9]+: f0 f2 86 01 lock xacquire xchg %al,\(%rcx\)
452 [ ]*[a-f0-9]+: f0 f3 86 01 lock xrelease xchg %al,\(%rcx\)
453 [ ]*[a-f0-9]+: f2 f0 30 01 xacquire lock xor %al,\(%rcx\)
454 [ ]*[a-f0-9]+: f2 f0 30 01 xacquire lock xor %al,\(%rcx\)
455 [ ]*[a-f0-9]+: f3 f0 30 01 xrelease lock xor %al,\(%rcx\)
456 [ ]*[a-f0-9]+: f3 f0 30 01 xrelease lock xor %al,\(%rcx\)
457 [ ]*[a-f0-9]+: f0 f2 30 01 lock xacquire xor %al,\(%rcx\)
458 [ ]*[a-f0-9]+: f0 f3 30 01 lock xrelease xor %al,\(%rcx\)
459 [ ]*[a-f0-9]+: 66 f2 f0 11 01 xacquire lock adc %ax,\(%rcx\)
460 [ ]*[a-f0-9]+: 66 f2 f0 11 01 xacquire lock adc %ax,\(%rcx\)
461 [ ]*[a-f0-9]+: 66 f3 f0 11 01 xrelease lock adc %ax,\(%rcx\)
462 [ ]*[a-f0-9]+: 66 f3 f0 11 01 xrelease lock adc %ax,\(%rcx\)
463 [ ]*[a-f0-9]+: f0 f2 66 11 01 lock xacquire adc %ax,\(%rcx\)
464 [ ]*[a-f0-9]+: f0 f3 66 11 01 lock xrelease adc %ax,\(%rcx\)
465 [ ]*[a-f0-9]+: 66 f2 f0 01 01 xacquire lock add %ax,\(%rcx\)
466 [ ]*[a-f0-9]+: 66 f2 f0 01 01 xacquire lock add %ax,\(%rcx\)
467 [ ]*[a-f0-9]+: 66 f3 f0 01 01 xrelease lock add %ax,\(%rcx\)
468 [ ]*[a-f0-9]+: 66 f3 f0 01 01 xrelease lock add %ax,\(%rcx\)
469 [ ]*[a-f0-9]+: f0 f2 66 01 01 lock xacquire add %ax,\(%rcx\)
470 [ ]*[a-f0-9]+: f0 f3 66 01 01 lock xrelease add %ax,\(%rcx\)
471 [ ]*[a-f0-9]+: 66 f2 f0 21 01 xacquire lock and %ax,\(%rcx\)
472 [ ]*[a-f0-9]+: 66 f2 f0 21 01 xacquire lock and %ax,\(%rcx\)
473 [ ]*[a-f0-9]+: 66 f3 f0 21 01 xrelease lock and %ax,\(%rcx\)
474 [ ]*[a-f0-9]+: 66 f3 f0 21 01 xrelease lock and %ax,\(%rcx\)
475 [ ]*[a-f0-9]+: f0 f2 66 21 01 lock xacquire and %ax,\(%rcx\)
476 [ ]*[a-f0-9]+: f0 f3 66 21 01 lock xrelease and %ax,\(%rcx\)
477 [ ]*[a-f0-9]+: 66 f3 89 01 xrelease mov %ax,\(%rcx\)
478 [ ]*[a-f0-9]+: 66 f2 f0 09 01 xacquire lock or %ax,\(%rcx\)
479 [ ]*[a-f0-9]+: 66 f2 f0 09 01 xacquire lock or %ax,\(%rcx\)
480 [ ]*[a-f0-9]+: 66 f3 f0 09 01 xrelease lock or %ax,\(%rcx\)
481 [ ]*[a-f0-9]+: 66 f3 f0 09 01 xrelease lock or %ax,\(%rcx\)
482 [ ]*[a-f0-9]+: f0 f2 66 09 01 lock xacquire or %ax,\(%rcx\)
483 [ ]*[a-f0-9]+: f0 f3 66 09 01 lock xrelease or %ax,\(%rcx\)
484 [ ]*[a-f0-9]+: 66 f2 f0 19 01 xacquire lock sbb %ax,\(%rcx\)
485 [ ]*[a-f0-9]+: 66 f2 f0 19 01 xacquire lock sbb %ax,\(%rcx\)
486 [ ]*[a-f0-9]+: 66 f3 f0 19 01 xrelease lock sbb %ax,\(%rcx\)
487 [ ]*[a-f0-9]+: 66 f3 f0 19 01 xrelease lock sbb %ax,\(%rcx\)
488 [ ]*[a-f0-9]+: f0 f2 66 19 01 lock xacquire sbb %ax,\(%rcx\)
489 [ ]*[a-f0-9]+: f0 f3 66 19 01 lock xrelease sbb %ax,\(%rcx\)
490 [ ]*[a-f0-9]+: 66 f2 f0 29 01 xacquire lock sub %ax,\(%rcx\)
491 [ ]*[a-f0-9]+: 66 f2 f0 29 01 xacquire lock sub %ax,\(%rcx\)
492 [ ]*[a-f0-9]+: 66 f3 f0 29 01 xrelease lock sub %ax,\(%rcx\)
493 [ ]*[a-f0-9]+: 66 f3 f0 29 01 xrelease lock sub %ax,\(%rcx\)
494 [ ]*[a-f0-9]+: f0 f2 66 29 01 lock xacquire sub %ax,\(%rcx\)
495 [ ]*[a-f0-9]+: f0 f3 66 29 01 lock xrelease sub %ax,\(%rcx\)
496 [ ]*[a-f0-9]+: 66 f2 f0 87 01 xacquire lock xchg %ax,\(%rcx\)
497 [ ]*[a-f0-9]+: 66 f2 f0 87 01 xacquire lock xchg %ax,\(%rcx\)
498 [ ]*[a-f0-9]+: 66 f2 87 01 xacquire xchg %ax,\(%rcx\)
499 [ ]*[a-f0-9]+: 66 f3 f0 87 01 xrelease lock xchg %ax,\(%rcx\)
500 [ ]*[a-f0-9]+: 66 f3 f0 87 01 xrelease lock xchg %ax,\(%rcx\)
501 [ ]*[a-f0-9]+: 66 f3 87 01 xrelease xchg %ax,\(%rcx\)
502 [ ]*[a-f0-9]+: f0 f2 66 87 01 lock xacquire xchg %ax,\(%rcx\)
503 [ ]*[a-f0-9]+: f0 f3 66 87 01 lock xrelease xchg %ax,\(%rcx\)
504 [ ]*[a-f0-9]+: 66 f2 f0 31 01 xacquire lock xor %ax,\(%rcx\)
505 [ ]*[a-f0-9]+: 66 f2 f0 31 01 xacquire lock xor %ax,\(%rcx\)
506 [ ]*[a-f0-9]+: 66 f3 f0 31 01 xrelease lock xor %ax,\(%rcx\)
507 [ ]*[a-f0-9]+: 66 f3 f0 31 01 xrelease lock xor %ax,\(%rcx\)
508 [ ]*[a-f0-9]+: f0 f2 66 31 01 lock xacquire xor %ax,\(%rcx\)
509 [ ]*[a-f0-9]+: f0 f3 66 31 01 lock xrelease xor %ax,\(%rcx\)
510 [ ]*[a-f0-9]+: f2 f0 11 01 xacquire lock adc %eax,\(%rcx\)
511 [ ]*[a-f0-9]+: f2 f0 11 01 xacquire lock adc %eax,\(%rcx\)
512 [ ]*[a-f0-9]+: f3 f0 11 01 xrelease lock adc %eax,\(%rcx\)
513 [ ]*[a-f0-9]+: f3 f0 11 01 xrelease lock adc %eax,\(%rcx\)
514 [ ]*[a-f0-9]+: f0 f2 11 01 lock xacquire adc %eax,\(%rcx\)
515 [ ]*[a-f0-9]+: f0 f3 11 01 lock xrelease adc %eax,\(%rcx\)
516 [ ]*[a-f0-9]+: f2 f0 01 01 xacquire lock add %eax,\(%rcx\)
517 [ ]*[a-f0-9]+: f2 f0 01 01 xacquire lock add %eax,\(%rcx\)
518 [ ]*[a-f0-9]+: f3 f0 01 01 xrelease lock add %eax,\(%rcx\)
519 [ ]*[a-f0-9]+: f3 f0 01 01 xrelease lock add %eax,\(%rcx\)
520 [ ]*[a-f0-9]+: f0 f2 01 01 lock xacquire add %eax,\(%rcx\)
521 [ ]*[a-f0-9]+: f0 f3 01 01 lock xrelease add %eax,\(%rcx\)
522 [ ]*[a-f0-9]+: f2 f0 21 01 xacquire lock and %eax,\(%rcx\)
523 [ ]*[a-f0-9]+: f2 f0 21 01 xacquire lock and %eax,\(%rcx\)
524 [ ]*[a-f0-9]+: f3 f0 21 01 xrelease lock and %eax,\(%rcx\)
525 [ ]*[a-f0-9]+: f3 f0 21 01 xrelease lock and %eax,\(%rcx\)
526 [ ]*[a-f0-9]+: f0 f2 21 01 lock xacquire and %eax,\(%rcx\)
527 [ ]*[a-f0-9]+: f0 f3 21 01 lock xrelease and %eax,\(%rcx\)
528 [ ]*[a-f0-9]+: f3 89 01 xrelease mov %eax,\(%rcx\)
529 [ ]*[a-f0-9]+: f2 f0 09 01 xacquire lock or %eax,\(%rcx\)
530 [ ]*[a-f0-9]+: f2 f0 09 01 xacquire lock or %eax,\(%rcx\)
531 [ ]*[a-f0-9]+: f3 f0 09 01 xrelease lock or %eax,\(%rcx\)
532 [ ]*[a-f0-9]+: f3 f0 09 01 xrelease lock or %eax,\(%rcx\)
533 [ ]*[a-f0-9]+: f0 f2 09 01 lock xacquire or %eax,\(%rcx\)
534 [ ]*[a-f0-9]+: f0 f3 09 01 lock xrelease or %eax,\(%rcx\)
535 [ ]*[a-f0-9]+: f2 f0 19 01 xacquire lock sbb %eax,\(%rcx\)
536 [ ]*[a-f0-9]+: f2 f0 19 01 xacquire lock sbb %eax,\(%rcx\)
537 [ ]*[a-f0-9]+: f3 f0 19 01 xrelease lock sbb %eax,\(%rcx\)
538 [ ]*[a-f0-9]+: f3 f0 19 01 xrelease lock sbb %eax,\(%rcx\)
539 [ ]*[a-f0-9]+: f0 f2 19 01 lock xacquire sbb %eax,\(%rcx\)
540 [ ]*[a-f0-9]+: f0 f3 19 01 lock xrelease sbb %eax,\(%rcx\)
541 [ ]*[a-f0-9]+: f2 f0 29 01 xacquire lock sub %eax,\(%rcx\)
542 [ ]*[a-f0-9]+: f2 f0 29 01 xacquire lock sub %eax,\(%rcx\)
543 [ ]*[a-f0-9]+: f3 f0 29 01 xrelease lock sub %eax,\(%rcx\)
544 [ ]*[a-f0-9]+: f3 f0 29 01 xrelease lock sub %eax,\(%rcx\)
545 [ ]*[a-f0-9]+: f0 f2 29 01 lock xacquire sub %eax,\(%rcx\)
546 [ ]*[a-f0-9]+: f0 f3 29 01 lock xrelease sub %eax,\(%rcx\)
547 [ ]*[a-f0-9]+: f2 f0 87 01 xacquire lock xchg %eax,\(%rcx\)
548 [ ]*[a-f0-9]+: f2 f0 87 01 xacquire lock xchg %eax,\(%rcx\)
549 [ ]*[a-f0-9]+: f2 87 01 xacquire xchg %eax,\(%rcx\)
550 [ ]*[a-f0-9]+: f3 f0 87 01 xrelease lock xchg %eax,\(%rcx\)
551 [ ]*[a-f0-9]+: f3 f0 87 01 xrelease lock xchg %eax,\(%rcx\)
552 [ ]*[a-f0-9]+: f3 87 01 xrelease xchg %eax,\(%rcx\)
553 [ ]*[a-f0-9]+: f0 f2 87 01 lock xacquire xchg %eax,\(%rcx\)
554 [ ]*[a-f0-9]+: f0 f3 87 01 lock xrelease xchg %eax,\(%rcx\)
555 [ ]*[a-f0-9]+: f2 f0 31 01 xacquire lock xor %eax,\(%rcx\)
556 [ ]*[a-f0-9]+: f2 f0 31 01 xacquire lock xor %eax,\(%rcx\)
557 [ ]*[a-f0-9]+: f3 f0 31 01 xrelease lock xor %eax,\(%rcx\)
558 [ ]*[a-f0-9]+: f3 f0 31 01 xrelease lock xor %eax,\(%rcx\)
559 [ ]*[a-f0-9]+: f0 f2 31 01 lock xacquire xor %eax,\(%rcx\)
560 [ ]*[a-f0-9]+: f0 f3 31 01 lock xrelease xor %eax,\(%rcx\)
561 [ ]*[a-f0-9]+: f2 f0 48 11 01 xacquire lock adc %rax,\(%rcx\)
562 [ ]*[a-f0-9]+: f2 f0 48 11 01 xacquire lock adc %rax,\(%rcx\)
563 [ ]*[a-f0-9]+: f3 f0 48 11 01 xrelease lock adc %rax,\(%rcx\)
564 [ ]*[a-f0-9]+: f3 f0 48 11 01 xrelease lock adc %rax,\(%rcx\)
565 [ ]*[a-f0-9]+: f0 f2 48 11 01 lock xacquire adc %rax,\(%rcx\)
566 [ ]*[a-f0-9]+: f0 f3 48 11 01 lock xrelease adc %rax,\(%rcx\)
567 [ ]*[a-f0-9]+: f2 f0 48 01 01 xacquire lock add %rax,\(%rcx\)
568 [ ]*[a-f0-9]+: f2 f0 48 01 01 xacquire lock add %rax,\(%rcx\)
569 [ ]*[a-f0-9]+: f3 f0 48 01 01 xrelease lock add %rax,\(%rcx\)
570 [ ]*[a-f0-9]+: f3 f0 48 01 01 xrelease lock add %rax,\(%rcx\)
571 [ ]*[a-f0-9]+: f0 f2 48 01 01 lock xacquire add %rax,\(%rcx\)
572 [ ]*[a-f0-9]+: f0 f3 48 01 01 lock xrelease add %rax,\(%rcx\)
573 [ ]*[a-f0-9]+: f2 f0 48 21 01 xacquire lock and %rax,\(%rcx\)
574 [ ]*[a-f0-9]+: f2 f0 48 21 01 xacquire lock and %rax,\(%rcx\)
575 [ ]*[a-f0-9]+: f3 f0 48 21 01 xrelease lock and %rax,\(%rcx\)
576 [ ]*[a-f0-9]+: f3 f0 48 21 01 xrelease lock and %rax,\(%rcx\)
577 [ ]*[a-f0-9]+: f0 f2 48 21 01 lock xacquire and %rax,\(%rcx\)
578 [ ]*[a-f0-9]+: f0 f3 48 21 01 lock xrelease and %rax,\(%rcx\)
579 [ ]*[a-f0-9]+: f3 48 89 01 xrelease mov %rax,\(%rcx\)
580 [ ]*[a-f0-9]+: f2 f0 48 09 01 xacquire lock or %rax,\(%rcx\)
581 [ ]*[a-f0-9]+: f2 f0 48 09 01 xacquire lock or %rax,\(%rcx\)
582 [ ]*[a-f0-9]+: f3 f0 48 09 01 xrelease lock or %rax,\(%rcx\)
583 [ ]*[a-f0-9]+: f3 f0 48 09 01 xrelease lock or %rax,\(%rcx\)
584 [ ]*[a-f0-9]+: f0 f2 48 09 01 lock xacquire or %rax,\(%rcx\)
585 [ ]*[a-f0-9]+: f0 f3 48 09 01 lock xrelease or %rax,\(%rcx\)
586 [ ]*[a-f0-9]+: f2 f0 48 19 01 xacquire lock sbb %rax,\(%rcx\)
587 [ ]*[a-f0-9]+: f2 f0 48 19 01 xacquire lock sbb %rax,\(%rcx\)
588 [ ]*[a-f0-9]+: f3 f0 48 19 01 xrelease lock sbb %rax,\(%rcx\)
589 [ ]*[a-f0-9]+: f3 f0 48 19 01 xrelease lock sbb %rax,\(%rcx\)
590 [ ]*[a-f0-9]+: f0 f2 48 19 01 lock xacquire sbb %rax,\(%rcx\)
591 [ ]*[a-f0-9]+: f0 f3 48 19 01 lock xrelease sbb %rax,\(%rcx\)
592 [ ]*[a-f0-9]+: f2 f0 48 29 01 xacquire lock sub %rax,\(%rcx\)
593 [ ]*[a-f0-9]+: f2 f0 48 29 01 xacquire lock sub %rax,\(%rcx\)
594 [ ]*[a-f0-9]+: f3 f0 48 29 01 xrelease lock sub %rax,\(%rcx\)
595 [ ]*[a-f0-9]+: f3 f0 48 29 01 xrelease lock sub %rax,\(%rcx\)
596 [ ]*[a-f0-9]+: f0 f2 48 29 01 lock xacquire sub %rax,\(%rcx\)
597 [ ]*[a-f0-9]+: f0 f3 48 29 01 lock xrelease sub %rax,\(%rcx\)
598 [ ]*[a-f0-9]+: f2 f0 48 87 01 xacquire lock xchg %rax,\(%rcx\)
599 [ ]*[a-f0-9]+: f2 f0 48 87 01 xacquire lock xchg %rax,\(%rcx\)
600 [ ]*[a-f0-9]+: f2 48 87 01 xacquire xchg %rax,\(%rcx\)
601 [ ]*[a-f0-9]+: f3 f0 48 87 01 xrelease lock xchg %rax,\(%rcx\)
602 [ ]*[a-f0-9]+: f3 f0 48 87 01 xrelease lock xchg %rax,\(%rcx\)
603 [ ]*[a-f0-9]+: f3 48 87 01 xrelease xchg %rax,\(%rcx\)
604 [ ]*[a-f0-9]+: f0 f2 48 87 01 lock xacquire xchg %rax,\(%rcx\)
605 [ ]*[a-f0-9]+: f0 f3 48 87 01 lock xrelease xchg %rax,\(%rcx\)
606 [ ]*[a-f0-9]+: f2 f0 48 31 01 xacquire lock xor %rax,\(%rcx\)
607 [ ]*[a-f0-9]+: f2 f0 48 31 01 xacquire lock xor %rax,\(%rcx\)
608 [ ]*[a-f0-9]+: f3 f0 48 31 01 xrelease lock xor %rax,\(%rcx\)
609 [ ]*[a-f0-9]+: f3 f0 48 31 01 xrelease lock xor %rax,\(%rcx\)
610 [ ]*[a-f0-9]+: f0 f2 48 31 01 lock xacquire xor %rax,\(%rcx\)
611 [ ]*[a-f0-9]+: f0 f3 48 31 01 lock xrelease xor %rax,\(%rcx\)
612 [ ]*[a-f0-9]+: 66 f2 f0 0f bb 01 xacquire lock btc %ax,\(%rcx\)
613 [ ]*[a-f0-9]+: 66 f2 f0 0f bb 01 xacquire lock btc %ax,\(%rcx\)
614 [ ]*[a-f0-9]+: 66 f3 f0 0f bb 01 xrelease lock btc %ax,\(%rcx\)
615 [ ]*[a-f0-9]+: 66 f3 f0 0f bb 01 xrelease lock btc %ax,\(%rcx\)
616 [ ]*[a-f0-9]+: f0 f2 66 0f bb 01 lock xacquire btc %ax,\(%rcx\)
617 [ ]*[a-f0-9]+: f0 f3 66 0f bb 01 lock xrelease btc %ax,\(%rcx\)
618 [ ]*[a-f0-9]+: 66 f2 f0 0f b3 01 xacquire lock btr %ax,\(%rcx\)
619 [ ]*[a-f0-9]+: 66 f2 f0 0f b3 01 xacquire lock btr %ax,\(%rcx\)
620 [ ]*[a-f0-9]+: 66 f3 f0 0f b3 01 xrelease lock btr %ax,\(%rcx\)
621 [ ]*[a-f0-9]+: 66 f3 f0 0f b3 01 xrelease lock btr %ax,\(%rcx\)
622 [ ]*[a-f0-9]+: f0 f2 66 0f b3 01 lock xacquire btr %ax,\(%rcx\)
623 [ ]*[a-f0-9]+: f0 f3 66 0f b3 01 lock xrelease btr %ax,\(%rcx\)
624 [ ]*[a-f0-9]+: 66 f2 f0 0f ab 01 xacquire lock bts %ax,\(%rcx\)
625 [ ]*[a-f0-9]+: 66 f2 f0 0f ab 01 xacquire lock bts %ax,\(%rcx\)
626 [ ]*[a-f0-9]+: 66 f3 f0 0f ab 01 xrelease lock bts %ax,\(%rcx\)
627 [ ]*[a-f0-9]+: 66 f3 f0 0f ab 01 xrelease lock bts %ax,\(%rcx\)
628 [ ]*[a-f0-9]+: f0 f2 66 0f ab 01 lock xacquire bts %ax,\(%rcx\)
629 [ ]*[a-f0-9]+: f0 f3 66 0f ab 01 lock xrelease bts %ax,\(%rcx\)
630 [ ]*[a-f0-9]+: 66 f2 f0 0f b1 01 xacquire lock cmpxchg %ax,\(%rcx\)
631 [ ]*[a-f0-9]+: 66 f2 f0 0f b1 01 xacquire lock cmpxchg %ax,\(%rcx\)
632 [ ]*[a-f0-9]+: 66 f3 f0 0f b1 01 xrelease lock cmpxchg %ax,\(%rcx\)
633 [ ]*[a-f0-9]+: 66 f3 f0 0f b1 01 xrelease lock cmpxchg %ax,\(%rcx\)
634 [ ]*[a-f0-9]+: f0 f2 66 0f b1 01 lock xacquire cmpxchg %ax,\(%rcx\)
635 [ ]*[a-f0-9]+: f0 f3 66 0f b1 01 lock xrelease cmpxchg %ax,\(%rcx\)
636 [ ]*[a-f0-9]+: 66 f2 f0 0f c1 01 xacquire lock xadd %ax,\(%rcx\)
637 [ ]*[a-f0-9]+: 66 f2 f0 0f c1 01 xacquire lock xadd %ax,\(%rcx\)
638 [ ]*[a-f0-9]+: 66 f3 f0 0f c1 01 xrelease lock xadd %ax,\(%rcx\)
639 [ ]*[a-f0-9]+: 66 f3 f0 0f c1 01 xrelease lock xadd %ax,\(%rcx\)
640 [ ]*[a-f0-9]+: f0 f2 66 0f c1 01 lock xacquire xadd %ax,\(%rcx\)
641 [ ]*[a-f0-9]+: f0 f3 66 0f c1 01 lock xrelease xadd %ax,\(%rcx\)
642 [ ]*[a-f0-9]+: f2 f0 0f bb 01 xacquire lock btc %eax,\(%rcx\)
643 [ ]*[a-f0-9]+: f2 f0 0f bb 01 xacquire lock btc %eax,\(%rcx\)
644 [ ]*[a-f0-9]+: f3 f0 0f bb 01 xrelease lock btc %eax,\(%rcx\)
645 [ ]*[a-f0-9]+: f3 f0 0f bb 01 xrelease lock btc %eax,\(%rcx\)
646 [ ]*[a-f0-9]+: f0 f2 0f bb 01 lock xacquire btc %eax,\(%rcx\)
647 [ ]*[a-f0-9]+: f0 f3 0f bb 01 lock xrelease btc %eax,\(%rcx\)
648 [ ]*[a-f0-9]+: f2 f0 0f b3 01 xacquire lock btr %eax,\(%rcx\)
649 [ ]*[a-f0-9]+: f2 f0 0f b3 01 xacquire lock btr %eax,\(%rcx\)
650 [ ]*[a-f0-9]+: f3 f0 0f b3 01 xrelease lock btr %eax,\(%rcx\)
651 [ ]*[a-f0-9]+: f3 f0 0f b3 01 xrelease lock btr %eax,\(%rcx\)
652 [ ]*[a-f0-9]+: f0 f2 0f b3 01 lock xacquire btr %eax,\(%rcx\)
653 [ ]*[a-f0-9]+: f0 f3 0f b3 01 lock xrelease btr %eax,\(%rcx\)
654 [ ]*[a-f0-9]+: f2 f0 0f ab 01 xacquire lock bts %eax,\(%rcx\)
655 [ ]*[a-f0-9]+: f2 f0 0f ab 01 xacquire lock bts %eax,\(%rcx\)
656 [ ]*[a-f0-9]+: f3 f0 0f ab 01 xrelease lock bts %eax,\(%rcx\)
657 [ ]*[a-f0-9]+: f3 f0 0f ab 01 xrelease lock bts %eax,\(%rcx\)
658 [ ]*[a-f0-9]+: f0 f2 0f ab 01 lock xacquire bts %eax,\(%rcx\)
659 [ ]*[a-f0-9]+: f0 f3 0f ab 01 lock xrelease bts %eax,\(%rcx\)
660 [ ]*[a-f0-9]+: f2 f0 0f b1 01 xacquire lock cmpxchg %eax,\(%rcx\)
661 [ ]*[a-f0-9]+: f2 f0 0f b1 01 xacquire lock cmpxchg %eax,\(%rcx\)
662 [ ]*[a-f0-9]+: f3 f0 0f b1 01 xrelease lock cmpxchg %eax,\(%rcx\)
663 [ ]*[a-f0-9]+: f3 f0 0f b1 01 xrelease lock cmpxchg %eax,\(%rcx\)
664 [ ]*[a-f0-9]+: f0 f2 0f b1 01 lock xacquire cmpxchg %eax,\(%rcx\)
665 [ ]*[a-f0-9]+: f0 f3 0f b1 01 lock xrelease cmpxchg %eax,\(%rcx\)
666 [ ]*[a-f0-9]+: f2 f0 0f c1 01 xacquire lock xadd %eax,\(%rcx\)
667 [ ]*[a-f0-9]+: f2 f0 0f c1 01 xacquire lock xadd %eax,\(%rcx\)
668 [ ]*[a-f0-9]+: f3 f0 0f c1 01 xrelease lock xadd %eax,\(%rcx\)
669 [ ]*[a-f0-9]+: f3 f0 0f c1 01 xrelease lock xadd %eax,\(%rcx\)
670 [ ]*[a-f0-9]+: f0 f2 0f c1 01 lock xacquire xadd %eax,\(%rcx\)
671 [ ]*[a-f0-9]+: f0 f3 0f c1 01 lock xrelease xadd %eax,\(%rcx\)
672 [ ]*[a-f0-9]+: f2 f0 48 0f bb 01 xacquire lock btc %rax,\(%rcx\)
673 [ ]*[a-f0-9]+: f2 f0 48 0f bb 01 xacquire lock btc %rax,\(%rcx\)
674 [ ]*[a-f0-9]+: f3 f0 48 0f bb 01 xrelease lock btc %rax,\(%rcx\)
675 [ ]*[a-f0-9]+: f3 f0 48 0f bb 01 xrelease lock btc %rax,\(%rcx\)
676 [ ]*[a-f0-9]+: f0 f2 48 0f bb 01 lock xacquire btc %rax,\(%rcx\)
677 [ ]*[a-f0-9]+: f0 f3 48 0f bb 01 lock xrelease btc %rax,\(%rcx\)
678 [ ]*[a-f0-9]+: f2 f0 48 0f b3 01 xacquire lock btr %rax,\(%rcx\)
679 [ ]*[a-f0-9]+: f2 f0 48 0f b3 01 xacquire lock btr %rax,\(%rcx\)
680 [ ]*[a-f0-9]+: f3 f0 48 0f b3 01 xrelease lock btr %rax,\(%rcx\)
681 [ ]*[a-f0-9]+: f3 f0 48 0f b3 01 xrelease lock btr %rax,\(%rcx\)
682 [ ]*[a-f0-9]+: f0 f2 48 0f b3 01 lock xacquire btr %rax,\(%rcx\)
683 [ ]*[a-f0-9]+: f0 f3 48 0f b3 01 lock xrelease btr %rax,\(%rcx\)
684 [ ]*[a-f0-9]+: f2 f0 48 0f ab 01 xacquire lock bts %rax,\(%rcx\)
685 [ ]*[a-f0-9]+: f2 f0 48 0f ab 01 xacquire lock bts %rax,\(%rcx\)
686 [ ]*[a-f0-9]+: f3 f0 48 0f ab 01 xrelease lock bts %rax,\(%rcx\)
687 [ ]*[a-f0-9]+: f3 f0 48 0f ab 01 xrelease lock bts %rax,\(%rcx\)
688 [ ]*[a-f0-9]+: f0 f2 48 0f ab 01 lock xacquire bts %rax,\(%rcx\)
689 [ ]*[a-f0-9]+: f0 f3 48 0f ab 01 lock xrelease bts %rax,\(%rcx\)
690 [ ]*[a-f0-9]+: f2 f0 48 0f b1 01 xacquire lock cmpxchg %rax,\(%rcx\)
691 [ ]*[a-f0-9]+: f2 f0 48 0f b1 01 xacquire lock cmpxchg %rax,\(%rcx\)
692 [ ]*[a-f0-9]+: f3 f0 48 0f b1 01 xrelease lock cmpxchg %rax,\(%rcx\)
693 [ ]*[a-f0-9]+: f3 f0 48 0f b1 01 xrelease lock cmpxchg %rax,\(%rcx\)
694 [ ]*[a-f0-9]+: f0 f2 48 0f b1 01 lock xacquire cmpxchg %rax,\(%rcx\)
695 [ ]*[a-f0-9]+: f0 f3 48 0f b1 01 lock xrelease cmpxchg %rax,\(%rcx\)
696 [ ]*[a-f0-9]+: f2 f0 48 0f c1 01 xacquire lock xadd %rax,\(%rcx\)
697 [ ]*[a-f0-9]+: f2 f0 48 0f c1 01 xacquire lock xadd %rax,\(%rcx\)
698 [ ]*[a-f0-9]+: f3 f0 48 0f c1 01 xrelease lock xadd %rax,\(%rcx\)
699 [ ]*[a-f0-9]+: f3 f0 48 0f c1 01 xrelease lock xadd %rax,\(%rcx\)
700 [ ]*[a-f0-9]+: f0 f2 48 0f c1 01 lock xacquire xadd %rax,\(%rcx\)
701 [ ]*[a-f0-9]+: f0 f3 48 0f c1 01 lock xrelease xadd %rax,\(%rcx\)
702 [ ]*[a-f0-9]+: f2 f0 fe 09 xacquire lock decb \(%rcx\)
703 [ ]*[a-f0-9]+: f2 f0 fe 09 xacquire lock decb \(%rcx\)
704 [ ]*[a-f0-9]+: f3 f0 fe 09 xrelease lock decb \(%rcx\)
705 [ ]*[a-f0-9]+: f3 f0 fe 09 xrelease lock decb \(%rcx\)
706 [ ]*[a-f0-9]+: f0 f2 fe 09 lock xacquire decb \(%rcx\)
707 [ ]*[a-f0-9]+: f0 f3 fe 09 lock xrelease decb \(%rcx\)
708 [ ]*[a-f0-9]+: f2 f0 fe 01 xacquire lock incb \(%rcx\)
709 [ ]*[a-f0-9]+: f2 f0 fe 01 xacquire lock incb \(%rcx\)
710 [ ]*[a-f0-9]+: f3 f0 fe 01 xrelease lock incb \(%rcx\)
711 [ ]*[a-f0-9]+: f3 f0 fe 01 xrelease lock incb \(%rcx\)
712 [ ]*[a-f0-9]+: f0 f2 fe 01 lock xacquire incb \(%rcx\)
713 [ ]*[a-f0-9]+: f0 f3 fe 01 lock xrelease incb \(%rcx\)
714 [ ]*[a-f0-9]+: f2 f0 f6 19 xacquire lock negb \(%rcx\)
715 [ ]*[a-f0-9]+: f2 f0 f6 19 xacquire lock negb \(%rcx\)
716 [ ]*[a-f0-9]+: f3 f0 f6 19 xrelease lock negb \(%rcx\)
717 [ ]*[a-f0-9]+: f3 f0 f6 19 xrelease lock negb \(%rcx\)
718 [ ]*[a-f0-9]+: f0 f2 f6 19 lock xacquire negb \(%rcx\)
719 [ ]*[a-f0-9]+: f0 f3 f6 19 lock xrelease negb \(%rcx\)
720 [ ]*[a-f0-9]+: f2 f0 f6 11 xacquire lock notb \(%rcx\)
721 [ ]*[a-f0-9]+: f2 f0 f6 11 xacquire lock notb \(%rcx\)
722 [ ]*[a-f0-9]+: f3 f0 f6 11 xrelease lock notb \(%rcx\)
723 [ ]*[a-f0-9]+: f3 f0 f6 11 xrelease lock notb \(%rcx\)
724 [ ]*[a-f0-9]+: f0 f2 f6 11 lock xacquire notb \(%rcx\)
725 [ ]*[a-f0-9]+: f0 f3 f6 11 lock xrelease notb \(%rcx\)
726 [ ]*[a-f0-9]+: 66 f2 f0 ff 09 xacquire lock decw \(%rcx\)
727 [ ]*[a-f0-9]+: 66 f2 f0 ff 09 xacquire lock decw \(%rcx\)
728 [ ]*[a-f0-9]+: 66 f3 f0 ff 09 xrelease lock decw \(%rcx\)
729 [ ]*[a-f0-9]+: 66 f3 f0 ff 09 xrelease lock decw \(%rcx\)
730 [ ]*[a-f0-9]+: f0 f2 66 ff 09 lock xacquire decw \(%rcx\)
731 [ ]*[a-f0-9]+: f0 f3 66 ff 09 lock xrelease decw \(%rcx\)
732 [ ]*[a-f0-9]+: 66 f2 f0 ff 01 xacquire lock incw \(%rcx\)
733 [ ]*[a-f0-9]+: 66 f2 f0 ff 01 xacquire lock incw \(%rcx\)
734 [ ]*[a-f0-9]+: 66 f3 f0 ff 01 xrelease lock incw \(%rcx\)
735 [ ]*[a-f0-9]+: 66 f3 f0 ff 01 xrelease lock incw \(%rcx\)
736 [ ]*[a-f0-9]+: f0 f2 66 ff 01 lock xacquire incw \(%rcx\)
737 [ ]*[a-f0-9]+: f0 f3 66 ff 01 lock xrelease incw \(%rcx\)
738 [ ]*[a-f0-9]+: 66 f2 f0 f7 19 xacquire lock negw \(%rcx\)
739 [ ]*[a-f0-9]+: 66 f2 f0 f7 19 xacquire lock negw \(%rcx\)
740 [ ]*[a-f0-9]+: 66 f3 f0 f7 19 xrelease lock negw \(%rcx\)
741 [ ]*[a-f0-9]+: 66 f3 f0 f7 19 xrelease lock negw \(%rcx\)
742 [ ]*[a-f0-9]+: f0 f2 66 f7 19 lock xacquire negw \(%rcx\)
743 [ ]*[a-f0-9]+: f0 f3 66 f7 19 lock xrelease negw \(%rcx\)
744 [ ]*[a-f0-9]+: 66 f2 f0 f7 11 xacquire lock notw \(%rcx\)
745 [ ]*[a-f0-9]+: 66 f2 f0 f7 11 xacquire lock notw \(%rcx\)
746 [ ]*[a-f0-9]+: 66 f3 f0 f7 11 xrelease lock notw \(%rcx\)
747 [ ]*[a-f0-9]+: 66 f3 f0 f7 11 xrelease lock notw \(%rcx\)
748 [ ]*[a-f0-9]+: f0 f2 66 f7 11 lock xacquire notw \(%rcx\)
749 [ ]*[a-f0-9]+: f0 f3 66 f7 11 lock xrelease notw \(%rcx\)
750 [ ]*[a-f0-9]+: f2 f0 ff 09 xacquire lock decl \(%rcx\)
751 [ ]*[a-f0-9]+: f2 f0 ff 09 xacquire lock decl \(%rcx\)
752 [ ]*[a-f0-9]+: f3 f0 ff 09 xrelease lock decl \(%rcx\)
753 [ ]*[a-f0-9]+: f3 f0 ff 09 xrelease lock decl \(%rcx\)
754 [ ]*[a-f0-9]+: f0 f2 ff 09 lock xacquire decl \(%rcx\)
755 [ ]*[a-f0-9]+: f0 f3 ff 09 lock xrelease decl \(%rcx\)
756 [ ]*[a-f0-9]+: f2 f0 ff 01 xacquire lock incl \(%rcx\)
757 [ ]*[a-f0-9]+: f2 f0 ff 01 xacquire lock incl \(%rcx\)
758 [ ]*[a-f0-9]+: f3 f0 ff 01 xrelease lock incl \(%rcx\)
759 [ ]*[a-f0-9]+: f3 f0 ff 01 xrelease lock incl \(%rcx\)
760 [ ]*[a-f0-9]+: f0 f2 ff 01 lock xacquire incl \(%rcx\)
761 [ ]*[a-f0-9]+: f0 f3 ff 01 lock xrelease incl \(%rcx\)
762 [ ]*[a-f0-9]+: f2 f0 f7 19 xacquire lock negl \(%rcx\)
763 [ ]*[a-f0-9]+: f2 f0 f7 19 xacquire lock negl \(%rcx\)
764 [ ]*[a-f0-9]+: f3 f0 f7 19 xrelease lock negl \(%rcx\)
765 [ ]*[a-f0-9]+: f3 f0 f7 19 xrelease lock negl \(%rcx\)
766 [ ]*[a-f0-9]+: f0 f2 f7 19 lock xacquire negl \(%rcx\)
767 [ ]*[a-f0-9]+: f0 f3 f7 19 lock xrelease negl \(%rcx\)
768 [ ]*[a-f0-9]+: f2 f0 f7 11 xacquire lock notl \(%rcx\)
769 [ ]*[a-f0-9]+: f2 f0 f7 11 xacquire lock notl \(%rcx\)
770 [ ]*[a-f0-9]+: f3 f0 f7 11 xrelease lock notl \(%rcx\)
771 [ ]*[a-f0-9]+: f3 f0 f7 11 xrelease lock notl \(%rcx\)
772 [ ]*[a-f0-9]+: f0 f2 f7 11 lock xacquire notl \(%rcx\)
773 [ ]*[a-f0-9]+: f0 f3 f7 11 lock xrelease notl \(%rcx\)
774 [ ]*[a-f0-9]+: f2 f0 48 ff 09 xacquire lock decq \(%rcx\)
775 [ ]*[a-f0-9]+: f2 f0 48 ff 09 xacquire lock decq \(%rcx\)
776 [ ]*[a-f0-9]+: f3 f0 48 ff 09 xrelease lock decq \(%rcx\)
777 [ ]*[a-f0-9]+: f3 f0 48 ff 09 xrelease lock decq \(%rcx\)
778 [ ]*[a-f0-9]+: f0 f2 48 ff 09 lock xacquire decq \(%rcx\)
779 [ ]*[a-f0-9]+: f0 f3 48 ff 09 lock xrelease decq \(%rcx\)
780 [ ]*[a-f0-9]+: f2 f0 48 ff 01 xacquire lock incq \(%rcx\)
781 [ ]*[a-f0-9]+: f2 f0 48 ff 01 xacquire lock incq \(%rcx\)
782 [ ]*[a-f0-9]+: f3 f0 48 ff 01 xrelease lock incq \(%rcx\)
783 [ ]*[a-f0-9]+: f3 f0 48 ff 01 xrelease lock incq \(%rcx\)
784 [ ]*[a-f0-9]+: f0 f2 48 ff 01 lock xacquire incq \(%rcx\)
785 [ ]*[a-f0-9]+: f0 f3 48 ff 01 lock xrelease incq \(%rcx\)
786 [ ]*[a-f0-9]+: f2 f0 48 f7 19 xacquire lock negq \(%rcx\)
787 [ ]*[a-f0-9]+: f2 f0 48 f7 19 xacquire lock negq \(%rcx\)
788 [ ]*[a-f0-9]+: f3 f0 48 f7 19 xrelease lock negq \(%rcx\)
789 [ ]*[a-f0-9]+: f3 f0 48 f7 19 xrelease lock negq \(%rcx\)
790 [ ]*[a-f0-9]+: f0 f2 48 f7 19 lock xacquire negq \(%rcx\)
791 [ ]*[a-f0-9]+: f0 f3 48 f7 19 lock xrelease negq \(%rcx\)
792 [ ]*[a-f0-9]+: f2 f0 48 f7 11 xacquire lock notq \(%rcx\)
793 [ ]*[a-f0-9]+: f2 f0 48 f7 11 xacquire lock notq \(%rcx\)
794 [ ]*[a-f0-9]+: f3 f0 48 f7 11 xrelease lock notq \(%rcx\)
795 [ ]*[a-f0-9]+: f3 f0 48 f7 11 xrelease lock notq \(%rcx\)
796 [ ]*[a-f0-9]+: f0 f2 48 f7 11 lock xacquire notq \(%rcx\)
797 [ ]*[a-f0-9]+: f0 f3 48 f7 11 lock xrelease notq \(%rcx\)
798 [ ]*[a-f0-9]+: f2 f0 0f c7 09 xacquire lock cmpxchg8b \(%rcx\)
799 [ ]*[a-f0-9]+: f2 f0 0f c7 09 xacquire lock cmpxchg8b \(%rcx\)
800 [ ]*[a-f0-9]+: f3 f0 0f c7 09 xrelease lock cmpxchg8b \(%rcx\)
801 [ ]*[a-f0-9]+: f3 f0 0f c7 09 xrelease lock cmpxchg8b \(%rcx\)
802 [ ]*[a-f0-9]+: f0 f2 0f c7 09 lock xacquire cmpxchg8b \(%rcx\)
803 [ ]*[a-f0-9]+: f0 f3 0f c7 09 lock xrelease cmpxchg8b \(%rcx\)
804 [ ]*[a-f0-9]+: f2 f0 0f b0 09 xacquire lock cmpxchg %cl,\(%rcx\)
805 [ ]*[a-f0-9]+: f2 f0 0f b0 09 xacquire lock cmpxchg %cl,\(%rcx\)
806 [ ]*[a-f0-9]+: f3 f0 0f b0 09 xrelease lock cmpxchg %cl,\(%rcx\)
807 [ ]*[a-f0-9]+: f3 f0 0f b0 09 xrelease lock cmpxchg %cl,\(%rcx\)
808 [ ]*[a-f0-9]+: f0 f2 0f b0 09 lock xacquire cmpxchg %cl,\(%rcx\)
809 [ ]*[a-f0-9]+: f0 f3 0f b0 09 lock xrelease cmpxchg %cl,\(%rcx\)
810 [ ]*[a-f0-9]+: f2 f0 0f c0 09 xacquire lock xadd %cl,\(%rcx\)
811 [ ]*[a-f0-9]+: f2 f0 0f c0 09 xacquire lock xadd %cl,\(%rcx\)
812 [ ]*[a-f0-9]+: f3 f0 0f c0 09 xrelease lock xadd %cl,\(%rcx\)
813 [ ]*[a-f0-9]+: f3 f0 0f c0 09 xrelease lock xadd %cl,\(%rcx\)
814 [ ]*[a-f0-9]+: f0 f2 0f c0 09 lock xacquire xadd %cl,\(%rcx\)
815 [ ]*[a-f0-9]+: f0 f3 0f c0 09 lock xrelease xadd %cl,\(%rcx\)
816 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
817 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
818 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
819 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
820 [ ]*[a-f0-9]+: f0 f2 80 11 64 lock xacquire adcb \$0x64,\(%rcx\)
821 [ ]*[a-f0-9]+: f0 f3 80 11 64 lock xrelease adcb \$0x64,\(%rcx\)
822 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
823 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
824 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
825 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
826 [ ]*[a-f0-9]+: f0 f2 80 01 64 lock xacquire addb \$0x64,\(%rcx\)
827 [ ]*[a-f0-9]+: f0 f3 80 01 64 lock xrelease addb \$0x64,\(%rcx\)
828 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
829 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
830 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
831 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
832 [ ]*[a-f0-9]+: f0 f2 80 21 64 lock xacquire andb \$0x64,\(%rcx\)
833 [ ]*[a-f0-9]+: f0 f3 80 21 64 lock xrelease andb \$0x64,\(%rcx\)
834 [ ]*[a-f0-9]+: f3 c6 01 64 xrelease movb \$0x64,\(%rcx\)
835 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
836 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
837 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
838 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
839 [ ]*[a-f0-9]+: f0 f2 80 09 64 lock xacquire orb \$0x64,\(%rcx\)
840 [ ]*[a-f0-9]+: f0 f3 80 09 64 lock xrelease orb \$0x64,\(%rcx\)
841 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
842 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
843 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
844 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
845 [ ]*[a-f0-9]+: f0 f2 80 19 64 lock xacquire sbbb \$0x64,\(%rcx\)
846 [ ]*[a-f0-9]+: f0 f3 80 19 64 lock xrelease sbbb \$0x64,\(%rcx\)
847 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
848 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
849 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
850 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
851 [ ]*[a-f0-9]+: f0 f2 80 29 64 lock xacquire subb \$0x64,\(%rcx\)
852 [ ]*[a-f0-9]+: f0 f3 80 29 64 lock xrelease subb \$0x64,\(%rcx\)
853 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
854 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
855 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
856 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
857 [ ]*[a-f0-9]+: f0 f2 80 31 64 lock xacquire xorb \$0x64,\(%rcx\)
858 [ ]*[a-f0-9]+: f0 f3 80 31 64 lock xrelease xorb \$0x64,\(%rcx\)
859 [ ]*[a-f0-9]+: 66 f2 f0 81 11 e8 03 xacquire lock adcw \$0x3e8,\(%rcx\)
860 [ ]*[a-f0-9]+: 66 f2 f0 81 11 e8 03 xacquire lock adcw \$0x3e8,\(%rcx\)
861 [ ]*[a-f0-9]+: 66 f3 f0 81 11 e8 03 xrelease lock adcw \$0x3e8,\(%rcx\)
862 [ ]*[a-f0-9]+: 66 f3 f0 81 11 e8 03 xrelease lock adcw \$0x3e8,\(%rcx\)
863 [ ]*[a-f0-9]+: f0 f2 66 81 11 e8 03 lock xacquire adcw \$0x3e8,\(%rcx\)
864 [ ]*[a-f0-9]+: f0 f3 66 81 11 e8 03 lock xrelease adcw \$0x3e8,\(%rcx\)
865 [ ]*[a-f0-9]+: 66 f2 f0 81 01 e8 03 xacquire lock addw \$0x3e8,\(%rcx\)
866 [ ]*[a-f0-9]+: 66 f2 f0 81 01 e8 03 xacquire lock addw \$0x3e8,\(%rcx\)
867 [ ]*[a-f0-9]+: 66 f3 f0 81 01 e8 03 xrelease lock addw \$0x3e8,\(%rcx\)
868 [ ]*[a-f0-9]+: 66 f3 f0 81 01 e8 03 xrelease lock addw \$0x3e8,\(%rcx\)
869 [ ]*[a-f0-9]+: f0 f2 66 81 01 e8 03 lock xacquire addw \$0x3e8,\(%rcx\)
870 [ ]*[a-f0-9]+: f0 f3 66 81 01 e8 03 lock xrelease addw \$0x3e8,\(%rcx\)
871 [ ]*[a-f0-9]+: 66 f2 f0 81 21 e8 03 xacquire lock andw \$0x3e8,\(%rcx\)
872 [ ]*[a-f0-9]+: 66 f2 f0 81 21 e8 03 xacquire lock andw \$0x3e8,\(%rcx\)
873 [ ]*[a-f0-9]+: 66 f3 f0 81 21 e8 03 xrelease lock andw \$0x3e8,\(%rcx\)
874 [ ]*[a-f0-9]+: 66 f3 f0 81 21 e8 03 xrelease lock andw \$0x3e8,\(%rcx\)
875 [ ]*[a-f0-9]+: f0 f2 66 81 21 e8 03 lock xacquire andw \$0x3e8,\(%rcx\)
876 [ ]*[a-f0-9]+: f0 f3 66 81 21 e8 03 lock xrelease andw \$0x3e8,\(%rcx\)
877 [ ]*[a-f0-9]+: 66 f3 c7 01 e8 03 xrelease movw \$0x3e8,\(%rcx\)
878 [ ]*[a-f0-9]+: 66 f2 f0 81 09 e8 03 xacquire lock orw \$0x3e8,\(%rcx\)
879 [ ]*[a-f0-9]+: 66 f2 f0 81 09 e8 03 xacquire lock orw \$0x3e8,\(%rcx\)
880 [ ]*[a-f0-9]+: 66 f3 f0 81 09 e8 03 xrelease lock orw \$0x3e8,\(%rcx\)
881 [ ]*[a-f0-9]+: 66 f3 f0 81 09 e8 03 xrelease lock orw \$0x3e8,\(%rcx\)
882 [ ]*[a-f0-9]+: f0 f2 66 81 09 e8 03 lock xacquire orw \$0x3e8,\(%rcx\)
883 [ ]*[a-f0-9]+: f0 f3 66 81 09 e8 03 lock xrelease orw \$0x3e8,\(%rcx\)
884 [ ]*[a-f0-9]+: 66 f2 f0 81 19 e8 03 xacquire lock sbbw \$0x3e8,\(%rcx\)
885 [ ]*[a-f0-9]+: 66 f2 f0 81 19 e8 03 xacquire lock sbbw \$0x3e8,\(%rcx\)
886 [ ]*[a-f0-9]+: 66 f3 f0 81 19 e8 03 xrelease lock sbbw \$0x3e8,\(%rcx\)
887 [ ]*[a-f0-9]+: 66 f3 f0 81 19 e8 03 xrelease lock sbbw \$0x3e8,\(%rcx\)
888 [ ]*[a-f0-9]+: f0 f2 66 81 19 e8 03 lock xacquire sbbw \$0x3e8,\(%rcx\)
889 [ ]*[a-f0-9]+: f0 f3 66 81 19 e8 03 lock xrelease sbbw \$0x3e8,\(%rcx\)
890 [ ]*[a-f0-9]+: 66 f2 f0 81 29 e8 03 xacquire lock subw \$0x3e8,\(%rcx\)
891 [ ]*[a-f0-9]+: 66 f2 f0 81 29 e8 03 xacquire lock subw \$0x3e8,\(%rcx\)
892 [ ]*[a-f0-9]+: 66 f3 f0 81 29 e8 03 xrelease lock subw \$0x3e8,\(%rcx\)
893 [ ]*[a-f0-9]+: 66 f3 f0 81 29 e8 03 xrelease lock subw \$0x3e8,\(%rcx\)
894 [ ]*[a-f0-9]+: f0 f2 66 81 29 e8 03 lock xacquire subw \$0x3e8,\(%rcx\)
895 [ ]*[a-f0-9]+: f0 f3 66 81 29 e8 03 lock xrelease subw \$0x3e8,\(%rcx\)
896 [ ]*[a-f0-9]+: 66 f2 f0 81 31 e8 03 xacquire lock xorw \$0x3e8,\(%rcx\)
897 [ ]*[a-f0-9]+: 66 f2 f0 81 31 e8 03 xacquire lock xorw \$0x3e8,\(%rcx\)
898 [ ]*[a-f0-9]+: 66 f3 f0 81 31 e8 03 xrelease lock xorw \$0x3e8,\(%rcx\)
899 [ ]*[a-f0-9]+: 66 f3 f0 81 31 e8 03 xrelease lock xorw \$0x3e8,\(%rcx\)
900 [ ]*[a-f0-9]+: f0 f2 66 81 31 e8 03 lock xacquire xorw \$0x3e8,\(%rcx\)
901 [ ]*[a-f0-9]+: f0 f3 66 81 31 e8 03 lock xrelease xorw \$0x3e8,\(%rcx\)
902 [ ]*[a-f0-9]+: f2 f0 81 11 80 96 98 00 xacquire lock adcl \$0x989680,\(%rcx\)
903 [ ]*[a-f0-9]+: f2 f0 81 11 80 96 98 00 xacquire lock adcl \$0x989680,\(%rcx\)
904 [ ]*[a-f0-9]+: f3 f0 81 11 80 96 98 00 xrelease lock adcl \$0x989680,\(%rcx\)
905 [ ]*[a-f0-9]+: f3 f0 81 11 80 96 98 00 xrelease lock adcl \$0x989680,\(%rcx\)
906 [ ]*[a-f0-9]+: f0 f2 81 11 80 96 98 00 lock xacquire adcl \$0x989680,\(%rcx\)
907 [ ]*[a-f0-9]+: f0 f3 81 11 80 96 98 00 lock xrelease adcl \$0x989680,\(%rcx\)
908 [ ]*[a-f0-9]+: f2 f0 81 01 80 96 98 00 xacquire lock addl \$0x989680,\(%rcx\)
909 [ ]*[a-f0-9]+: f2 f0 81 01 80 96 98 00 xacquire lock addl \$0x989680,\(%rcx\)
910 [ ]*[a-f0-9]+: f3 f0 81 01 80 96 98 00 xrelease lock addl \$0x989680,\(%rcx\)
911 [ ]*[a-f0-9]+: f3 f0 81 01 80 96 98 00 xrelease lock addl \$0x989680,\(%rcx\)
912 [ ]*[a-f0-9]+: f0 f2 81 01 80 96 98 00 lock xacquire addl \$0x989680,\(%rcx\)
913 [ ]*[a-f0-9]+: f0 f3 81 01 80 96 98 00 lock xrelease addl \$0x989680,\(%rcx\)
914 [ ]*[a-f0-9]+: f2 f0 81 21 80 96 98 00 xacquire lock andl \$0x989680,\(%rcx\)
915 [ ]*[a-f0-9]+: f2 f0 81 21 80 96 98 00 xacquire lock andl \$0x989680,\(%rcx\)
916 [ ]*[a-f0-9]+: f3 f0 81 21 80 96 98 00 xrelease lock andl \$0x989680,\(%rcx\)
917 [ ]*[a-f0-9]+: f3 f0 81 21 80 96 98 00 xrelease lock andl \$0x989680,\(%rcx\)
918 [ ]*[a-f0-9]+: f0 f2 81 21 80 96 98 00 lock xacquire andl \$0x989680,\(%rcx\)
919 [ ]*[a-f0-9]+: f0 f3 81 21 80 96 98 00 lock xrelease andl \$0x989680,\(%rcx\)
920 [ ]*[a-f0-9]+: f3 c7 01 80 96 98 00 xrelease movl \$0x989680,\(%rcx\)
921 [ ]*[a-f0-9]+: f2 f0 81 09 80 96 98 00 xacquire lock orl \$0x989680,\(%rcx\)
922 [ ]*[a-f0-9]+: f2 f0 81 09 80 96 98 00 xacquire lock orl \$0x989680,\(%rcx\)
923 [ ]*[a-f0-9]+: f3 f0 81 09 80 96 98 00 xrelease lock orl \$0x989680,\(%rcx\)
924 [ ]*[a-f0-9]+: f3 f0 81 09 80 96 98 00 xrelease lock orl \$0x989680,\(%rcx\)
925 [ ]*[a-f0-9]+: f0 f2 81 09 80 96 98 00 lock xacquire orl \$0x989680,\(%rcx\)
926 [ ]*[a-f0-9]+: f0 f3 81 09 80 96 98 00 lock xrelease orl \$0x989680,\(%rcx\)
927 [ ]*[a-f0-9]+: f2 f0 81 19 80 96 98 00 xacquire lock sbbl \$0x989680,\(%rcx\)
928 [ ]*[a-f0-9]+: f2 f0 81 19 80 96 98 00 xacquire lock sbbl \$0x989680,\(%rcx\)
929 [ ]*[a-f0-9]+: f3 f0 81 19 80 96 98 00 xrelease lock sbbl \$0x989680,\(%rcx\)
930 [ ]*[a-f0-9]+: f3 f0 81 19 80 96 98 00 xrelease lock sbbl \$0x989680,\(%rcx\)
931 [ ]*[a-f0-9]+: f0 f2 81 19 80 96 98 00 lock xacquire sbbl \$0x989680,\(%rcx\)
932 [ ]*[a-f0-9]+: f0 f3 81 19 80 96 98 00 lock xrelease sbbl \$0x989680,\(%rcx\)
933 [ ]*[a-f0-9]+: f2 f0 81 29 80 96 98 00 xacquire lock subl \$0x989680,\(%rcx\)
934 [ ]*[a-f0-9]+: f2 f0 81 29 80 96 98 00 xacquire lock subl \$0x989680,\(%rcx\)
935 [ ]*[a-f0-9]+: f3 f0 81 29 80 96 98 00 xrelease lock subl \$0x989680,\(%rcx\)
936 [ ]*[a-f0-9]+: f3 f0 81 29 80 96 98 00 xrelease lock subl \$0x989680,\(%rcx\)
937 [ ]*[a-f0-9]+: f0 f2 81 29 80 96 98 00 lock xacquire subl \$0x989680,\(%rcx\)
938 [ ]*[a-f0-9]+: f0 f3 81 29 80 96 98 00 lock xrelease subl \$0x989680,\(%rcx\)
939 [ ]*[a-f0-9]+: f2 f0 81 31 80 96 98 00 xacquire lock xorl \$0x989680,\(%rcx\)
940 [ ]*[a-f0-9]+: f2 f0 81 31 80 96 98 00 xacquire lock xorl \$0x989680,\(%rcx\)
941 [ ]*[a-f0-9]+: f3 f0 81 31 80 96 98 00 xrelease lock xorl \$0x989680,\(%rcx\)
942 [ ]*[a-f0-9]+: f3 f0 81 31 80 96 98 00 xrelease lock xorl \$0x989680,\(%rcx\)
943 [ ]*[a-f0-9]+: f0 f2 81 31 80 96 98 00 lock xacquire xorl \$0x989680,\(%rcx\)
944 [ ]*[a-f0-9]+: f0 f3 81 31 80 96 98 00 lock xrelease xorl \$0x989680,\(%rcx\)
945 [ ]*[a-f0-9]+: f2 f0 48 81 11 80 96 98 00 xacquire lock adcq \$0x989680,\(%rcx\)
946 [ ]*[a-f0-9]+: f2 f0 48 81 11 80 96 98 00 xacquire lock adcq \$0x989680,\(%rcx\)
947 [ ]*[a-f0-9]+: f3 f0 48 81 11 80 96 98 00 xrelease lock adcq \$0x989680,\(%rcx\)
948 [ ]*[a-f0-9]+: f3 f0 48 81 11 80 96 98 00 xrelease lock adcq \$0x989680,\(%rcx\)
949 [ ]*[a-f0-9]+: f0 f2 48 81 11 80 96 98 00 lock xacquire adcq \$0x989680,\(%rcx\)
950 [ ]*[a-f0-9]+: f0 f3 48 81 11 80 96 98 00 lock xrelease adcq \$0x989680,\(%rcx\)
951 [ ]*[a-f0-9]+: f2 f0 48 81 01 80 96 98 00 xacquire lock addq \$0x989680,\(%rcx\)
952 [ ]*[a-f0-9]+: f2 f0 48 81 01 80 96 98 00 xacquire lock addq \$0x989680,\(%rcx\)
953 [ ]*[a-f0-9]+: f3 f0 48 81 01 80 96 98 00 xrelease lock addq \$0x989680,\(%rcx\)
954 [ ]*[a-f0-9]+: f3 f0 48 81 01 80 96 98 00 xrelease lock addq \$0x989680,\(%rcx\)
955 [ ]*[a-f0-9]+: f0 f2 48 81 01 80 96 98 00 lock xacquire addq \$0x989680,\(%rcx\)
956 [ ]*[a-f0-9]+: f0 f3 48 81 01 80 96 98 00 lock xrelease addq \$0x989680,\(%rcx\)
957 [ ]*[a-f0-9]+: f2 f0 48 81 21 80 96 98 00 xacquire lock andq \$0x989680,\(%rcx\)
958 [ ]*[a-f0-9]+: f2 f0 48 81 21 80 96 98 00 xacquire lock andq \$0x989680,\(%rcx\)
959 [ ]*[a-f0-9]+: f3 f0 48 81 21 80 96 98 00 xrelease lock andq \$0x989680,\(%rcx\)
960 [ ]*[a-f0-9]+: f3 f0 48 81 21 80 96 98 00 xrelease lock andq \$0x989680,\(%rcx\)
961 [ ]*[a-f0-9]+: f0 f2 48 81 21 80 96 98 00 lock xacquire andq \$0x989680,\(%rcx\)
962 [ ]*[a-f0-9]+: f0 f3 48 81 21 80 96 98 00 lock xrelease andq \$0x989680,\(%rcx\)
963 [ ]*[a-f0-9]+: f3 48 c7 01 80 96 98 00 xrelease movq \$0x989680,\(%rcx\)
964 [ ]*[a-f0-9]+: f2 f0 48 81 09 80 96 98 00 xacquire lock orq \$0x989680,\(%rcx\)
965 [ ]*[a-f0-9]+: f2 f0 48 81 09 80 96 98 00 xacquire lock orq \$0x989680,\(%rcx\)
966 [ ]*[a-f0-9]+: f3 f0 48 81 09 80 96 98 00 xrelease lock orq \$0x989680,\(%rcx\)
967 [ ]*[a-f0-9]+: f3 f0 48 81 09 80 96 98 00 xrelease lock orq \$0x989680,\(%rcx\)
968 [ ]*[a-f0-9]+: f0 f2 48 81 09 80 96 98 00 lock xacquire orq \$0x989680,\(%rcx\)
969 [ ]*[a-f0-9]+: f0 f3 48 81 09 80 96 98 00 lock xrelease orq \$0x989680,\(%rcx\)
970 [ ]*[a-f0-9]+: f2 f0 48 81 19 80 96 98 00 xacquire lock sbbq \$0x989680,\(%rcx\)
971 [ ]*[a-f0-9]+: f2 f0 48 81 19 80 96 98 00 xacquire lock sbbq \$0x989680,\(%rcx\)
972 [ ]*[a-f0-9]+: f3 f0 48 81 19 80 96 98 00 xrelease lock sbbq \$0x989680,\(%rcx\)
973 [ ]*[a-f0-9]+: f3 f0 48 81 19 80 96 98 00 xrelease lock sbbq \$0x989680,\(%rcx\)
974 [ ]*[a-f0-9]+: f0 f2 48 81 19 80 96 98 00 lock xacquire sbbq \$0x989680,\(%rcx\)
975 [ ]*[a-f0-9]+: f0 f3 48 81 19 80 96 98 00 lock xrelease sbbq \$0x989680,\(%rcx\)
976 [ ]*[a-f0-9]+: f2 f0 48 81 29 80 96 98 00 xacquire lock subq \$0x989680,\(%rcx\)
977 [ ]*[a-f0-9]+: f2 f0 48 81 29 80 96 98 00 xacquire lock subq \$0x989680,\(%rcx\)
978 [ ]*[a-f0-9]+: f3 f0 48 81 29 80 96 98 00 xrelease lock subq \$0x989680,\(%rcx\)
979 [ ]*[a-f0-9]+: f3 f0 48 81 29 80 96 98 00 xrelease lock subq \$0x989680,\(%rcx\)
980 [ ]*[a-f0-9]+: f0 f2 48 81 29 80 96 98 00 lock xacquire subq \$0x989680,\(%rcx\)
981 [ ]*[a-f0-9]+: f0 f3 48 81 29 80 96 98 00 lock xrelease subq \$0x989680,\(%rcx\)
982 [ ]*[a-f0-9]+: f2 f0 48 81 31 80 96 98 00 xacquire lock xorq \$0x989680,\(%rcx\)
983 [ ]*[a-f0-9]+: f2 f0 48 81 31 80 96 98 00 xacquire lock xorq \$0x989680,\(%rcx\)
984 [ ]*[a-f0-9]+: f3 f0 48 81 31 80 96 98 00 xrelease lock xorq \$0x989680,\(%rcx\)
985 [ ]*[a-f0-9]+: f3 f0 48 81 31 80 96 98 00 xrelease lock xorq \$0x989680,\(%rcx\)
986 [ ]*[a-f0-9]+: f0 f2 48 81 31 80 96 98 00 lock xacquire xorq \$0x989680,\(%rcx\)
987 [ ]*[a-f0-9]+: f0 f3 48 81 31 80 96 98 00 lock xrelease xorq \$0x989680,\(%rcx\)
988 [ ]*[a-f0-9]+: 66 f2 f0 83 11 64 xacquire lock adcw \$0x64,\(%rcx\)
989 [ ]*[a-f0-9]+: 66 f2 f0 83 11 64 xacquire lock adcw \$0x64,\(%rcx\)
990 [ ]*[a-f0-9]+: 66 f3 f0 83 11 64 xrelease lock adcw \$0x64,\(%rcx\)
991 [ ]*[a-f0-9]+: 66 f3 f0 83 11 64 xrelease lock adcw \$0x64,\(%rcx\)
992 [ ]*[a-f0-9]+: f0 f2 66 83 11 64 lock xacquire adcw \$0x64,\(%rcx\)
993 [ ]*[a-f0-9]+: f0 f3 66 83 11 64 lock xrelease adcw \$0x64,\(%rcx\)
994 [ ]*[a-f0-9]+: 66 f2 f0 83 01 64 xacquire lock addw \$0x64,\(%rcx\)
995 [ ]*[a-f0-9]+: 66 f2 f0 83 01 64 xacquire lock addw \$0x64,\(%rcx\)
996 [ ]*[a-f0-9]+: 66 f3 f0 83 01 64 xrelease lock addw \$0x64,\(%rcx\)
997 [ ]*[a-f0-9]+: 66 f3 f0 83 01 64 xrelease lock addw \$0x64,\(%rcx\)
998 [ ]*[a-f0-9]+: f0 f2 66 83 01 64 lock xacquire addw \$0x64,\(%rcx\)
999 [ ]*[a-f0-9]+: f0 f3 66 83 01 64 lock xrelease addw \$0x64,\(%rcx\)
1000 [ ]*[a-f0-9]+: 66 f2 f0 83 21 64 xacquire lock andw \$0x64,\(%rcx\)
1001 [ ]*[a-f0-9]+: 66 f2 f0 83 21 64 xacquire lock andw \$0x64,\(%rcx\)
1002 [ ]*[a-f0-9]+: 66 f3 f0 83 21 64 xrelease lock andw \$0x64,\(%rcx\)
1003 [ ]*[a-f0-9]+: 66 f3 f0 83 21 64 xrelease lock andw \$0x64,\(%rcx\)
1004 [ ]*[a-f0-9]+: f0 f2 66 83 21 64 lock xacquire andw \$0x64,\(%rcx\)
1005 [ ]*[a-f0-9]+: f0 f3 66 83 21 64 lock xrelease andw \$0x64,\(%rcx\)
1006 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 39 64 xacquire lock btcw \$0x64,\(%rcx\)
1007 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 39 64 xacquire lock btcw \$0x64,\(%rcx\)
1008 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 39 64 xrelease lock btcw \$0x64,\(%rcx\)
1009 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 39 64 xrelease lock btcw \$0x64,\(%rcx\)
1010 [ ]*[a-f0-9]+: f0 f2 66 0f ba 39 64 lock xacquire btcw \$0x64,\(%rcx\)
1011 [ ]*[a-f0-9]+: f0 f3 66 0f ba 39 64 lock xrelease btcw \$0x64,\(%rcx\)
1012 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 31 64 xacquire lock btrw \$0x64,\(%rcx\)
1013 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 31 64 xacquire lock btrw \$0x64,\(%rcx\)
1014 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 31 64 xrelease lock btrw \$0x64,\(%rcx\)
1015 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 31 64 xrelease lock btrw \$0x64,\(%rcx\)
1016 [ ]*[a-f0-9]+: f0 f2 66 0f ba 31 64 lock xacquire btrw \$0x64,\(%rcx\)
1017 [ ]*[a-f0-9]+: f0 f3 66 0f ba 31 64 lock xrelease btrw \$0x64,\(%rcx\)
1018 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 29 64 xacquire lock btsw \$0x64,\(%rcx\)
1019 [ ]*[a-f0-9]+: 66 f2 f0 0f ba 29 64 xacquire lock btsw \$0x64,\(%rcx\)
1020 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 29 64 xrelease lock btsw \$0x64,\(%rcx\)
1021 [ ]*[a-f0-9]+: 66 f3 f0 0f ba 29 64 xrelease lock btsw \$0x64,\(%rcx\)
1022 [ ]*[a-f0-9]+: f0 f2 66 0f ba 29 64 lock xacquire btsw \$0x64,\(%rcx\)
1023 [ ]*[a-f0-9]+: f0 f3 66 0f ba 29 64 lock xrelease btsw \$0x64,\(%rcx\)
1024 [ ]*[a-f0-9]+: 66 f3 c7 01 64 00 xrelease movw \$0x64,\(%rcx\)
1025 [ ]*[a-f0-9]+: 66 f2 f0 83 09 64 xacquire lock orw \$0x64,\(%rcx\)
1026 [ ]*[a-f0-9]+: 66 f2 f0 83 09 64 xacquire lock orw \$0x64,\(%rcx\)
1027 [ ]*[a-f0-9]+: 66 f3 f0 83 09 64 xrelease lock orw \$0x64,\(%rcx\)
1028 [ ]*[a-f0-9]+: 66 f3 f0 83 09 64 xrelease lock orw \$0x64,\(%rcx\)
1029 [ ]*[a-f0-9]+: f0 f2 66 83 09 64 lock xacquire orw \$0x64,\(%rcx\)
1030 [ ]*[a-f0-9]+: f0 f3 66 83 09 64 lock xrelease orw \$0x64,\(%rcx\)
1031 [ ]*[a-f0-9]+: 66 f2 f0 83 19 64 xacquire lock sbbw \$0x64,\(%rcx\)
1032 [ ]*[a-f0-9]+: 66 f2 f0 83 19 64 xacquire lock sbbw \$0x64,\(%rcx\)
1033 [ ]*[a-f0-9]+: 66 f3 f0 83 19 64 xrelease lock sbbw \$0x64,\(%rcx\)
1034 [ ]*[a-f0-9]+: 66 f3 f0 83 19 64 xrelease lock sbbw \$0x64,\(%rcx\)
1035 [ ]*[a-f0-9]+: f0 f2 66 83 19 64 lock xacquire sbbw \$0x64,\(%rcx\)
1036 [ ]*[a-f0-9]+: f0 f3 66 83 19 64 lock xrelease sbbw \$0x64,\(%rcx\)
1037 [ ]*[a-f0-9]+: 66 f2 f0 83 29 64 xacquire lock subw \$0x64,\(%rcx\)
1038 [ ]*[a-f0-9]+: 66 f2 f0 83 29 64 xacquire lock subw \$0x64,\(%rcx\)
1039 [ ]*[a-f0-9]+: 66 f3 f0 83 29 64 xrelease lock subw \$0x64,\(%rcx\)
1040 [ ]*[a-f0-9]+: 66 f3 f0 83 29 64 xrelease lock subw \$0x64,\(%rcx\)
1041 [ ]*[a-f0-9]+: f0 f2 66 83 29 64 lock xacquire subw \$0x64,\(%rcx\)
1042 [ ]*[a-f0-9]+: f0 f3 66 83 29 64 lock xrelease subw \$0x64,\(%rcx\)
1043 [ ]*[a-f0-9]+: 66 f2 f0 83 31 64 xacquire lock xorw \$0x64,\(%rcx\)
1044 [ ]*[a-f0-9]+: 66 f2 f0 83 31 64 xacquire lock xorw \$0x64,\(%rcx\)
1045 [ ]*[a-f0-9]+: 66 f3 f0 83 31 64 xrelease lock xorw \$0x64,\(%rcx\)
1046 [ ]*[a-f0-9]+: 66 f3 f0 83 31 64 xrelease lock xorw \$0x64,\(%rcx\)
1047 [ ]*[a-f0-9]+: f0 f2 66 83 31 64 lock xacquire xorw \$0x64,\(%rcx\)
1048 [ ]*[a-f0-9]+: f0 f3 66 83 31 64 lock xrelease xorw \$0x64,\(%rcx\)
1049 [ ]*[a-f0-9]+: f2 f0 83 11 64 xacquire lock adcl \$0x64,\(%rcx\)
1050 [ ]*[a-f0-9]+: f2 f0 83 11 64 xacquire lock adcl \$0x64,\(%rcx\)
1051 [ ]*[a-f0-9]+: f3 f0 83 11 64 xrelease lock adcl \$0x64,\(%rcx\)
1052 [ ]*[a-f0-9]+: f3 f0 83 11 64 xrelease lock adcl \$0x64,\(%rcx\)
1053 [ ]*[a-f0-9]+: f0 f2 83 11 64 lock xacquire adcl \$0x64,\(%rcx\)
1054 [ ]*[a-f0-9]+: f0 f3 83 11 64 lock xrelease adcl \$0x64,\(%rcx\)
1055 [ ]*[a-f0-9]+: f2 f0 83 01 64 xacquire lock addl \$0x64,\(%rcx\)
1056 [ ]*[a-f0-9]+: f2 f0 83 01 64 xacquire lock addl \$0x64,\(%rcx\)
1057 [ ]*[a-f0-9]+: f3 f0 83 01 64 xrelease lock addl \$0x64,\(%rcx\)
1058 [ ]*[a-f0-9]+: f3 f0 83 01 64 xrelease lock addl \$0x64,\(%rcx\)
1059 [ ]*[a-f0-9]+: f0 f2 83 01 64 lock xacquire addl \$0x64,\(%rcx\)
1060 [ ]*[a-f0-9]+: f0 f3 83 01 64 lock xrelease addl \$0x64,\(%rcx\)
1061 [ ]*[a-f0-9]+: f2 f0 83 21 64 xacquire lock andl \$0x64,\(%rcx\)
1062 [ ]*[a-f0-9]+: f2 f0 83 21 64 xacquire lock andl \$0x64,\(%rcx\)
1063 [ ]*[a-f0-9]+: f3 f0 83 21 64 xrelease lock andl \$0x64,\(%rcx\)
1064 [ ]*[a-f0-9]+: f3 f0 83 21 64 xrelease lock andl \$0x64,\(%rcx\)
1065 [ ]*[a-f0-9]+: f0 f2 83 21 64 lock xacquire andl \$0x64,\(%rcx\)
1066 [ ]*[a-f0-9]+: f0 f3 83 21 64 lock xrelease andl \$0x64,\(%rcx\)
1067 [ ]*[a-f0-9]+: f2 f0 0f ba 39 64 xacquire lock btcl \$0x64,\(%rcx\)
1068 [ ]*[a-f0-9]+: f2 f0 0f ba 39 64 xacquire lock btcl \$0x64,\(%rcx\)
1069 [ ]*[a-f0-9]+: f3 f0 0f ba 39 64 xrelease lock btcl \$0x64,\(%rcx\)
1070 [ ]*[a-f0-9]+: f3 f0 0f ba 39 64 xrelease lock btcl \$0x64,\(%rcx\)
1071 [ ]*[a-f0-9]+: f0 f2 0f ba 39 64 lock xacquire btcl \$0x64,\(%rcx\)
1072 [ ]*[a-f0-9]+: f0 f3 0f ba 39 64 lock xrelease btcl \$0x64,\(%rcx\)
1073 [ ]*[a-f0-9]+: f2 f0 0f ba 31 64 xacquire lock btrl \$0x64,\(%rcx\)
1074 [ ]*[a-f0-9]+: f2 f0 0f ba 31 64 xacquire lock btrl \$0x64,\(%rcx\)
1075 [ ]*[a-f0-9]+: f3 f0 0f ba 31 64 xrelease lock btrl \$0x64,\(%rcx\)
1076 [ ]*[a-f0-9]+: f3 f0 0f ba 31 64 xrelease lock btrl \$0x64,\(%rcx\)
1077 [ ]*[a-f0-9]+: f0 f2 0f ba 31 64 lock xacquire btrl \$0x64,\(%rcx\)
1078 [ ]*[a-f0-9]+: f0 f3 0f ba 31 64 lock xrelease btrl \$0x64,\(%rcx\)
1079 [ ]*[a-f0-9]+: f2 f0 0f ba 29 64 xacquire lock btsl \$0x64,\(%rcx\)
1080 [ ]*[a-f0-9]+: f2 f0 0f ba 29 64 xacquire lock btsl \$0x64,\(%rcx\)
1081 [ ]*[a-f0-9]+: f3 f0 0f ba 29 64 xrelease lock btsl \$0x64,\(%rcx\)
1082 [ ]*[a-f0-9]+: f3 f0 0f ba 29 64 xrelease lock btsl \$0x64,\(%rcx\)
1083 [ ]*[a-f0-9]+: f0 f2 0f ba 29 64 lock xacquire btsl \$0x64,\(%rcx\)
1084 [ ]*[a-f0-9]+: f0 f3 0f ba 29 64 lock xrelease btsl \$0x64,\(%rcx\)
1085 [ ]*[a-f0-9]+: f3 c7 01 64 00 00 00 xrelease movl \$0x64,\(%rcx\)
1086 [ ]*[a-f0-9]+: f2 f0 83 09 64 xacquire lock orl \$0x64,\(%rcx\)
1087 [ ]*[a-f0-9]+: f2 f0 83 09 64 xacquire lock orl \$0x64,\(%rcx\)
1088 [ ]*[a-f0-9]+: f3 f0 83 09 64 xrelease lock orl \$0x64,\(%rcx\)
1089 [ ]*[a-f0-9]+: f3 f0 83 09 64 xrelease lock orl \$0x64,\(%rcx\)
1090 [ ]*[a-f0-9]+: f0 f2 83 09 64 lock xacquire orl \$0x64,\(%rcx\)
1091 [ ]*[a-f0-9]+: f0 f3 83 09 64 lock xrelease orl \$0x64,\(%rcx\)
1092 [ ]*[a-f0-9]+: f2 f0 83 19 64 xacquire lock sbbl \$0x64,\(%rcx\)
1093 [ ]*[a-f0-9]+: f2 f0 83 19 64 xacquire lock sbbl \$0x64,\(%rcx\)
1094 [ ]*[a-f0-9]+: f3 f0 83 19 64 xrelease lock sbbl \$0x64,\(%rcx\)
1095 [ ]*[a-f0-9]+: f3 f0 83 19 64 xrelease lock sbbl \$0x64,\(%rcx\)
1096 [ ]*[a-f0-9]+: f0 f2 83 19 64 lock xacquire sbbl \$0x64,\(%rcx\)
1097 [ ]*[a-f0-9]+: f0 f3 83 19 64 lock xrelease sbbl \$0x64,\(%rcx\)
1098 [ ]*[a-f0-9]+: f2 f0 83 29 64 xacquire lock subl \$0x64,\(%rcx\)
1099 [ ]*[a-f0-9]+: f2 f0 83 29 64 xacquire lock subl \$0x64,\(%rcx\)
1100 [ ]*[a-f0-9]+: f3 f0 83 29 64 xrelease lock subl \$0x64,\(%rcx\)
1101 [ ]*[a-f0-9]+: f3 f0 83 29 64 xrelease lock subl \$0x64,\(%rcx\)
1102 [ ]*[a-f0-9]+: f0 f2 83 29 64 lock xacquire subl \$0x64,\(%rcx\)
1103 [ ]*[a-f0-9]+: f0 f3 83 29 64 lock xrelease subl \$0x64,\(%rcx\)
1104 [ ]*[a-f0-9]+: f2 f0 83 31 64 xacquire lock xorl \$0x64,\(%rcx\)
1105 [ ]*[a-f0-9]+: f2 f0 83 31 64 xacquire lock xorl \$0x64,\(%rcx\)
1106 [ ]*[a-f0-9]+: f3 f0 83 31 64 xrelease lock xorl \$0x64,\(%rcx\)
1107 [ ]*[a-f0-9]+: f3 f0 83 31 64 xrelease lock xorl \$0x64,\(%rcx\)
1108 [ ]*[a-f0-9]+: f0 f2 83 31 64 lock xacquire xorl \$0x64,\(%rcx\)
1109 [ ]*[a-f0-9]+: f0 f3 83 31 64 lock xrelease xorl \$0x64,\(%rcx\)
1110 [ ]*[a-f0-9]+: f2 f0 48 83 11 64 xacquire lock adcq \$0x64,\(%rcx\)
1111 [ ]*[a-f0-9]+: f2 f0 48 83 11 64 xacquire lock adcq \$0x64,\(%rcx\)
1112 [ ]*[a-f0-9]+: f3 f0 48 83 11 64 xrelease lock adcq \$0x64,\(%rcx\)
1113 [ ]*[a-f0-9]+: f3 f0 48 83 11 64 xrelease lock adcq \$0x64,\(%rcx\)
1114 [ ]*[a-f0-9]+: f0 f2 48 83 11 64 lock xacquire adcq \$0x64,\(%rcx\)
1115 [ ]*[a-f0-9]+: f0 f3 48 83 11 64 lock xrelease adcq \$0x64,\(%rcx\)
1116 [ ]*[a-f0-9]+: f2 f0 48 83 01 64 xacquire lock addq \$0x64,\(%rcx\)
1117 [ ]*[a-f0-9]+: f2 f0 48 83 01 64 xacquire lock addq \$0x64,\(%rcx\)
1118 [ ]*[a-f0-9]+: f3 f0 48 83 01 64 xrelease lock addq \$0x64,\(%rcx\)
1119 [ ]*[a-f0-9]+: f3 f0 48 83 01 64 xrelease lock addq \$0x64,\(%rcx\)
1120 [ ]*[a-f0-9]+: f0 f2 48 83 01 64 lock xacquire addq \$0x64,\(%rcx\)
1121 [ ]*[a-f0-9]+: f0 f3 48 83 01 64 lock xrelease addq \$0x64,\(%rcx\)
1122 [ ]*[a-f0-9]+: f2 f0 48 83 21 64 xacquire lock andq \$0x64,\(%rcx\)
1123 [ ]*[a-f0-9]+: f2 f0 48 83 21 64 xacquire lock andq \$0x64,\(%rcx\)
1124 [ ]*[a-f0-9]+: f3 f0 48 83 21 64 xrelease lock andq \$0x64,\(%rcx\)
1125 [ ]*[a-f0-9]+: f3 f0 48 83 21 64 xrelease lock andq \$0x64,\(%rcx\)
1126 [ ]*[a-f0-9]+: f0 f2 48 83 21 64 lock xacquire andq \$0x64,\(%rcx\)
1127 [ ]*[a-f0-9]+: f0 f3 48 83 21 64 lock xrelease andq \$0x64,\(%rcx\)
1128 [ ]*[a-f0-9]+: f2 f0 48 0f ba 39 64 xacquire lock btcq \$0x64,\(%rcx\)
1129 [ ]*[a-f0-9]+: f2 f0 48 0f ba 39 64 xacquire lock btcq \$0x64,\(%rcx\)
1130 [ ]*[a-f0-9]+: f3 f0 48 0f ba 39 64 xrelease lock btcq \$0x64,\(%rcx\)
1131 [ ]*[a-f0-9]+: f3 f0 48 0f ba 39 64 xrelease lock btcq \$0x64,\(%rcx\)
1132 [ ]*[a-f0-9]+: f0 f2 48 0f ba 39 64 lock xacquire btcq \$0x64,\(%rcx\)
1133 [ ]*[a-f0-9]+: f0 f3 48 0f ba 39 64 lock xrelease btcq \$0x64,\(%rcx\)
1134 [ ]*[a-f0-9]+: f2 f0 48 0f ba 31 64 xacquire lock btrq \$0x64,\(%rcx\)
1135 [ ]*[a-f0-9]+: f2 f0 48 0f ba 31 64 xacquire lock btrq \$0x64,\(%rcx\)
1136 [ ]*[a-f0-9]+: f3 f0 48 0f ba 31 64 xrelease lock btrq \$0x64,\(%rcx\)
1137 [ ]*[a-f0-9]+: f3 f0 48 0f ba 31 64 xrelease lock btrq \$0x64,\(%rcx\)
1138 [ ]*[a-f0-9]+: f0 f2 48 0f ba 31 64 lock xacquire btrq \$0x64,\(%rcx\)
1139 [ ]*[a-f0-9]+: f0 f3 48 0f ba 31 64 lock xrelease btrq \$0x64,\(%rcx\)
1140 [ ]*[a-f0-9]+: f2 f0 48 0f ba 29 64 xacquire lock btsq \$0x64,\(%rcx\)
1141 [ ]*[a-f0-9]+: f2 f0 48 0f ba 29 64 xacquire lock btsq \$0x64,\(%rcx\)
1142 [ ]*[a-f0-9]+: f3 f0 48 0f ba 29 64 xrelease lock btsq \$0x64,\(%rcx\)
1143 [ ]*[a-f0-9]+: f3 f0 48 0f ba 29 64 xrelease lock btsq \$0x64,\(%rcx\)
1144 [ ]*[a-f0-9]+: f0 f2 48 0f ba 29 64 lock xacquire btsq \$0x64,\(%rcx\)
1145 [ ]*[a-f0-9]+: f0 f3 48 0f ba 29 64 lock xrelease btsq \$0x64,\(%rcx\)
1146 [ ]*[a-f0-9]+: f3 48 c7 01 64 00 00 00 xrelease movq \$0x64,\(%rcx\)
1147 [ ]*[a-f0-9]+: f2 f0 48 83 09 64 xacquire lock orq \$0x64,\(%rcx\)
1148 [ ]*[a-f0-9]+: f2 f0 48 83 09 64 xacquire lock orq \$0x64,\(%rcx\)
1149 [ ]*[a-f0-9]+: f3 f0 48 83 09 64 xrelease lock orq \$0x64,\(%rcx\)
1150 [ ]*[a-f0-9]+: f3 f0 48 83 09 64 xrelease lock orq \$0x64,\(%rcx\)
1151 [ ]*[a-f0-9]+: f0 f2 48 83 09 64 lock xacquire orq \$0x64,\(%rcx\)
1152 [ ]*[a-f0-9]+: f0 f3 48 83 09 64 lock xrelease orq \$0x64,\(%rcx\)
1153 [ ]*[a-f0-9]+: f2 f0 48 83 19 64 xacquire lock sbbq \$0x64,\(%rcx\)
1154 [ ]*[a-f0-9]+: f2 f0 48 83 19 64 xacquire lock sbbq \$0x64,\(%rcx\)
1155 [ ]*[a-f0-9]+: f3 f0 48 83 19 64 xrelease lock sbbq \$0x64,\(%rcx\)
1156 [ ]*[a-f0-9]+: f3 f0 48 83 19 64 xrelease lock sbbq \$0x64,\(%rcx\)
1157 [ ]*[a-f0-9]+: f0 f2 48 83 19 64 lock xacquire sbbq \$0x64,\(%rcx\)
1158 [ ]*[a-f0-9]+: f0 f3 48 83 19 64 lock xrelease sbbq \$0x64,\(%rcx\)
1159 [ ]*[a-f0-9]+: f2 f0 48 83 29 64 xacquire lock subq \$0x64,\(%rcx\)
1160 [ ]*[a-f0-9]+: f2 f0 48 83 29 64 xacquire lock subq \$0x64,\(%rcx\)
1161 [ ]*[a-f0-9]+: f3 f0 48 83 29 64 xrelease lock subq \$0x64,\(%rcx\)
1162 [ ]*[a-f0-9]+: f3 f0 48 83 29 64 xrelease lock subq \$0x64,\(%rcx\)
1163 [ ]*[a-f0-9]+: f0 f2 48 83 29 64 lock xacquire subq \$0x64,\(%rcx\)
1164 [ ]*[a-f0-9]+: f0 f3 48 83 29 64 lock xrelease subq \$0x64,\(%rcx\)
1165 [ ]*[a-f0-9]+: f2 f0 48 83 31 64 xacquire lock xorq \$0x64,\(%rcx\)
1166 [ ]*[a-f0-9]+: f2 f0 48 83 31 64 xacquire lock xorq \$0x64,\(%rcx\)
1167 [ ]*[a-f0-9]+: f3 f0 48 83 31 64 xrelease lock xorq \$0x64,\(%rcx\)
1168 [ ]*[a-f0-9]+: f3 f0 48 83 31 64 xrelease lock xorq \$0x64,\(%rcx\)
1169 [ ]*[a-f0-9]+: f0 f2 48 83 31 64 lock xacquire xorq \$0x64,\(%rcx\)
1170 [ ]*[a-f0-9]+: f0 f3 48 83 31 64 lock xrelease xorq \$0x64,\(%rcx\)
1171 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
1172 [ ]*[a-f0-9]+: f2 f0 80 11 64 xacquire lock adcb \$0x64,\(%rcx\)
1173 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
1174 [ ]*[a-f0-9]+: f3 f0 80 11 64 xrelease lock adcb \$0x64,\(%rcx\)
1175 [ ]*[a-f0-9]+: f0 f2 80 11 64 lock xacquire adcb \$0x64,\(%rcx\)
1176 [ ]*[a-f0-9]+: f0 f3 80 11 64 lock xrelease adcb \$0x64,\(%rcx\)
1177 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
1178 [ ]*[a-f0-9]+: f2 f0 80 01 64 xacquire lock addb \$0x64,\(%rcx\)
1179 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
1180 [ ]*[a-f0-9]+: f3 f0 80 01 64 xrelease lock addb \$0x64,\(%rcx\)
1181 [ ]*[a-f0-9]+: f0 f2 80 01 64 lock xacquire addb \$0x64,\(%rcx\)
1182 [ ]*[a-f0-9]+: f0 f3 80 01 64 lock xrelease addb \$0x64,\(%rcx\)
1183 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
1184 [ ]*[a-f0-9]+: f2 f0 80 21 64 xacquire lock andb \$0x64,\(%rcx\)
1185 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
1186 [ ]*[a-f0-9]+: f3 f0 80 21 64 xrelease lock andb \$0x64,\(%rcx\)
1187 [ ]*[a-f0-9]+: f0 f2 80 21 64 lock xacquire andb \$0x64,\(%rcx\)
1188 [ ]*[a-f0-9]+: f0 f3 80 21 64 lock xrelease andb \$0x64,\(%rcx\)
1189 [ ]*[a-f0-9]+: f3 c6 01 64 xrelease movb \$0x64,\(%rcx\)
1190 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
1191 [ ]*[a-f0-9]+: f2 f0 80 09 64 xacquire lock orb \$0x64,\(%rcx\)
1192 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
1193 [ ]*[a-f0-9]+: f3 f0 80 09 64 xrelease lock orb \$0x64,\(%rcx\)
1194 [ ]*[a-f0-9]+: f0 f2 80 09 64 lock xacquire orb \$0x64,\(%rcx\)
1195 [ ]*[a-f0-9]+: f0 f3 80 09 64 lock xrelease orb \$0x64,\(%rcx\)
1196 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
1197 [ ]*[a-f0-9]+: f2 f0 80 19 64 xacquire lock sbbb \$0x64,\(%rcx\)
1198 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
1199 [ ]*[a-f0-9]+: f3 f0 80 19 64 xrelease lock sbbb \$0x64,\(%rcx\)
1200 [ ]*[a-f0-9]+: f0 f2 80 19 64 lock xacquire sbbb \$0x64,\(%rcx\)
1201 [ ]*[a-f0-9]+: f0 f3 80 19 64 lock xrelease sbbb \$0x64,\(%rcx\)
1202 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
1203 [ ]*[a-f0-9]+: f2 f0 80 29 64 xacquire lock subb \$0x64,\(%rcx\)
1204 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
1205 [ ]*[a-f0-9]+: f3 f0 80 29 64 xrelease lock subb \$0x64,\(%rcx\)
1206 [ ]*[a-f0-9]+: f0 f2 80 29 64 lock xacquire subb \$0x64,\(%rcx\)
1207 [ ]*[a-f0-9]+: f0 f3 80 29 64 lock xrelease subb \$0x64,\(%rcx\)
1208 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
1209 [ ]*[a-f0-9]+: f2 f0 80 31 64 xacquire lock xorb \$0x64,\(%rcx\)
1210 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
1211 [ ]*[a-f0-9]+: f3 f0 80 31 64 xrelease lock xorb \$0x64,\(%rcx\)
1212 [ ]*[a-f0-9]+: f0 f2 80 31 64 lock xacquire xorb \$0x64,\(%rcx\)
1213 [ ]*[a-f0-9]+: f0 f3 80 31 64 lock xrelease xorb \$0x64,\(%rcx\)
1214 [ ]*[a-f0-9]+: f2 f0 10 01 xacquire lock adc %al,\(%rcx\)
1215 [ ]*[a-f0-9]+: f2 f0 10 01 xacquire lock adc %al,\(%rcx\)
1216 [ ]*[a-f0-9]+: f3 f0 10 01 xrelease lock adc %al,\(%rcx\)
1217 [ ]*[a-f0-9]+: f3 f0 10 01 xrelease lock adc %al,\(%rcx\)
1218 [ ]*[a-f0-9]+: f0 f2 10 01 lock xacquire adc %al,\(%rcx\)
1219 [ ]*[a-f0-9]+: f0 f3 10 01 lock xrelease adc %al,\(%rcx\)
1220 [ ]*[a-f0-9]+: f2 f0 00 01 xacquire lock add %al,\(%rcx\)
1221 [ ]*[a-f0-9]+: f2 f0 00 01 xacquire lock add %al,\(%rcx\)
1222 [ ]*[a-f0-9]+: f3 f0 00 01 xrelease lock add %al,\(%rcx\)
1223 [ ]*[a-f0-9]+: f3 f0 00 01 xrelease lock add %al,\(%rcx\)
1224 [ ]*[a-f0-9]+: f0 f2 00 01 lock xacquire add %al,\(%rcx\)
1225 [ ]*[a-f0-9]+: f0 f3 00 01 lock xrelease add %al,\(%rcx\)
1226 [ ]*[a-f0-9]+: f2 f0 20 01 xacquire lock and %al,\(%rcx\)
1227 [ ]*[a-f0-9]+: f2 f0 20 01 xacquire lock and %al,\(%rcx\)
1228 [ ]*[a-f0-9]+: f3 f0 20 01 xrelease lock and %al,\(%rcx\)
1229 [ ]*[a-f0-9]+: f3 f0 20 01 xrelease lock and %al,\(%rcx\)
1230 [ ]*[a-f0-9]+: f0 f2 20 01 lock xacquire and %al,\(%rcx\)
1231 [ ]*[a-f0-9]+: f0 f3 20 01 lock xrelease and %al,\(%rcx\)
1232 [ ]*[a-f0-9]+: f3 88 01 xrelease mov %al,\(%rcx\)
1233 [ ]*[a-f0-9]+: f2 f0 08 01 xacquire lock or %al,\(%rcx\)
1234 [ ]*[a-f0-9]+: f2 f0 08 01 xacquire lock or %al,\(%rcx\)
1235 [ ]*[a-f0-9]+: f3 f0 08 01 xrelease lock or %al,\(%rcx\)
1236 [ ]*[a-f0-9]+: f3 f0 08 01 xrelease lock or %al,\(%rcx\)
1237 [ ]*[a-f0-9]+: f0 f2 08 01 lock xacquire or %al,\(%rcx\)
1238 [ ]*[a-f0-9]+: f0 f3 08 01 lock xrelease or %al,\(%rcx\)
1239 [ ]*[a-f0-9]+: f2 f0 18 01 xacquire lock sbb %al,\(%rcx\)
1240 [ ]*[a-f0-9]+: f2 f0 18 01 xacquire lock sbb %al,\(%rcx\)
1241 [ ]*[a-f0-9]+: f3 f0 18 01 xrelease lock sbb %al,\(%rcx\)
1242 [ ]*[a-f0-9]+: f3 f0 18 01 xrelease lock sbb %al,\(%rcx\)
1243 [ ]*[a-f0-9]+: f0 f2 18 01 lock xacquire sbb %al,\(%rcx\)
1244 [ ]*[a-f0-9]+: f0 f3 18 01 lock xrelease sbb %al,\(%rcx\)
1245 [ ]*[a-f0-9]+: f2 f0 28 01 xacquire lock sub %al,\(%rcx\)
1246 [ ]*[a-f0-9]+: f2 f0 28 01 xacquire lock sub %al,\(%rcx\)
1247 [ ]*[a-f0-9]+: f3 f0 28 01 xrelease lock sub %al,\(%rcx\)
1248 [ ]*[a-f0-9]+: f3 f0 28 01 xrelease lock sub %al,\(%rcx\)
1249 [ ]*[a-f0-9]+: f0 f2 28 01 lock xacquire sub %al,\(%rcx\)
1250 [ ]*[a-f0-9]+: f0 f3 28 01 lock xrelease sub %al,\(%rcx\)
1251 [ ]*[a-f0-9]+: f2 f0 86 01 xacquire lock xchg %al,\(%rcx\)
1252 [ ]*[a-f0-9]+: f2 f0 86 01 xacquire lock xchg %al,\(%rcx\)
1253 [ ]*[a-f0-9]+: f2 86 01 xacquire xchg %al,\(%rcx\)
1254 [ ]*[a-f0-9]+: f3 f0 86 01 xrelease lock xchg %al,\(%rcx\)
1255 [ ]*[a-f0-9]+: f3 f0 86 01 xrelease lock xchg %al,\(%rcx\)
1256 [ ]*[a-f0-9]+: f3 86 01 xrelease xchg %al,\(%rcx\)
1257 [ ]*[a-f0-9]+: f0 f2 86 01 lock xacquire xchg %al,\(%rcx\)
1258 [ ]*[a-f0-9]+: f0 f3 86 01 lock xrelease xchg %al,\(%rcx\)
1259 [ ]*[a-f0-9]+: f2 f0 30 01 xacquire lock xor %al,\(%rcx\)
1260 [ ]*[a-f0-9]+: f2 f0 30 01 xacquire lock xor %al,\(%rcx\)
1261 [ ]*[a-f0-9]+: f3 f0 30 01 xrelease lock xor %al,\(%rcx\)
1262 [ ]*[a-f0-9]+: f3 f0 30 01 xrelease lock xor %al,\(%rcx\)
1263 [ ]*[a-f0-9]+: f0 f2 30 01 lock xacquire xor %al,\(%rcx\)
1264 [ ]*[a-f0-9]+: f0 f3 30 01 lock xrelease xor %al,\(%rcx\)
1265 [ ]*[a-f0-9]+: 66 f2 f0 11 01 xacquire lock adc %ax,\(%rcx\)
1266 [ ]*[a-f0-9]+: 66 f2 f0 11 01 xacquire lock adc %ax,\(%rcx\)
1267 [ ]*[a-f0-9]+: 66 f3 f0 11 01 xrelease lock adc %ax,\(%rcx\)
1268 [ ]*[a-f0-9]+: 66 f3 f0 11 01 xrelease lock adc %ax,\(%rcx\)
1269 [ ]*[a-f0-9]+: f0 f2 66 11 01 lock xacquire adc %ax,\(%rcx\)
1270 [ ]*[a-f0-9]+: f0 f3 66 11 01 lock xrelease adc %ax,\(%rcx\)
1271 [ ]*[a-f0-9]+: 66 f2 f0 01 01 xacquire lock add %ax,\(%rcx\)
1272 [ ]*[a-f0-9]+: 66 f2 f0 01 01 xacquire lock add %ax,\(%rcx\)
1273 [ ]*[a-f0-9]+: 66 f3 f0 01 01 xrelease lock add %ax,\(%rcx\)
1274 [ ]*[a-f0-9]+: 66 f3 f0 01 01 xrelease lock add %ax,\(%rcx\)
1275 [ ]*[a-f0-9]+: f0 f2 66 01 01 lock xacquire add %ax,\(%rcx\)
1276 [ ]*[a-f0-9]+: f0 f3 66 01 01 lock xrelease add %ax,\(%rcx\)
1277 [ ]*[a-f0-9]+: 66 f2 f0 21 01 xacquire lock and %ax,\(%rcx\)
1278 [ ]*[a-f0-9]+: 66 f2 f0 21 01 xacquire lock and %ax,\(%rcx\)
1279 [ ]*[a-f0-9]+: 66 f3 f0 21 01 xrelease lock and %ax,\(%rcx\)
1280 [ ]*[a-f0-9]+: 66 f3 f0 21 01 xrelease lock and %ax,\(%rcx\)
1281 [ ]*[a-f0-9]+: f0 f2 66 21 01 lock xacquire and %ax,\(%rcx\)
1282 [ ]*[a-f0-9]+: f0 f3 66 21 01 lock xrelease and %ax,\(%rcx\)
1283 [ ]*[a-f0-9]+: 66 f3 89 01 xrelease mov %ax,\(%rcx\)
1284 [ ]*[a-f0-9]+: 66 f2 f0 09 01 xacquire lock or %ax,\(%rcx\)
1285 [ ]*[a-f0-9]+: 66 f2 f0 09 01 xacquire lock or %ax,\(%rcx\)
1286 [ ]*[a-f0-9]+: 66 f3 f0 09 01 xrelease lock or %ax,\(%rcx\)
1287 [ ]*[a-f0-9]+: 66 f3 f0 09 01 xrelease lock or %ax,\(%rcx\)
1288 [ ]*[a-f0-9]+: f0 f2 66 09 01 lock xacquire or %ax,\(%rcx\)
1289 [ ]*[a-f0-9]+: f0 f3 66 09 01 lock xrelease or %ax,\(%rcx\)
1290 [ ]*[a-f0-9]+: 66 f2 f0 19 01 xacquire lock sbb %ax,\(%rcx\)
1291 [ ]*[a-f0-9]+: 66 f2 f0 19 01 xacquire lock sbb %ax,\(%rcx\)
1292 [ ]*[a-f0-9]+: 66 f3 f0 19 01 xrelease lock sbb %ax,\(%rcx\)
1293 [ ]*[a-f0-9]+: 66 f3 f0 19 01 xrelease lock sbb %ax,\(%rcx\)
1294 [ ]*[a-f0-9]+: f0 f2 66 19 01 lock xacquire sbb %ax,\(%rcx\)
1295 [ ]*[a-f0-9]+: f0 f3 66 19 01 lock xrelease sbb %ax,\(%rcx\)
1296 [ ]*[a-f0-9]+: 66 f2 f0 29 01 xacquire lock sub %ax,\(%rcx\)
1297 [ ]*[a-f0-9]+: 66 f2 f0 29 01 xacquire lock sub %ax,\(%rcx\)
1298 [ ]*[a-f0-9]+: 66 f3 f0 29 01 xrelease lock sub %ax,\(%rcx\)
1299 [ ]*[a-f0-9]+: 66 f3 f0 29 01 xrelease lock sub %ax,\(%rcx\)
1300 [ ]*[a-f0-9]+: f0 f2 66 29 01 lock xacquire sub %ax,\(%rcx\)
1301 [ ]*[a-f0-9]+: f0 f3 66 29 01 lock xrelease sub %ax,\(%rcx\)
1302 [ ]*[a-f0-9]+: 66 f2 f0 87 01 xacquire lock xchg %ax,\(%rcx\)
1303 [ ]*[a-f0-9]+: 66 f2 f0 87 01 xacquire lock xchg %ax,\(%rcx\)
1304 [ ]*[a-f0-9]+: 66 f2 87 01 xacquire xchg %ax,\(%rcx\)
1305 [ ]*[a-f0-9]+: 66 f3 f0 87 01 xrelease lock xchg %ax,\(%rcx\)
1306 [ ]*[a-f0-9]+: 66 f3 f0 87 01 xrelease lock xchg %ax,\(%rcx\)
1307 [ ]*[a-f0-9]+: 66 f3 87 01 xrelease xchg %ax,\(%rcx\)
1308 [ ]*[a-f0-9]+: f0 f2 66 87 01 lock xacquire xchg %ax,\(%rcx\)
1309 [ ]*[a-f0-9]+: f0 f3 66 87 01 lock xrelease xchg %ax,\(%rcx\)
1310 [ ]*[a-f0-9]+: 66 f2 f0 31 01 xacquire lock xor %ax,\(%rcx\)
1311 [ ]*[a-f0-9]+: 66 f2 f0 31 01 xacquire lock xor %ax,\(%rcx\)
1312 [ ]*[a-f0-9]+: 66 f3 f0 31 01 xrelease lock xor %ax,\(%rcx\)
1313 [ ]*[a-f0-9]+: 66 f3 f0 31 01 xrelease lock xor %ax,\(%rcx\)
1314 [ ]*[a-f0-9]+: f0 f2 66 31 01 lock xacquire xor %ax,\(%rcx\)
1315 [ ]*[a-f0-9]+: f0 f3 66 31 01 lock xrelease xor %ax,\(%rcx\)
1316 [ ]*[a-f0-9]+: f2 f0 11 01 xacquire lock adc %eax,\(%rcx\)
1317 [ ]*[a-f0-9]+: f2 f0 11 01 xacquire lock adc %eax,\(%rcx\)
1318 [ ]*[a-f0-9]+: f3 f0 11 01 xrelease lock adc %eax,\(%rcx\)
1319 [ ]*[a-f0-9]+: f3 f0 11 01 xrelease lock adc %eax,\(%rcx\)
1320 [ ]*[a-f0-9]+: f0 f2 11 01 lock xacquire adc %eax,\(%rcx\)
1321 [ ]*[a-f0-9]+: f0 f3 11 01 lock xrelease adc %eax,\(%rcx\)
1322 [ ]*[a-f0-9]+: f2 f0 01 01 xacquire lock add %eax,\(%rcx\)
1323 [ ]*[a-f0-9]+: f2 f0 01 01 xacquire lock add %eax,\(%rcx\)
1324 [ ]*[a-f0-9]+: f3 f0 01 01 xrelease lock add %eax,\(%rcx\)
1325 [ ]*[a-f0-9]+: f3 f0 01 01 xrelease lock add %eax,\(%rcx\)
1326 [ ]*[a-f0-9]+: f0 f2 01 01 lock xacquire add %eax,\(%rcx\)
1327 [ ]*[a-f0-9]+: f0 f3 01 01 lock xrelease add %eax,\(%rcx\)
1328 [ ]*[a-f0-9]+: f2 f0 21 01 xacquire lock and %eax,\(%rcx\)
1329 [ ]*[a-f0-9]+: f2 f0 21 01 xacquire lock and %eax,\(%rcx\)
1330 [ ]*[a-f0-9]+: f3 f0 21 01 xrelease lock and %eax,\(%rcx\)
1331 [ ]*[a-f0-9]+: f3 f0 21 01 xrelease lock and %eax,\(%rcx\)
1332 [ ]*[a-f0-9]+: f0 f2 21 01 lock xacquire and %eax,\(%rcx\)
1333 [ ]*[a-f0-9]+: f0 f3 21 01 lock xrelease and %eax,\(%rcx\)
1334 [ ]*[a-f0-9]+: f3 89 01 xrelease mov %eax,\(%rcx\)
1335 [ ]*[a-f0-9]+: f2 f0 09 01 xacquire lock or %eax,\(%rcx\)
1336 [ ]*[a-f0-9]+: f2 f0 09 01 xacquire lock or %eax,\(%rcx\)
1337 [ ]*[a-f0-9]+: f3 f0 09 01 xrelease lock or %eax,\(%rcx\)
1338 [ ]*[a-f0-9]+: f3 f0 09 01 xrelease lock or %eax,\(%rcx\)
1339 [ ]*[a-f0-9]+: f0 f2 09 01 lock xacquire or %eax,\(%rcx\)
1340 [ ]*[a-f0-9]+: f0 f3 09 01 lock xrelease or %eax,\(%rcx\)
1341 [ ]*[a-f0-9]+: f2 f0 19 01 xacquire lock sbb %eax,\(%rcx\)
1342 [ ]*[a-f0-9]+: f2 f0 19 01 xacquire lock sbb %eax,\(%rcx\)
1343 [ ]*[a-f0-9]+: f3 f0 19 01 xrelease lock sbb %eax,\(%rcx\)
1344 [ ]*[a-f0-9]+: f3 f0 19 01 xrelease lock sbb %eax,\(%rcx\)
1345 [ ]*[a-f0-9]+: f0 f2 19 01 lock xacquire sbb %eax,\(%rcx\)
1346 [ ]*[a-f0-9]+: f0 f3 19 01 lock xrelease sbb %eax,\(%rcx\)
1347 [ ]*[a-f0-9]+: f2 f0 29 01 xacquire lock sub %eax,\(%rcx\)
1348 [ ]*[a-f0-9]+: f2 f0 29 01 xacquire lock sub %eax,\(%rcx\)
1349 [ ]*[a-f0-9]+: f3 f0 29 01 xrelease lock sub %eax,\(%rcx\)
1350 [ ]*[a-f0-9]+: f3 f0 29 01 xrelease lock sub %eax,\(%rcx\)
1351 [ ]*[a-f0-9]+: f0 f2 29 01 lock xacquire sub %eax,\(%rcx\)
1352 [ ]*[a-f0-9]+: f0 f3 29 01 lock xrelease sub %eax,\(%rcx\)
1353 [ ]*[a-f0-9]+: f2 f0 87 01 xacquire lock xchg %eax,\(%rcx\)
1354 [ ]*[a-f0-9]+: f2 f0 87 01 xacquire lock xchg %eax,\(%rcx\)
1355 [ ]*[a-f0-9]+: f2 87 01 xacquire xchg %eax,\(%rcx\)
1356 [ ]*[a-f0-9]+: f3 f0 87 01 xrelease lock xchg %eax,\(%rcx\)
1357 [ ]*[a-f0-9]+: f3 f0 87 01 xrelease lock xchg %eax,\(%rcx\)
1358 [ ]*[a-f0-9]+: f3 87 01 xrelease xchg %eax,\(%rcx\)
1359 [ ]*[a-f0-9]+: f0 f2 87 01 lock xacquire xchg %eax,\(%rcx\)
1360 [ ]*[a-f0-9]+: f0 f3 87 01 lock xrelease xchg %eax,\(%rcx\)
1361 [ ]*[a-f0-9]+: f2 f0 31 01 xacquire lock xor %eax,\(%rcx\)
1362 [ ]*[a-f0-9]+: f2 f0 31 01 xacquire lock xor %eax,\(%rcx\)
1363 [ ]*[a-f0-9]+: f3 f0 31 01 xrelease lock xor %eax,\(%rcx\)
1364 [ ]*[a-f0-9]+: f3 f0 31 01 xrelease lock xor %eax,\(%rcx\)
1365 [ ]*[a-f0-9]+: f0 f2 31 01 lock xacquire xor %eax,\(%rcx\)
1366 [ ]*[a-f0-9]+: f0 f3 31 01 lock xrelease xor %eax,\(%rcx\)
1367 [ ]*[a-f0-9]+: f2 f0 48 11 01 xacquire lock adc %rax,\(%rcx\)
1368 [ ]*[a-f0-9]+: f2 f0 48 11 01 xacquire lock adc %rax,\(%rcx\)
1369 [ ]*[a-f0-9]+: f3 f0 48 11 01 xrelease lock adc %rax,\(%rcx\)
1370 [ ]*[a-f0-9]+: f3 f0 48 11 01 xrelease lock adc %rax,\(%rcx\)
1371 [ ]*[a-f0-9]+: f0 f2 48 11 01 lock xacquire adc %rax,\(%rcx\)
1372 [ ]*[a-f0-9]+: f0 f3 48 11 01 lock xrelease adc %rax,\(%rcx\)
1373 [ ]*[a-f0-9]+: f2 f0 48 01 01 xacquire lock add %rax,\(%rcx\)
1374 [ ]*[a-f0-9]+: f2 f0 48 01 01 xacquire lock add %rax,\(%rcx\)
1375 [ ]*[a-f0-9]+: f3 f0 48 01 01 xrelease lock add %rax,\(%rcx\)
1376 [ ]*[a-f0-9]+: f3 f0 48 01 01 xrelease lock add %rax,\(%rcx\)
1377 [ ]*[a-f0-9]+: f0 f2 48 01 01 lock xacquire add %rax,\(%rcx\)
1378 [ ]*[a-f0-9]+: f0 f3 48 01 01 lock xrelease add %rax,\(%rcx\)
1379 [ ]*[a-f0-9]+: f2 f0 48 21 01 xacquire lock and %rax,\(%rcx\)
1380 [ ]*[a-f0-9]+: f2 f0 48 21 01 xacquire lock and %rax,\(%rcx\)
1381 [ ]*[a-f0-9]+: f3 f0 48 21 01 xrelease lock and %rax,\(%rcx\)
1382 [ ]*[a-f0-9]+: f3 f0 48 21 01 xrelease lock and %rax,\(%rcx\)
1383 [ ]*[a-f0-9]+: f0 f2 48 21 01 lock xacquire and %rax,\(%rcx\)
1384 [ ]*[a-f0-9]+: f0 f3 48 21 01 lock xrelease and %rax,\(%rcx\)
1385 [ ]*[a-f0-9]+: f3 48 89 01 xrelease mov %rax,\(%rcx\)
1386 [ ]*[a-f0-9]+: f2 f0 48 09 01 xacquire lock or %rax,\(%rcx\)
1387 [ ]*[a-f0-9]+: f2 f0 48 09 01 xacquire lock or %rax,\(%rcx\)
1388 [ ]*[a-f0-9]+: f3 f0 48 09 01 xrelease lock or %rax,\(%rcx\)
1389 [ ]*[a-f0-9]+: f3 f0 48 09 01 xrelease lock or %rax,\(%rcx\)
1390 [ ]*[a-f0-9]+: f0 f2 48 09 01 lock xacquire or %rax,\(%rcx\)
1391 [ ]*[a-f0-9]+: f0 f3 48 09 01 lock xrelease or %rax,\(%rcx\)
1392 [ ]*[a-f0-9]+: f2 f0 48 19 01 xacquire lock sbb %rax,\(%rcx\)
1393 [ ]*[a-f0-9]+: f2 f0 48 19 01 xacquire lock sbb %rax,\(%rcx\)
1394 [ ]*[a-f0-9]+: f3 f0 48 19 01 xrelease lock sbb %rax,\(%rcx\)
1395 [ ]*[a-f0-9]+: f3 f0 48 19 01 xrelease lock sbb %rax,\(%rcx\)
1396 [ ]*[a-f0-9]+: f0 f2 48 19 01 lock xacquire sbb %rax,\(%rcx\)
1397 [ ]*[a-f0-9]+: f0 f3 48 19 01 lock xrelease sbb %rax,\(%rcx\)
1398 [ ]*[a-f0-9]+: f2 f0 48 29 01 xacquire lock sub %rax,\(%rcx\)
1399 [ ]*[a-f0-9]+: f2 f0 48 29 01 xacquire lock sub %rax,\(%rcx\)
1400 [ ]*[a-f0-9]+: f3 f0 48 29 01 xrelease lock sub %rax,\(%rcx\)
1401 [ ]*[a-f0-9]+: f3 f0 48 29 01 xrelease lock sub %rax,\(%rcx\)
1402 [ ]*[a-f0-9]+: f0 f2 48 29 01 lock xacquire sub %rax,\(%rcx\)
1403 [ ]*[a-f0-9]+: f0 f3 48 29 01 lock xrelease sub %rax,\(%rcx\)
1404 [ ]*[a-f0-9]+: f2 f0 48 87 01 xacquire lock xchg %rax,\(%rcx\)
1405 [ ]*[a-f0-9]+: f2 f0 48 87 01 xacquire lock xchg %rax,\(%rcx\)
1406 [ ]*[a-f0-9]+: f2 48 87 01 xacquire xchg %rax,\(%rcx\)
1407 [ ]*[a-f0-9]+: f3 f0 48 87 01 xrelease lock xchg %rax,\(%rcx\)
1408 [ ]*[a-f0-9]+: f3 f0 48 87 01 xrelease lock xchg %rax,\(%rcx\)
1409 [ ]*[a-f0-9]+: f3 48 87 01 xrelease xchg %rax,\(%rcx\)
1410 [ ]*[a-f0-9]+: f0 f2 48 87 01 lock xacquire xchg %rax,\(%rcx\)
1411 [ ]*[a-f0-9]+: f0 f3 48 87 01 lock xrelease xchg %rax,\(%rcx\)
1412 [ ]*[a-f0-9]+: f2 f0 48 31 01 xacquire lock xor %rax,\(%rcx\)
1413 [ ]*[a-f0-9]+: f2 f0 48 31 01 xacquire lock xor %rax,\(%rcx\)
1414 [ ]*[a-f0-9]+: f3 f0 48 31 01 xrelease lock xor %rax,\(%rcx\)
1415 [ ]*[a-f0-9]+: f3 f0 48 31 01 xrelease lock xor %rax,\(%rcx\)
1416 [ ]*[a-f0-9]+: f0 f2 48 31 01 lock xacquire xor %rax,\(%rcx\)
1417 [ ]*[a-f0-9]+: f0 f3 48 31 01 lock xrelease xor %rax,\(%rcx\)
1418 [ ]*[a-f0-9]+: 66 f2 f0 0f bb 01 xacquire lock btc %ax,\(%rcx\)
1419 [ ]*[a-f0-9]+: 66 f2 f0 0f bb 01 xacquire lock btc %ax,\(%rcx\)
1420 [ ]*[a-f0-9]+: 66 f3 f0 0f bb 01 xrelease lock btc %ax,\(%rcx\)
1421 [ ]*[a-f0-9]+: 66 f3 f0 0f bb 01 xrelease lock btc %ax,\(%rcx\)
1422 [ ]*[a-f0-9]+: f0 f2 66 0f bb 01 lock xacquire btc %ax,\(%rcx\)
1423 [ ]*[a-f0-9]+: f0 f3 66 0f bb 01 lock xrelease btc %ax,\(%rcx\)
1424 [ ]*[a-f0-9]+: 66 f2 f0 0f b3 01 xacquire lock btr %ax,\(%rcx\)
1425 [ ]*[a-f0-9]+: 66 f2 f0 0f b3 01 xacquire lock btr %ax,\(%rcx\)
1426 [ ]*[a-f0-9]+: 66 f3 f0 0f b3 01 xrelease lock btr %ax,\(%rcx\)
1427 [ ]*[a-f0-9]+: 66 f3 f0 0f b3 01 xrelease lock btr %ax,\(%rcx\)
1428 [ ]*[a-f0-9]+: f0 f2 66 0f b3 01 lock xacquire btr %ax,\(%rcx\)
1429 [ ]*[a-f0-9]+: f0 f3 66 0f b3 01 lock xrelease btr %ax,\(%rcx\)
1430 [ ]*[a-f0-9]+: 66 f2 f0 0f ab 01 xacquire lock bts %ax,\(%rcx\)
1431 [ ]*[a-f0-9]+: 66 f2 f0 0f ab 01 xacquire lock bts %ax,\(%rcx\)
1432 [ ]*[a-f0-9]+: 66 f3 f0 0f ab 01 xrelease lock bts %ax,\(%rcx\)
1433 [ ]*[a-f0-9]+: 66 f3 f0 0f ab 01 xrelease lock bts %ax,\(%rcx\)
1434 [ ]*[a-f0-9]+: f0 f2 66 0f ab 01 lock xacquire bts %ax,\(%rcx\)
1435 [ ]*[a-f0-9]+: f0 f3 66 0f ab 01 lock xrelease bts %ax,\(%rcx\)
1436 [ ]*[a-f0-9]+: 66 f2 f0 0f b1 01 xacquire lock cmpxchg %ax,\(%rcx\)
1437 [ ]*[a-f0-9]+: 66 f2 f0 0f b1 01 xacquire lock cmpxchg %ax,\(%rcx\)
1438 [ ]*[a-f0-9]+: 66 f3 f0 0f b1 01 xrelease lock cmpxchg %ax,\(%rcx\)
1439 [ ]*[a-f0-9]+: 66 f3 f0 0f b1 01 xrelease lock cmpxchg %ax,\(%rcx\)
1440 [ ]*[a-f0-9]+: f0 f2 66 0f b1 01 lock xacquire cmpxchg %ax,\(%rcx\)
1441 [ ]*[a-f0-9]+: f0 f3 66 0f b1 01 lock xrelease cmpxchg %ax,\(%rcx\)
1442 [ ]*[a-f0-9]+: 66 f2 f0 0f c1 01 xacquire lock xadd %ax,\(%rcx\)
1443 [ ]*[a-f0-9]+: 66 f2 f0 0f c1 01 xacquire lock xadd %ax,\(%rcx\)
1444 [ ]*[a-f0-9]+: 66 f3 f0 0f c1 01 xrelease lock xadd %ax,\(%rcx\)
1445 [ ]*[a-f0-9]+: 66 f3 f0 0f c1 01 xrelease lock xadd %ax,\(%rcx\)
1446 [ ]*[a-f0-9]+: f0 f2 66 0f c1 01 lock xacquire xadd %ax,\(%rcx\)
1447 [ ]*[a-f0-9]+: f0 f3 66 0f c1 01 lock xrelease xadd %ax,\(%rcx\)
1448 [ ]*[a-f0-9]+: f2 f0 0f bb 01 xacquire lock btc %eax,\(%rcx\)
1449 [ ]*[a-f0-9]+: f2 f0 0f bb 01 xacquire lock btc %eax,\(%rcx\)
1450 [ ]*[a-f0-9]+: f3 f0 0f bb 01 xrelease lock btc %eax,\(%rcx\)
1451 [ ]*[a-f0-9]+: f3 f0 0f bb 01 xrelease lock btc %eax,\(%rcx\)
1452 [ ]*[a-f0-9]+: f0 f2 0f bb 01 lock xacquire btc %eax,\(%rcx\)
1453 [ ]*[a-f0-9]+: f0 f3 0f bb 01 lock xrelease btc %eax,\(%rcx\)
1454 [ ]*[a-f0-9]+: f2 f0 0f b3 01 xacquire lock btr %eax,\(%rcx\)
1455 [ ]*[a-f0-9]+: f2 f0 0f b3 01 xacquire lock btr %eax,\(%rcx\)
1456 [ ]*[a-f0-9]+: f3 f0 0f b3 01 xrelease lock btr %eax,\(%rcx\)
1457 [ ]*[a-f0-9]+: f3 f0 0f b3 01 xrelease lock btr %eax,\(%rcx\)
1458 [ ]*[a-f0-9]+: f0 f2 0f b3 01 lock xacquire btr %eax,\(%rcx\)
1459 [ ]*[a-f0-9]+: f0 f3 0f b3 01 lock xrelease btr %eax,\(%rcx\)
1460 [ ]*[a-f0-9]+: f2 f0 0f ab 01 xacquire lock bts %eax,\(%rcx\)
1461 [ ]*[a-f0-9]+: f2 f0 0f ab 01 xacquire lock bts %eax,\(%rcx\)
1462 [ ]*[a-f0-9]+: f3 f0 0f ab 01 xrelease lock bts %eax,\(%rcx\)
1463 [ ]*[a-f0-9]+: f3 f0 0f ab 01 xrelease lock bts %eax,\(%rcx\)
1464 [ ]*[a-f0-9]+: f0 f2 0f ab 01 lock xacquire bts %eax,\(%rcx\)
1465 [ ]*[a-f0-9]+: f0 f3 0f ab 01 lock xrelease bts %eax,\(%rcx\)
1466 [ ]*[a-f0-9]+: f2 f0 0f b1 01 xacquire lock cmpxchg %eax,\(%rcx\)
1467 [ ]*[a-f0-9]+: f2 f0 0f b1 01 xacquire lock cmpxchg %eax,\(%rcx\)
1468 [ ]*[a-f0-9]+: f3 f0 0f b1 01 xrelease lock cmpxchg %eax,\(%rcx\)
1469 [ ]*[a-f0-9]+: f3 f0 0f b1 01 xrelease lock cmpxchg %eax,\(%rcx\)
1470 [ ]*[a-f0-9]+: f0 f2 0f b1 01 lock xacquire cmpxchg %eax,\(%rcx\)
1471 [ ]*[a-f0-9]+: f0 f3 0f b1 01 lock xrelease cmpxchg %eax,\(%rcx\)
1472 [ ]*[a-f0-9]+: f2 f0 0f c1 01 xacquire lock xadd %eax,\(%rcx\)
1473 [ ]*[a-f0-9]+: f2 f0 0f c1 01 xacquire lock xadd %eax,\(%rcx\)
1474 [ ]*[a-f0-9]+: f3 f0 0f c1 01 xrelease lock xadd %eax,\(%rcx\)
1475 [ ]*[a-f0-9]+: f3 f0 0f c1 01 xrelease lock xadd %eax,\(%rcx\)
1476 [ ]*[a-f0-9]+: f0 f2 0f c1 01 lock xacquire xadd %eax,\(%rcx\)
1477 [ ]*[a-f0-9]+: f0 f3 0f c1 01 lock xrelease xadd %eax,\(%rcx\)
1478 [ ]*[a-f0-9]+: f2 f0 48 0f bb 01 xacquire lock btc %rax,\(%rcx\)
1479 [ ]*[a-f0-9]+: f2 f0 48 0f bb 01 xacquire lock btc %rax,\(%rcx\)
1480 [ ]*[a-f0-9]+: f3 f0 48 0f bb 01 xrelease lock btc %rax,\(%rcx\)
1481 [ ]*[a-f0-9]+: f3 f0 48 0f bb 01 xrelease lock btc %rax,\(%rcx\)
1482 [ ]*[a-f0-9]+: f0 f2 48 0f bb 01 lock xacquire btc %rax,\(%rcx\)
1483 [ ]*[a-f0-9]+: f0 f3 48 0f bb 01 lock xrelease btc %rax,\(%rcx\)
1484 [ ]*[a-f0-9]+: f2 f0 48 0f b3 01 xacquire lock btr %rax,\(%rcx\)
1485 [ ]*[a-f0-9]+: f2 f0 48 0f b3 01 xacquire lock btr %rax,\(%rcx\)
1486 [ ]*[a-f0-9]+: f3 f0 48 0f b3 01 xrelease lock btr %rax,\(%rcx\)
1487 [ ]*[a-f0-9]+: f3 f0 48 0f b3 01 xrelease lock btr %rax,\(%rcx\)
1488 [ ]*[a-f0-9]+: f0 f2 48 0f b3 01 lock xacquire btr %rax,\(%rcx\)
1489 [ ]*[a-f0-9]+: f0 f3 48 0f b3 01 lock xrelease btr %rax,\(%rcx\)
1490 [ ]*[a-f0-9]+: f2 f0 48 0f ab 01 xacquire lock bts %rax,\(%rcx\)
1491 [ ]*[a-f0-9]+: f2 f0 48 0f ab 01 xacquire lock bts %rax,\(%rcx\)
1492 [ ]*[a-f0-9]+: f3 f0 48 0f ab 01 xrelease lock bts %rax,\(%rcx\)
1493 [ ]*[a-f0-9]+: f3 f0 48 0f ab 01 xrelease lock bts %rax,\(%rcx\)
1494 [ ]*[a-f0-9]+: f0 f2 48 0f ab 01 lock xacquire bts %rax,\(%rcx\)
1495 [ ]*[a-f0-9]+: f0 f3 48 0f ab 01 lock xrelease bts %rax,\(%rcx\)
1496 [ ]*[a-f0-9]+: f2 f0 48 0f b1 01 xacquire lock cmpxchg %rax,\(%rcx\)
1497 [ ]*[a-f0-9]+: f2 f0 48 0f b1 01 xacquire lock cmpxchg %rax,\(%rcx\)
1498 [ ]*[a-f0-9]+: f3 f0 48 0f b1 01 xrelease lock cmpxchg %rax,\(%rcx\)
1499 [ ]*[a-f0-9]+: f3 f0 48 0f b1 01 xrelease lock cmpxchg %rax,\(%rcx\)
1500 [ ]*[a-f0-9]+: f0 f2 48 0f b1 01 lock xacquire cmpxchg %rax,\(%rcx\)
1501 [ ]*[a-f0-9]+: f0 f3 48 0f b1 01 lock xrelease cmpxchg %rax,\(%rcx\)
1502 [ ]*[a-f0-9]+: f2 f0 48 0f c1 01 xacquire lock xadd %rax,\(%rcx\)
1503 [ ]*[a-f0-9]+: f2 f0 48 0f c1 01 xacquire lock xadd %rax,\(%rcx\)
1504 [ ]*[a-f0-9]+: f3 f0 48 0f c1 01 xrelease lock xadd %rax,\(%rcx\)
1505 [ ]*[a-f0-9]+: f3 f0 48 0f c1 01 xrelease lock xadd %rax,\(%rcx\)
1506 [ ]*[a-f0-9]+: f0 f2 48 0f c1 01 lock xacquire xadd %rax,\(%rcx\)
1507 [ ]*[a-f0-9]+: f0 f3 48 0f c1 01 lock xrelease xadd %rax,\(%rcx\)
1508 [ ]*[a-f0-9]+: f2 f0 fe 09 xacquire lock decb \(%rcx\)
1509 [ ]*[a-f0-9]+: f2 f0 fe 09 xacquire lock decb \(%rcx\)
1510 [ ]*[a-f0-9]+: f3 f0 fe 09 xrelease lock decb \(%rcx\)
1511 [ ]*[a-f0-9]+: f3 f0 fe 09 xrelease lock decb \(%rcx\)
1512 [ ]*[a-f0-9]+: f0 f2 fe 09 lock xacquire decb \(%rcx\)
1513 [ ]*[a-f0-9]+: f0 f3 fe 09 lock xrelease decb \(%rcx\)
1514 [ ]*[a-f0-9]+: f2 f0 fe 01 xacquire lock incb \(%rcx\)
1515 [ ]*[a-f0-9]+: f2 f0 fe 01 xacquire lock incb \(%rcx\)
1516 [ ]*[a-f0-9]+: f3 f0 fe 01 xrelease lock incb \(%rcx\)
1517 [ ]*[a-f0-9]+: f3 f0 fe 01 xrelease lock incb \(%rcx\)
1518 [ ]*[a-f0-9]+: f0 f2 fe 01 lock xacquire incb \(%rcx\)
1519 [ ]*[a-f0-9]+: f0 f3 fe 01 lock xrelease incb \(%rcx\)
1520 [ ]*[a-f0-9]+: f2 f0 f6 19 xacquire lock negb \(%rcx\)
1521 [ ]*[a-f0-9]+: f2 f0 f6 19 xacquire lock negb \(%rcx\)
1522 [ ]*[a-f0-9]+: f3 f0 f6 19 xrelease lock negb \(%rcx\)
1523 [ ]*[a-f0-9]+: f3 f0 f6 19 xrelease lock negb \(%rcx\)
1524 [ ]*[a-f0-9]+: f0 f2 f6 19 lock xacquire negb \(%rcx\)
1525 [ ]*[a-f0-9]+: f0 f3 f6 19 lock xrelease negb \(%rcx\)
1526 [ ]*[a-f0-9]+: f2 f0 f6 11 xacquire lock notb \(%rcx\)
1527 [ ]*[a-f0-9]+: f2 f0 f6 11 xacquire lock notb \(%rcx\)
1528 [ ]*[a-f0-9]+: f3 f0 f6 11 xrelease lock notb \(%rcx\)
1529 [ ]*[a-f0-9]+: f3 f0 f6 11 xrelease lock notb \(%rcx\)
1530 [ ]*[a-f0-9]+: f0 f2 f6 11 lock xacquire notb \(%rcx\)
1531 [ ]*[a-f0-9]+: f0 f3 f6 11 lock xrelease notb \(%rcx\)
1532 [ ]*[a-f0-9]+: 66 f2 f0 ff 09 xacquire lock decw \(%rcx\)
1533 [ ]*[a-f0-9]+: 66 f2 f0 ff 09 xacquire lock decw \(%rcx\)
1534 [ ]*[a-f0-9]+: 66 f3 f0 ff 09 xrelease lock decw \(%rcx\)
1535 [ ]*[a-f0-9]+: 66 f3 f0 ff 09 xrelease lock decw \(%rcx\)
1536 [ ]*[a-f0-9]+: f0 f2 66 ff 09 lock xacquire decw \(%rcx\)
1537 [ ]*[a-f0-9]+: f0 f3 66 ff 09 lock xrelease decw \(%rcx\)
1538 [ ]*[a-f0-9]+: 66 f2 f0 ff 01 xacquire lock incw \(%rcx\)
1539 [ ]*[a-f0-9]+: 66 f2 f0 ff 01 xacquire lock incw \(%rcx\)
1540 [ ]*[a-f0-9]+: 66 f3 f0 ff 01 xrelease lock incw \(%rcx\)
1541 [ ]*[a-f0-9]+: 66 f3 f0 ff 01 xrelease lock incw \(%rcx\)
1542 [ ]*[a-f0-9]+: f0 f2 66 ff 01 lock xacquire incw \(%rcx\)
1543 [ ]*[a-f0-9]+: f0 f3 66 ff 01 lock xrelease incw \(%rcx\)
1544 [ ]*[a-f0-9]+: 66 f2 f0 f7 19 xacquire lock negw \(%rcx\)
1545 [ ]*[a-f0-9]+: 66 f2 f0 f7 19 xacquire lock negw \(%rcx\)
1546 [ ]*[a-f0-9]+: 66 f3 f0 f7 19 xrelease lock negw \(%rcx\)
1547 [ ]*[a-f0-9]+: 66 f3 f0 f7 19 xrelease lock negw \(%rcx\)
1548 [ ]*[a-f0-9]+: f0 f2 66 f7 19 lock xacquire negw \(%rcx\)
1549 [ ]*[a-f0-9]+: f0 f3 66 f7 19 lock xrelease negw \(%rcx\)
1550 [ ]*[a-f0-9]+: 66 f2 f0 f7 11 xacquire lock notw \(%rcx\)
1551 [ ]*[a-f0-9]+: 66 f2 f0 f7 11 xacquire lock notw \(%rcx\)
1552 [ ]*[a-f0-9]+: 66 f3 f0 f7 11 xrelease lock notw \(%rcx\)
1553 [ ]*[a-f0-9]+: 66 f3 f0 f7 11 xrelease lock notw \(%rcx\)
1554 [ ]*[a-f0-9]+: f0 f2 66 f7 11 lock xacquire notw \(%rcx\)
1555 [ ]*[a-f0-9]+: f0 f3 66 f7 11 lock xrelease notw \(%rcx\)
1556 [ ]*[a-f0-9]+: f2 f0 ff 09 xacquire lock decl \(%rcx\)
1557 [ ]*[a-f0-9]+: f2 f0 ff 09 xacquire lock decl \(%rcx\)
1558 [ ]*[a-f0-9]+: f3 f0 ff 09 xrelease lock decl \(%rcx\)
1559 [ ]*[a-f0-9]+: f3 f0 ff 09 xrelease lock decl \(%rcx\)
1560 [ ]*[a-f0-9]+: f0 f2 ff 09 lock xacquire decl \(%rcx\)
1561 [ ]*[a-f0-9]+: f0 f3 ff 09 lock xrelease decl \(%rcx\)
1562 [ ]*[a-f0-9]+: f2 f0 ff 01 xacquire lock incl \(%rcx\)
1563 [ ]*[a-f0-9]+: f2 f0 ff 01 xacquire lock incl \(%rcx\)
1564 [ ]*[a-f0-9]+: f3 f0 ff 01 xrelease lock incl \(%rcx\)
1565 [ ]*[a-f0-9]+: f3 f0 ff 01 xrelease lock incl \(%rcx\)
1566 [ ]*[a-f0-9]+: f0 f2 ff 01 lock xacquire incl \(%rcx\)
1567 [ ]*[a-f0-9]+: f0 f3 ff 01 lock xrelease incl \(%rcx\)
1568 [ ]*[a-f0-9]+: f2 f0 f7 19 xacquire lock negl \(%rcx\)
1569 [ ]*[a-f0-9]+: f2 f0 f7 19 xacquire lock negl \(%rcx\)
1570 [ ]*[a-f0-9]+: f3 f0 f7 19 xrelease lock negl \(%rcx\)
1571 [ ]*[a-f0-9]+: f3 f0 f7 19 xrelease lock negl \(%rcx\)
1572 [ ]*[a-f0-9]+: f0 f2 f7 19 lock xacquire negl \(%rcx\)
1573 [ ]*[a-f0-9]+: f0 f3 f7 19 lock xrelease negl \(%rcx\)
1574 [ ]*[a-f0-9]+: f2 f0 f7 11 xacquire lock notl \(%rcx\)
1575 [ ]*[a-f0-9]+: f2 f0 f7 11 xacquire lock notl \(%rcx\)
1576 [ ]*[a-f0-9]+: f3 f0 f7 11 xrelease lock notl \(%rcx\)
1577 [ ]*[a-f0-9]+: f3 f0 f7 11 xrelease lock notl \(%rcx\)
1578 [ ]*[a-f0-9]+: f0 f2 f7 11 lock xacquire notl \(%rcx\)
1579 [ ]*[a-f0-9]+: f0 f3 f7 11 lock xrelease notl \(%rcx\)
1580 [ ]*[a-f0-9]+: f2 f0 48 ff 09 xacquire lock decq \(%rcx\)
1581 [ ]*[a-f0-9]+: f2 f0 48 ff 09 xacquire lock decq \(%rcx\)
1582 [ ]*[a-f0-9]+: f3 f0 48 ff 09 xrelease lock decq \(%rcx\)
1583 [ ]*[a-f0-9]+: f3 f0 48 ff 09 xrelease lock decq \(%rcx\)
1584 [ ]*[a-f0-9]+: f0 f2 48 ff 09 lock xacquire decq \(%rcx\)
1585 [ ]*[a-f0-9]+: f0 f3 48 ff 09 lock xrelease decq \(%rcx\)
1586 [ ]*[a-f0-9]+: f2 f0 48 ff 01 xacquire lock incq \(%rcx\)
1587 [ ]*[a-f0-9]+: f2 f0 48 ff 01 xacquire lock incq \(%rcx\)
1588 [ ]*[a-f0-9]+: f3 f0 48 ff 01 xrelease lock incq \(%rcx\)
1589 [ ]*[a-f0-9]+: f3 f0 48 ff 01 xrelease lock incq \(%rcx\)
1590 [ ]*[a-f0-9]+: f0 f2 48 ff 01 lock xacquire incq \(%rcx\)
1591 [ ]*[a-f0-9]+: f0 f3 48 ff 01 lock xrelease incq \(%rcx\)
1592 [ ]*[a-f0-9]+: f2 f0 48 f7 19 xacquire lock negq \(%rcx\)
1593 [ ]*[a-f0-9]+: f2 f0 48 f7 19 xacquire lock negq \(%rcx\)
1594 [ ]*[a-f0-9]+: f3 f0 48 f7 19 xrelease lock negq \(%rcx\)
1595 [ ]*[a-f0-9]+: f3 f0 48 f7 19 xrelease lock negq \(%rcx\)
1596 [ ]*[a-f0-9]+: f0 f2 48 f7 19 lock xacquire negq \(%rcx\)
1597 [ ]*[a-f0-9]+: f0 f3 48 f7 19 lock xrelease negq \(%rcx\)
1598 [ ]*[a-f0-9]+: f2 f0 48 f7 11 xacquire lock notq \(%rcx\)
1599 [ ]*[a-f0-9]+: f2 f0 48 f7 11 xacquire lock notq \(%rcx\)
1600 [ ]*[a-f0-9]+: f3 f0 48 f7 11 xrelease lock notq \(%rcx\)
1601 [ ]*[a-f0-9]+: f3 f0 48 f7 11 xrelease lock notq \(%rcx\)
1602 [ ]*[a-f0-9]+: f0 f2 48 f7 11 lock xacquire notq \(%rcx\)
1603 [ ]*[a-f0-9]+: f0 f3 48 f7 11 lock xrelease notq \(%rcx\)
1604 [ ]*[a-f0-9]+: f2 f0 0f c7 09 xacquire lock cmpxchg8b \(%rcx\)
1605 [ ]*[a-f0-9]+: f2 f0 0f c7 09 xacquire lock cmpxchg8b \(%rcx\)
1606 [ ]*[a-f0-9]+: f3 f0 0f c7 09 xrelease lock cmpxchg8b \(%rcx\)
1607 [ ]*[a-f0-9]+: f3 f0 0f c7 09 xrelease lock cmpxchg8b \(%rcx\)
1608 [ ]*[a-f0-9]+: f0 f2 0f c7 09 lock xacquire cmpxchg8b \(%rcx\)
1609 [ ]*[a-f0-9]+: f0 f3 0f c7 09 lock xrelease cmpxchg8b \(%rcx\)
1610 [ ]*[a-f0-9]+: f2 f0 0f b0 09 xacquire lock cmpxchg %cl,\(%rcx\)
1611 [ ]*[a-f0-9]+: f2 f0 0f b0 09 xacquire lock cmpxchg %cl,\(%rcx\)
1612 [ ]*[a-f0-9]+: f3 f0 0f b0 09 xrelease lock cmpxchg %cl,\(%rcx\)
1613 [ ]*[a-f0-9]+: f3 f0 0f b0 09 xrelease lock cmpxchg %cl,\(%rcx\)
1614 [ ]*[a-f0-9]+: f0 f2 0f b0 09 lock xacquire cmpxchg %cl,\(%rcx\)
1615 [ ]*[a-f0-9]+: f0 f3 0f b0 09 lock xrelease cmpxchg %cl,\(%rcx\)
1616 [ ]*[a-f0-9]+: f2 f0 0f c0 09 xacquire lock xadd %cl,\(%rcx\)
1617 [ ]*[a-f0-9]+: f2 f0 0f c0 09 xacquire lock xadd %cl,\(%rcx\)
1618 [ ]*[a-f0-9]+: f3 f0 0f c0 09 xrelease lock xadd %cl,\(%rcx\)
1619 [ ]*[a-f0-9]+: f3 f0 0f c0 09 xrelease lock xadd %cl,\(%rcx\)
1620 [ ]*[a-f0-9]+: f0 f2 0f c0 09 lock xacquire xadd %cl,\(%rcx\)
1621 [ ]*[a-f0-9]+: f0 f3 0f c0 09 lock xrelease xadd %cl,\(%rcx\)
1622 #pass
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