i386: Also check R12-R15 registers when optimizing testq to testb
[deliverable/binutils-gdb.git] / gas / testsuite / gas / i386 / x86-64-prefetch.d
1 #objdump: -dw
2 #name: x86-64 prefetch
3 #source: prefetch.s
4
5 .*: +file format .*
6
7 Disassembly of section .text:
8
9 0+ <amd_prefetch>:
10 \s*[a-f0-9]+: 0f 0d 00 prefetch \(%rax\)
11 \s*[a-f0-9]+: 0f 0d 08 prefetchw \(%rax\)
12 \s*[a-f0-9]+: 0f 0d 10 prefetchwt1 \(%rax\)
13 \s*[a-f0-9]+: 0f 0d 18 prefetch \(%rax\)
14 \s*[a-f0-9]+: 0f 0d 20 prefetch \(%rax\)
15 \s*[a-f0-9]+: 0f 0d 28 prefetch \(%rax\)
16 \s*[a-f0-9]+: 0f 0d 30 prefetch \(%rax\)
17 \s*[a-f0-9]+: 0f 0d 38 prefetch \(%rax\)
18
19 0+[0-9a-f]+ <intel_prefetch>:
20 \s*[a-f0-9]+: 0f 18 00 prefetchnta \(%rax\)
21 \s*[a-f0-9]+: 0f 18 08 prefetcht0 \(%rax\)
22 \s*[a-f0-9]+: 0f 18 10 prefetcht1 \(%rax\)
23 \s*[a-f0-9]+: 0f 18 18 prefetcht2 \(%rax\)
24 \s*[a-f0-9]+: 0f 18 20 nop/reserved \(%rax\)
25 \s*[a-f0-9]+: 0f 18 28 nop/reserved \(%rax\)
26 \s*[a-f0-9]+: 0f 18 30 nop/reserved \(%rax\)
27 \s*[a-f0-9]+: 0f 18 38 nop/reserved \(%rax\)
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