gas/testsuite/gas/m32r/allinsn.d

   1 #as:
   2 #objdump: -dr
   3 #name: allinsn
   4
   5 .*: +file format .*
   6
   7 Disassembly of section .text:
   8
   9 0+0000 <add>:
  10    0:   0d ad f0 00     add fp,fp \|\| nop
  11
  12 0+0004 <add3>:
  13    4:   8d ad 00 00     add3 fp,fp,[#]*0
  14
  15 0+0008 <and>:
  16    8:   0d cd f0 00     and fp,fp \|\| nop
  17
  18 0+000c <and3>:
  19    c:   8d cd 00 00     and3 fp,fp,[#]*0x0
  20
  21 0+0010 <or>:
  22   10:   0d ed f0 00     or fp,fp \|\| nop
  23
  24 0+0014 <or3>:
  25   14:   8d ed 00 00     or3 fp,fp,[#]*0x0
  26
  27 0+0018 <xor>:
  28   18:   0d dd f0 00     xor fp,fp \|\| nop
  29
  30 0+001c <xor3>:
  31   1c:   8d dd 00 00     xor3 fp,fp,[#]*0x0
  32
  33 0+0020 <addi>:
  34   20:   4d 00 f0 00     addi fp,[#]*0 \|\| nop
  35
  36 0+0024 <addv>:
  37   24:   0d 8d f0 00     addv fp,fp \|\| nop
  38
  39 0+0028 <addv3>:
  40   28:   8d 8d 00 00     addv3 fp,fp,[#]*0
  41
  42 0+002c <addx>:
  43   2c:   0d 9d f0 00     addx fp,fp \|\| nop
  44
  45 0+0030 <bc8>:
  46   30:   7c f4 f0 00     bc 0 <add> \|\| nop
  47
  48 0+0034 <bc8_s>:
  49   34:   7c f3 f0 00     bc 0 <add> \|\| nop
  50
  51 0+0038 <bc24>:
  52   38:   7c f2 f0 00     bc 0 <add> \|\| nop
  53
  54 0+003c <bc24_l>:
  55   3c:   fc ff ff f1     bc 0 <add>
  56
  57 0+0040 <beq>:
  58   40:   bd 0d ff f0     beq fp,fp,0 <add>
  59
  60 0+0044 <beqz>:
  61   44:   b0 8d ff ef     beqz fp,0 <add>
  62
  63 0+0048 <bgez>:
  64   48:   b0 bd ff ee     bgez fp,0 <add>
  65
  66 0+004c <bgtz>:
  67   4c:   b0 dd ff ed     bgtz fp,0 <add>
  68
  69 0+0050 <blez>:
  70   50:   b0 cd ff ec     blez fp,0 <add>
  71
  72 0+0054 <bltz>:
  73   54:   b0 ad ff eb     bltz fp,0 <add>
  74
  75 0+0058 <bnez>:
  76   58:   b0 9d ff ea     bnez fp,0 <add>
  77
  78 0+005c <bl8>:
  79   5c:   7e e9 f0 00     bl 0 <add> \|\| nop
  80
  81 0+0060 <bl8_s>:
  82   60:   7e e8 f0 00     bl 0 <add> \|\| nop
  83
  84 0+0064 <bl24>:
  85   64:   7e e7 f0 00     bl 0 <add> \|\| nop
  86
  87 0+0068 <bl24_l>:
  88   68:   fe ff ff e6     bl 0 <add>
  89
  90 0+006c <bnc8>:
  91   6c:   7d e5 f0 00     bnc 0 <add> \|\| nop
  92
  93 0+0070 <bnc8_s>:
  94   70:   7d e4 f0 00     bnc 0 <add> \|\| nop
  95
  96 0+0074 <bnc24>:
  97   74:   7d e3 f0 00     bnc 0 <add> \|\| nop
  98
  99 0+0078 <bnc24_l>:
 100   78:   fd ff ff e2     bnc 0 <add>
 101
 102 0+007c <bne>:
 103   7c:   bd 1d ff e1     bne fp,fp,0 <add>
 104
 105 0+0080 <bra8>:
 106   80:   7f e0 f0 00     bra 0 <add> \|\| nop
 107
 108 0+0084 <bra8_s>:
 109   84:   7f df f0 00     bra 0 <add> \|\| nop
 110
 111 0+0088 <bra24>:
 112   88:   7f de f0 00     bra 0 <add> \|\| nop
 113
 114 0+008c <bra24_l>:
 115   8c:   ff ff ff dd     bra 0 <add>
 116
 117 0+0090 <cmp>:
 118   90:   0d 4d f0 00     cmp fp,fp \|\| nop
 119
 120 0+0094 <cmpi>:
 121   94:   80 4d 00 00     cmpi fp,[#]*0
 122
 123 0+0098 <cmpu>:
 124   98:   0d 5d f0 00     cmpu fp,fp \|\| nop
 125
 126 0+009c <cmpui>:
 127   9c:   80 5d 00 00     cmpui fp,[#]*0
 128
 129 0+00a0 <div>:
 130   a0:   9d 0d 00 00     div fp,fp
 131
 132 0+00a4 <divu>:
 133   a4:   9d 1d 00 00     divu fp,fp
 134
 135 0+00a8 <rem>:
 136   a8:   9d 2d 00 00     rem fp,fp
 137
 138 0+00ac <remu>:
 139   ac:   9d 3d 00 00     remu fp,fp
 140
 141 0+00b0 <jl>:
 142   b0:   1e cd f0 00     jl fp \|\| nop
 143
 144 0+00b4 <jmp>:
 145   b4:   1f cd f0 00     jmp fp \|\| nop
 146
 147 0+00b8 <ld>:
 148   b8:   2d cd f0 00     ld fp,@fp \|\| nop
 149
 150 0+00bc <ld_2>:
 151   bc:   2d cd f0 00     ld fp,@fp \|\| nop
 152
 153 0+00c0 <ld_d>:
 154   c0:   ad cd 00 00     ld fp,@\(0,fp\)
 155
 156 0+00c4 <ld_d2>:
 157   c4:   ad cd 00 00     ld fp,@\(0,fp\)
 158
 159 0+00c8 <ldb>:
 160   c8:   2d 8d f0 00     ldb fp,@fp \|\| nop
 161
 162 0+00cc <ldb_2>:
 163   cc:   2d 8d f0 00     ldb fp,@fp \|\| nop
 164
 165 0+00d0 <ldb_d>:
 166   d0:   ad 8d 00 00     ldb fp,@\(0,fp\)
 167
 168 0+00d4 <ldb_d2>:
 169   d4:   ad 8d 00 00     ldb fp,@\(0,fp\)
 170
 171 0+00d8 <ldh>:
 172   d8:   2d ad f0 00     ldh fp,@fp \|\| nop
 173
 174 0+00dc <ldh_2>:
 175   dc:   2d ad f0 00     ldh fp,@fp \|\| nop
 176
 177 0+00e0 <ldh_d>:
 178   e0:   ad ad 00 00     ldh fp,@\(0,fp\)
 179
 180 0+00e4 <ldh_d2>:
 181   e4:   ad ad 00 00     ldh fp,@\(0,fp\)
 182
 183 0+00e8 <ldub>:
 184   e8:   2d 9d f0 00     ldub fp,@fp \|\| nop
 185
 186 0+00ec <ldub_2>:
 187   ec:   2d 9d f0 00     ldub fp,@fp \|\| nop
 188
 189 0+00f0 <ldub_d>:
 190   f0:   ad 9d 00 00     ldub fp,@\(0,fp\)
 191
 192 0+00f4 <ldub_d2>:
 193   f4:   ad 9d 00 00     ldub fp,@\(0,fp\)
 194
 195 0+00f8 <lduh>:
 196   f8:   2d bd f0 00     lduh fp,@fp \|\| nop
 197
 198 0+00fc <lduh_2>:
 199   fc:   2d bd f0 00     lduh fp,@fp \|\| nop
 200
 201 0+0100 <lduh_d>:
 202  100:   ad bd 00 00     lduh fp,@\(0,fp\)
 203
 204 0+0104 <lduh_d2>:
 205  104:   ad bd 00 00     lduh fp,@\(0,fp\)
 206
 207 0+0108 <ld_plus>:
 208  108:   2d ed f0 00     ld fp,@fp\+ \|\| nop
 209
 210 0+010c <ld24>:
 211  10c:   ed 00 00 00     ld24 fp,[#]*0 <add>
 212                         10c: R_M32R_24_RELA     .data
 213
 214 0+0110 <ldi8>:
 215  110:   6d 00 f0 00     ldi fp,[#]*0 \|\| nop
 216
 217 0+0114 <ldi16>:
 218  114:   9d f0 01 00     ldi fp,[#]*256
 219
 220 0+0118 <lock>:
 221  118:   2d dd f0 00     lock fp,@fp \|\| nop
 222
 223 0+011c <machi>:
 224  11c:   3d 4d f0 00     machi fp,fp \|\| nop
 225
 226 0+0120 <maclo>:
 227  120:   3d 5d f0 00     maclo fp,fp \|\| nop
 228
 229 0+0124 <macwhi>:
 230  124:   3d 6d f0 00     macwhi fp,fp \|\| nop
 231
 232 0+0128 <macwlo>:
 233  128:   3d 7d f0 00     macwlo fp,fp \|\| nop
 234
 235 0+012c <mul>:
 236  12c:   1d 6d f0 00     mul fp,fp \|\| nop
 237
 238 0+0130 <mulhi>:
 239  130:   3d 0d f0 00     mulhi fp,fp \|\| nop
 240
 241 0+0134 <mullo>:
 242  134:   3d 1d f0 00     mullo fp,fp \|\| nop
 243
 244 0+0138 <mulwhi>:
 245  138:   3d 2d f0 00     mulwhi fp,fp \|\| nop
 246
 247 0+013c <mulwlo>:
 248  13c:   3d 3d f0 00     mulwlo fp,fp \|\| nop
 249
 250 0+0140 <mv>:
 251  140:   1d 8d f0 00     mv fp,fp \|\| nop
 252
 253 0+0144 <mvfachi>:
 254  144:   5d f0 f0 00     mvfachi fp \|\| nop
 255
 256 0+0148 <mvfaclo>:
 257  148:   5d f1 f0 00     mvfaclo fp \|\| nop
 258
 259 0+014c <mvfacmi>:
 260  14c:   5d f2 f0 00     mvfacmi fp \|\| nop
 261
 262 0+0150 <mvfc>:
 263  150:   1d 90 f0 00     mvfc fp,psw \|\| nop
 264
 265 0+0154 <mvtachi>:
 266  154:   5d 70 f0 00     mvtachi fp \|\| nop
 267
 268 0+0158 <mvtaclo>:
 269  158:   5d 71 f0 00     mvtaclo fp \|\| nop
 270
 271 0+015c <mvtc>:
 272  15c:   10 ad f0 00     mvtc fp,psw \|\| nop
 273
 274 0+0160 <neg>:
 275  160:   0d 3d f0 00     neg fp,fp \|\| nop
 276
 277 0+0164 <nop>:
 278  164:   70 00 f0 00     nop \|\| nop
 279
 280 0+0168 <not>:
 281  168:   0d bd f0 00     not fp,fp \|\| nop
 282
 283 0+016c <rac>:
 284  16c:   dd c0 00 00     seth fp,[#]*0x0
 285
 286 0+0170 <sll>:
 287  170:   1d 4d f0 00     sll fp,fp \|\| nop
 288
 289 0+0174 <sll3>:
 290  174:   9d cd 00 00     sll3 fp,fp,[#]*0
 291
 292 0+0178 <slli>:
 293  178:   5d 40 f0 00     slli fp,[#]*0x0 \|\| nop
 294
 295 0+017c <sra>:
 296  17c:   1d 2d f0 00     sra fp,fp \|\| nop
 297
 298 0+0180 <sra3>:
 299  180:   9d ad 00 00     sra3 fp,fp,[#]*0
 300
 301 0+0184 <srai>:
 302  184:   5d 20 f0 00     srai fp,[#]*0x0 \|\| nop
 303
 304 0+0188 <srl>:
 305  188:   1d 0d f0 00     srl fp,fp \|\| nop
 306
 307 0+018c <srl3>:
 308  18c:   9d 8d 00 00     srl3 fp,fp,[#]*0
 309
 310 0+0190 <srli>:
 311  190:   5d 00 f0 00     srli fp,[#]*0x0 \|\| nop
 312
 313 0+0194 <st>:
 314  194:   2d 4d f0 00     st fp,@fp \|\| nop
 315
 316 0+0198 <st_2>:
 317  198:   2d 4d f0 00     st fp,@fp \|\| nop
 318
 319 0+019c <st_d>:
 320  19c:   ad 4d 00 00     st fp,@\(0,fp\)
 321
 322 0+01a0 <st_d2>:
 323  1a0:   ad 4d 00 00     st fp,@\(0,fp\)
 324
 325 0+01a4 <stb>:
 326  1a4:   2d 0d f0 00     stb fp,@fp \|\| nop
 327
 328 0+01a8 <stb_2>:
 329  1a8:   2d 0d f0 00     stb fp,@fp \|\| nop
 330
 331 0+01ac <stb_d>:
 332  1ac:   ad 0d 00 00     stb fp,@\(0,fp\)
 333
 334 0+01b0 <stb_d2>:
 335  1b0:   ad 0d 00 00     stb fp,@\(0,fp\)
 336
 337 0+01b4 <sth>:
 338  1b4:   2d 2d f0 00     sth fp,@fp \|\| nop
 339
 340 0+01b8 <sth_2>:
 341  1b8:   2d 2d f0 00     sth fp,@fp \|\| nop
 342
 343 0+01bc <sth_d>:
 344  1bc:   ad 2d 00 00     sth fp,@\(0,fp\)
 345
 346 0+01c0 <sth_d2>:
 347  1c0:   ad 2d 00 00     sth fp,@\(0,fp\)
 348
 349 0+01c4 <st_plus>:
 350  1c4:   2d 6d f0 00     st fp,@\+fp \|\| nop
 351
 352 0+01c8 <st_minus>:
 353  1c8:   2d 7d f0 00     st fp,@-fp \|\| nop
 354
 355 0+01cc <sub>:
 356  1cc:   0d 2d f0 00     sub fp,fp \|\| nop
 357
 358 0+01d0 <subv>:
 359  1d0:   0d 0d f0 00     subv fp,fp \|\| nop
 360
 361 0+01d4 <subx>:
 362  1d4:   0d 1d f0 00     subx fp,fp \|\| nop
 363
 364 0+01d8 <trap>:
 365  1d8:   10 f0 f0 00     trap [#]*0x0 \|\| nop
 366
 367 0+01dc <unlock>:
 368  1dc:   2d 5d f0 00     unlock fp,@fp \|\| nop
 369
 370 0+01e0 <push>:
 371  1e0:   2d 7f f0 00     push fp \|\| nop
 372
 373 0+01e4 <pop>:
 374  1e4:   2d ef f0 00     pop fp \|\| nop