3 #name: Dwarf2 test on opers12.s
6 .*: +file format elf32\-m68hc12
8 Disassembly of section .text:
15 anda \[12,x\] ; Indexed indirect
16 0: a4 e3 00 0c anda \[12,X\]
20 6: fe 00 00 ldx 0 <start>
25 addd 1,y ; Offset from register
34 13: e8 e8 10 eorb 16,Y
36 16: e8 e9 ef eorb \-17,Y
38 19: aa f0 80 oraa 128,SP
40 1c: ea f1 80 orab \-128,SP
42 1f: ea e0 ff orab 255,X
44 22: ea e1 00 orab \-256,X
46 25: a4 e2 01 00 anda 256,X
48 29: e4 e2 fe ff andb \-257,X
49 anda \[12,x\] ; Indexed indirect \(16\-bit offset\)
50 2d: a4 e3 00 0c anda \[12,X\]
52 31: a6 eb 01 01 ldaa \[257,Y\]
54 35: e6 f3 7f ff ldab \[32767,SP\]
56 39: ec fb 80 00 ldd \[32768,PC\]
58 3d: ec f9 c9 ldd -55,PC \{9 <L1>\}
59 std a,x ; Two\-reg index
65 addd 1,\+x ; Pre\-Auto inc
71 addd 1,sp\+ ; Post\-Auto inc
77 subd 1,\-y ; Pre\-Auto dec
83 addd 1,y\- ; Post\-Auto dec
89 std \[d,x\] ; Indexed indirect with two reg index
94 62: 6c f7 std \[D,SP\]
96 64: 6c ff std \[D,PC\]
100 68: 18 27 ff 94 lbeq 0 <start>
102 6c: 18 24 00 4c lbcc bc <L2>
104 ;; Move insn with various operands
107 70: 18 09 01 00 movb 0 <start>, 1,X
110 75: 18 05 01 00 movw 1,X, 0 <start>
113 7a: 18 09 20 00 movb 0 <start>, 1,\+X
116 7f: 18 09 2f 00 movb 0 <start>, 1,\-X
119 84: 18 08 af 17 movb #23, 1,\-SP
121 88: 18 0c 00 00 movb 0 <start>, 0 <start>
124 8e: 18 09 e4 00 movb 0 <start>, A,X
127 93: 18 01 e5 00 movw 0 <start>, B,X
130 98: 18 01 e6 00 movw 0 <start>, D,X
133 9d: 18 02 e6 e4 movw D,X, A,X
135 a1: 18 02 f5 fe movw B,SP, D,PC
137 a5: 18 05 f5 00 movw B,SP, 0 <start>
140 aa: 18 02 f5 01 movw B,SP, 1,X
142 ae: 18 02 e6 ec movw D,X, A,Y
157 bc: 18 02 01 02 movw 1,X, 2,X
159 c0: 18 04 ff ff movw ffff <bb\+0xd7ff>, ffff <bb\+0xd7ff>
162 c6: 18 01 01 ff movw ffff <bb\+0xd7ff>, 1,X
165 cb: 18 00 01 ff movw #ffff <bb\+0xd7ff>, 1,X
168 d0: 18 04 00 03 movw 3 <start\+0x3>, 8 <start\+0x8>
171 d6: 18 03 00 03 movw #3 <start\+0x3>, 3 <start\+0x3>
174 dc: 18 00 01 00 movw #3 <start\+0x3>, 1,X
177 e1: 18 01 01 00 movw 3 <start\+0x3>, 1,X
180 e6: 18 01 02 00 movw 3 <start\+0x3>, 2,X
183 eb: 18 01 1e 00 movw 4 <start\+0x4>, \-2,X
188 0+f1 <post_indexed_pb>:
190 ;; Post\-index byte with relocation
195 f1: 1b e2 00 00 leas 0,X
202 f7: 1a e0 64 leax 100,X
204 fa: 1b f0 6e leas 110,SP
208 ff: 1b ea 28 00 leas 10240,Y
210 103: 1b d0 leas -16,PC \{f5 <t2>\}
212 105: 1b cf leas 15,PC \{116 <t2\+0x21>\}
214 107: 1b fa ff 00 leas -256,PC \{b <L1\+0x2>\}
216 10b: 1b f8 ff leas 255,PC \{20d <.L0
\ 1\+0xd9>\}
219 ;; Disassembler bug with movb
222 10e: 18 0b 17 23 movb #23, 2345 <.L0
\ 1\+0x2211>
225 113: 18 08 8c 28 movb #40, 12,SP
227 117: 18 08 a2 27 movb #39, 3,\+SP
229 11b: 18 08 8e 14 movb #20, 14,SP
231 11f: 18 03 32 10 movw #3210 <bb\+0xa10>, 3456 <bb\+0xc56>
234 125: 18 00 8c 40 movw #4040 <bb\+0x1840>, 12,SP
237 12a: 18 00 a2 39 movw #3900 <bb\+0x1100>, 3,\+SP
240 12f: 18 00 8e 20 movw #2000 <.L0
\ 1\+0x1ecc>, 14,SP