Add MIPS .module directive
[deliverable/binutils-gdb.git] / gas / testsuite / gas / mips / cp0-names-r4000.d
1 #objdump: -dr --prefix-addresses --show-raw-insn -M gpr-names=numeric
2 #name: MIPS CP0 register disassembly
3 #as: -32 -march=r4000
4 #source: cp0-names.s
5
6 # Check objdump's handling of -M cp0-names=foo options.
7
8 .*: +file format .*mips.*
9
10 Disassembly of section \.text:
11 [0-9a-f]+ <[^>]*> 40800000 mtc0 \$0,c0_index
12 [0-9a-f]+ <[^>]*> 40800800 mtc0 \$0,c0_random
13 [0-9a-f]+ <[^>]*> 40801000 mtc0 \$0,c0_entrylo0
14 [0-9a-f]+ <[^>]*> 40801800 mtc0 \$0,c0_entrylo1
15 [0-9a-f]+ <[^>]*> 40802000 mtc0 \$0,c0_context
16 [0-9a-f]+ <[^>]*> 40802800 mtc0 \$0,c0_pagemask
17 [0-9a-f]+ <[^>]*> 40803000 mtc0 \$0,c0_wired
18 [0-9a-f]+ <[^>]*> 40803800 mtc0 \$0,\$7
19 [0-9a-f]+ <[^>]*> 40804000 mtc0 \$0,c0_badvaddr
20 [0-9a-f]+ <[^>]*> 40804800 mtc0 \$0,c0_count
21 [0-9a-f]+ <[^>]*> 40805000 mtc0 \$0,c0_entryhi
22 [0-9a-f]+ <[^>]*> 40805800 mtc0 \$0,c0_compare
23 [0-9a-f]+ <[^>]*> 40806000 mtc0 \$0,c0_sr
24 [0-9a-f]+ <[^>]*> 40806800 mtc0 \$0,c0_cause
25 [0-9a-f]+ <[^>]*> 40807000 mtc0 \$0,c0_epc
26 [0-9a-f]+ <[^>]*> 40807800 mtc0 \$0,c0_prid
27 [0-9a-f]+ <[^>]*> 40808000 mtc0 \$0,c0_config
28 [0-9a-f]+ <[^>]*> 40808800 mtc0 \$0,c0_lladdr
29 [0-9a-f]+ <[^>]*> 40809000 mtc0 \$0,c0_watchlo
30 [0-9a-f]+ <[^>]*> 40809800 mtc0 \$0,c0_watchhi
31 [0-9a-f]+ <[^>]*> 4080a000 mtc0 \$0,c0_xcontext
32 [0-9a-f]+ <[^>]*> 4080a800 mtc0 \$0,\$21
33 [0-9a-f]+ <[^>]*> 4080b000 mtc0 \$0,\$22
34 [0-9a-f]+ <[^>]*> 4080b800 mtc0 \$0,\$23
35 [0-9a-f]+ <[^>]*> 4080c000 mtc0 \$0,\$24
36 [0-9a-f]+ <[^>]*> 4080c800 mtc0 \$0,\$25
37 [0-9a-f]+ <[^>]*> 4080d000 mtc0 \$0,c0_ecc
38 [0-9a-f]+ <[^>]*> 4080d800 mtc0 \$0,c0_cacheerr
39 [0-9a-f]+ <[^>]*> 4080e000 mtc0 \$0,c0_taglo
40 [0-9a-f]+ <[^>]*> 4080e800 mtc0 \$0,c0_taghi
41 [0-9a-f]+ <[^>]*> 4080f000 mtc0 \$0,c0_errorepc
42 [0-9a-f]+ <[^>]*> 4080f800 mtc0 \$0,\$31
43 \.\.\.
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