bfd/
[deliverable/binutils-gdb.git] / gas / testsuite / gas / mips / mips16-intermix.d
1 #objdump: -t
2 #as: -mips32r2 -32
3 #name: MIPS16 intermix
4
5 .*: +file format .*mips.*
6
7 SYMBOL TABLE:
8 #...
9 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_l
10 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_l
11 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_l
12 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_l
13 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_l
14 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_l
15 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_l
16 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_l
17 0+[0-9a-f]+ l d .mips16.fn.m16_d 0+[0-9a-f]+ .mips16.fn.m16_d
18 0+[0-9a-f]+ l F .mips16.fn.m16_d 0+[0-9a-f]+ __fn_stub_m16_d
19 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d
20 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d
21 0+[0-9a-f]+ l d .mips16.fn.m16_static_d 0+[0-9a-f]+ .mips16.fn.m16_static_d
22 0+[0-9a-f]+ l F .mips16.fn.m16_static_d 0+[0-9a-f]+ __fn_stub_m16_static_d
23 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d
24 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d
25 0+[0-9a-f]+ l d .mips16.fn.m16_static1_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d
26 0+[0-9a-f]+ l F .mips16.fn.m16_static1_d 0+[0-9a-f]+ __fn_stub_m16_static1_d
27 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d
28 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d
29 0+[0-9a-f]+ l d .mips16.fn.m16_static32_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d
30 0+[0-9a-f]+ l F .mips16.fn.m16_static32_d 0+[0-9a-f]+ __fn_stub_m16_static32_d
31 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d
32 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d
33 0+[0-9a-f]+ l d .mips16.fn.m16_static16_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d
34 0+[0-9a-f]+ l F .mips16.fn.m16_static16_d 0+[0-9a-f]+ __fn_stub_m16_static16_d
35 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_ld
36 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_ld
37 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_ld
38 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_ld
39 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_ld
40 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_ld
41 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_ld
42 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_ld
43 0+[0-9a-f]+ l d .mips16.fn.m16_dl 0+[0-9a-f]+ .mips16.fn.m16_dl
44 0+[0-9a-f]+ l F .mips16.fn.m16_dl 0+[0-9a-f]+ __fn_stub_m16_dl
45 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dl
46 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dl
47 0+[0-9a-f]+ l d .mips16.fn.m16_static_dl 0+[0-9a-f]+ .mips16.fn.m16_static_dl
48 0+[0-9a-f]+ l F .mips16.fn.m16_static_dl 0+[0-9a-f]+ __fn_stub_m16_static_dl
49 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dl
50 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dl
51 0+[0-9a-f]+ l d .mips16.fn.m16_static1_dl 0+[0-9a-f]+ .mips16.fn.m16_static1_dl
52 0+[0-9a-f]+ l F .mips16.fn.m16_static1_dl 0+[0-9a-f]+ __fn_stub_m16_static1_dl
53 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dl
54 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dl
55 0+[0-9a-f]+ l d .mips16.fn.m16_static32_dl 0+[0-9a-f]+ .mips16.fn.m16_static32_dl
56 0+[0-9a-f]+ l F .mips16.fn.m16_static32_dl 0+[0-9a-f]+ __fn_stub_m16_static32_dl
57 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dl
58 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dl
59 0+[0-9a-f]+ l d .mips16.fn.m16_static16_dl 0+[0-9a-f]+ .mips16.fn.m16_static16_dl
60 0+[0-9a-f]+ l F .mips16.fn.m16_static16_dl 0+[0-9a-f]+ __fn_stub_m16_static16_dl
61 0+[0-9a-f]+ l d .mips16.fn.m16_dlld 0+[0-9a-f]+ .mips16.fn.m16_dlld
62 0+[0-9a-f]+ l F .mips16.fn.m16_dlld 0+[0-9a-f]+ __fn_stub_m16_dlld
63 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_dlld
64 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_dlld
65 0+[0-9a-f]+ l d .mips16.fn.m16_static_dlld 0+[0-9a-f]+ .mips16.fn.m16_static_dlld
66 0+[0-9a-f]+ l F .mips16.fn.m16_static_dlld 0+[0-9a-f]+ __fn_stub_m16_static_dlld
67 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_dlld
68 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_dlld
69 0+[0-9a-f]+ l d .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ .mips16.fn.m16_static1_dlld
70 0+[0-9a-f]+ l F .mips16.fn.m16_static1_dlld 0+[0-9a-f]+ __fn_stub_m16_static1_dlld
71 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_dlld
72 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_dlld
73 0+[0-9a-f]+ l d .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ .mips16.fn.m16_static32_dlld
74 0+[0-9a-f]+ l F .mips16.fn.m16_static32_dlld 0+[0-9a-f]+ __fn_stub_m16_static32_dlld
75 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_dlld
76 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_dlld
77 0+[0-9a-f]+ l d .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ .mips16.fn.m16_static16_dlld
78 0+[0-9a-f]+ l F .mips16.fn.m16_static16_dlld 0+[0-9a-f]+ __fn_stub_m16_static16_dlld
79 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_l
80 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_l
81 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_l
82 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_l
83 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_l
84 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_l
85 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_l
86 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_l
87 0+[0-9a-f]+ l d .mips16.fn.m16_d_d 0+[0-9a-f]+ .mips16.fn.m16_d_d
88 0+[0-9a-f]+ l F .mips16.fn.m16_d_d 0+[0-9a-f]+ __fn_stub_m16_d_d
89 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static_d_d
90 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static_d_d
91 0+[0-9a-f]+ l d .mips16.fn.m16_static_d_d 0+[0-9a-f]+ .mips16.fn.m16_static_d_d
92 0+[0-9a-f]+ l F .mips16.fn.m16_static_d_d 0+[0-9a-f]+ __fn_stub_m16_static_d_d
93 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static1_d_d
94 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static1_d_d
95 0+[0-9a-f]+ l d .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ .mips16.fn.m16_static1_d_d
96 0+[0-9a-f]+ l F .mips16.fn.m16_static1_d_d 0+[0-9a-f]+ __fn_stub_m16_static1_d_d
97 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static32_d_d
98 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static32_d_d
99 0+[0-9a-f]+ l d .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ .mips16.fn.m16_static32_d_d
100 0+[0-9a-f]+ l F .mips16.fn.m16_static32_d_d 0+[0-9a-f]+ __fn_stub_m16_static32_d_d
101 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ m32_static16_d_d
102 0+[0-9a-f]+ l F .text 0+[0-9a-f]+ 0xf0 m16_static16_d_d
103 0+[0-9a-f]+ l d .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ .mips16.fn.m16_static16_d_d
104 0+[0-9a-f]+ l F .mips16.fn.m16_static16_d_d 0+[0-9a-f]+ __fn_stub_m16_static16_d_d
105 0+[0-9a-f]+ l d .mips16.call.m32_static1_d 0+[0-9a-f]+ .mips16.call.m32_static1_d
106 0+[0-9a-f]+ l F .mips16.call.m32_static1_d 0+[0-9a-f]+ __call_stub_m32_static1_d
107 0+[0-9a-f]+ l d .mips16.call.m16_static1_d 0+[0-9a-f]+ .mips16.call.m16_static1_d
108 0+[0-9a-f]+ l F .mips16.call.m16_static1_d 0+[0-9a-f]+ __call_stub_m16_static1_d
109 0+[0-9a-f]+ l d .mips16.call.m32_static1_dl 0+[0-9a-f]+ .mips16.call.m32_static1_dl
110 0+[0-9a-f]+ l F .mips16.call.m32_static1_dl 0+[0-9a-f]+ __call_stub_m32_static1_dl
111 0+[0-9a-f]+ l d .mips16.call.m16_static1_dl 0+[0-9a-f]+ .mips16.call.m16_static1_dl
112 0+[0-9a-f]+ l F .mips16.call.m16_static1_dl 0+[0-9a-f]+ __call_stub_m16_static1_dl
113 0+[0-9a-f]+ l d .mips16.call.m32_static1_dlld 0+[0-9a-f]+ .mips16.call.m32_static1_dlld
114 0+[0-9a-f]+ l F .mips16.call.m32_static1_dlld 0+[0-9a-f]+ __call_stub_m32_static1_dlld
115 0+[0-9a-f]+ l d .mips16.call.m16_static1_dlld 0+[0-9a-f]+ .mips16.call.m16_static1_dlld
116 0+[0-9a-f]+ l F .mips16.call.m16_static1_dlld 0+[0-9a-f]+ __call_stub_m16_static1_dlld
117 0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_l
118 0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_l
119 0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_l
120 0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_l
121 0+[0-9a-f]+ l d .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static1_d_d
122 0+[0-9a-f]+ l F .mips16.call.fp.m32_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static1_d_d
123 0+[0-9a-f]+ l d .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static1_d_d
124 0+[0-9a-f]+ l F .mips16.call.fp.m16_static1_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static1_d_d
125 0+[0-9a-f]+ l d .mips16.call.m32_static16_d 0+[0-9a-f]+ .mips16.call.m32_static16_d
126 0+[0-9a-f]+ l F .mips16.call.m32_static16_d 0+[0-9a-f]+ __call_stub_m32_static16_d
127 0+[0-9a-f]+ l d .mips16.call.m16_static16_d 0+[0-9a-f]+ .mips16.call.m16_static16_d
128 0+[0-9a-f]+ l F .mips16.call.m16_static16_d 0+[0-9a-f]+ __call_stub_m16_static16_d
129 0+[0-9a-f]+ l d .mips16.call.m32_static16_dl 0+[0-9a-f]+ .mips16.call.m32_static16_dl
130 0+[0-9a-f]+ l F .mips16.call.m32_static16_dl 0+[0-9a-f]+ __call_stub_m32_static16_dl
131 0+[0-9a-f]+ l d .mips16.call.m16_static16_dl 0+[0-9a-f]+ .mips16.call.m16_static16_dl
132 0+[0-9a-f]+ l F .mips16.call.m16_static16_dl 0+[0-9a-f]+ __call_stub_m16_static16_dl
133 0+[0-9a-f]+ l d .mips16.call.m32_static16_dlld 0+[0-9a-f]+ .mips16.call.m32_static16_dlld
134 0+[0-9a-f]+ l F .mips16.call.m32_static16_dlld 0+[0-9a-f]+ __call_stub_m32_static16_dlld
135 0+[0-9a-f]+ l d .mips16.call.m16_static16_dlld 0+[0-9a-f]+ .mips16.call.m16_static16_dlld
136 0+[0-9a-f]+ l F .mips16.call.m16_static16_dlld 0+[0-9a-f]+ __call_stub_m16_static16_dlld
137 0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_l
138 0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_l
139 0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_l
140 0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_l 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_l
141 0+[0-9a-f]+ l d .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m32_static16_d_d
142 0+[0-9a-f]+ l F .mips16.call.fp.m32_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m32_static16_d_d
143 0+[0-9a-f]+ l d .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ .mips16.call.fp.m16_static16_d_d
144 0+[0-9a-f]+ l F .mips16.call.fp.m16_static16_d_d 0+[0-9a-f]+ __call_stub_fp_m16_static16_d_d
145 #...
146 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_l
147 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_l
148 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d
149 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d
150 #...
151 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_ld
152 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_ld
153 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dl
154 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dl
155 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_dlld
156 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_dlld
157 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_l
158 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_l
159 #...
160 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ m32_d_d
161 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 m16_d_d
162 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ f32
163 0+[0-9a-f]+ g F .text 0+[0-9a-f]+ 0xf0 f16
164 #pass
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