gas/testsuite/gas/mips/mips32.s

   1 # source file to test assembly of mips32 instructions
   2
   3         .set noreorder
   4       .set noat
   5
   6       .text
   7 text_label:
   8
   9       # unprivileged CPU instructions
  10
  11       clo     $1, $2
  12       clz     $3, $4
  13       madd    $5, $6
  14       maddu   $7, $8
  15       msub    $9, $10
  16       msubu   $11, $12
  17       mul     $13, $14, $15
  18       pref    4, ($16)
  19       pref    4, 32767($17)
  20       pref    4, -32768($18)
  21       ssnop
  22
  23
  24       # privileged instructions
  25
  26       cache   5, ($1)
  27       cache   5, 32767($2)
  28       cache   5, -32768($3)
  29       .set at
  30       cache   5, 32768($4)
  31       cache   5, -32769($5)
  32       cache   5, 32768
  33       cache   5, -32769
  34       .set noat
  35       eret
  36       tlbp
  37       tlbr
  38       tlbwi
  39       tlbwr
  40       wait
  41       wait    0                       # disassembles without code
  42       wait    0x56789
  43
  44       # For a while break for the mips32 ISA interpreted a single argument
  45       # as a 20-bit code, placing it in the opcode differently to
  46       # traditional ISAs.  This turned out to cause problems, so it has
  47       # been removed.  This test is to assure consistent interpretation.
  48       break
  49       break   0                       # disassembles without code
  50       break   0x345
  51       break   0x48,0x345              # this still specifies a 20-bit code
  52
  53       # Instructions in previous ISAs or CPUs which are now slightly
  54       # different.
  55       sdbbp
  56       sdbbp   0                       # disassembles without code
  57       sdbbp   0x56789
  58
  59 # Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ...
  60       .space  8