gas/testsuite/gas/mips/vr4130.s

   1         .macro  check2 insn
   2         mflo    $2
   3         \insn   $3,$3
   4         .endm
   5
   6         .macro  check3 insn
   7         mfhi    $2
   8         \insn   $0,$3,$3
   9         .endm
  10
  11         .macro  main func
  12
  13         .ent    \func
  14         .type   \func,@function
  15 \func:
  16
  17         # PART A
  18         #
  19         # Check that mfhis and mflos in .set noreorder blocks are considered.
  20
  21         .set    noreorder
  22         mfhi    $2
  23         .set    reorder
  24         mult    $3,$3
  25
  26         .set    noreorder
  27         mflo    $2
  28         .set    reorder
  29         mult    $3,$3
  30
  31         # PART B
  32         #
  33         # Check for simple instances.
  34
  35         mfhi    $2
  36         mult    $3,$3   # 4 nops
  37
  38         mfhi    $2
  39         addiu   $3,1
  40         mult    $4,$4   # 3 nops
  41
  42         mfhi    $2
  43         addiu   $3,1
  44         addiu   $4,1
  45         mult    $5,$5   # 2 nops
  46
  47         mfhi    $2
  48         addiu   $3,1
  49         addiu   $4,1
  50         addiu   $5,1
  51         mult    $6,$6   # 1 nop
  52
  53         mfhi    $2
  54         addiu   $3,1
  55         addiu   $4,1
  56         addiu   $5,1
  57         addiu   $6,1
  58         mult    $7,$7   # 0 nops
  59
  60         mfhi    $2
  61         .set    noreorder
  62         mult    $3,$3   # 4 nops
  63         .set    reorder
  64
  65         mfhi    $2
  66         .set    noreorder
  67         addiu   $3,1
  68         mult    $4,$4   # 3 nops before noreorder
  69         .set    reorder
  70
  71         mfhi    $2
  72         .set    noreorder
  73         addiu   $3,1
  74         addiu   $4,1
  75         mult    $5,$5   # 2 nops before noreorder
  76         .set    reorder
  77
  78         mfhi    $2
  79         .set    noreorder
  80         addiu   $3,1
  81         addiu   $4,1
  82         addiu   $5,1
  83         mult    $6,$6   # 1 nop before noreorder
  84         .set    reorder
  85
  86         mfhi    $2
  87         .set    noreorder
  88         addiu   $3,1
  89         addiu   $4,1
  90         addiu   $5,1
  91         addiu   $6,1
  92         mult    $7,$7   # 0 nops
  93         .set    reorder
  94
  95         # PART C
  96         #
  97         # Check that no nops are inserted after the result has been read.
  98
  99         mfhi    $2
 100         addiu   $2,1
 101         addiu   $3,1
 102         addiu   $4,1
 103         mult    $5,$5
 104
 105         mfhi    $2
 106         addiu   $3,1
 107         addiu   $2,1
 108         addiu   $4,1
 109         mult    $5,$5
 110
 111         mfhi    $2
 112         addiu   $3,1
 113         addiu   $4,1
 114         addiu   $2,1
 115         mult    $5,$5
 116
 117         mfhi    $2
 118         addiu   $3,1
 119         addiu   $4,1
 120         addiu   $5,1
 121         mult    $2,$2
 122
 123         mfhi    $2
 124         .set    noreorder
 125         addiu   $2,1
 126         addiu   $3,1
 127         addiu   $4,1
 128         mult    $5,$5
 129         .set    reorder
 130
 131         mfhi    $2
 132         .set    noreorder
 133         addiu   $3,1
 134         addiu   $2,1
 135         addiu   $4,1
 136         mult    $5,$5
 137         .set    reorder
 138
 139         mfhi    $2
 140         .set    noreorder
 141         addiu   $3,1
 142         addiu   $4,1
 143         addiu   $2,1
 144         mult    $5,$5
 145         .set    reorder
 146
 147         mfhi    $2
 148         .set    noreorder
 149         addiu   $3,1
 150         addiu   $4,1
 151         addiu   $5,1
 152         mult    $2,$2
 153         .set    reorder
 154
 155         # PART D
 156         #
 157         # Check that we still insert the usual interlocking nops in cases
 158         # where the VR4130 errata doesn't apply.
 159
 160         mfhi    $2
 161         mult    $2,$2   # 2 nops
 162
 163         mfhi    $2
 164         addiu   $2,1
 165         mult    $3,$3   # 1 nop
 166
 167         mfhi    $2
 168         addiu   $3,1
 169         mult    $2,$2   # 1 nop
 170
 171         # PART E
 172         #
 173         # Check for branches whose targets might be affected.
 174
 175         mfhi    $2
 176         bnez    $3,1f   # 2 nops for normal mode, 3 for mips16
 177
 178         mfhi    $2
 179         addiu   $3,1
 180         bnez    $3,1f   # 1 nop for normal mode, 2 for mips16
 181
 182         mfhi    $2
 183         addiu   $3,1
 184         addiu   $3,1
 185         bnez    $3,1f   # 0 nops for normal mode, 1 for mips16
 186
 187         mfhi    $2
 188         addiu   $3,1
 189         addiu   $3,1
 190         addiu   $3,1
 191         bnez    $3,1f   # 0 nops
 192
 193         # PART F
 194         #
 195         # As above, but with no dependencies between the branch and
 196         # the previous instruction.  The final branch can use the
 197         # preceding addiu as its delay slot.
 198
 199         mfhi    $2
 200         addiu   $3,1
 201         bnez    $4,1f   # 1 nop for normal mode, 2 for mips16
 202
 203         mfhi    $2
 204         addiu   $3,1
 205         addiu   $4,1
 206         bnez    $5,1f   # 0 nops for normal mode, 1 for mips16
 207
 208         mfhi    $2
 209         addiu   $3,1
 210         addiu   $4,1
 211         addiu   $5,1
 212         bnez    $6,1f   # 0 nops, fill delay slot in normal mode
 213 1:
 214
 215         # PART G
 216         #
 217         # Like part B, but check that intervening .set noreorders don't
 218         # affect the number of nops.
 219
 220         mfhi    $2
 221         .set    noreorder
 222         addiu   $3,1
 223         .set    reorder
 224         mult    $4,$4   # 3 nops
 225
 226         mfhi    $2
 227         .set    noreorder
 228         addiu   $3,1
 229         .set    reorder
 230         addiu   $4,1
 231         mult    $5,$5   # 2 nops
 232
 233         mfhi    $2
 234         addiu   $3,1
 235         .set    noreorder
 236         addiu   $4,1
 237         .set    reorder
 238         mult    $5,$5   # 2 nops
 239
 240         mfhi    $2
 241         .set    noreorder
 242         addiu   $3,1
 243         addiu   $4,1
 244         .set    reorder
 245         mult    $5,$5   # 2 nops
 246
 247         mfhi    $2
 248         addiu   $3,1
 249         .set    noreorder
 250         addiu   $4,1
 251         .set    reorder
 252         addiu   $5,1
 253         mult    $6,$6   # 1 nop
 254
 255         mfhi    $2
 256         .set    noreorder
 257         addiu   $3,1
 258         addiu   $4,1
 259         addiu   $5,1
 260         .set    reorder
 261         mult    $6,$6   # 1 nop
 262
 263         mfhi    $2
 264         .set    noreorder
 265         addiu   $3,1
 266         addiu   $4,1
 267         addiu   $5,1
 268         addiu   $6,1
 269         .set    reorder
 270         mult    $7,$7   # 0 nops
 271
 272         # PART H
 273         #
 274         # Like part B, but the mult occurs in a .set noreorder block.
 275
 276         mfhi    $2
 277         .set    noreorder
 278         mult    $3,$3   # 4 nops
 279         .set    reorder
 280
 281         mfhi    $2
 282         .set    noreorder
 283         addiu   $3,1
 284         mult    $4,$4   # 3 nops
 285         .set    reorder
 286
 287         mfhi    $2
 288         addiu   $3,1
 289         .set    noreorder
 290         addiu   $4,1
 291         mult    $5,$5   # 2 nops
 292         .set    reorder
 293
 294         mfhi    $2
 295         .set    noreorder
 296         addiu   $3,1
 297         addiu   $4,1
 298         addiu   $5,1
 299         mult    $6,$6   # 1 nop
 300         .set    reorder
 301
 302         mfhi    $2
 303         .set    noreorder
 304         addiu   $3,1
 305         addiu   $4,1
 306         addiu   $5,1
 307         addiu   $6,1
 308         mult    $7,$7   # 0 nops
 309         .set    reorder
 310
 311         # PART I
 312         #
 313         # Check every affected multiplication and division instruction.
 314
 315         check2  mult
 316         check2  multu
 317         check2  dmult
 318         check2  dmultu
 319
 320         check3  div
 321         check3  divu
 322         check3  ddiv
 323         check3  ddivu
 324
 325         .end    \func
 326         .endm
 327
 328         .set    nomips16
 329         main    foo
 330
 331         # PART J
 332         #
 333         # Check every affected multiply-accumulate instruction.
 334
 335         check3  macc
 336         check3  macchi
 337         check3  macchis
 338         check3  macchiu
 339         check3  macchius
 340         check3  maccs
 341         check3  maccu
 342         check3  maccus
 343
 344         check3  dmacc
 345         check3  dmacchi
 346         check3  dmacchis
 347         check3  dmacchiu
 348         check3  dmacchius
 349         check3  dmaccs
 350         check3  dmaccu
 351         check3  dmaccus
 352
 353         # PART K
 354         #
 355         # Check that mtlo and mthi are exempt from the VR4130 errata,
 356         # although the usual interlocking delay applies.
 357
 358         mflo    $2
 359         mtlo    $3
 360
 361         mflo    $2
 362         mthi    $3
 363
 364         mfhi    $2
 365         mtlo    $3
 366
 367         mfhi    $2
 368         mthi    $3
 369
 370         .set    mips16
 371         main    bar