2 #name: PowerPC 64-bit test 2
4 .*: +file format elf64-powerpc
6 Disassembly of section \.text:
8 0000000000000000 <foo>:
12 c: 48 00 00 04 b 10 <foo\+0x10>
13 10: 48 00 00 08 b 18 <foo\+0x18>
14 14: 48 00 00 00 b 14 <foo\+0x14>
16 18: 48 00 00 04 b 1c <foo\+0x1c>
17 18: R_PPC64_REL24 \.data\+0x4
18 1c: 48 00 00 00 b 1c <foo\+0x1c>
20 20: 48 00 00 14 b 34 <foo\+0x34>
21 20: R_PPC64_REL24 z\+0x14
22 24: 48 00 00 04 b 28 <foo\+0x28>
23 28: 48 00 00 00 b 28 <foo\+0x28>
25 2c: 48 00 00 48 b 74 <apfour>
26 30: 48 00 00 04 b 34 <foo\+0x34>
27 30: R_PPC64_REL24 a\+0x4
28 34: 48 00 00 44 b 78 <apfour\+0x4>
29 38: 00 00 00 38 \.long 0x38
30 38: R_PPC64_ADDR32 \.text\+0x38
31 3c: 00 00 00 44 \.long 0x44
32 3c: R_PPC64_ADDR32 \.text\+0x44
33 40: 00 00 00 00 \.long 0x0
35 44: 00 00 00 04 \.long 0x4
36 44: R_PPC64_REL32 x\+0x4
43 5c: ff ff ff fc fnmsub f31,f31,f31,f31
44 5c: R_PPC64_ADDR32 x\+0xfffffffffffffffc
45 60: ff ff ff fc fnmsub f31,f31,f31,f31
46 60: R_PPC64_ADDR32 y\+0xfffffffffffffffc
47 64: ff ff ff fc fnmsub f31,f31,f31,f31
48 64: R_PPC64_ADDR32 z\+0xfffffffffffffffc
49 68: 00 00 00 08 \.long 0x8
50 6c: 00 00 00 08 \.long 0x8
53 70: 00 00 00 00 \.long 0x0
56 0000000000000074 <apfour>:
59 78: R_PPC64_ADDR32 apfour
60 7c: ff ff ff fc fnmsub f31,f31,f31,f31
61 80: 00 00 00 02 \.long 0x2
62 80: R_PPC64_ADDR32 apfour\+0x2
63 84: 00 00 00 00 \.long 0x0
64 Disassembly of section \.data:
67 0: 00 00 00 00 \.long 0x0
70 4: 00 00 00 00 \.long 0x0