3 * mv <-> mv! : for mv! : register number must be in 0-15
4 * mv <-> mhfl! : for mhfl! : rD must be in 16-31, rS must be in 0-15
5 * mv <-> mlfh! : for mhfl! : rD must be in 0-15, rS must be in 16-31
10 /* This block test mv -> mv! */
13 mv r0, r15 #32b -> 16b
16 mv r15, r15 #32b -> 16b
25 mv r8, r10 #No transform
28 /* This block test mv! -> mv */
31 mv! r0, r15 #16b -> 32b
34 mv! r2, r8 #No transform
35 mv! r2, r8 #No transform
37 mv! r2, r8 #No transform
40 /* This block test mv -> mhfl! */
43 mv r31, r0 #32b -> 16b
46 mv r16, r15 #32b -> 16b
49 mv r23, r5 #32b -> 16b
50 mv r23, r5 #32b -> 16b
53 mv r26, r7 #32b -> 16b
55 mv r28, r10 #No transform
58 /* This block test mhfl! -> mv */
61 mhfl! r31, r0 #16b -> 32b
64 mhfl! r22, r8 #No transform
65 mhfl! r22, r8 #No transform
67 mhfl! r23, r15 #No transform
70 /* This block test mv -> mlfh! */
73 mv r0, r31 #32b -> 16b
76 mv r15, r16 #32b -> 16b
79 mv r5, r23 #32b -> 16b
80 mv r5, r23 #32b -> 16b
83 mv r7, r26 #32b -> 16b
85 mv r10, r28 #No transform
88 /* This block test mhfl! -> mv */
91 mlfh! r0, r31 #16b -> 32b
94 mlfh! r8, r22 #No transform
95 mlfh! r8, r22 #No transform
97 mlfh! r15, r23 #No transform