Removes support in the ARM assembler for the unsigned variants of the VQ(R)DMLAH...
[deliverable/binutils-gdb.git] / gas / testsuite / gas / sparc / synth64.d
1 #as: -64 -Av9
2 #objdump: -dr --prefix-addresses
3 #name: sparc64 synth64
4
5 .*: +file format .*sparc.*
6
7 Disassembly of section .text:
8 0+0000 <foo-(0x|)4> iprefetch 0+0004 <foo>
9 0+0004 <foo> signx %g1, %g2
10 0+0008 <foo\+(0x|)4> clruw %g1, %g2
11 0+000c <foo\+(0x|)8> cas \[ %g1 \], %g2, %g3
12 0+0010 <foo\+(0x|)c> casl \[ %g1 \], %g2, %g3
13 0+0014 <foo\+(0x|)10> casx \[ %g1 \], %g2, %g3
14 0+0018 <foo\+(0x|)14> casxl \[ %g1 \], %g2, %g3
15 0+001c <foo\+(0x|)18> clrx \[ %g1 \+ %g2 \]
16 0+0020 <foo\+(0x|)1c> clrx \[ %g1 \]
17 0+0024 <foo\+(0x|)20> clrx \[ %g1 \+ 1 \]
18 0+0028 <foo\+(0x|)24> clrx \[ %g1 \+ 0x2a \]
19 0+002c <foo\+(0x|)28> clrx \[ 0x42 \]
20 0+0030 <foo\+(0x|)2c> signx %g1
21 0+0034 <foo\+(0x|)30> clruw %g2
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