gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2019 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "arch/arm.h"
  34 #include "nat/aarch64-linux.h"
  35 #include "nat/aarch64-linux-hw-point.h"
  36 #include "nat/aarch64-sve-linux-ptrace.h"
  37
  38 #include "elf/external.h"
  39 #include "elf/common.h"
  40
  41 #include "nat/gdb_ptrace.h"
  42 #include <sys/utsname.h>
  43 #include <asm/ptrace.h>
  44
  45 #include "gregset.h"
  46 #include "linux-tdep.h"
  47
  48 /* Defines ps_err_e, struct ps_prochandle.  */
  49 #include "gdb_proc_service.h"
  50 #include "arch-utils.h"
  51
  52 #ifndef TRAP_HWBKPT
  53 #define TRAP_HWBKPT 0x0004
  54 #endif
  55
  56 class aarch64_linux_nat_target final : public linux_nat_target
  57 {
  58 public:
  59   /* Add our register access methods.  */
  60   void fetch_registers (struct regcache *, int) override;
  61   void store_registers (struct regcache *, int) override;
  62
  63   const struct target_desc *read_description () override;
  64
  65   /* Add our hardware breakpoint and watchpoint implementation.  */
  66   int can_use_hw_breakpoint (enum bptype, int, int) override;
  67   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  68   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  69   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  70   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  71                          struct expression *) override;
  72   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  73                          struct expression *) override;
  74   bool stopped_by_watchpoint () override;
  75   bool stopped_data_address (CORE_ADDR *) override;
  76   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  77
  78   int can_do_single_step () override;
  79
  80   /* Override the GNU/Linux inferior startup hook.  */
  81   void post_startup_inferior (ptid_t) override;
  82
  83   /* Override the GNU/Linux post attach hook.  */
  84   void post_attach (int pid) override;
  85
  86   /* These three defer to common nat/ code.  */
  87   void low_new_thread (struct lwp_info *lp) override
  88   { aarch64_linux_new_thread (lp); }
  89   void low_delete_thread (struct arch_lwp_info *lp) override
  90   { aarch64_linux_delete_thread (lp); }
  91   void low_prepare_to_resume (struct lwp_info *lp) override
  92   { aarch64_linux_prepare_to_resume (lp); }
  93
  94   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  95   void low_forget_process (pid_t pid) override;
  96
  97   /* Add our siginfo layout converter.  */
  98   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  99     override;
 100
 101   struct gdbarch *thread_architecture (ptid_t) override;
 102 };
 103
 104 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
 105
 106 /* Per-process data.  We don't bind this to a per-inferior registry
 107    because of targets like x86 GNU/Linux that need to keep track of
 108    processes that aren't bound to any inferior (e.g., fork children,
 109    checkpoints).  */
 110
 111 struct aarch64_process_info
 112 {
 113   /* Linked list.  */
 114   struct aarch64_process_info *next;
 115
 116   /* The process identifier.  */
 117   pid_t pid;
 118
 119   /* Copy of aarch64 hardware debug registers.  */
 120   struct aarch64_debug_reg_state state;
 121 };
 122
 123 static struct aarch64_process_info *aarch64_process_list = NULL;
 124
 125 /* Find process data for process PID.  */
 126
 127 static struct aarch64_process_info *
 128 aarch64_find_process_pid (pid_t pid)
 129 {
 130   struct aarch64_process_info *proc;
 131
 132   for (proc = aarch64_process_list; proc; proc = proc->next)
 133     if (proc->pid == pid)
 134       return proc;
 135
 136   return NULL;
 137 }
 138
 139 /* Add process data for process PID.  Returns newly allocated info
 140    object.  */
 141
 142 static struct aarch64_process_info *
 143 aarch64_add_process (pid_t pid)
 144 {
 145   struct aarch64_process_info *proc;
 146
 147   proc = XCNEW (struct aarch64_process_info);
 148   proc->pid = pid;
 149
 150   proc->next = aarch64_process_list;
 151   aarch64_process_list = proc;
 152
 153   return proc;
 154 }
 155
 156 /* Get data specific info for process PID, creating it if necessary.
 157    Never returns NULL.  */
 158
 159 static struct aarch64_process_info *
 160 aarch64_process_info_get (pid_t pid)
 161 {
 162   struct aarch64_process_info *proc;
 163
 164   proc = aarch64_find_process_pid (pid);
 165   if (proc == NULL)
 166     proc = aarch64_add_process (pid);
 167
 168   return proc;
 169 }
 170
 171 /* Called whenever GDB is no longer debugging process PID.  It deletes
 172    data structures that keep track of debug register state.  */
 173
 174 void
 175 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 176 {
 177   struct aarch64_process_info *proc, **proc_link;
 178
 179   proc = aarch64_process_list;
 180   proc_link = &aarch64_process_list;
 181
 182   while (proc != NULL)
 183     {
 184       if (proc->pid == pid)
 185         {
 186           *proc_link = proc->next;
 187
 188           xfree (proc);
 189           return;
 190         }
 191
 192       proc_link = &proc->next;
 193       proc = *proc_link;
 194     }
 195 }
 196
 197 /* Get debug registers state for process PID.  */
 198
 199 struct aarch64_debug_reg_state *
 200 aarch64_get_debug_reg_state (pid_t pid)
 201 {
 202   return &aarch64_process_info_get (pid)->state;
 203 }
 204
 205 /* Fill GDB's register array with the general-purpose register values
 206    from the current thread.  */
 207
 208 static void
 209 fetch_gregs_from_thread (struct regcache *regcache)
 210 {
 211   int ret, tid;
 212   struct gdbarch *gdbarch = regcache->arch ();
 213   elf_gregset_t regs;
 214   struct iovec iovec;
 215
 216   /* Make sure REGS can hold all registers contents on both aarch64
 217      and arm.  */
 218   gdb_static_assert (sizeof (regs) >= 18 * 4);
 219
 220   tid = regcache->ptid ().lwp ();
 221
 222   iovec.iov_base = &regs;
 223   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 224     iovec.iov_len = 18 * 4;
 225   else
 226     iovec.iov_len = sizeof (regs);
 227
 228   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 229   if (ret < 0)
 230     perror_with_name (_("Unable to fetch general registers."));
 231
 232   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 233     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 234   else
 235     {
 236       int regno;
 237
 238       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 239         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 240     }
 241 }
 242
 243 /* Store to the current thread the valid general-purpose register
 244    values in the GDB's register array.  */
 245
 246 static void
 247 store_gregs_to_thread (const struct regcache *regcache)
 248 {
 249   int ret, tid;
 250   elf_gregset_t regs;
 251   struct iovec iovec;
 252   struct gdbarch *gdbarch = regcache->arch ();
 253
 254   /* Make sure REGS can hold all registers contents on both aarch64
 255      and arm.  */
 256   gdb_static_assert (sizeof (regs) >= 18 * 4);
 257   tid = regcache->ptid ().lwp ();
 258
 259   iovec.iov_base = &regs;
 260   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 261     iovec.iov_len = 18 * 4;
 262   else
 263     iovec.iov_len = sizeof (regs);
 264
 265   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 266   if (ret < 0)
 267     perror_with_name (_("Unable to fetch general registers."));
 268
 269   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 270     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 271   else
 272     {
 273       int regno;
 274
 275       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 276         if (REG_VALID == regcache->get_register_status (regno))
 277           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 278     }
 279
 280   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 281   if (ret < 0)
 282     perror_with_name (_("Unable to store general registers."));
 283 }
 284
 285 /* Fill GDB's register array with the fp/simd register values
 286    from the current thread.  */
 287
 288 static void
 289 fetch_fpregs_from_thread (struct regcache *regcache)
 290 {
 291   int ret, tid;
 292   elf_fpregset_t regs;
 293   struct iovec iovec;
 294   struct gdbarch *gdbarch = regcache->arch ();
 295
 296   /* Make sure REGS can hold all VFP registers contents on both aarch64
 297      and arm.  */
 298   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 299
 300   tid = regcache->ptid ().lwp ();
 301
 302   iovec.iov_base = &regs;
 303
 304   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 305     {
 306       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 307
 308       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 309       if (ret < 0)
 310         perror_with_name (_("Unable to fetch VFP registers."));
 311
 312       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 313     }
 314   else
 315     {
 316       int regno;
 317
 318       iovec.iov_len = sizeof (regs);
 319
 320       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 321       if (ret < 0)
 322         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 323
 324       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 325         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 326
 327       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 328       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 329     }
 330 }
 331
 332 /* Store to the current thread the valid fp/simd register
 333    values in the GDB's register array.  */
 334
 335 static void
 336 store_fpregs_to_thread (const struct regcache *regcache)
 337 {
 338   int ret, tid;
 339   elf_fpregset_t regs;
 340   struct iovec iovec;
 341   struct gdbarch *gdbarch = regcache->arch ();
 342
 343   /* Make sure REGS can hold all VFP registers contents on both aarch64
 344      and arm.  */
 345   gdb_static_assert (sizeof regs >= ARM_VFP3_REGS_SIZE);
 346   tid = regcache->ptid ().lwp ();
 347
 348   iovec.iov_base = &regs;
 349
 350   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 351     {
 352       iovec.iov_len = ARM_VFP3_REGS_SIZE;
 353
 354       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 355       if (ret < 0)
 356         perror_with_name (_("Unable to fetch VFP registers."));
 357
 358       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 359     }
 360   else
 361     {
 362       int regno;
 363
 364       iovec.iov_len = sizeof (regs);
 365
 366       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 367       if (ret < 0)
 368         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 369
 370       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 371         if (REG_VALID == regcache->get_register_status (regno))
 372           regcache->raw_collect
 373             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 374
 375       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 376         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 377       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 378         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 379     }
 380
 381   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 382     {
 383       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 384       if (ret < 0)
 385         perror_with_name (_("Unable to store VFP registers."));
 386     }
 387   else
 388     {
 389       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 390       if (ret < 0)
 391         perror_with_name (_("Unable to store FP/SIMD registers."));
 392     }
 393 }
 394
 395 /* Fill GDB's register array with the sve register values
 396    from the current thread.  */
 397
 398 static void
 399 fetch_sveregs_from_thread (struct regcache *regcache)
 400 {
 401   std::unique_ptr<gdb_byte[]> base
 402     = aarch64_sve_get_sveregs (regcache->ptid ().lwp ());
 403   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 404 }
 405
 406 /* Store to the current thread the valid sve register
 407    values in the GDB's register array.  */
 408
 409 static void
 410 store_sveregs_to_thread (struct regcache *regcache)
 411 {
 412   int ret;
 413   struct iovec iovec;
 414   int tid = regcache->ptid ().lwp ();
 415
 416   /* First store vector length to the thread.  This is done first to ensure the
 417      ptrace buffers read from the kernel are the correct size.  */
 418   if (!aarch64_sve_set_vq (tid, regcache))
 419     perror_with_name (_("Unable to set VG register."));
 420
 421   /* Obtain a dump of SVE registers from ptrace.  */
 422   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 423
 424   /* Overwrite with regcache state.  */
 425   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 426
 427   /* Write back to the kernel.  */
 428   iovec.iov_base = base.get ();
 429   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 430   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 431
 432   if (ret < 0)
 433     perror_with_name (_("Unable to store sve registers"));
 434 }
 435
 436 /* Fill GDB's register array with the pointer authentication mask values from
 437    the current thread.  */
 438
 439 static void
 440 fetch_pauth_masks_from_thread (struct regcache *regcache)
 441 {
 442   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 443   int ret;
 444   struct iovec iovec;
 445   uint64_t pauth_regset[2] = {0, 0};
 446   int tid = regcache->ptid ().lwp ();
 447
 448   iovec.iov_base = &pauth_regset;
 449   iovec.iov_len = sizeof (pauth_regset);
 450
 451   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_PAC_MASK, &iovec);
 452   if (ret != 0)
 453     perror_with_name (_("unable to fetch pauth registers."));
 454
 455   regcache->raw_supply (AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base),
 456                         &pauth_regset[0]);
 457   regcache->raw_supply (AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base),
 458                         &pauth_regset[1]);
 459 }
 460
 461 /* Implement the "fetch_registers" target_ops method.  */
 462
 463 void
 464 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 465                                            int regno)
 466 {
 467   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 468
 469   if (regno == -1)
 470     {
 471       fetch_gregs_from_thread (regcache);
 472       if (tdep->has_sve ())
 473         fetch_sveregs_from_thread (regcache);
 474       else
 475         fetch_fpregs_from_thread (regcache);
 476
 477       if (tdep->has_pauth ())
 478         fetch_pauth_masks_from_thread (regcache);
 479     }
 480   else if (regno < AARCH64_V0_REGNUM)
 481     fetch_gregs_from_thread (regcache);
 482   else if (tdep->has_sve ())
 483     fetch_sveregs_from_thread (regcache);
 484   else
 485     fetch_fpregs_from_thread (regcache);
 486
 487   if (tdep->has_pauth ())
 488     {
 489       if (regno == AARCH64_PAUTH_DMASK_REGNUM (tdep->pauth_reg_base)
 490           || regno == AARCH64_PAUTH_CMASK_REGNUM (tdep->pauth_reg_base))
 491         fetch_pauth_masks_from_thread (regcache);
 492     }
 493 }
 494
 495 /* Implement the "store_registers" target_ops method.  */
 496
 497 void
 498 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 499                                            int regno)
 500 {
 501   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 502
 503   if (regno == -1)
 504     {
 505       store_gregs_to_thread (regcache);
 506       if (tdep->has_sve ())
 507         store_sveregs_to_thread (regcache);
 508       else
 509         store_fpregs_to_thread (regcache);
 510     }
 511   else if (regno < AARCH64_V0_REGNUM)
 512     store_gregs_to_thread (regcache);
 513   else if (tdep->has_sve ())
 514     store_sveregs_to_thread (regcache);
 515   else
 516     store_fpregs_to_thread (regcache);
 517 }
 518
 519 /* Fill register REGNO (if it is a general-purpose register) in
 520    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 521    do this for all registers.  */
 522
 523 void
 524 fill_gregset (const struct regcache *regcache,
 525               gdb_gregset_t *gregsetp, int regno)
 526 {
 527   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 528                            regno, (gdb_byte *) gregsetp,
 529                            AARCH64_LINUX_SIZEOF_GREGSET);
 530 }
 531
 532 /* Fill GDB's register array with the general-purpose register values
 533    in *GREGSETP.  */
 534
 535 void
 536 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 537 {
 538   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 539                           (const gdb_byte *) gregsetp,
 540                           AARCH64_LINUX_SIZEOF_GREGSET);
 541 }
 542
 543 /* Fill register REGNO (if it is a floating-point register) in
 544    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 545    do this for all registers.  */
 546
 547 void
 548 fill_fpregset (const struct regcache *regcache,
 549                gdb_fpregset_t *fpregsetp, int regno)
 550 {
 551   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 552                            regno, (gdb_byte *) fpregsetp,
 553                            AARCH64_LINUX_SIZEOF_FPREGSET);
 554 }
 555
 556 /* Fill GDB's register array with the floating-point register values
 557    in *FPREGSETP.  */
 558
 559 void
 560 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 561 {
 562   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 563                           (const gdb_byte *) fpregsetp,
 564                           AARCH64_LINUX_SIZEOF_FPREGSET);
 565 }
 566
 567 /* linux_nat_new_fork hook.   */
 568
 569 void
 570 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 571                                         pid_t child_pid)
 572 {
 573   pid_t parent_pid;
 574   struct aarch64_debug_reg_state *parent_state;
 575   struct aarch64_debug_reg_state *child_state;
 576
 577   /* NULL means no watchpoint has ever been set in the parent.  In
 578      that case, there's nothing to do.  */
 579   if (parent->arch_private == NULL)
 580     return;
 581
 582   /* GDB core assumes the child inherits the watchpoints/hw
 583      breakpoints of the parent, and will remove them all from the
 584      forked off process.  Copy the debug registers mirrors into the
 585      new process so that all breakpoints and watchpoints can be
 586      removed together.  */
 587
 588   parent_pid = parent->ptid.pid ();
 589   parent_state = aarch64_get_debug_reg_state (parent_pid);
 590   child_state = aarch64_get_debug_reg_state (child_pid);
 591   *child_state = *parent_state;
 592 }
 593 \f
 594
 595 /* Called by libthread_db.  Returns a pointer to the thread local
 596    storage (or its descriptor).  */
 597
 598 ps_err_e
 599 ps_get_thread_area (struct ps_prochandle *ph,
 600                     lwpid_t lwpid, int idx, void **base)
 601 {
 602   int is_64bit_p
 603     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 604
 605   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 606 }
 607 \f
 608
 609 /* Implement the "post_startup_inferior" target_ops method.  */
 610
 611 void
 612 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 613 {
 614   low_forget_process (ptid.pid ());
 615   aarch64_linux_get_debug_reg_capacity (ptid.pid ());
 616   linux_nat_target::post_startup_inferior (ptid);
 617 }
 618
 619 /* Implement the "post_attach" target_ops method.  */
 620
 621 void
 622 aarch64_linux_nat_target::post_attach (int pid)
 623 {
 624   low_forget_process (pid);
 625   /* Set the hardware debug register capacity.  If
 626      aarch64_linux_get_debug_reg_capacity is not called
 627      (as it is in aarch64_linux_child_post_startup_inferior) then
 628      software watchpoints will be used instead of hardware
 629      watchpoints when attaching to a target.  */
 630   aarch64_linux_get_debug_reg_capacity (pid);
 631   linux_nat_target::post_attach (pid);
 632 }
 633
 634 extern struct target_desc *tdesc_arm_with_neon;
 635
 636 /* Implement the "read_description" target_ops method.  */
 637
 638 const struct target_desc *
 639 aarch64_linux_nat_target::read_description ()
 640 {
 641   int ret, tid;
 642   gdb_byte regbuf[ARM_VFP3_REGS_SIZE];
 643   struct iovec iovec;
 644
 645   tid = inferior_ptid.lwp ();
 646
 647   iovec.iov_base = regbuf;
 648   iovec.iov_len = ARM_VFP3_REGS_SIZE;
 649
 650   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 651   if (ret == 0)
 652     return tdesc_arm_with_neon;
 653
 654   CORE_ADDR hwcap = linux_get_hwcap (this);
 655
 656   return aarch64_read_description (aarch64_sve_get_vq (tid),
 657                                    hwcap & AARCH64_HWCAP_PACA);
 658 }
 659
 660 /* Convert a native/host siginfo object, into/from the siginfo in the
 661    layout of the inferiors' architecture.  Returns true if any
 662    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 663    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 664    INF.  */
 665
 666 bool
 667 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 668                                              int direction)
 669 {
 670   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 671
 672   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 673      object.  */
 674   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 675     {
 676       if (direction == 0)
 677         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 678                                              native);
 679       else
 680         aarch64_siginfo_from_compat_siginfo (native,
 681                                              (struct compat_siginfo *) inf);
 682
 683       return true;
 684     }
 685
 686   return false;
 687 }
 688
 689 /* Returns the number of hardware watchpoints of type TYPE that we can
 690    set.  Value is positive if we can set CNT watchpoints, zero if
 691    setting watchpoints of type TYPE is not supported, and negative if
 692    CNT is more than the maximum number of watchpoints of type TYPE
 693    that we can support.  TYPE is one of bp_hardware_watchpoint,
 694    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 695    CNT is the number of such watchpoints used so far (including this
 696    one).  OTHERTYPE is non-zero if other types of watchpoints are
 697    currently enabled.  */
 698
 699 int
 700 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 701                                                  int cnt, int othertype)
 702 {
 703   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 704       || type == bp_access_watchpoint || type == bp_watchpoint)
 705     {
 706       if (aarch64_num_wp_regs == 0)
 707         return 0;
 708     }
 709   else if (type == bp_hardware_breakpoint)
 710     {
 711       if (aarch64_num_bp_regs == 0)
 712         return 0;
 713     }
 714   else
 715     gdb_assert_not_reached ("unexpected breakpoint type");
 716
 717   /* We always return 1 here because we don't have enough information
 718      about possible overlap of addresses that they want to watch.  As an
 719      extreme example, consider the case where all the watchpoints watch
 720      the same address and the same region length: then we can handle a
 721      virtually unlimited number of watchpoints, due to debug register
 722      sharing implemented via reference counts.  */
 723   return 1;
 724 }
 725
 726 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 727    Return 0 on success, -1 on failure.  */
 728
 729 int
 730 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 731                                                 struct bp_target_info *bp_tgt)
 732 {
 733   int ret;
 734   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 735   int len;
 736   const enum target_hw_bp_type type = hw_execute;
 737   struct aarch64_debug_reg_state *state
 738     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 739
 740   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 741
 742   if (show_debug_regs)
 743     fprintf_unfiltered
 744       (gdb_stdlog,
 745        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 746        (unsigned long) addr, len);
 747
 748   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 749
 750   if (show_debug_regs)
 751     {
 752       aarch64_show_debug_reg_state (state,
 753                                     "insert_hw_breakpoint", addr, len, type);
 754     }
 755
 756   return ret;
 757 }
 758
 759 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 760    Return 0 on success, -1 on failure.  */
 761
 762 int
 763 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 764                                                 struct bp_target_info *bp_tgt)
 765 {
 766   int ret;
 767   CORE_ADDR addr = bp_tgt->placed_address;
 768   int len = 4;
 769   const enum target_hw_bp_type type = hw_execute;
 770   struct aarch64_debug_reg_state *state
 771     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 772
 773   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 774
 775   if (show_debug_regs)
 776     fprintf_unfiltered
 777       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 778        (unsigned long) addr, len);
 779
 780   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 781
 782   if (show_debug_regs)
 783     {
 784       aarch64_show_debug_reg_state (state,
 785                                     "remove_hw_watchpoint", addr, len, type);
 786     }
 787
 788   return ret;
 789 }
 790
 791 /* Implement the "insert_watchpoint" target_ops method.
 792
 793    Insert a watchpoint to watch a memory region which starts at
 794    address ADDR and whose length is LEN bytes.  Watch memory accesses
 795    of the type TYPE.  Return 0 on success, -1 on failure.  */
 796
 797 int
 798 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 799                                              enum target_hw_bp_type type,
 800                                              struct expression *cond)
 801 {
 802   int ret;
 803   struct aarch64_debug_reg_state *state
 804     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 805
 806   if (show_debug_regs)
 807     fprintf_unfiltered (gdb_stdlog,
 808                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 809                         (unsigned long) addr, len);
 810
 811   gdb_assert (type != hw_execute);
 812
 813   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 814
 815   if (show_debug_regs)
 816     {
 817       aarch64_show_debug_reg_state (state,
 818                                     "insert_watchpoint", addr, len, type);
 819     }
 820
 821   return ret;
 822 }
 823
 824 /* Implement the "remove_watchpoint" target_ops method.
 825    Remove a watchpoint that watched the memory region which starts at
 826    address ADDR, whose length is LEN bytes, and for accesses of the
 827    type TYPE.  Return 0 on success, -1 on failure.  */
 828
 829 int
 830 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 831                                              enum target_hw_bp_type type,
 832                                              struct expression *cond)
 833 {
 834   int ret;
 835   struct aarch64_debug_reg_state *state
 836     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 837
 838   if (show_debug_regs)
 839     fprintf_unfiltered (gdb_stdlog,
 840                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 841                         (unsigned long) addr, len);
 842
 843   gdb_assert (type != hw_execute);
 844
 845   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 846
 847   if (show_debug_regs)
 848     {
 849       aarch64_show_debug_reg_state (state,
 850                                     "remove_watchpoint", addr, len, type);
 851     }
 852
 853   return ret;
 854 }
 855
 856 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 857
 858 int
 859 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 860 {
 861   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 862 }
 863
 864 /* Implement the "stopped_data_address" target_ops method.  */
 865
 866 bool
 867 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 868 {
 869   siginfo_t siginfo;
 870   int i;
 871   struct aarch64_debug_reg_state *state;
 872
 873   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 874     return false;
 875
 876   /* This must be a hardware breakpoint.  */
 877   if (siginfo.si_signo != SIGTRAP
 878       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 879     return false;
 880
 881   /* Check if the address matches any watched address.  */
 882   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 883   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 884     {
 885       const unsigned int offset
 886         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 887       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 888       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 889       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 890       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 891       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 892
 893       if (state->dr_ref_count_wp[i]
 894           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 895           && addr_trap >= addr_watch_aligned
 896           && addr_trap < addr_watch + len)
 897         {
 898           /* ADDR_TRAP reports the first address of the memory range
 899              accessed by the CPU, regardless of what was the memory
 900              range watched.  Thus, a large CPU access that straddles
 901              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 902              ADDR_TRAP that is lower than the
 903              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 904
 905              addr: |   4   |   5   |   6   |   7   |   8   |
 906                                    |---- range watched ----|
 907                    |----------- range accessed ------------|
 908
 909              In this case, ADDR_TRAP will be 4.
 910
 911              To match a watchpoint known to GDB core, we must never
 912              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 913              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 914              positive on kernels older than 4.10.  See PR
 915              external/20207.  */
 916           *addr_p = addr_orig;
 917           return true;
 918         }
 919     }
 920
 921   return false;
 922 }
 923
 924 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 925
 926 bool
 927 aarch64_linux_nat_target::stopped_by_watchpoint ()
 928 {
 929   CORE_ADDR addr;
 930
 931   return stopped_data_address (&addr);
 932 }
 933
 934 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 935
 936 bool
 937 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 938                                                         CORE_ADDR start, int length)
 939 {
 940   return start <= addr && start + length - 1 >= addr;
 941 }
 942
 943 /* Implement the "can_do_single_step" target_ops method.  */
 944
 945 int
 946 aarch64_linux_nat_target::can_do_single_step ()
 947 {
 948   return 1;
 949 }
 950
 951 /* Implement the "thread_architecture" target_ops method.  */
 952
 953 struct gdbarch *
 954 aarch64_linux_nat_target::thread_architecture (ptid_t ptid)
 955 {
 956   /* Return the gdbarch for the current thread.  If the vector length has
 957      changed since the last time this was called, then do a further lookup.  */
 958
 959   uint64_t vq = aarch64_sve_get_vq (ptid.lwp ());
 960
 961   /* Find the current gdbarch the same way as process_stratum_target.  Only
 962      return it if the current vector length matches the one in the tdep.  */
 963   inferior *inf = find_inferior_ptid (ptid);
 964   gdb_assert (inf != NULL);
 965   if (vq == gdbarch_tdep (inf->gdbarch)->vq)
 966     return inf->gdbarch;
 967
 968   /* We reach here if the vector length for the thread is different from its
 969      value at process start.  Lookup gdbarch via info (potentially creating a
 970      new one), stashing the vector length inside id.  Use -1 for when SVE
 971      unavailable, to distinguish from an unset value of 0.  */
 972   struct gdbarch_info info;
 973   gdbarch_info_init (&info);
 974   info.bfd_arch_info = bfd_lookup_arch (bfd_arch_spu, bfd_mach_spu);
 975   info.id = (int *) (vq == 0 ? -1 : vq);
 976   return gdbarch_find_by_info (info);
 977 }
 978
 979 /* Define AArch64 maintenance commands.  */
 980
 981 static void
 982 add_show_debug_regs_command (void)
 983 {
 984   /* A maintenance command to enable printing the internal DRi mirror
 985      variables.  */
 986   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 987                            &show_debug_regs, _("\
 988 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 989 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 990 Use \"on\" to enable, \"off\" to disable.\n\
 991 If enabled, the debug registers values are shown when GDB inserts\n\
 992 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 993 triggers a breakpoint or watchpoint."),
 994                            NULL,
 995                            NULL,
 996                            &maintenance_set_cmdlist,
 997                            &maintenance_show_cmdlist);
 998 }
 999
1000 void
1001 _initialize_aarch64_linux_nat (void)
1002 {
1003   add_show_debug_regs_command ();
1004
1005   /* Register the target.  */
1006   linux_target = &the_aarch64_linux_nat_target;
1007   add_inf_child_target (&the_aarch64_linux_nat_target);
1008 }