gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2019 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35 #include "nat/aarch64-sve-linux-ptrace.h"
  36
  37 #include "elf/external.h"
  38 #include "elf/common.h"
  39
  40 #include "nat/gdb_ptrace.h"
  41 #include <sys/utsname.h>
  42 #include <asm/ptrace.h>
  43
  44 #include "gregset.h"
  45
  46 /* Defines ps_err_e, struct ps_prochandle.  */
  47 #include "gdb_proc_service.h"
  48
  49 #ifndef TRAP_HWBKPT
  50 #define TRAP_HWBKPT 0x0004
  51 #endif
  52
  53 class aarch64_linux_nat_target final : public linux_nat_target
  54 {
  55 public:
  56   /* Add our register access methods.  */
  57   void fetch_registers (struct regcache *, int) override;
  58   void store_registers (struct regcache *, int) override;
  59
  60   const struct target_desc *read_description () override;
  61
  62   /* Add our hardware breakpoint and watchpoint implementation.  */
  63   int can_use_hw_breakpoint (enum bptype, int, int) override;
  64   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  65   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  66   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  67   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  68                          struct expression *) override;
  69   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  70                          struct expression *) override;
  71   bool stopped_by_watchpoint () override;
  72   bool stopped_data_address (CORE_ADDR *) override;
  73   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  74
  75   int can_do_single_step () override;
  76
  77   /* Override the GNU/Linux inferior startup hook.  */
  78   void post_startup_inferior (ptid_t) override;
  79
  80   /* Override the GNU/Linux post attach hook.  */
  81   void post_attach (int pid) override;
  82
  83   /* These three defer to common nat/ code.  */
  84   void low_new_thread (struct lwp_info *lp) override
  85   { aarch64_linux_new_thread (lp); }
  86   void low_delete_thread (struct arch_lwp_info *lp) override
  87   { aarch64_linux_delete_thread (lp); }
  88   void low_prepare_to_resume (struct lwp_info *lp) override
  89   { aarch64_linux_prepare_to_resume (lp); }
  90
  91   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  92   void low_forget_process (pid_t pid) override;
  93
  94   /* Add our siginfo layout converter.  */
  95   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  96     override;
  97 };
  98
  99 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
 100
 101 /* Per-process data.  We don't bind this to a per-inferior registry
 102    because of targets like x86 GNU/Linux that need to keep track of
 103    processes that aren't bound to any inferior (e.g., fork children,
 104    checkpoints).  */
 105
 106 struct aarch64_process_info
 107 {
 108   /* Linked list.  */
 109   struct aarch64_process_info *next;
 110
 111   /* The process identifier.  */
 112   pid_t pid;
 113
 114   /* Copy of aarch64 hardware debug registers.  */
 115   struct aarch64_debug_reg_state state;
 116 };
 117
 118 static struct aarch64_process_info *aarch64_process_list = NULL;
 119
 120 /* Find process data for process PID.  */
 121
 122 static struct aarch64_process_info *
 123 aarch64_find_process_pid (pid_t pid)
 124 {
 125   struct aarch64_process_info *proc;
 126
 127   for (proc = aarch64_process_list; proc; proc = proc->next)
 128     if (proc->pid == pid)
 129       return proc;
 130
 131   return NULL;
 132 }
 133
 134 /* Add process data for process PID.  Returns newly allocated info
 135    object.  */
 136
 137 static struct aarch64_process_info *
 138 aarch64_add_process (pid_t pid)
 139 {
 140   struct aarch64_process_info *proc;
 141
 142   proc = XCNEW (struct aarch64_process_info);
 143   proc->pid = pid;
 144
 145   proc->next = aarch64_process_list;
 146   aarch64_process_list = proc;
 147
 148   return proc;
 149 }
 150
 151 /* Get data specific info for process PID, creating it if necessary.
 152    Never returns NULL.  */
 153
 154 static struct aarch64_process_info *
 155 aarch64_process_info_get (pid_t pid)
 156 {
 157   struct aarch64_process_info *proc;
 158
 159   proc = aarch64_find_process_pid (pid);
 160   if (proc == NULL)
 161     proc = aarch64_add_process (pid);
 162
 163   return proc;
 164 }
 165
 166 /* Called whenever GDB is no longer debugging process PID.  It deletes
 167    data structures that keep track of debug register state.  */
 168
 169 void
 170 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 171 {
 172   struct aarch64_process_info *proc, **proc_link;
 173
 174   proc = aarch64_process_list;
 175   proc_link = &aarch64_process_list;
 176
 177   while (proc != NULL)
 178     {
 179       if (proc->pid == pid)
 180         {
 181           *proc_link = proc->next;
 182
 183           xfree (proc);
 184           return;
 185         }
 186
 187       proc_link = &proc->next;
 188       proc = *proc_link;
 189     }
 190 }
 191
 192 /* Get debug registers state for process PID.  */
 193
 194 struct aarch64_debug_reg_state *
 195 aarch64_get_debug_reg_state (pid_t pid)
 196 {
 197   return &aarch64_process_info_get (pid)->state;
 198 }
 199
 200 /* Fill GDB's register array with the general-purpose register values
 201    from the current thread.  */
 202
 203 static void
 204 fetch_gregs_from_thread (struct regcache *regcache)
 205 {
 206   int ret, tid;
 207   struct gdbarch *gdbarch = regcache->arch ();
 208   elf_gregset_t regs;
 209   struct iovec iovec;
 210
 211   /* Make sure REGS can hold all registers contents on both aarch64
 212      and arm.  */
 213   gdb_static_assert (sizeof (regs) >= 18 * 4);
 214
 215   tid = regcache->ptid ().lwp ();
 216
 217   iovec.iov_base = &regs;
 218   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 219     iovec.iov_len = 18 * 4;
 220   else
 221     iovec.iov_len = sizeof (regs);
 222
 223   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 224   if (ret < 0)
 225     perror_with_name (_("Unable to fetch general registers."));
 226
 227   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 228     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 229   else
 230     {
 231       int regno;
 232
 233       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 234         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 235     }
 236 }
 237
 238 /* Store to the current thread the valid general-purpose register
 239    values in the GDB's register array.  */
 240
 241 static void
 242 store_gregs_to_thread (const struct regcache *regcache)
 243 {
 244   int ret, tid;
 245   elf_gregset_t regs;
 246   struct iovec iovec;
 247   struct gdbarch *gdbarch = regcache->arch ();
 248
 249   /* Make sure REGS can hold all registers contents on both aarch64
 250      and arm.  */
 251   gdb_static_assert (sizeof (regs) >= 18 * 4);
 252   tid = regcache->ptid ().lwp ();
 253
 254   iovec.iov_base = &regs;
 255   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 256     iovec.iov_len = 18 * 4;
 257   else
 258     iovec.iov_len = sizeof (regs);
 259
 260   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 261   if (ret < 0)
 262     perror_with_name (_("Unable to fetch general registers."));
 263
 264   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 265     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 266   else
 267     {
 268       int regno;
 269
 270       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 271         if (REG_VALID == regcache->get_register_status (regno))
 272           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 273     }
 274
 275   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 276   if (ret < 0)
 277     perror_with_name (_("Unable to store general registers."));
 278 }
 279
 280 /* Fill GDB's register array with the fp/simd register values
 281    from the current thread.  */
 282
 283 static void
 284 fetch_fpregs_from_thread (struct regcache *regcache)
 285 {
 286   int ret, tid;
 287   elf_fpregset_t regs;
 288   struct iovec iovec;
 289   struct gdbarch *gdbarch = regcache->arch ();
 290
 291   /* Make sure REGS can hold all VFP registers contents on both aarch64
 292      and arm.  */
 293   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 294
 295   tid = regcache->ptid ().lwp ();
 296
 297   iovec.iov_base = &regs;
 298
 299   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 300     {
 301       iovec.iov_len = VFP_REGS_SIZE;
 302
 303       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 304       if (ret < 0)
 305         perror_with_name (_("Unable to fetch VFP registers."));
 306
 307       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 308     }
 309   else
 310     {
 311       int regno;
 312
 313       iovec.iov_len = sizeof (regs);
 314
 315       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 316       if (ret < 0)
 317         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 318
 319       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 320         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 321
 322       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 323       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 324     }
 325 }
 326
 327 /* Store to the current thread the valid fp/simd register
 328    values in the GDB's register array.  */
 329
 330 static void
 331 store_fpregs_to_thread (const struct regcache *regcache)
 332 {
 333   int ret, tid;
 334   elf_fpregset_t regs;
 335   struct iovec iovec;
 336   struct gdbarch *gdbarch = regcache->arch ();
 337
 338   /* Make sure REGS can hold all VFP registers contents on both aarch64
 339      and arm.  */
 340   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 341   tid = regcache->ptid ().lwp ();
 342
 343   iovec.iov_base = &regs;
 344
 345   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 346     {
 347       iovec.iov_len = VFP_REGS_SIZE;
 348
 349       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 350       if (ret < 0)
 351         perror_with_name (_("Unable to fetch VFP registers."));
 352
 353       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 354     }
 355   else
 356     {
 357       int regno;
 358
 359       iovec.iov_len = sizeof (regs);
 360
 361       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 362       if (ret < 0)
 363         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 364
 365       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 366         if (REG_VALID == regcache->get_register_status (regno))
 367           regcache->raw_collect
 368             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 369
 370       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 371         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 372       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 373         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 374     }
 375
 376   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 377     {
 378       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 379       if (ret < 0)
 380         perror_with_name (_("Unable to store VFP registers."));
 381     }
 382   else
 383     {
 384       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 385       if (ret < 0)
 386         perror_with_name (_("Unable to store FP/SIMD registers."));
 387     }
 388 }
 389
 390 /* Fill GDB's register array with the sve register values
 391    from the current thread.  */
 392
 393 static void
 394 fetch_sveregs_from_thread (struct regcache *regcache)
 395 {
 396   std::unique_ptr<gdb_byte[]> base
 397     = aarch64_sve_get_sveregs (regcache->ptid ().lwp ());
 398   aarch64_sve_regs_copy_to_reg_buf (regcache, base.get ());
 399 }
 400
 401 /* Store to the current thread the valid sve register
 402    values in the GDB's register array.  */
 403
 404 static void
 405 store_sveregs_to_thread (struct regcache *regcache)
 406 {
 407   int ret;
 408   struct iovec iovec;
 409   int tid = regcache->ptid ().lwp ();
 410
 411   /* Obtain a dump of SVE registers from ptrace.  */
 412   std::unique_ptr<gdb_byte[]> base = aarch64_sve_get_sveregs (tid);
 413
 414   /* Overwrite with regcache state.  */
 415   aarch64_sve_regs_copy_from_reg_buf (regcache, base.get ());
 416
 417   /* Write back to the kernel.  */
 418   iovec.iov_base = base.get ();
 419   iovec.iov_len = ((struct user_sve_header *) base.get ())->size;
 420   ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_SVE, &iovec);
 421
 422   if (ret < 0)
 423     perror_with_name (_("Unable to store sve registers"));
 424 }
 425
 426 /* Implement the "fetch_registers" target_ops method.  */
 427
 428 void
 429 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 430                                            int regno)
 431 {
 432   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 433
 434   if (regno == -1)
 435     {
 436       fetch_gregs_from_thread (regcache);
 437       if (tdep->has_sve ())
 438         fetch_sveregs_from_thread (regcache);
 439       else
 440         fetch_fpregs_from_thread (regcache);
 441     }
 442   else if (regno < AARCH64_V0_REGNUM)
 443     fetch_gregs_from_thread (regcache);
 444   else if (tdep->has_sve ())
 445     fetch_sveregs_from_thread (regcache);
 446   else
 447     fetch_fpregs_from_thread (regcache);
 448 }
 449
 450 /* Implement the "store_registers" target_ops method.  */
 451
 452 void
 453 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 454                                            int regno)
 455 {
 456   struct gdbarch_tdep *tdep = gdbarch_tdep (regcache->arch ());
 457
 458   if (regno == -1)
 459     {
 460       store_gregs_to_thread (regcache);
 461       if (tdep->has_sve ())
 462         store_sveregs_to_thread (regcache);
 463       else
 464         store_fpregs_to_thread (regcache);
 465     }
 466   else if (regno < AARCH64_V0_REGNUM)
 467     store_gregs_to_thread (regcache);
 468   else if (tdep->has_sve ())
 469     store_sveregs_to_thread (regcache);
 470   else
 471     store_fpregs_to_thread (regcache);
 472 }
 473
 474 /* Fill register REGNO (if it is a general-purpose register) in
 475    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 476    do this for all registers.  */
 477
 478 void
 479 fill_gregset (const struct regcache *regcache,
 480               gdb_gregset_t *gregsetp, int regno)
 481 {
 482   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 483                            regno, (gdb_byte *) gregsetp,
 484                            AARCH64_LINUX_SIZEOF_GREGSET);
 485 }
 486
 487 /* Fill GDB's register array with the general-purpose register values
 488    in *GREGSETP.  */
 489
 490 void
 491 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 492 {
 493   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 494                           (const gdb_byte *) gregsetp,
 495                           AARCH64_LINUX_SIZEOF_GREGSET);
 496 }
 497
 498 /* Fill register REGNO (if it is a floating-point register) in
 499    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 500    do this for all registers.  */
 501
 502 void
 503 fill_fpregset (const struct regcache *regcache,
 504                gdb_fpregset_t *fpregsetp, int regno)
 505 {
 506   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 507                            regno, (gdb_byte *) fpregsetp,
 508                            AARCH64_LINUX_SIZEOF_FPREGSET);
 509 }
 510
 511 /* Fill GDB's register array with the floating-point register values
 512    in *FPREGSETP.  */
 513
 514 void
 515 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 516 {
 517   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 518                           (const gdb_byte *) fpregsetp,
 519                           AARCH64_LINUX_SIZEOF_FPREGSET);
 520 }
 521
 522 /* linux_nat_new_fork hook.   */
 523
 524 void
 525 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 526                                         pid_t child_pid)
 527 {
 528   pid_t parent_pid;
 529   struct aarch64_debug_reg_state *parent_state;
 530   struct aarch64_debug_reg_state *child_state;
 531
 532   /* NULL means no watchpoint has ever been set in the parent.  In
 533      that case, there's nothing to do.  */
 534   if (parent->arch_private == NULL)
 535     return;
 536
 537   /* GDB core assumes the child inherits the watchpoints/hw
 538      breakpoints of the parent, and will remove them all from the
 539      forked off process.  Copy the debug registers mirrors into the
 540      new process so that all breakpoints and watchpoints can be
 541      removed together.  */
 542
 543   parent_pid = parent->ptid.pid ();
 544   parent_state = aarch64_get_debug_reg_state (parent_pid);
 545   child_state = aarch64_get_debug_reg_state (child_pid);
 546   *child_state = *parent_state;
 547 }
 548 \f
 549
 550 /* Called by libthread_db.  Returns a pointer to the thread local
 551    storage (or its descriptor).  */
 552
 553 ps_err_e
 554 ps_get_thread_area (struct ps_prochandle *ph,
 555                     lwpid_t lwpid, int idx, void **base)
 556 {
 557   int is_64bit_p
 558     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 559
 560   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 561 }
 562 \f
 563
 564 /* Implement the "post_startup_inferior" target_ops method.  */
 565
 566 void
 567 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 568 {
 569   low_forget_process (ptid.pid ());
 570   aarch64_linux_get_debug_reg_capacity (ptid.pid ());
 571   linux_nat_target::post_startup_inferior (ptid);
 572 }
 573
 574 /* Implement the "post_attach" target_ops method.  */
 575
 576 void
 577 aarch64_linux_nat_target::post_attach (int pid)
 578 {
 579   low_forget_process (pid);
 580   /* Set the hardware debug register capacity.  If
 581      aarch64_linux_get_debug_reg_capacity is not called
 582      (as it is in aarch64_linux_child_post_startup_inferior) then
 583      software watchpoints will be used instead of hardware
 584      watchpoints when attaching to a target.  */
 585   aarch64_linux_get_debug_reg_capacity (pid);
 586   linux_nat_target::post_attach (pid);
 587 }
 588
 589 extern struct target_desc *tdesc_arm_with_neon;
 590
 591 /* Implement the "read_description" target_ops method.  */
 592
 593 const struct target_desc *
 594 aarch64_linux_nat_target::read_description ()
 595 {
 596   int ret, tid;
 597   gdb_byte regbuf[VFP_REGS_SIZE];
 598   struct iovec iovec;
 599
 600   tid = inferior_ptid.lwp ();
 601
 602   iovec.iov_base = regbuf;
 603   iovec.iov_len = VFP_REGS_SIZE;
 604
 605   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 606   if (ret == 0)
 607     return tdesc_arm_with_neon;
 608
 609   /* pauth not yet supported.  */
 610   return aarch64_read_description (aarch64_sve_get_vq (tid), false);
 611 }
 612
 613 /* Convert a native/host siginfo object, into/from the siginfo in the
 614    layout of the inferiors' architecture.  Returns true if any
 615    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 616    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 617    INF.  */
 618
 619 bool
 620 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 621                                              int direction)
 622 {
 623   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 624
 625   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 626      object.  */
 627   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 628     {
 629       if (direction == 0)
 630         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 631                                              native);
 632       else
 633         aarch64_siginfo_from_compat_siginfo (native,
 634                                              (struct compat_siginfo *) inf);
 635
 636       return true;
 637     }
 638
 639   return false;
 640 }
 641
 642 /* Returns the number of hardware watchpoints of type TYPE that we can
 643    set.  Value is positive if we can set CNT watchpoints, zero if
 644    setting watchpoints of type TYPE is not supported, and negative if
 645    CNT is more than the maximum number of watchpoints of type TYPE
 646    that we can support.  TYPE is one of bp_hardware_watchpoint,
 647    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 648    CNT is the number of such watchpoints used so far (including this
 649    one).  OTHERTYPE is non-zero if other types of watchpoints are
 650    currently enabled.  */
 651
 652 int
 653 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 654                                                  int cnt, int othertype)
 655 {
 656   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 657       || type == bp_access_watchpoint || type == bp_watchpoint)
 658     {
 659       if (aarch64_num_wp_regs == 0)
 660         return 0;
 661     }
 662   else if (type == bp_hardware_breakpoint)
 663     {
 664       if (aarch64_num_bp_regs == 0)
 665         return 0;
 666     }
 667   else
 668     gdb_assert_not_reached ("unexpected breakpoint type");
 669
 670   /* We always return 1 here because we don't have enough information
 671      about possible overlap of addresses that they want to watch.  As an
 672      extreme example, consider the case where all the watchpoints watch
 673      the same address and the same region length: then we can handle a
 674      virtually unlimited number of watchpoints, due to debug register
 675      sharing implemented via reference counts.  */
 676   return 1;
 677 }
 678
 679 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 680    Return 0 on success, -1 on failure.  */
 681
 682 int
 683 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 684                                                 struct bp_target_info *bp_tgt)
 685 {
 686   int ret;
 687   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 688   int len;
 689   const enum target_hw_bp_type type = hw_execute;
 690   struct aarch64_debug_reg_state *state
 691     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 692
 693   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 694
 695   if (show_debug_regs)
 696     fprintf_unfiltered
 697       (gdb_stdlog,
 698        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 699        (unsigned long) addr, len);
 700
 701   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 702
 703   if (show_debug_regs)
 704     {
 705       aarch64_show_debug_reg_state (state,
 706                                     "insert_hw_breakpoint", addr, len, type);
 707     }
 708
 709   return ret;
 710 }
 711
 712 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 713    Return 0 on success, -1 on failure.  */
 714
 715 int
 716 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 717                                                 struct bp_target_info *bp_tgt)
 718 {
 719   int ret;
 720   CORE_ADDR addr = bp_tgt->placed_address;
 721   int len = 4;
 722   const enum target_hw_bp_type type = hw_execute;
 723   struct aarch64_debug_reg_state *state
 724     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 725
 726   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 727
 728   if (show_debug_regs)
 729     fprintf_unfiltered
 730       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 731        (unsigned long) addr, len);
 732
 733   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 734
 735   if (show_debug_regs)
 736     {
 737       aarch64_show_debug_reg_state (state,
 738                                     "remove_hw_watchpoint", addr, len, type);
 739     }
 740
 741   return ret;
 742 }
 743
 744 /* Implement the "insert_watchpoint" target_ops method.
 745
 746    Insert a watchpoint to watch a memory region which starts at
 747    address ADDR and whose length is LEN bytes.  Watch memory accesses
 748    of the type TYPE.  Return 0 on success, -1 on failure.  */
 749
 750 int
 751 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 752                                              enum target_hw_bp_type type,
 753                                              struct expression *cond)
 754 {
 755   int ret;
 756   struct aarch64_debug_reg_state *state
 757     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 758
 759   if (show_debug_regs)
 760     fprintf_unfiltered (gdb_stdlog,
 761                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 762                         (unsigned long) addr, len);
 763
 764   gdb_assert (type != hw_execute);
 765
 766   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 767
 768   if (show_debug_regs)
 769     {
 770       aarch64_show_debug_reg_state (state,
 771                                     "insert_watchpoint", addr, len, type);
 772     }
 773
 774   return ret;
 775 }
 776
 777 /* Implement the "remove_watchpoint" target_ops method.
 778    Remove a watchpoint that watched the memory region which starts at
 779    address ADDR, whose length is LEN bytes, and for accesses of the
 780    type TYPE.  Return 0 on success, -1 on failure.  */
 781
 782 int
 783 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 784                                              enum target_hw_bp_type type,
 785                                              struct expression *cond)
 786 {
 787   int ret;
 788   struct aarch64_debug_reg_state *state
 789     = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 790
 791   if (show_debug_regs)
 792     fprintf_unfiltered (gdb_stdlog,
 793                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 794                         (unsigned long) addr, len);
 795
 796   gdb_assert (type != hw_execute);
 797
 798   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 799
 800   if (show_debug_regs)
 801     {
 802       aarch64_show_debug_reg_state (state,
 803                                     "remove_watchpoint", addr, len, type);
 804     }
 805
 806   return ret;
 807 }
 808
 809 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 810
 811 int
 812 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 813 {
 814   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 815 }
 816
 817 /* Implement the "stopped_data_address" target_ops method.  */
 818
 819 bool
 820 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 821 {
 822   siginfo_t siginfo;
 823   int i;
 824   struct aarch64_debug_reg_state *state;
 825
 826   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 827     return false;
 828
 829   /* This must be a hardware breakpoint.  */
 830   if (siginfo.si_signo != SIGTRAP
 831       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 832     return false;
 833
 834   /* Check if the address matches any watched address.  */
 835   state = aarch64_get_debug_reg_state (inferior_ptid.pid ());
 836   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 837     {
 838       const unsigned int offset
 839         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 840       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 841       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 842       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 843       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 844       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 845
 846       if (state->dr_ref_count_wp[i]
 847           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 848           && addr_trap >= addr_watch_aligned
 849           && addr_trap < addr_watch + len)
 850         {
 851           /* ADDR_TRAP reports the first address of the memory range
 852              accessed by the CPU, regardless of what was the memory
 853              range watched.  Thus, a large CPU access that straddles
 854              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 855              ADDR_TRAP that is lower than the
 856              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 857
 858              addr: |   4   |   5   |   6   |   7   |   8   |
 859                                    |---- range watched ----|
 860                    |----------- range accessed ------------|
 861
 862              In this case, ADDR_TRAP will be 4.
 863
 864              To match a watchpoint known to GDB core, we must never
 865              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 866              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 867              positive on kernels older than 4.10.  See PR
 868              external/20207.  */
 869           *addr_p = addr_orig;
 870           return true;
 871         }
 872     }
 873
 874   return false;
 875 }
 876
 877 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 878
 879 bool
 880 aarch64_linux_nat_target::stopped_by_watchpoint ()
 881 {
 882   CORE_ADDR addr;
 883
 884   return stopped_data_address (&addr);
 885 }
 886
 887 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 888
 889 bool
 890 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 891                                                         CORE_ADDR start, int length)
 892 {
 893   return start <= addr && start + length - 1 >= addr;
 894 }
 895
 896 /* Implement the "can_do_single_step" target_ops method.  */
 897
 898 int
 899 aarch64_linux_nat_target::can_do_single_step ()
 900 {
 901   return 1;
 902 }
 903
 904 /* Define AArch64 maintenance commands.  */
 905
 906 static void
 907 add_show_debug_regs_command (void)
 908 {
 909   /* A maintenance command to enable printing the internal DRi mirror
 910      variables.  */
 911   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 912                            &show_debug_regs, _("\
 913 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 914 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 915 Use \"on\" to enable, \"off\" to disable.\n\
 916 If enabled, the debug registers values are shown when GDB inserts\n\
 917 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 918 triggers a breakpoint or watchpoint."),
 919                            NULL,
 920                            NULL,
 921                            &maintenance_set_cmdlist,
 922                            &maintenance_show_cmdlist);
 923 }
 924
 925 void
 926 _initialize_aarch64_linux_nat (void)
 927 {
 928   add_show_debug_regs_command ();
 929
 930   /* Register the target.  */
 931   linux_target = &the_aarch64_linux_nat_target;
 932   add_inf_child_target (&the_aarch64_linux_nat_target);
 933 }