1 /* Native-dependent code for GNU/Linux AArch64.
3 Copyright (C) 2011-2019 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
26 #include "linux-nat.h"
27 #include "target-descriptions.h"
30 #include "aarch64-tdep.h"
31 #include "aarch64-linux-tdep.h"
32 #include "aarch32-linux-nat.h"
33 #include "nat/aarch64-linux.h"
34 #include "nat/aarch64-linux-hw-point.h"
35 #include "nat/aarch64-sve-linux-ptrace.h"
37 #include "elf/external.h"
38 #include "elf/common.h"
40 #include "nat/gdb_ptrace.h"
41 #include <sys/utsname.h>
42 #include <asm/ptrace.h>
46 /* Defines ps_err_e, struct ps_prochandle. */
47 #include "gdb_proc_service.h"
50 #define TRAP_HWBKPT 0x0004
53 class aarch64_linux_nat_target final
: public linux_nat_target
56 /* Add our register access methods. */
57 void fetch_registers (struct regcache
*, int) override
;
58 void store_registers (struct regcache
*, int) override
;
60 const struct target_desc
*read_description () override
;
62 /* Add our hardware breakpoint and watchpoint implementation. */
63 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
64 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
65 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
66 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
67 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
68 struct expression
*) override
;
69 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
70 struct expression
*) override
;
71 bool stopped_by_watchpoint () override
;
72 bool stopped_data_address (CORE_ADDR
*) override
;
73 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
75 int can_do_single_step () override
;
77 /* Override the GNU/Linux inferior startup hook. */
78 void post_startup_inferior (ptid_t
) override
;
80 /* Override the GNU/Linux post attach hook. */
81 void post_attach (int pid
) override
;
83 /* These three defer to common nat/ code. */
84 void low_new_thread (struct lwp_info
*lp
) override
85 { aarch64_linux_new_thread (lp
); }
86 void low_delete_thread (struct arch_lwp_info
*lp
) override
87 { aarch64_linux_delete_thread (lp
); }
88 void low_prepare_to_resume (struct lwp_info
*lp
) override
89 { aarch64_linux_prepare_to_resume (lp
); }
91 void low_new_fork (struct lwp_info
*parent
, pid_t child_pid
) override
;
92 void low_forget_process (pid_t pid
) override
;
94 /* Add our siginfo layout converter. */
95 bool low_siginfo_fixup (siginfo_t
*ptrace
, gdb_byte
*inf
, int direction
)
99 static aarch64_linux_nat_target the_aarch64_linux_nat_target
;
101 /* Per-process data. We don't bind this to a per-inferior registry
102 because of targets like x86 GNU/Linux that need to keep track of
103 processes that aren't bound to any inferior (e.g., fork children,
106 struct aarch64_process_info
109 struct aarch64_process_info
*next
;
111 /* The process identifier. */
114 /* Copy of aarch64 hardware debug registers. */
115 struct aarch64_debug_reg_state state
;
118 static struct aarch64_process_info
*aarch64_process_list
= NULL
;
120 /* Find process data for process PID. */
122 static struct aarch64_process_info
*
123 aarch64_find_process_pid (pid_t pid
)
125 struct aarch64_process_info
*proc
;
127 for (proc
= aarch64_process_list
; proc
; proc
= proc
->next
)
128 if (proc
->pid
== pid
)
134 /* Add process data for process PID. Returns newly allocated info
137 static struct aarch64_process_info
*
138 aarch64_add_process (pid_t pid
)
140 struct aarch64_process_info
*proc
;
142 proc
= XCNEW (struct aarch64_process_info
);
145 proc
->next
= aarch64_process_list
;
146 aarch64_process_list
= proc
;
151 /* Get data specific info for process PID, creating it if necessary.
152 Never returns NULL. */
154 static struct aarch64_process_info
*
155 aarch64_process_info_get (pid_t pid
)
157 struct aarch64_process_info
*proc
;
159 proc
= aarch64_find_process_pid (pid
);
161 proc
= aarch64_add_process (pid
);
166 /* Called whenever GDB is no longer debugging process PID. It deletes
167 data structures that keep track of debug register state. */
170 aarch64_linux_nat_target::low_forget_process (pid_t pid
)
172 struct aarch64_process_info
*proc
, **proc_link
;
174 proc
= aarch64_process_list
;
175 proc_link
= &aarch64_process_list
;
179 if (proc
->pid
== pid
)
181 *proc_link
= proc
->next
;
187 proc_link
= &proc
->next
;
192 /* Get debug registers state for process PID. */
194 struct aarch64_debug_reg_state
*
195 aarch64_get_debug_reg_state (pid_t pid
)
197 return &aarch64_process_info_get (pid
)->state
;
200 /* Fill GDB's register array with the general-purpose register values
201 from the current thread. */
204 fetch_gregs_from_thread (struct regcache
*regcache
)
207 struct gdbarch
*gdbarch
= regcache
->arch ();
211 /* Make sure REGS can hold all registers contents on both aarch64
213 gdb_static_assert (sizeof (regs
) >= 18 * 4);
215 tid
= regcache
->ptid ().lwp ();
217 iovec
.iov_base
= ®s
;
218 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
219 iovec
.iov_len
= 18 * 4;
221 iovec
.iov_len
= sizeof (regs
);
223 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iovec
);
225 perror_with_name (_("Unable to fetch general registers."));
227 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
228 aarch32_gp_regcache_supply (regcache
, (uint32_t *) regs
, 1);
233 for (regno
= AARCH64_X0_REGNUM
; regno
<= AARCH64_CPSR_REGNUM
; regno
++)
234 regcache
->raw_supply (regno
, ®s
[regno
- AARCH64_X0_REGNUM
]);
238 /* Store to the current thread the valid general-purpose register
239 values in the GDB's register array. */
242 store_gregs_to_thread (const struct regcache
*regcache
)
247 struct gdbarch
*gdbarch
= regcache
->arch ();
249 /* Make sure REGS can hold all registers contents on both aarch64
251 gdb_static_assert (sizeof (regs
) >= 18 * 4);
252 tid
= regcache
->ptid ().lwp ();
254 iovec
.iov_base
= ®s
;
255 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
256 iovec
.iov_len
= 18 * 4;
258 iovec
.iov_len
= sizeof (regs
);
260 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iovec
);
262 perror_with_name (_("Unable to fetch general registers."));
264 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
265 aarch32_gp_regcache_collect (regcache
, (uint32_t *) regs
, 1);
270 for (regno
= AARCH64_X0_REGNUM
; regno
<= AARCH64_CPSR_REGNUM
; regno
++)
271 if (REG_VALID
== regcache
->get_register_status (regno
))
272 regcache
->raw_collect (regno
, ®s
[regno
- AARCH64_X0_REGNUM
]);
275 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_PRSTATUS
, &iovec
);
277 perror_with_name (_("Unable to store general registers."));
280 /* Fill GDB's register array with the fp/simd register values
281 from the current thread. */
284 fetch_fpregs_from_thread (struct regcache
*regcache
)
289 struct gdbarch
*gdbarch
= regcache
->arch ();
291 /* Make sure REGS can hold all VFP registers contents on both aarch64
293 gdb_static_assert (sizeof regs
>= VFP_REGS_SIZE
);
295 tid
= regcache
->ptid ().lwp ();
297 iovec
.iov_base
= ®s
;
299 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
301 iovec
.iov_len
= VFP_REGS_SIZE
;
303 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iovec
);
305 perror_with_name (_("Unable to fetch VFP registers."));
307 aarch32_vfp_regcache_supply (regcache
, (gdb_byte
*) ®s
, 32);
313 iovec
.iov_len
= sizeof (regs
);
315 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iovec
);
317 perror_with_name (_("Unable to fetch vFP/SIMD registers."));
319 for (regno
= AARCH64_V0_REGNUM
; regno
<= AARCH64_V31_REGNUM
; regno
++)
320 regcache
->raw_supply (regno
, ®s
.vregs
[regno
- AARCH64_V0_REGNUM
]);
322 regcache
->raw_supply (AARCH64_FPSR_REGNUM
, ®s
.fpsr
);
323 regcache
->raw_supply (AARCH64_FPCR_REGNUM
, ®s
.fpcr
);
327 /* Store to the current thread the valid fp/simd register
328 values in the GDB's register array. */
331 store_fpregs_to_thread (const struct regcache
*regcache
)
336 struct gdbarch
*gdbarch
= regcache
->arch ();
338 /* Make sure REGS can hold all VFP registers contents on both aarch64
340 gdb_static_assert (sizeof regs
>= VFP_REGS_SIZE
);
341 tid
= regcache
->ptid ().lwp ();
343 iovec
.iov_base
= ®s
;
345 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
347 iovec
.iov_len
= VFP_REGS_SIZE
;
349 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iovec
);
351 perror_with_name (_("Unable to fetch VFP registers."));
353 aarch32_vfp_regcache_collect (regcache
, (gdb_byte
*) ®s
, 32);
359 iovec
.iov_len
= sizeof (regs
);
361 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iovec
);
363 perror_with_name (_("Unable to fetch FP/SIMD registers."));
365 for (regno
= AARCH64_V0_REGNUM
; regno
<= AARCH64_V31_REGNUM
; regno
++)
366 if (REG_VALID
== regcache
->get_register_status (regno
))
367 regcache
->raw_collect
368 (regno
, (char *) ®s
.vregs
[regno
- AARCH64_V0_REGNUM
]);
370 if (REG_VALID
== regcache
->get_register_status (AARCH64_FPSR_REGNUM
))
371 regcache
->raw_collect (AARCH64_FPSR_REGNUM
, (char *) ®s
.fpsr
);
372 if (REG_VALID
== regcache
->get_register_status (AARCH64_FPCR_REGNUM
))
373 regcache
->raw_collect (AARCH64_FPCR_REGNUM
, (char *) ®s
.fpcr
);
376 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
378 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_ARM_VFP
, &iovec
);
380 perror_with_name (_("Unable to store VFP registers."));
384 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_FPREGSET
, &iovec
);
386 perror_with_name (_("Unable to store FP/SIMD registers."));
390 /* Fill GDB's register array with the sve register values
391 from the current thread. */
394 fetch_sveregs_from_thread (struct regcache
*regcache
)
396 std::unique_ptr
<gdb_byte
[]> base
397 = aarch64_sve_get_sveregs (regcache
->ptid ().lwp ());
398 aarch64_sve_regs_copy_to_reg_buf (regcache
, base
.get ());
401 /* Store to the current thread the valid sve register
402 values in the GDB's register array. */
405 store_sveregs_to_thread (struct regcache
*regcache
)
409 int tid
= regcache
->ptid ().lwp ();
411 /* Obtain a dump of SVE registers from ptrace. */
412 std::unique_ptr
<gdb_byte
[]> base
= aarch64_sve_get_sveregs (tid
);
414 /* Overwrite with regcache state. */
415 aarch64_sve_regs_copy_from_reg_buf (regcache
, base
.get ());
417 /* Write back to the kernel. */
418 iovec
.iov_base
= base
.get ();
419 iovec
.iov_len
= ((struct user_sve_header
*) base
.get ())->size
;
420 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_ARM_SVE
, &iovec
);
423 perror_with_name (_("Unable to store sve registers"));
426 /* Fill GDB's register array with the pointer authentication mask values from
427 the current thread. */
430 fetch_pauth_masks_from_thread (struct regcache
*regcache
)
432 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
435 uint64_t pauth_regset
[2] = {0, 0};
436 int tid
= regcache
->ptid ().lwp ();
438 iovec
.iov_base
= &pauth_regset
;
439 iovec
.iov_len
= sizeof (pauth_regset
);
441 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_PAC_MASK
, &iovec
);
443 perror_with_name (_("unable to fetch pauth registers."));
445 regcache
->raw_supply (AARCH64_PAUTH_DMASK_REGNUM (tdep
->pauth_reg_base
),
447 regcache
->raw_supply (AARCH64_PAUTH_CMASK_REGNUM (tdep
->pauth_reg_base
),
451 /* Implement the "fetch_registers" target_ops method. */
454 aarch64_linux_nat_target::fetch_registers (struct regcache
*regcache
,
457 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
461 fetch_gregs_from_thread (regcache
);
462 if (tdep
->has_sve ())
463 fetch_sveregs_from_thread (regcache
);
465 fetch_fpregs_from_thread (regcache
);
467 if (tdep
->has_pauth ())
468 fetch_pauth_masks_from_thread (regcache
);
470 else if (regno
< AARCH64_V0_REGNUM
)
471 fetch_gregs_from_thread (regcache
);
472 else if (tdep
->has_sve ())
473 fetch_sveregs_from_thread (regcache
);
475 fetch_fpregs_from_thread (regcache
);
477 if (tdep
->has_pauth ())
479 if (regno
== AARCH64_PAUTH_DMASK_REGNUM (tdep
->pauth_reg_base
)
480 || regno
== AARCH64_PAUTH_CMASK_REGNUM (tdep
->pauth_reg_base
))
481 fetch_pauth_masks_from_thread (regcache
);
485 /* Implement the "store_registers" target_ops method. */
488 aarch64_linux_nat_target::store_registers (struct regcache
*regcache
,
491 struct gdbarch_tdep
*tdep
= gdbarch_tdep (regcache
->arch ());
495 store_gregs_to_thread (regcache
);
496 if (tdep
->has_sve ())
497 store_sveregs_to_thread (regcache
);
499 store_fpregs_to_thread (regcache
);
501 else if (regno
< AARCH64_V0_REGNUM
)
502 store_gregs_to_thread (regcache
);
503 else if (tdep
->has_sve ())
504 store_sveregs_to_thread (regcache
);
506 store_fpregs_to_thread (regcache
);
509 /* Fill register REGNO (if it is a general-purpose register) in
510 *GREGSETPS with the value in GDB's register array. If REGNO is -1,
511 do this for all registers. */
514 fill_gregset (const struct regcache
*regcache
,
515 gdb_gregset_t
*gregsetp
, int regno
)
517 regcache_collect_regset (&aarch64_linux_gregset
, regcache
,
518 regno
, (gdb_byte
*) gregsetp
,
519 AARCH64_LINUX_SIZEOF_GREGSET
);
522 /* Fill GDB's register array with the general-purpose register values
526 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
528 regcache_supply_regset (&aarch64_linux_gregset
, regcache
, -1,
529 (const gdb_byte
*) gregsetp
,
530 AARCH64_LINUX_SIZEOF_GREGSET
);
533 /* Fill register REGNO (if it is a floating-point register) in
534 *FPREGSETP with the value in GDB's register array. If REGNO is -1,
535 do this for all registers. */
538 fill_fpregset (const struct regcache
*regcache
,
539 gdb_fpregset_t
*fpregsetp
, int regno
)
541 regcache_collect_regset (&aarch64_linux_fpregset
, regcache
,
542 regno
, (gdb_byte
*) fpregsetp
,
543 AARCH64_LINUX_SIZEOF_FPREGSET
);
546 /* Fill GDB's register array with the floating-point register values
550 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
552 regcache_supply_regset (&aarch64_linux_fpregset
, regcache
, -1,
553 (const gdb_byte
*) fpregsetp
,
554 AARCH64_LINUX_SIZEOF_FPREGSET
);
557 /* linux_nat_new_fork hook. */
560 aarch64_linux_nat_target::low_new_fork (struct lwp_info
*parent
,
564 struct aarch64_debug_reg_state
*parent_state
;
565 struct aarch64_debug_reg_state
*child_state
;
567 /* NULL means no watchpoint has ever been set in the parent. In
568 that case, there's nothing to do. */
569 if (parent
->arch_private
== NULL
)
572 /* GDB core assumes the child inherits the watchpoints/hw
573 breakpoints of the parent, and will remove them all from the
574 forked off process. Copy the debug registers mirrors into the
575 new process so that all breakpoints and watchpoints can be
578 parent_pid
= parent
->ptid
.pid ();
579 parent_state
= aarch64_get_debug_reg_state (parent_pid
);
580 child_state
= aarch64_get_debug_reg_state (child_pid
);
581 *child_state
= *parent_state
;
585 /* Called by libthread_db. Returns a pointer to the thread local
586 storage (or its descriptor). */
589 ps_get_thread_area (struct ps_prochandle
*ph
,
590 lwpid_t lwpid
, int idx
, void **base
)
593 = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word
== 64);
595 return aarch64_ps_get_thread_area (ph
, lwpid
, idx
, base
, is_64bit_p
);
599 /* Implement the "post_startup_inferior" target_ops method. */
602 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid
)
604 low_forget_process (ptid
.pid ());
605 aarch64_linux_get_debug_reg_capacity (ptid
.pid ());
606 linux_nat_target::post_startup_inferior (ptid
);
609 /* Implement the "post_attach" target_ops method. */
612 aarch64_linux_nat_target::post_attach (int pid
)
614 low_forget_process (pid
);
615 /* Set the hardware debug register capacity. If
616 aarch64_linux_get_debug_reg_capacity is not called
617 (as it is in aarch64_linux_child_post_startup_inferior) then
618 software watchpoints will be used instead of hardware
619 watchpoints when attaching to a target. */
620 aarch64_linux_get_debug_reg_capacity (pid
);
621 linux_nat_target::post_attach (pid
);
624 extern struct target_desc
*tdesc_arm_with_neon
;
626 /* Implement the "read_description" target_ops method. */
628 const struct target_desc
*
629 aarch64_linux_nat_target::read_description ()
632 gdb_byte regbuf
[VFP_REGS_SIZE
];
635 tid
= inferior_ptid
.lwp ();
637 iovec
.iov_base
= regbuf
;
638 iovec
.iov_len
= VFP_REGS_SIZE
;
640 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iovec
);
642 return tdesc_arm_with_neon
;
645 bool pauth_p
= aarch64_linux_get_hwcap (this, &hwcap
)
646 && (hwcap
& AARCH64_HWCAP_PACA
);
648 return aarch64_read_description (aarch64_sve_get_vq (tid
), pauth_p
);
651 /* Convert a native/host siginfo object, into/from the siginfo in the
652 layout of the inferiors' architecture. Returns true if any
653 conversion was done; false otherwise. If DIRECTION is 1, then copy
654 from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
658 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t
*native
, gdb_byte
*inf
,
661 struct gdbarch
*gdbarch
= get_frame_arch (get_current_frame ());
663 /* Is the inferior 32-bit? If so, then do fixup the siginfo
665 if (gdbarch_bfd_arch_info (gdbarch
)->bits_per_word
== 32)
668 aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo
*) inf
,
671 aarch64_siginfo_from_compat_siginfo (native
,
672 (struct compat_siginfo
*) inf
);
680 /* Returns the number of hardware watchpoints of type TYPE that we can
681 set. Value is positive if we can set CNT watchpoints, zero if
682 setting watchpoints of type TYPE is not supported, and negative if
683 CNT is more than the maximum number of watchpoints of type TYPE
684 that we can support. TYPE is one of bp_hardware_watchpoint,
685 bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
686 CNT is the number of such watchpoints used so far (including this
687 one). OTHERTYPE is non-zero if other types of watchpoints are
688 currently enabled. */
691 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type
,
692 int cnt
, int othertype
)
694 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
695 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
697 if (aarch64_num_wp_regs
== 0)
700 else if (type
== bp_hardware_breakpoint
)
702 if (aarch64_num_bp_regs
== 0)
706 gdb_assert_not_reached ("unexpected breakpoint type");
708 /* We always return 1 here because we don't have enough information
709 about possible overlap of addresses that they want to watch. As an
710 extreme example, consider the case where all the watchpoints watch
711 the same address and the same region length: then we can handle a
712 virtually unlimited number of watchpoints, due to debug register
713 sharing implemented via reference counts. */
717 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
718 Return 0 on success, -1 on failure. */
721 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
722 struct bp_target_info
*bp_tgt
)
725 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
727 const enum target_hw_bp_type type
= hw_execute
;
728 struct aarch64_debug_reg_state
*state
729 = aarch64_get_debug_reg_state (inferior_ptid
.pid ());
731 gdbarch_breakpoint_from_pc (gdbarch
, &addr
, &len
);
736 "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
737 (unsigned long) addr
, len
);
739 ret
= aarch64_handle_breakpoint (type
, addr
, len
, 1 /* is_insert */, state
);
743 aarch64_show_debug_reg_state (state
,
744 "insert_hw_breakpoint", addr
, len
, type
);
750 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
751 Return 0 on success, -1 on failure. */
754 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
755 struct bp_target_info
*bp_tgt
)
758 CORE_ADDR addr
= bp_tgt
->placed_address
;
760 const enum target_hw_bp_type type
= hw_execute
;
761 struct aarch64_debug_reg_state
*state
762 = aarch64_get_debug_reg_state (inferior_ptid
.pid ());
764 gdbarch_breakpoint_from_pc (gdbarch
, &addr
, &len
);
768 (gdb_stdlog
, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
769 (unsigned long) addr
, len
);
771 ret
= aarch64_handle_breakpoint (type
, addr
, len
, 0 /* is_insert */, state
);
775 aarch64_show_debug_reg_state (state
,
776 "remove_hw_watchpoint", addr
, len
, type
);
782 /* Implement the "insert_watchpoint" target_ops method.
784 Insert a watchpoint to watch a memory region which starts at
785 address ADDR and whose length is LEN bytes. Watch memory accesses
786 of the type TYPE. Return 0 on success, -1 on failure. */
789 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
790 enum target_hw_bp_type type
,
791 struct expression
*cond
)
794 struct aarch64_debug_reg_state
*state
795 = aarch64_get_debug_reg_state (inferior_ptid
.pid ());
798 fprintf_unfiltered (gdb_stdlog
,
799 "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
800 (unsigned long) addr
, len
);
802 gdb_assert (type
!= hw_execute
);
804 ret
= aarch64_handle_watchpoint (type
, addr
, len
, 1 /* is_insert */, state
);
808 aarch64_show_debug_reg_state (state
,
809 "insert_watchpoint", addr
, len
, type
);
815 /* Implement the "remove_watchpoint" target_ops method.
816 Remove a watchpoint that watched the memory region which starts at
817 address ADDR, whose length is LEN bytes, and for accesses of the
818 type TYPE. Return 0 on success, -1 on failure. */
821 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr
, int len
,
822 enum target_hw_bp_type type
,
823 struct expression
*cond
)
826 struct aarch64_debug_reg_state
*state
827 = aarch64_get_debug_reg_state (inferior_ptid
.pid ());
830 fprintf_unfiltered (gdb_stdlog
,
831 "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
832 (unsigned long) addr
, len
);
834 gdb_assert (type
!= hw_execute
);
836 ret
= aarch64_handle_watchpoint (type
, addr
, len
, 0 /* is_insert */, state
);
840 aarch64_show_debug_reg_state (state
,
841 "remove_watchpoint", addr
, len
, type
);
847 /* Implement the "region_ok_for_hw_watchpoint" target_ops method. */
850 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
852 return aarch64_linux_region_ok_for_watchpoint (addr
, len
);
855 /* Implement the "stopped_data_address" target_ops method. */
858 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
862 struct aarch64_debug_reg_state
*state
;
864 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
867 /* This must be a hardware breakpoint. */
868 if (siginfo
.si_signo
!= SIGTRAP
869 || (siginfo
.si_code
& 0xffff) != TRAP_HWBKPT
)
872 /* Check if the address matches any watched address. */
873 state
= aarch64_get_debug_reg_state (inferior_ptid
.pid ());
874 for (i
= aarch64_num_wp_regs
- 1; i
>= 0; --i
)
876 const unsigned int offset
877 = aarch64_watchpoint_offset (state
->dr_ctrl_wp
[i
]);
878 const unsigned int len
= aarch64_watchpoint_length (state
->dr_ctrl_wp
[i
]);
879 const CORE_ADDR addr_trap
= (CORE_ADDR
) siginfo
.si_addr
;
880 const CORE_ADDR addr_watch
= state
->dr_addr_wp
[i
] + offset
;
881 const CORE_ADDR addr_watch_aligned
= align_down (state
->dr_addr_wp
[i
], 8);
882 const CORE_ADDR addr_orig
= state
->dr_addr_orig_wp
[i
];
884 if (state
->dr_ref_count_wp
[i
]
885 && DR_CONTROL_ENABLED (state
->dr_ctrl_wp
[i
])
886 && addr_trap
>= addr_watch_aligned
887 && addr_trap
< addr_watch
+ len
)
889 /* ADDR_TRAP reports the first address of the memory range
890 accessed by the CPU, regardless of what was the memory
891 range watched. Thus, a large CPU access that straddles
892 the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
893 ADDR_TRAP that is lower than the
894 ADDR_WATCH..ADDR_WATCH+LEN range. E.g.:
896 addr: | 4 | 5 | 6 | 7 | 8 |
897 |---- range watched ----|
898 |----------- range accessed ------------|
900 In this case, ADDR_TRAP will be 4.
902 To match a watchpoint known to GDB core, we must never
903 report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
904 range. ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
905 positive on kernels older than 4.10. See PR
915 /* Implement the "stopped_by_watchpoint" target_ops method. */
918 aarch64_linux_nat_target::stopped_by_watchpoint ()
922 return stopped_data_address (&addr
);
925 /* Implement the "watchpoint_addr_within_range" target_ops method. */
928 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
929 CORE_ADDR start
, int length
)
931 return start
<= addr
&& start
+ length
- 1 >= addr
;
934 /* Implement the "can_do_single_step" target_ops method. */
937 aarch64_linux_nat_target::can_do_single_step ()
942 /* Define AArch64 maintenance commands. */
945 add_show_debug_regs_command (void)
947 /* A maintenance command to enable printing the internal DRi mirror
949 add_setshow_boolean_cmd ("show-debug-regs", class_maintenance
,
950 &show_debug_regs
, _("\
951 Set whether to show variables that mirror the AArch64 debug registers."), _("\
952 Show whether to show variables that mirror the AArch64 debug registers."), _("\
953 Use \"on\" to enable, \"off\" to disable.\n\
954 If enabled, the debug registers values are shown when GDB inserts\n\
955 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
956 triggers a breakpoint or watchpoint."),
959 &maintenance_set_cmdlist
,
960 &maintenance_show_cmdlist
);
964 _initialize_aarch64_linux_nat (void)
966 add_show_debug_regs_command ();
968 /* Register the target. */
969 linux_target
= &the_aarch64_linux_nat_target
;
970 add_inf_child_target (&the_aarch64_linux_nat_target
);