gdb/aarch64-linux-nat.c

   1 /* Native-dependent code for GNU/Linux AArch64.
   2
   3    Copyright (C) 2011-2018 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 3 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  20
  21 #include "defs.h"
  22
  23 #include "inferior.h"
  24 #include "gdbcore.h"
  25 #include "regcache.h"
  26 #include "linux-nat.h"
  27 #include "target-descriptions.h"
  28 #include "auxv.h"
  29 #include "gdbcmd.h"
  30 #include "aarch64-tdep.h"
  31 #include "aarch64-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33 #include "nat/aarch64-linux.h"
  34 #include "nat/aarch64-linux-hw-point.h"
  35 #include "nat/aarch64-sve-linux-ptrace.h"
  36
  37 #include "elf/external.h"
  38 #include "elf/common.h"
  39
  40 #include "nat/gdb_ptrace.h"
  41 #include <sys/utsname.h>
  42 #include <asm/ptrace.h>
  43
  44 #include "gregset.h"
  45
  46 /* Defines ps_err_e, struct ps_prochandle.  */
  47 #include "gdb_proc_service.h"
  48
  49 #ifndef TRAP_HWBKPT
  50 #define TRAP_HWBKPT 0x0004
  51 #endif
  52
  53 class aarch64_linux_nat_target final : public linux_nat_target
  54 {
  55 public:
  56   /* Add our register access methods.  */
  57   void fetch_registers (struct regcache *, int) override;
  58   void store_registers (struct regcache *, int) override;
  59
  60   const struct target_desc *read_description () override;
  61
  62   /* Add our hardware breakpoint and watchpoint implementation.  */
  63   int can_use_hw_breakpoint (enum bptype, int, int) override;
  64   int insert_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  65   int remove_hw_breakpoint (struct gdbarch *, struct bp_target_info *) override;
  66   int region_ok_for_hw_watchpoint (CORE_ADDR, int) override;
  67   int insert_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  68                          struct expression *) override;
  69   int remove_watchpoint (CORE_ADDR, int, enum target_hw_bp_type,
  70                          struct expression *) override;
  71   bool stopped_by_watchpoint () override;
  72   bool stopped_data_address (CORE_ADDR *) override;
  73   bool watchpoint_addr_within_range (CORE_ADDR, CORE_ADDR, int) override;
  74
  75   int can_do_single_step () override;
  76
  77   /* Override the GNU/Linux inferior startup hook.  */
  78   void post_startup_inferior (ptid_t) override;
  79
  80   /* These three defer to common nat/ code.  */
  81   void low_new_thread (struct lwp_info *lp) override
  82   { aarch64_linux_new_thread (lp); }
  83   void low_delete_thread (struct arch_lwp_info *lp) override
  84   { aarch64_linux_delete_thread (lp); }
  85   void low_prepare_to_resume (struct lwp_info *lp) override
  86   { aarch64_linux_prepare_to_resume (lp); }
  87
  88   void low_new_fork (struct lwp_info *parent, pid_t child_pid) override;
  89   void low_forget_process (pid_t pid) override;
  90
  91   /* Add our siginfo layout converter.  */
  92   bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
  93     override;
  94 };
  95
  96 static aarch64_linux_nat_target the_aarch64_linux_nat_target;
  97
  98 /* Per-process data.  We don't bind this to a per-inferior registry
  99    because of targets like x86 GNU/Linux that need to keep track of
 100    processes that aren't bound to any inferior (e.g., fork children,
 101    checkpoints).  */
 102
 103 struct aarch64_process_info
 104 {
 105   /* Linked list.  */
 106   struct aarch64_process_info *next;
 107
 108   /* The process identifier.  */
 109   pid_t pid;
 110
 111   /* Copy of aarch64 hardware debug registers.  */
 112   struct aarch64_debug_reg_state state;
 113 };
 114
 115 static struct aarch64_process_info *aarch64_process_list = NULL;
 116
 117 /* Find process data for process PID.  */
 118
 119 static struct aarch64_process_info *
 120 aarch64_find_process_pid (pid_t pid)
 121 {
 122   struct aarch64_process_info *proc;
 123
 124   for (proc = aarch64_process_list; proc; proc = proc->next)
 125     if (proc->pid == pid)
 126       return proc;
 127
 128   return NULL;
 129 }
 130
 131 /* Add process data for process PID.  Returns newly allocated info
 132    object.  */
 133
 134 static struct aarch64_process_info *
 135 aarch64_add_process (pid_t pid)
 136 {
 137   struct aarch64_process_info *proc;
 138
 139   proc = XCNEW (struct aarch64_process_info);
 140   proc->pid = pid;
 141
 142   proc->next = aarch64_process_list;
 143   aarch64_process_list = proc;
 144
 145   return proc;
 146 }
 147
 148 /* Get data specific info for process PID, creating it if necessary.
 149    Never returns NULL.  */
 150
 151 static struct aarch64_process_info *
 152 aarch64_process_info_get (pid_t pid)
 153 {
 154   struct aarch64_process_info *proc;
 155
 156   proc = aarch64_find_process_pid (pid);
 157   if (proc == NULL)
 158     proc = aarch64_add_process (pid);
 159
 160   return proc;
 161 }
 162
 163 /* Called whenever GDB is no longer debugging process PID.  It deletes
 164    data structures that keep track of debug register state.  */
 165
 166 void
 167 aarch64_linux_nat_target::low_forget_process (pid_t pid)
 168 {
 169   struct aarch64_process_info *proc, **proc_link;
 170
 171   proc = aarch64_process_list;
 172   proc_link = &aarch64_process_list;
 173
 174   while (proc != NULL)
 175     {
 176       if (proc->pid == pid)
 177         {
 178           *proc_link = proc->next;
 179
 180           xfree (proc);
 181           return;
 182         }
 183
 184       proc_link = &proc->next;
 185       proc = *proc_link;
 186     }
 187 }
 188
 189 /* Get debug registers state for process PID.  */
 190
 191 struct aarch64_debug_reg_state *
 192 aarch64_get_debug_reg_state (pid_t pid)
 193 {
 194   return &aarch64_process_info_get (pid)->state;
 195 }
 196
 197 /* Fill GDB's register array with the general-purpose register values
 198    from the current thread.  */
 199
 200 static void
 201 fetch_gregs_from_thread (struct regcache *regcache)
 202 {
 203   int ret, tid;
 204   struct gdbarch *gdbarch = regcache->arch ();
 205   elf_gregset_t regs;
 206   struct iovec iovec;
 207
 208   /* Make sure REGS can hold all registers contents on both aarch64
 209      and arm.  */
 210   gdb_static_assert (sizeof (regs) >= 18 * 4);
 211
 212   tid = ptid_get_lwp (regcache->ptid ());
 213
 214   iovec.iov_base = &regs;
 215   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 216     iovec.iov_len = 18 * 4;
 217   else
 218     iovec.iov_len = sizeof (regs);
 219
 220   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 221   if (ret < 0)
 222     perror_with_name (_("Unable to fetch general registers."));
 223
 224   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 225     aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, 1);
 226   else
 227     {
 228       int regno;
 229
 230       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 231         regcache->raw_supply (regno, &regs[regno - AARCH64_X0_REGNUM]);
 232     }
 233 }
 234
 235 /* Store to the current thread the valid general-purpose register
 236    values in the GDB's register array.  */
 237
 238 static void
 239 store_gregs_to_thread (const struct regcache *regcache)
 240 {
 241   int ret, tid;
 242   elf_gregset_t regs;
 243   struct iovec iovec;
 244   struct gdbarch *gdbarch = regcache->arch ();
 245
 246   /* Make sure REGS can hold all registers contents on both aarch64
 247      and arm.  */
 248   gdb_static_assert (sizeof (regs) >= 18 * 4);
 249   tid = ptid_get_lwp (regcache->ptid ());
 250
 251   iovec.iov_base = &regs;
 252   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 253     iovec.iov_len = 18 * 4;
 254   else
 255     iovec.iov_len = sizeof (regs);
 256
 257   ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec);
 258   if (ret < 0)
 259     perror_with_name (_("Unable to fetch general registers."));
 260
 261   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 262     aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, 1);
 263   else
 264     {
 265       int regno;
 266
 267       for (regno = AARCH64_X0_REGNUM; regno <= AARCH64_CPSR_REGNUM; regno++)
 268         if (REG_VALID == regcache->get_register_status (regno))
 269           regcache->raw_collect (regno, &regs[regno - AARCH64_X0_REGNUM]);
 270     }
 271
 272   ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iovec);
 273   if (ret < 0)
 274     perror_with_name (_("Unable to store general registers."));
 275 }
 276
 277 /* Fill GDB's register array with the fp/simd register values
 278    from the current thread.  */
 279
 280 static void
 281 fetch_fpregs_from_thread (struct regcache *regcache)
 282 {
 283   int ret, tid;
 284   elf_fpregset_t regs;
 285   struct iovec iovec;
 286   struct gdbarch *gdbarch = regcache->arch ();
 287
 288   /* Make sure REGS can hold all VFP registers contents on both aarch64
 289      and arm.  */
 290   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 291
 292   tid = ptid_get_lwp (regcache->ptid ());
 293
 294   iovec.iov_base = &regs;
 295
 296   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 297     {
 298       iovec.iov_len = VFP_REGS_SIZE;
 299
 300       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 301       if (ret < 0)
 302         perror_with_name (_("Unable to fetch VFP registers."));
 303
 304       aarch32_vfp_regcache_supply (regcache, (gdb_byte *) &regs, 32);
 305     }
 306   else
 307     {
 308       int regno;
 309
 310       iovec.iov_len = sizeof (regs);
 311
 312       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 313       if (ret < 0)
 314         perror_with_name (_("Unable to fetch vFP/SIMD registers."));
 315
 316       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 317         regcache->raw_supply (regno, &regs.vregs[regno - AARCH64_V0_REGNUM]);
 318
 319       regcache->raw_supply (AARCH64_FPSR_REGNUM, &regs.fpsr);
 320       regcache->raw_supply (AARCH64_FPCR_REGNUM, &regs.fpcr);
 321     }
 322 }
 323
 324 /* Store to the current thread the valid fp/simd register
 325    values in the GDB's register array.  */
 326
 327 static void
 328 store_fpregs_to_thread (const struct regcache *regcache)
 329 {
 330   int ret, tid;
 331   elf_fpregset_t regs;
 332   struct iovec iovec;
 333   struct gdbarch *gdbarch = regcache->arch ();
 334
 335   /* Make sure REGS can hold all VFP registers contents on both aarch64
 336      and arm.  */
 337   gdb_static_assert (sizeof regs >= VFP_REGS_SIZE);
 338   tid = ptid_get_lwp (regcache->ptid ());
 339
 340   iovec.iov_base = &regs;
 341
 342   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 343     {
 344       iovec.iov_len = VFP_REGS_SIZE;
 345
 346       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 347       if (ret < 0)
 348         perror_with_name (_("Unable to fetch VFP registers."));
 349
 350       aarch32_vfp_regcache_collect (regcache, (gdb_byte *) &regs, 32);
 351     }
 352   else
 353     {
 354       int regno;
 355
 356       iovec.iov_len = sizeof (regs);
 357
 358       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec);
 359       if (ret < 0)
 360         perror_with_name (_("Unable to fetch FP/SIMD registers."));
 361
 362       for (regno = AARCH64_V0_REGNUM; regno <= AARCH64_V31_REGNUM; regno++)
 363         if (REG_VALID == regcache->get_register_status (regno))
 364           regcache->raw_collect
 365             (regno, (char *) &regs.vregs[regno - AARCH64_V0_REGNUM]);
 366
 367       if (REG_VALID == regcache->get_register_status (AARCH64_FPSR_REGNUM))
 368         regcache->raw_collect (AARCH64_FPSR_REGNUM, (char *) &regs.fpsr);
 369       if (REG_VALID == regcache->get_register_status (AARCH64_FPCR_REGNUM))
 370         regcache->raw_collect (AARCH64_FPCR_REGNUM, (char *) &regs.fpcr);
 371     }
 372
 373   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 374     {
 375       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iovec);
 376       if (ret < 0)
 377         perror_with_name (_("Unable to store VFP registers."));
 378     }
 379   else
 380     {
 381       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iovec);
 382       if (ret < 0)
 383         perror_with_name (_("Unable to store FP/SIMD registers."));
 384     }
 385 }
 386
 387 /* Implement the "fetch_registers" target_ops method.  */
 388
 389 void
 390 aarch64_linux_nat_target::fetch_registers (struct regcache *regcache,
 391                                            int regno)
 392 {
 393   if (regno == -1)
 394     {
 395       fetch_gregs_from_thread (regcache);
 396       fetch_fpregs_from_thread (regcache);
 397     }
 398   else if (regno < AARCH64_V0_REGNUM)
 399     fetch_gregs_from_thread (regcache);
 400   else
 401     fetch_fpregs_from_thread (regcache);
 402 }
 403
 404 /* Implement the "store_registers" target_ops method.  */
 405
 406 void
 407 aarch64_linux_nat_target::store_registers (struct regcache *regcache,
 408                                            int regno)
 409 {
 410   if (regno == -1)
 411     {
 412       store_gregs_to_thread (regcache);
 413       store_fpregs_to_thread (regcache);
 414     }
 415   else if (regno < AARCH64_V0_REGNUM)
 416     store_gregs_to_thread (regcache);
 417   else
 418     store_fpregs_to_thread (regcache);
 419 }
 420
 421 /* Fill register REGNO (if it is a general-purpose register) in
 422    *GREGSETPS with the value in GDB's register array.  If REGNO is -1,
 423    do this for all registers.  */
 424
 425 void
 426 fill_gregset (const struct regcache *regcache,
 427               gdb_gregset_t *gregsetp, int regno)
 428 {
 429   regcache_collect_regset (&aarch64_linux_gregset, regcache,
 430                            regno, (gdb_byte *) gregsetp,
 431                            AARCH64_LINUX_SIZEOF_GREGSET);
 432 }
 433
 434 /* Fill GDB's register array with the general-purpose register values
 435    in *GREGSETP.  */
 436
 437 void
 438 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 439 {
 440   regcache_supply_regset (&aarch64_linux_gregset, regcache, -1,
 441                           (const gdb_byte *) gregsetp,
 442                           AARCH64_LINUX_SIZEOF_GREGSET);
 443 }
 444
 445 /* Fill register REGNO (if it is a floating-point register) in
 446    *FPREGSETP with the value in GDB's register array.  If REGNO is -1,
 447    do this for all registers.  */
 448
 449 void
 450 fill_fpregset (const struct regcache *regcache,
 451                gdb_fpregset_t *fpregsetp, int regno)
 452 {
 453   regcache_collect_regset (&aarch64_linux_fpregset, regcache,
 454                            regno, (gdb_byte *) fpregsetp,
 455                            AARCH64_LINUX_SIZEOF_FPREGSET);
 456 }
 457
 458 /* Fill GDB's register array with the floating-point register values
 459    in *FPREGSETP.  */
 460
 461 void
 462 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 463 {
 464   regcache_supply_regset (&aarch64_linux_fpregset, regcache, -1,
 465                           (const gdb_byte *) fpregsetp,
 466                           AARCH64_LINUX_SIZEOF_FPREGSET);
 467 }
 468
 469 /* linux_nat_new_fork hook.   */
 470
 471 void
 472 aarch64_linux_nat_target::low_new_fork (struct lwp_info *parent,
 473                                         pid_t child_pid)
 474 {
 475   pid_t parent_pid;
 476   struct aarch64_debug_reg_state *parent_state;
 477   struct aarch64_debug_reg_state *child_state;
 478
 479   /* NULL means no watchpoint has ever been set in the parent.  In
 480      that case, there's nothing to do.  */
 481   if (parent->arch_private == NULL)
 482     return;
 483
 484   /* GDB core assumes the child inherits the watchpoints/hw
 485      breakpoints of the parent, and will remove them all from the
 486      forked off process.  Copy the debug registers mirrors into the
 487      new process so that all breakpoints and watchpoints can be
 488      removed together.  */
 489
 490   parent_pid = ptid_get_pid (parent->ptid);
 491   parent_state = aarch64_get_debug_reg_state (parent_pid);
 492   child_state = aarch64_get_debug_reg_state (child_pid);
 493   *child_state = *parent_state;
 494 }
 495 \f
 496
 497 /* Called by libthread_db.  Returns a pointer to the thread local
 498    storage (or its descriptor).  */
 499
 500 ps_err_e
 501 ps_get_thread_area (struct ps_prochandle *ph,
 502                     lwpid_t lwpid, int idx, void **base)
 503 {
 504   int is_64bit_p
 505     = (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 64);
 506
 507   return aarch64_ps_get_thread_area (ph, lwpid, idx, base, is_64bit_p);
 508 }
 509 \f
 510
 511 /* Implement the "post_startup_inferior" target_ops method.  */
 512
 513 void
 514 aarch64_linux_nat_target::post_startup_inferior (ptid_t ptid)
 515 {
 516   low_forget_process (ptid_get_pid (ptid));
 517   aarch64_linux_get_debug_reg_capacity (ptid_get_pid (ptid));
 518   linux_nat_target::post_startup_inferior (ptid);
 519 }
 520
 521 extern struct target_desc *tdesc_arm_with_neon;
 522
 523 /* Implement the "read_description" target_ops method.  */
 524
 525 const struct target_desc *
 526 aarch64_linux_nat_target::read_description ()
 527 {
 528   int ret, tid;
 529   gdb_byte regbuf[VFP_REGS_SIZE];
 530   struct iovec iovec;
 531
 532   tid = ptid_get_lwp (inferior_ptid);
 533
 534   iovec.iov_base = regbuf;
 535   iovec.iov_len = VFP_REGS_SIZE;
 536
 537   ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iovec);
 538   if (ret == 0)
 539     return tdesc_arm_with_neon;
 540   else
 541     return aarch64_read_description (aarch64_sve_get_vq (tid));
 542 }
 543
 544 /* Convert a native/host siginfo object, into/from the siginfo in the
 545    layout of the inferiors' architecture.  Returns true if any
 546    conversion was done; false otherwise.  If DIRECTION is 1, then copy
 547    from INF to NATIVE.  If DIRECTION is 0, copy from NATIVE to
 548    INF.  */
 549
 550 bool
 551 aarch64_linux_nat_target::low_siginfo_fixup (siginfo_t *native, gdb_byte *inf,
 552                                              int direction)
 553 {
 554   struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
 555
 556   /* Is the inferior 32-bit?  If so, then do fixup the siginfo
 557      object.  */
 558   if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
 559     {
 560       if (direction == 0)
 561         aarch64_compat_siginfo_from_siginfo ((struct compat_siginfo *) inf,
 562                                              native);
 563       else
 564         aarch64_siginfo_from_compat_siginfo (native,
 565                                              (struct compat_siginfo *) inf);
 566
 567       return true;
 568     }
 569
 570   return false;
 571 }
 572
 573 /* Returns the number of hardware watchpoints of type TYPE that we can
 574    set.  Value is positive if we can set CNT watchpoints, zero if
 575    setting watchpoints of type TYPE is not supported, and negative if
 576    CNT is more than the maximum number of watchpoints of type TYPE
 577    that we can support.  TYPE is one of bp_hardware_watchpoint,
 578    bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
 579    CNT is the number of such watchpoints used so far (including this
 580    one).  OTHERTYPE is non-zero if other types of watchpoints are
 581    currently enabled.  */
 582
 583 int
 584 aarch64_linux_nat_target::can_use_hw_breakpoint (enum bptype type,
 585                                                  int cnt, int othertype)
 586 {
 587   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 588       || type == bp_access_watchpoint || type == bp_watchpoint)
 589     {
 590       if (aarch64_num_wp_regs == 0)
 591         return 0;
 592     }
 593   else if (type == bp_hardware_breakpoint)
 594     {
 595       if (aarch64_num_bp_regs == 0)
 596         return 0;
 597     }
 598   else
 599     gdb_assert_not_reached ("unexpected breakpoint type");
 600
 601   /* We always return 1 here because we don't have enough information
 602      about possible overlap of addresses that they want to watch.  As an
 603      extreme example, consider the case where all the watchpoints watch
 604      the same address and the same region length: then we can handle a
 605      virtually unlimited number of watchpoints, due to debug register
 606      sharing implemented via reference counts.  */
 607   return 1;
 608 }
 609
 610 /* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
 611    Return 0 on success, -1 on failure.  */
 612
 613 int
 614 aarch64_linux_nat_target::insert_hw_breakpoint (struct gdbarch *gdbarch,
 615                                                 struct bp_target_info *bp_tgt)
 616 {
 617   int ret;
 618   CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
 619   int len;
 620   const enum target_hw_bp_type type = hw_execute;
 621   struct aarch64_debug_reg_state *state
 622     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 623
 624   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 625
 626   if (show_debug_regs)
 627     fprintf_unfiltered
 628       (gdb_stdlog,
 629        "insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 630        (unsigned long) addr, len);
 631
 632   ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */, state);
 633
 634   if (show_debug_regs)
 635     {
 636       aarch64_show_debug_reg_state (state,
 637                                     "insert_hw_breakpoint", addr, len, type);
 638     }
 639
 640   return ret;
 641 }
 642
 643 /* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
 644    Return 0 on success, -1 on failure.  */
 645
 646 int
 647 aarch64_linux_nat_target::remove_hw_breakpoint (struct gdbarch *gdbarch,
 648                                                 struct bp_target_info *bp_tgt)
 649 {
 650   int ret;
 651   CORE_ADDR addr = bp_tgt->placed_address;
 652   int len = 4;
 653   const enum target_hw_bp_type type = hw_execute;
 654   struct aarch64_debug_reg_state *state
 655     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 656
 657   gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
 658
 659   if (show_debug_regs)
 660     fprintf_unfiltered
 661       (gdb_stdlog, "remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
 662        (unsigned long) addr, len);
 663
 664   ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */, state);
 665
 666   if (show_debug_regs)
 667     {
 668       aarch64_show_debug_reg_state (state,
 669                                     "remove_hw_watchpoint", addr, len, type);
 670     }
 671
 672   return ret;
 673 }
 674
 675 /* Implement the "insert_watchpoint" target_ops method.
 676
 677    Insert a watchpoint to watch a memory region which starts at
 678    address ADDR and whose length is LEN bytes.  Watch memory accesses
 679    of the type TYPE.  Return 0 on success, -1 on failure.  */
 680
 681 int
 682 aarch64_linux_nat_target::insert_watchpoint (CORE_ADDR addr, int len,
 683                                              enum target_hw_bp_type type,
 684                                              struct expression *cond)
 685 {
 686   int ret;
 687   struct aarch64_debug_reg_state *state
 688     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 689
 690   if (show_debug_regs)
 691     fprintf_unfiltered (gdb_stdlog,
 692                         "insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 693                         (unsigned long) addr, len);
 694
 695   gdb_assert (type != hw_execute);
 696
 697   ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */, state);
 698
 699   if (show_debug_regs)
 700     {
 701       aarch64_show_debug_reg_state (state,
 702                                     "insert_watchpoint", addr, len, type);
 703     }
 704
 705   return ret;
 706 }
 707
 708 /* Implement the "remove_watchpoint" target_ops method.
 709    Remove a watchpoint that watched the memory region which starts at
 710    address ADDR, whose length is LEN bytes, and for accesses of the
 711    type TYPE.  Return 0 on success, -1 on failure.  */
 712
 713 int
 714 aarch64_linux_nat_target::remove_watchpoint (CORE_ADDR addr, int len,
 715                                              enum target_hw_bp_type type,
 716                                              struct expression *cond)
 717 {
 718   int ret;
 719   struct aarch64_debug_reg_state *state
 720     = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 721
 722   if (show_debug_regs)
 723     fprintf_unfiltered (gdb_stdlog,
 724                         "remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
 725                         (unsigned long) addr, len);
 726
 727   gdb_assert (type != hw_execute);
 728
 729   ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */, state);
 730
 731   if (show_debug_regs)
 732     {
 733       aarch64_show_debug_reg_state (state,
 734                                     "remove_watchpoint", addr, len, type);
 735     }
 736
 737   return ret;
 738 }
 739
 740 /* Implement the "region_ok_for_hw_watchpoint" target_ops method.  */
 741
 742 int
 743 aarch64_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
 744 {
 745   return aarch64_linux_region_ok_for_watchpoint (addr, len);
 746 }
 747
 748 /* Implement the "stopped_data_address" target_ops method.  */
 749
 750 bool
 751 aarch64_linux_nat_target::stopped_data_address (CORE_ADDR *addr_p)
 752 {
 753   siginfo_t siginfo;
 754   int i, tid;
 755   struct aarch64_debug_reg_state *state;
 756
 757   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
 758     return false;
 759
 760   /* This must be a hardware breakpoint.  */
 761   if (siginfo.si_signo != SIGTRAP
 762       || (siginfo.si_code & 0xffff) != TRAP_HWBKPT)
 763     return false;
 764
 765   /* Check if the address matches any watched address.  */
 766   state = aarch64_get_debug_reg_state (ptid_get_pid (inferior_ptid));
 767   for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
 768     {
 769       const unsigned int offset
 770         = aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
 771       const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
 772       const CORE_ADDR addr_trap = (CORE_ADDR) siginfo.si_addr;
 773       const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
 774       const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
 775       const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
 776
 777       if (state->dr_ref_count_wp[i]
 778           && DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
 779           && addr_trap >= addr_watch_aligned
 780           && addr_trap < addr_watch + len)
 781         {
 782           /* ADDR_TRAP reports the first address of the memory range
 783              accessed by the CPU, regardless of what was the memory
 784              range watched.  Thus, a large CPU access that straddles
 785              the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
 786              ADDR_TRAP that is lower than the
 787              ADDR_WATCH..ADDR_WATCH+LEN range.  E.g.:
 788
 789              addr: |   4   |   5   |   6   |   7   |   8   |
 790                                    |---- range watched ----|
 791                    |----------- range accessed ------------|
 792
 793              In this case, ADDR_TRAP will be 4.
 794
 795              To match a watchpoint known to GDB core, we must never
 796              report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
 797              range.  ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
 798              positive on kernels older than 4.10.  See PR
 799              external/20207.  */
 800           *addr_p = addr_orig;
 801           return true;
 802         }
 803     }
 804
 805   return false;
 806 }
 807
 808 /* Implement the "stopped_by_watchpoint" target_ops method.  */
 809
 810 bool
 811 aarch64_linux_nat_target::stopped_by_watchpoint ()
 812 {
 813   CORE_ADDR addr;
 814
 815   return stopped_data_address (&addr);
 816 }
 817
 818 /* Implement the "watchpoint_addr_within_range" target_ops method.  */
 819
 820 bool
 821 aarch64_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr,
 822                                                         CORE_ADDR start, int length)
 823 {
 824   return start <= addr && start + length - 1 >= addr;
 825 }
 826
 827 /* Implement the "can_do_single_step" target_ops method.  */
 828
 829 int
 830 aarch64_linux_nat_target::can_do_single_step ()
 831 {
 832   return 1;
 833 }
 834
 835 /* Define AArch64 maintenance commands.  */
 836
 837 static void
 838 add_show_debug_regs_command (void)
 839 {
 840   /* A maintenance command to enable printing the internal DRi mirror
 841      variables.  */
 842   add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
 843                            &show_debug_regs, _("\
 844 Set whether to show variables that mirror the AArch64 debug registers."), _("\
 845 Show whether to show variables that mirror the AArch64 debug registers."), _("\
 846 Use \"on\" to enable, \"off\" to disable.\n\
 847 If enabled, the debug registers values are shown when GDB inserts\n\
 848 or removes a hardware breakpoint or watchpoint, and when the inferior\n\
 849 triggers a breakpoint or watchpoint."),
 850                            NULL,
 851                            NULL,
 852                            &maintenance_set_cmdlist,
 853                            &maintenance_show_cmdlist);
 854 }
 855
 856 void
 857 _initialize_aarch64_linux_nat (void)
 858 {
 859   add_show_debug_regs_command ();
 860
 861   /* Register the target.  */
 862   linux_target = &the_aarch64_linux_nat_target;
 863   add_inf_child_target (&the_aarch64_linux_nat_target);
 864 }