1 /* Target-dependent code for the ALPHA architecture, for GDB, the GNU Debugger.
3 Copyright (C) 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001, 2002,
4 2003, 2005, 2006, 2007, 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
25 #include "frame-unwind.h"
26 #include "frame-base.h"
27 #include "dwarf2-frame.h"
36 #include "gdb_string.h"
39 #include "reggroups.h"
40 #include "arch-utils.h"
44 #include "trad-frame.h"
48 #include "alpha-tdep.h"
50 /* Instruction decoding. The notations for registers, immediates and
51 opcodes are the same as the one used in Compaq's Alpha architecture
54 #define INSN_OPCODE(insn) ((insn & 0xfc000000) >> 26)
56 /* Memory instruction format */
57 #define MEM_RA(insn) ((insn & 0x03e00000) >> 21)
58 #define MEM_RB(insn) ((insn & 0x001f0000) >> 16)
59 #define MEM_DISP(insn) \
60 (((insn & 0x8000) == 0) ? (insn & 0xffff) : -((-insn) & 0xffff))
62 static const int lda_opcode
= 0x08;
63 static const int stq_opcode
= 0x2d;
65 /* Branch instruction format */
66 #define BR_RA(insn) MEM_RA(insn)
68 static const int bne_opcode
= 0x3d;
70 /* Operate instruction format */
71 #define OPR_FUNCTION(insn) ((insn & 0xfe0) >> 5)
72 #define OPR_HAS_IMMEDIATE(insn) ((insn & 0x1000) == 0x1000)
73 #define OPR_RA(insn) MEM_RA(insn)
74 #define OPR_RC(insn) ((insn & 0x1f))
75 #define OPR_LIT(insn) ((insn & 0x1fe000) >> 13)
77 static const int subq_opcode
= 0x10;
78 static const int subq_function
= 0x29;
81 /* Return the name of the REGNO register.
83 An empty name corresponds to a register number that used to
84 be used for a virtual register. That virtual register has
85 been removed, but the index is still reserved to maintain
86 compatibility with existing remote alpha targets. */
89 alpha_register_name (struct gdbarch
*gdbarch
, int regno
)
91 static const char * const register_names
[] =
93 "v0", "t0", "t1", "t2", "t3", "t4", "t5", "t6",
94 "t7", "s0", "s1", "s2", "s3", "s4", "s5", "fp",
95 "a0", "a1", "a2", "a3", "a4", "a5", "t8", "t9",
96 "t10", "t11", "ra", "t12", "at", "gp", "sp", "zero",
97 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",
98 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",
99 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",
100 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "fpcr",
106 if (regno
>= ARRAY_SIZE(register_names
))
108 return register_names
[regno
];
112 alpha_cannot_fetch_register (struct gdbarch
*gdbarch
, int regno
)
114 return (regno
== ALPHA_ZERO_REGNUM
115 || strlen (alpha_register_name (gdbarch
, regno
)) == 0);
119 alpha_cannot_store_register (struct gdbarch
*gdbarch
, int regno
)
121 return (regno
== ALPHA_ZERO_REGNUM
122 || strlen (alpha_register_name (gdbarch
, regno
)) == 0);
126 alpha_register_type (struct gdbarch
*gdbarch
, int regno
)
128 if (regno
== ALPHA_SP_REGNUM
|| regno
== ALPHA_GP_REGNUM
)
129 return builtin_type (gdbarch
)->builtin_data_ptr
;
130 if (regno
== ALPHA_PC_REGNUM
)
131 return builtin_type (gdbarch
)->builtin_func_ptr
;
133 /* Don't need to worry about little vs big endian until
134 some jerk tries to port to alpha-unicosmk. */
135 if (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31)
136 return builtin_type (gdbarch
)->builtin_double
;
138 return builtin_type (gdbarch
)->builtin_int64
;
141 /* Is REGNUM a member of REGGROUP? */
144 alpha_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
145 struct reggroup
*group
)
147 /* Filter out any registers eliminated, but whose regnum is
148 reserved for backward compatibility, e.g. the vfp. */
149 if (gdbarch_register_name (gdbarch
, regnum
) == NULL
150 || *gdbarch_register_name (gdbarch
, regnum
) == '\0')
153 if (group
== all_reggroup
)
156 /* Zero should not be saved or restored. Technically it is a general
157 register (just as $f31 would be a float if we represented it), but
158 there's no point displaying it during "info regs", so leave it out
159 of all groups except for "all". */
160 if (regnum
== ALPHA_ZERO_REGNUM
)
163 /* All other registers are saved and restored. */
164 if (group
== save_reggroup
|| group
== restore_reggroup
)
167 /* All other groups are non-overlapping. */
169 /* Since this is really a PALcode memory slot... */
170 if (regnum
== ALPHA_UNIQUE_REGNUM
)
171 return group
== system_reggroup
;
173 /* Force the FPCR to be considered part of the floating point state. */
174 if (regnum
== ALPHA_FPCR_REGNUM
)
175 return group
== float_reggroup
;
177 if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 31)
178 return group
== float_reggroup
;
180 return group
== general_reggroup
;
183 /* The following represents exactly the conversion performed by
184 the LDS instruction. This applies to both single-precision
185 floating point and 32-bit integers. */
188 alpha_lds (struct gdbarch
*gdbarch
, void *out
, const void *in
)
190 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
191 ULONGEST mem
= extract_unsigned_integer (in
, 4, byte_order
);
192 ULONGEST frac
= (mem
>> 0) & 0x7fffff;
193 ULONGEST sign
= (mem
>> 31) & 1;
194 ULONGEST exp_msb
= (mem
>> 30) & 1;
195 ULONGEST exp_low
= (mem
>> 23) & 0x7f;
198 exp
= (exp_msb
<< 10) | exp_low
;
210 reg
= (sign
<< 63) | (exp
<< 52) | (frac
<< 29);
211 store_unsigned_integer (out
, 8, byte_order
, reg
);
214 /* Similarly, this represents exactly the conversion performed by
215 the STS instruction. */
218 alpha_sts (struct gdbarch
*gdbarch
, void *out
, const void *in
)
220 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
223 reg
= extract_unsigned_integer (in
, 8, byte_order
);
224 mem
= ((reg
>> 32) & 0xc0000000) | ((reg
>> 29) & 0x3fffffff);
225 store_unsigned_integer (out
, 4, byte_order
, mem
);
228 /* The alpha needs a conversion between register and memory format if the
229 register is a floating point register and memory format is float, as the
230 register format must be double or memory format is an integer with 4
231 bytes or less, as the representation of integers in floating point
232 registers is different. */
235 alpha_convert_register_p (struct gdbarch
*gdbarch
, int regno
, struct type
*type
)
237 return (regno
>= ALPHA_FP0_REGNUM
&& regno
< ALPHA_FP0_REGNUM
+ 31
238 && TYPE_LENGTH (type
) != 8);
242 alpha_register_to_value (struct frame_info
*frame
, int regnum
,
243 struct type
*valtype
, gdb_byte
*out
)
245 gdb_byte in
[MAX_REGISTER_SIZE
];
247 frame_register_read (frame
, regnum
, in
);
248 switch (TYPE_LENGTH (valtype
))
251 alpha_sts (get_frame_arch (frame
), out
, in
);
254 error (_("Cannot retrieve value from floating point register"));
259 alpha_value_to_register (struct frame_info
*frame
, int regnum
,
260 struct type
*valtype
, const gdb_byte
*in
)
262 gdb_byte out
[MAX_REGISTER_SIZE
];
264 switch (TYPE_LENGTH (valtype
))
267 alpha_lds (get_frame_arch (frame
), out
, in
);
270 error (_("Cannot store value in floating point register"));
272 put_frame_register (frame
, regnum
, out
);
276 /* The alpha passes the first six arguments in the registers, the rest on
277 the stack. The register arguments are stored in ARG_REG_BUFFER, and
278 then moved into the register file; this simplifies the passing of a
279 large struct which extends from the registers to the stack, plus avoids
280 three ptrace invocations per word.
282 We don't bother tracking which register values should go in integer
283 regs or fp regs; we load the same values into both.
285 If the called function is returning a structure, the address of the
286 structure to be returned is passed as a hidden first argument. */
289 alpha_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
290 struct regcache
*regcache
, CORE_ADDR bp_addr
,
291 int nargs
, struct value
**args
, CORE_ADDR sp
,
292 int struct_return
, CORE_ADDR struct_addr
)
294 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
296 int accumulate_size
= struct_return
? 8 : 0;
299 const gdb_byte
*contents
;
303 struct alpha_arg
*alpha_args
304 = (struct alpha_arg
*) alloca (nargs
* sizeof (struct alpha_arg
));
305 struct alpha_arg
*m_arg
;
306 gdb_byte arg_reg_buffer
[ALPHA_REGISTER_SIZE
* ALPHA_NUM_ARG_REGS
];
307 int required_arg_regs
;
308 CORE_ADDR func_addr
= find_function_addr (function
, NULL
);
310 /* The ABI places the address of the called function in T12. */
311 regcache_cooked_write_signed (regcache
, ALPHA_T12_REGNUM
, func_addr
);
313 /* Set the return address register to point to the entry point
314 of the program, where a breakpoint lies in wait. */
315 regcache_cooked_write_signed (regcache
, ALPHA_RA_REGNUM
, bp_addr
);
317 /* Lay out the arguments in memory. */
318 for (i
= 0, m_arg
= alpha_args
; i
< nargs
; i
++, m_arg
++)
320 struct value
*arg
= args
[i
];
321 struct type
*arg_type
= check_typedef (value_type (arg
));
323 /* Cast argument to long if necessary as the compiler does it too. */
324 switch (TYPE_CODE (arg_type
))
329 case TYPE_CODE_RANGE
:
331 if (TYPE_LENGTH (arg_type
) == 4)
333 /* 32-bit values must be sign-extended to 64 bits
334 even if the base data type is unsigned. */
335 arg_type
= builtin_type (gdbarch
)->builtin_int32
;
336 arg
= value_cast (arg_type
, arg
);
338 if (TYPE_LENGTH (arg_type
) < ALPHA_REGISTER_SIZE
)
340 arg_type
= builtin_type (gdbarch
)->builtin_int64
;
341 arg
= value_cast (arg_type
, arg
);
346 /* "float" arguments loaded in registers must be passed in
347 register format, aka "double". */
348 if (accumulate_size
< sizeof (arg_reg_buffer
)
349 && TYPE_LENGTH (arg_type
) == 4)
351 arg_type
= builtin_type (gdbarch
)->builtin_double
;
352 arg
= value_cast (arg_type
, arg
);
354 /* Tru64 5.1 has a 128-bit long double, and passes this by
355 invisible reference. No one else uses this data type. */
356 else if (TYPE_LENGTH (arg_type
) == 16)
358 /* Allocate aligned storage. */
359 sp
= (sp
& -16) - 16;
361 /* Write the real data into the stack. */
362 write_memory (sp
, value_contents (arg
), 16);
364 /* Construct the indirection. */
365 arg_type
= lookup_pointer_type (arg_type
);
366 arg
= value_from_pointer (arg_type
, sp
);
370 case TYPE_CODE_COMPLEX
:
371 /* ??? The ABI says that complex values are passed as two
372 separate scalar values. This distinction only matters
373 for complex float. However, GCC does not implement this. */
375 /* Tru64 5.1 has a 128-bit long double, and passes this by
376 invisible reference. */
377 if (TYPE_LENGTH (arg_type
) == 32)
379 /* Allocate aligned storage. */
380 sp
= (sp
& -16) - 16;
382 /* Write the real data into the stack. */
383 write_memory (sp
, value_contents (arg
), 32);
385 /* Construct the indirection. */
386 arg_type
= lookup_pointer_type (arg_type
);
387 arg
= value_from_pointer (arg_type
, sp
);
394 m_arg
->len
= TYPE_LENGTH (arg_type
);
395 m_arg
->offset
= accumulate_size
;
396 accumulate_size
= (accumulate_size
+ m_arg
->len
+ 7) & ~7;
397 m_arg
->contents
= value_contents (arg
);
400 /* Determine required argument register loads, loading an argument register
401 is expensive as it uses three ptrace calls. */
402 required_arg_regs
= accumulate_size
/ 8;
403 if (required_arg_regs
> ALPHA_NUM_ARG_REGS
)
404 required_arg_regs
= ALPHA_NUM_ARG_REGS
;
406 /* Make room for the arguments on the stack. */
407 if (accumulate_size
< sizeof(arg_reg_buffer
))
410 accumulate_size
-= sizeof(arg_reg_buffer
);
411 sp
-= accumulate_size
;
413 /* Keep sp aligned to a multiple of 16 as the ABI requires. */
416 /* `Push' arguments on the stack. */
417 for (i
= nargs
; m_arg
--, --i
>= 0;)
419 const gdb_byte
*contents
= m_arg
->contents
;
420 int offset
= m_arg
->offset
;
421 int len
= m_arg
->len
;
423 /* Copy the bytes destined for registers into arg_reg_buffer. */
424 if (offset
< sizeof(arg_reg_buffer
))
426 if (offset
+ len
<= sizeof(arg_reg_buffer
))
428 memcpy (arg_reg_buffer
+ offset
, contents
, len
);
433 int tlen
= sizeof(arg_reg_buffer
) - offset
;
434 memcpy (arg_reg_buffer
+ offset
, contents
, tlen
);
441 /* Everything else goes to the stack. */
442 write_memory (sp
+ offset
- sizeof(arg_reg_buffer
), contents
, len
);
445 store_unsigned_integer (arg_reg_buffer
, ALPHA_REGISTER_SIZE
,
446 byte_order
, struct_addr
);
448 /* Load the argument registers. */
449 for (i
= 0; i
< required_arg_regs
; i
++)
451 regcache_cooked_write (regcache
, ALPHA_A0_REGNUM
+ i
,
452 arg_reg_buffer
+ i
*ALPHA_REGISTER_SIZE
);
453 regcache_cooked_write (regcache
, ALPHA_FPA0_REGNUM
+ i
,
454 arg_reg_buffer
+ i
*ALPHA_REGISTER_SIZE
);
457 /* Finally, update the stack pointer. */
458 regcache_cooked_write_signed (regcache
, ALPHA_SP_REGNUM
, sp
);
463 /* Extract from REGCACHE the value about to be returned from a function
464 and copy it into VALBUF. */
467 alpha_extract_return_value (struct type
*valtype
, struct regcache
*regcache
,
470 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
471 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
472 int length
= TYPE_LENGTH (valtype
);
473 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
476 switch (TYPE_CODE (valtype
))
482 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, raw_buffer
);
483 alpha_sts (gdbarch
, valbuf
, raw_buffer
);
487 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
491 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
492 read_memory (l
, valbuf
, 16);
496 internal_error (__FILE__
, __LINE__
, _("unknown floating point width"));
500 case TYPE_CODE_COMPLEX
:
504 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
505 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
509 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
510 regcache_cooked_read (regcache
, ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
514 regcache_cooked_read_signed (regcache
, ALPHA_V0_REGNUM
, &l
);
515 read_memory (l
, valbuf
, 32);
519 internal_error (__FILE__
, __LINE__
, _("unknown floating point width"));
524 /* Assume everything else degenerates to an integer. */
525 regcache_cooked_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &l
);
526 store_unsigned_integer (valbuf
, length
, byte_order
, l
);
531 /* Insert the given value into REGCACHE as if it was being
532 returned by a function. */
535 alpha_store_return_value (struct type
*valtype
, struct regcache
*regcache
,
536 const gdb_byte
*valbuf
)
538 struct gdbarch
*gdbarch
= get_regcache_arch (regcache
);
539 int length
= TYPE_LENGTH (valtype
);
540 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
543 switch (TYPE_CODE (valtype
))
549 alpha_lds (gdbarch
, raw_buffer
, valbuf
);
550 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, raw_buffer
);
554 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
558 /* FIXME: 128-bit long doubles are returned like structures:
559 by writing into indirect storage provided by the caller
560 as the first argument. */
561 error (_("Cannot set a 128-bit long double return value."));
564 internal_error (__FILE__
, __LINE__
, _("unknown floating point width"));
568 case TYPE_CODE_COMPLEX
:
572 /* ??? This isn't correct wrt the ABI, but it's what GCC does. */
573 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
577 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
, valbuf
);
578 regcache_cooked_write (regcache
, ALPHA_FP0_REGNUM
+ 1, valbuf
+ 8);
582 /* FIXME: 128-bit long doubles are returned like structures:
583 by writing into indirect storage provided by the caller
584 as the first argument. */
585 error (_("Cannot set a 128-bit long double return value."));
588 internal_error (__FILE__
, __LINE__
, _("unknown floating point width"));
593 /* Assume everything else degenerates to an integer. */
594 /* 32-bit values must be sign-extended to 64 bits
595 even if the base data type is unsigned. */
597 valtype
= builtin_type (gdbarch
)->builtin_int32
;
598 l
= unpack_long (valtype
, valbuf
);
599 regcache_cooked_write_unsigned (regcache
, ALPHA_V0_REGNUM
, l
);
604 static enum return_value_convention
605 alpha_return_value (struct gdbarch
*gdbarch
, struct type
*func_type
,
606 struct type
*type
, struct regcache
*regcache
,
607 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
609 enum type_code code
= TYPE_CODE (type
);
611 if ((code
== TYPE_CODE_STRUCT
612 || code
== TYPE_CODE_UNION
613 || code
== TYPE_CODE_ARRAY
)
614 && gdbarch_tdep (gdbarch
)->return_in_memory (type
))
619 regcache_raw_read_unsigned (regcache
, ALPHA_V0_REGNUM
, &addr
);
620 read_memory (addr
, readbuf
, TYPE_LENGTH (type
));
623 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
627 alpha_extract_return_value (type
, regcache
, readbuf
);
629 alpha_store_return_value (type
, regcache
, writebuf
);
631 return RETURN_VALUE_REGISTER_CONVENTION
;
635 alpha_return_in_memory_always (struct type
*type
)
640 static const gdb_byte
*
641 alpha_breakpoint_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
, int *len
)
643 static const gdb_byte break_insn
[] = { 0x80, 0, 0, 0 }; /* call_pal bpt */
645 *len
= sizeof(break_insn
);
650 /* This returns the PC of the first insn after the prologue.
651 If we can't find the prologue, then return 0. */
654 alpha_after_prologue (CORE_ADDR pc
)
656 struct symtab_and_line sal
;
657 CORE_ADDR func_addr
, func_end
;
659 if (!find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
662 sal
= find_pc_line (func_addr
, 0);
663 if (sal
.end
< func_end
)
666 /* The line after the prologue is after the end of the function. In this
667 case, tell the caller to find the prologue the hard way. */
671 /* Read an instruction from memory at PC, looking through breakpoints. */
674 alpha_read_insn (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
676 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
677 gdb_byte buf
[ALPHA_INSN_SIZE
];
680 status
= target_read_memory (pc
, buf
, sizeof (buf
));
682 memory_error (status
, pc
);
683 return extract_unsigned_integer (buf
, sizeof (buf
), byte_order
);
686 /* To skip prologues, I use this predicate. Returns either PC itself
687 if the code at PC does not look like a function prologue; otherwise
688 returns an address that (if we're lucky) follows the prologue. If
689 LENIENT, then we must skip everything which is involved in setting
690 up the frame (it's OK to skip more, just so long as we don't skip
691 anything which might clobber the registers which are being saved. */
694 alpha_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
698 CORE_ADDR post_prologue_pc
;
699 gdb_byte buf
[ALPHA_INSN_SIZE
];
701 /* Silently return the unaltered pc upon memory errors.
702 This could happen on OSF/1 if decode_line_1 tries to skip the
703 prologue for quickstarted shared library functions when the
704 shared library is not yet mapped in.
705 Reading target memory is slow over serial lines, so we perform
706 this check only if the target has shared libraries (which all
707 Alpha targets do). */
708 if (target_read_memory (pc
, buf
, sizeof (buf
)))
711 /* See if we can determine the end of the prologue via the symbol table.
712 If so, then return either PC, or the PC after the prologue, whichever
715 post_prologue_pc
= alpha_after_prologue (pc
);
716 if (post_prologue_pc
!= 0)
717 return max (pc
, post_prologue_pc
);
719 /* Can't determine prologue from the symbol table, need to examine
722 /* Skip the typical prologue instructions. These are the stack adjustment
723 instruction and the instructions that save registers on the stack
724 or in the gcc frame. */
725 for (offset
= 0; offset
< 100; offset
+= ALPHA_INSN_SIZE
)
727 inst
= alpha_read_insn (gdbarch
, pc
+ offset
);
729 if ((inst
& 0xffff0000) == 0x27bb0000) /* ldah $gp,n($t12) */
731 if ((inst
& 0xffff0000) == 0x23bd0000) /* lda $gp,n($gp) */
733 if ((inst
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
735 if ((inst
& 0xffe01fff) == 0x43c0153e) /* subq $sp,n,$sp */
738 if (((inst
& 0xfc1f0000) == 0xb41e0000 /* stq reg,n($sp) */
739 || (inst
& 0xfc1f0000) == 0x9c1e0000) /* stt reg,n($sp) */
740 && (inst
& 0x03e00000) != 0x03e00000) /* reg != $zero */
743 if (inst
== 0x47de040f) /* bis sp,sp,fp */
745 if (inst
== 0x47fe040f) /* bis zero,sp,fp */
754 /* Figure out where the longjmp will land.
755 We expect the first arg to be a pointer to the jmp_buf structure from
756 which we extract the PC (JB_PC) that we will land at. The PC is copied
757 into the "pc". This routine returns true on success. */
760 alpha_get_longjmp_target (struct frame_info
*frame
, CORE_ADDR
*pc
)
762 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
763 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
764 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
766 gdb_byte raw_buffer
[ALPHA_REGISTER_SIZE
];
768 jb_addr
= get_frame_register_unsigned (frame
, ALPHA_A0_REGNUM
);
770 if (target_read_memory (jb_addr
+ (tdep
->jb_pc
* tdep
->jb_elt_size
),
771 raw_buffer
, tdep
->jb_elt_size
))
774 *pc
= extract_unsigned_integer (raw_buffer
, tdep
->jb_elt_size
, byte_order
);
779 /* Frame unwinder for signal trampolines. We use alpha tdep bits that
780 describe the location and shape of the sigcontext structure. After
781 that, all registers are in memory, so it's easy. */
782 /* ??? Shouldn't we be able to do this generically, rather than with
783 OSABI data specific to Alpha? */
785 struct alpha_sigtramp_unwind_cache
787 CORE_ADDR sigcontext_addr
;
790 static struct alpha_sigtramp_unwind_cache
*
791 alpha_sigtramp_frame_unwind_cache (struct frame_info
*this_frame
,
792 void **this_prologue_cache
)
794 struct alpha_sigtramp_unwind_cache
*info
;
795 struct gdbarch_tdep
*tdep
;
797 if (*this_prologue_cache
)
798 return *this_prologue_cache
;
800 info
= FRAME_OBSTACK_ZALLOC (struct alpha_sigtramp_unwind_cache
);
801 *this_prologue_cache
= info
;
803 tdep
= gdbarch_tdep (get_frame_arch (this_frame
));
804 info
->sigcontext_addr
= tdep
->sigcontext_addr (this_frame
);
809 /* Return the address of REGNUM in a sigtramp frame. Since this is
810 all arithmetic, it doesn't seem worthwhile to cache it. */
813 alpha_sigtramp_register_address (struct gdbarch
*gdbarch
,
814 CORE_ADDR sigcontext_addr
, int regnum
)
816 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
818 if (regnum
>= 0 && regnum
< 32)
819 return sigcontext_addr
+ tdep
->sc_regs_offset
+ regnum
* 8;
820 else if (regnum
>= ALPHA_FP0_REGNUM
&& regnum
< ALPHA_FP0_REGNUM
+ 32)
821 return sigcontext_addr
+ tdep
->sc_fpregs_offset
+ regnum
* 8;
822 else if (regnum
== ALPHA_PC_REGNUM
)
823 return sigcontext_addr
+ tdep
->sc_pc_offset
;
828 /* Given a GDB frame, determine the address of the calling function's
829 frame. This will be used to create a new GDB frame struct. */
832 alpha_sigtramp_frame_this_id (struct frame_info
*this_frame
,
833 void **this_prologue_cache
,
834 struct frame_id
*this_id
)
836 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
837 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
838 struct alpha_sigtramp_unwind_cache
*info
839 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
840 CORE_ADDR stack_addr
, code_addr
;
842 /* If the OSABI couldn't locate the sigcontext, give up. */
843 if (info
->sigcontext_addr
== 0)
846 /* If we have dynamic signal trampolines, find their start.
847 If we do not, then we must assume there is a symbol record
848 that can provide the start address. */
849 if (tdep
->dynamic_sigtramp_offset
)
852 code_addr
= get_frame_pc (this_frame
);
853 offset
= tdep
->dynamic_sigtramp_offset (gdbarch
, code_addr
);
860 code_addr
= get_frame_func (this_frame
);
862 /* The stack address is trivially read from the sigcontext. */
863 stack_addr
= alpha_sigtramp_register_address (gdbarch
, info
->sigcontext_addr
,
865 stack_addr
= get_frame_memory_unsigned (this_frame
, stack_addr
,
866 ALPHA_REGISTER_SIZE
);
868 *this_id
= frame_id_build (stack_addr
, code_addr
);
871 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
873 static struct value
*
874 alpha_sigtramp_frame_prev_register (struct frame_info
*this_frame
,
875 void **this_prologue_cache
, int regnum
)
877 struct alpha_sigtramp_unwind_cache
*info
878 = alpha_sigtramp_frame_unwind_cache (this_frame
, this_prologue_cache
);
881 if (info
->sigcontext_addr
!= 0)
883 /* All integer and fp registers are stored in memory. */
884 addr
= alpha_sigtramp_register_address (get_frame_arch (this_frame
),
885 info
->sigcontext_addr
, regnum
);
887 return frame_unwind_got_memory (this_frame
, regnum
, addr
);
890 /* This extra register may actually be in the sigcontext, but our
891 current description of it in alpha_sigtramp_frame_unwind_cache
892 doesn't include it. Too bad. Fall back on whatever's in the
894 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
898 alpha_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
899 struct frame_info
*this_frame
,
900 void **this_prologue_cache
)
902 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
903 CORE_ADDR pc
= get_frame_pc (this_frame
);
906 /* NOTE: cagney/2004-04-30: Do not copy/clone this code. Instead
907 look at tramp-frame.h and other simplier per-architecture
908 sigtramp unwinders. */
910 /* We shouldn't even bother to try if the OSABI didn't register a
911 sigcontext_addr handler or pc_in_sigtramp hander. */
912 if (gdbarch_tdep (gdbarch
)->sigcontext_addr
== NULL
)
914 if (gdbarch_tdep (gdbarch
)->pc_in_sigtramp
== NULL
)
917 /* Otherwise we should be in a signal frame. */
918 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
919 if (gdbarch_tdep (gdbarch
)->pc_in_sigtramp (gdbarch
, pc
, name
))
925 static const struct frame_unwind alpha_sigtramp_frame_unwind
= {
927 alpha_sigtramp_frame_this_id
,
928 alpha_sigtramp_frame_prev_register
,
930 alpha_sigtramp_frame_sniffer
935 /* Heuristic_proc_start may hunt through the text section for a long
936 time across a 2400 baud serial line. Allows the user to limit this
938 static unsigned int heuristic_fence_post
= 0;
940 /* Attempt to locate the start of the function containing PC. We assume that
941 the previous function ends with an about_to_return insn. Not foolproof by
942 any means, since gcc is happy to put the epilogue in the middle of a
943 function. But we're guessing anyway... */
946 alpha_heuristic_proc_start (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
948 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
949 CORE_ADDR last_non_nop
= pc
;
950 CORE_ADDR fence
= pc
- heuristic_fence_post
;
951 CORE_ADDR orig_pc
= pc
;
953 struct inferior
*inf
;
958 /* First see if we can find the start of the function from minimal
959 symbol information. This can succeed with a binary that doesn't
960 have debug info, but hasn't been stripped. */
961 func
= get_pc_function_start (pc
);
965 if (heuristic_fence_post
== UINT_MAX
966 || fence
< tdep
->vm_min_address
)
967 fence
= tdep
->vm_min_address
;
969 /* Search back for previous return; also stop at a 0, which might be
970 seen for instance before the start of a code section. Don't include
971 nops, since this usually indicates padding between functions. */
972 for (pc
-= ALPHA_INSN_SIZE
; pc
>= fence
; pc
-= ALPHA_INSN_SIZE
)
974 unsigned int insn
= alpha_read_insn (gdbarch
, pc
);
977 case 0: /* invalid insn */
978 case 0x6bfa8001: /* ret $31,($26),1 */
981 case 0x2ffe0000: /* unop: ldq_u $31,0($30) */
982 case 0x47ff041f: /* nop: bis $31,$31,$31 */
991 inf
= current_inferior ();
993 /* It's not clear to me why we reach this point when stopping quietly,
994 but with this test, at least we don't print out warnings for every
995 child forked (eg, on decstation). 22apr93 rich@cygnus.com. */
996 if (inf
->control
.stop_soon
== NO_STOP_QUIETLY
)
998 static int blurb_printed
= 0;
1000 if (fence
== tdep
->vm_min_address
)
1001 warning (_("Hit beginning of text section without finding \
1002 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1004 warning (_("Hit heuristic-fence-post without finding \
1005 enclosing function for address %s"), paddress (gdbarch
, orig_pc
));
1009 printf_filtered (_("\
1010 This warning occurs if you are debugging a function without any symbols\n\
1011 (for example, in a stripped executable). In that case, you may wish to\n\
1012 increase the size of the search with the `set heuristic-fence-post' command.\n\
1014 Otherwise, you told GDB there was a function where there isn't one, or\n\
1015 (more likely) you have encountered a bug in GDB.\n"));
1023 /* Fallback alpha frame unwinder. Uses instruction scanning and knows
1024 something about the traditional layout of alpha stack frames. */
1026 struct alpha_heuristic_unwind_cache
1030 struct trad_frame_saved_reg
*saved_regs
;
1034 /* If a probing loop sequence starts at PC, simulate it and compute
1035 FRAME_SIZE and PC after its execution. Otherwise, return with PC and
1036 FRAME_SIZE unchanged. */
1039 alpha_heuristic_analyze_probing_loop (struct gdbarch
*gdbarch
, CORE_ADDR
*pc
,
1042 CORE_ADDR cur_pc
= *pc
;
1043 int cur_frame_size
= *frame_size
;
1044 int nb_of_iterations
, reg_index
, reg_probe
;
1047 /* The following pattern is recognized as a probing loop:
1049 lda REG_INDEX,NB_OF_ITERATIONS
1050 lda REG_PROBE,<immediate>(sp)
1053 stq zero,<immediate>(REG_PROBE)
1054 subq REG_INDEX,0x1,REG_INDEX
1055 lda REG_PROBE,<immediate>(REG_PROBE)
1056 bne REG_INDEX, LOOP_START
1058 lda sp,<immediate>(REG_PROBE)
1060 If anything different is found, the function returns without
1061 changing PC and FRAME_SIZE. Otherwise, PC will point immediately
1062 after this sequence, and FRAME_SIZE will be updated.
1065 /* lda REG_INDEX,NB_OF_ITERATIONS */
1067 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1068 if (INSN_OPCODE (insn
) != lda_opcode
)
1070 reg_index
= MEM_RA (insn
);
1071 nb_of_iterations
= MEM_DISP (insn
);
1073 /* lda REG_PROBE,<immediate>(sp) */
1075 cur_pc
+= ALPHA_INSN_SIZE
;
1076 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1077 if (INSN_OPCODE (insn
) != lda_opcode
1078 || MEM_RB (insn
) != ALPHA_SP_REGNUM
)
1080 reg_probe
= MEM_RA (insn
);
1081 cur_frame_size
-= MEM_DISP (insn
);
1083 /* stq zero,<immediate>(REG_PROBE) */
1085 cur_pc
+= ALPHA_INSN_SIZE
;
1086 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1087 if (INSN_OPCODE (insn
) != stq_opcode
1088 || MEM_RA (insn
) != 0x1f
1089 || MEM_RB (insn
) != reg_probe
)
1092 /* subq REG_INDEX,0x1,REG_INDEX */
1094 cur_pc
+= ALPHA_INSN_SIZE
;
1095 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1096 if (INSN_OPCODE (insn
) != subq_opcode
1097 || !OPR_HAS_IMMEDIATE (insn
)
1098 || OPR_FUNCTION (insn
) != subq_function
1099 || OPR_LIT(insn
) != 1
1100 || OPR_RA (insn
) != reg_index
1101 || OPR_RC (insn
) != reg_index
)
1104 /* lda REG_PROBE,<immediate>(REG_PROBE) */
1106 cur_pc
+= ALPHA_INSN_SIZE
;
1107 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1108 if (INSN_OPCODE (insn
) != lda_opcode
1109 || MEM_RA (insn
) != reg_probe
1110 || MEM_RB (insn
) != reg_probe
)
1112 cur_frame_size
-= MEM_DISP (insn
) * nb_of_iterations
;
1114 /* bne REG_INDEX, LOOP_START */
1116 cur_pc
+= ALPHA_INSN_SIZE
;
1117 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1118 if (INSN_OPCODE (insn
) != bne_opcode
1119 || MEM_RA (insn
) != reg_index
)
1122 /* lda sp,<immediate>(REG_PROBE) */
1124 cur_pc
+= ALPHA_INSN_SIZE
;
1125 insn
= alpha_read_insn (gdbarch
, cur_pc
);
1126 if (INSN_OPCODE (insn
) != lda_opcode
1127 || MEM_RA (insn
) != ALPHA_SP_REGNUM
1128 || MEM_RB (insn
) != reg_probe
)
1130 cur_frame_size
-= MEM_DISP (insn
);
1133 *frame_size
= cur_frame_size
;
1136 static struct alpha_heuristic_unwind_cache
*
1137 alpha_heuristic_frame_unwind_cache (struct frame_info
*this_frame
,
1138 void **this_prologue_cache
,
1141 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1142 struct alpha_heuristic_unwind_cache
*info
;
1144 CORE_ADDR limit_pc
, cur_pc
;
1145 int frame_reg
, frame_size
, return_reg
, reg
;
1147 if (*this_prologue_cache
)
1148 return *this_prologue_cache
;
1150 info
= FRAME_OBSTACK_ZALLOC (struct alpha_heuristic_unwind_cache
);
1151 *this_prologue_cache
= info
;
1152 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
1154 limit_pc
= get_frame_pc (this_frame
);
1156 start_pc
= alpha_heuristic_proc_start (gdbarch
, limit_pc
);
1157 info
->start_pc
= start_pc
;
1159 frame_reg
= ALPHA_SP_REGNUM
;
1163 /* If we've identified a likely place to start, do code scanning. */
1166 /* Limit the forward search to 50 instructions. */
1167 if (start_pc
+ 200 < limit_pc
)
1168 limit_pc
= start_pc
+ 200;
1170 for (cur_pc
= start_pc
; cur_pc
< limit_pc
; cur_pc
+= ALPHA_INSN_SIZE
)
1172 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1174 if ((word
& 0xffff0000) == 0x23de0000) /* lda $sp,n($sp) */
1178 /* Consider only the first stack allocation instruction
1179 to contain the static size of the frame. */
1180 if (frame_size
== 0)
1181 frame_size
= (-word
) & 0xffff;
1185 /* Exit loop if a positive stack adjustment is found, which
1186 usually means that the stack cleanup code in the function
1187 epilogue is reached. */
1191 else if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1193 reg
= (word
& 0x03e00000) >> 21;
1195 /* Ignore this instruction if we have already encountered
1196 an instruction saving the same register earlier in the
1197 function code. The current instruction does not tell
1198 us where the original value upon function entry is saved.
1199 All it says is that the function we are scanning reused
1200 that register for some computation of its own, and is now
1201 saving its result. */
1202 if (trad_frame_addr_p(info
->saved_regs
, reg
))
1208 /* Do not compute the address where the register was saved yet,
1209 because we don't know yet if the offset will need to be
1210 relative to $sp or $fp (we can not compute the address
1211 relative to $sp if $sp is updated during the execution of
1212 the current subroutine, for instance when doing some alloca).
1213 So just store the offset for the moment, and compute the
1214 address later when we know whether this frame has a frame
1216 /* Hack: temporarily add one, so that the offset is non-zero
1217 and we can tell which registers have save offsets below. */
1218 info
->saved_regs
[reg
].addr
= (word
& 0xffff) + 1;
1220 /* Starting with OSF/1-3.2C, the system libraries are shipped
1221 without local symbols, but they still contain procedure
1222 descriptors without a symbol reference. GDB is currently
1223 unable to find these procedure descriptors and uses
1224 heuristic_proc_desc instead.
1225 As some low level compiler support routines (__div*, __add*)
1226 use a non-standard return address register, we have to
1227 add some heuristics to determine the return address register,
1228 or stepping over these routines will fail.
1229 Usually the return address register is the first register
1230 saved on the stack, but assembler optimization might
1231 rearrange the register saves.
1232 So we recognize only a few registers (t7, t9, ra) within
1233 the procedure prologue as valid return address registers.
1234 If we encounter a return instruction, we extract the
1235 the return address register from it.
1237 FIXME: Rewriting GDB to access the procedure descriptors,
1238 e.g. via the minimal symbol table, might obviate this hack. */
1239 if (return_reg
== -1
1240 && cur_pc
< (start_pc
+ 80)
1241 && (reg
== ALPHA_T7_REGNUM
1242 || reg
== ALPHA_T9_REGNUM
1243 || reg
== ALPHA_RA_REGNUM
))
1246 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1247 return_reg
= (word
>> 16) & 0x1f;
1248 else if (word
== 0x47de040f) /* bis sp,sp,fp */
1249 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1250 else if (word
== 0x47fe040f) /* bis zero,sp,fp */
1251 frame_reg
= ALPHA_GCC_FP_REGNUM
;
1253 alpha_heuristic_analyze_probing_loop (gdbarch
, &cur_pc
, &frame_size
);
1256 /* If we haven't found a valid return address register yet, keep
1257 searching in the procedure prologue. */
1258 if (return_reg
== -1)
1260 while (cur_pc
< (limit_pc
+ 80) && cur_pc
< (start_pc
+ 80))
1262 unsigned int word
= alpha_read_insn (gdbarch
, cur_pc
);
1264 if ((word
& 0xfc1f0000) == 0xb41e0000) /* stq reg,n($sp) */
1266 reg
= (word
& 0x03e00000) >> 21;
1267 if (reg
== ALPHA_T7_REGNUM
1268 || reg
== ALPHA_T9_REGNUM
1269 || reg
== ALPHA_RA_REGNUM
)
1275 else if ((word
& 0xffe0ffff) == 0x6be08001) /* ret zero,reg,1 */
1277 return_reg
= (word
>> 16) & 0x1f;
1281 cur_pc
+= ALPHA_INSN_SIZE
;
1286 /* Failing that, do default to the customary RA. */
1287 if (return_reg
== -1)
1288 return_reg
= ALPHA_RA_REGNUM
;
1289 info
->return_reg
= return_reg
;
1291 val
= get_frame_register_unsigned (this_frame
, frame_reg
);
1292 info
->vfp
= val
+ frame_size
;
1294 /* Convert offsets to absolute addresses. See above about adding
1295 one to the offsets to make all detected offsets non-zero. */
1296 for (reg
= 0; reg
< ALPHA_NUM_REGS
; ++reg
)
1297 if (trad_frame_addr_p(info
->saved_regs
, reg
))
1298 info
->saved_regs
[reg
].addr
+= val
- 1;
1300 /* The stack pointer of the previous frame is computed by popping
1301 the current stack frame. */
1302 if (!trad_frame_addr_p (info
->saved_regs
, ALPHA_SP_REGNUM
))
1303 trad_frame_set_value (info
->saved_regs
, ALPHA_SP_REGNUM
, info
->vfp
);
1308 /* Given a GDB frame, determine the address of the calling function's
1309 frame. This will be used to create a new GDB frame struct. */
1312 alpha_heuristic_frame_this_id (struct frame_info
*this_frame
,
1313 void **this_prologue_cache
,
1314 struct frame_id
*this_id
)
1316 struct alpha_heuristic_unwind_cache
*info
1317 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1319 *this_id
= frame_id_build (info
->vfp
, info
->start_pc
);
1322 /* Retrieve the value of REGNUM in FRAME. Don't give up! */
1324 static struct value
*
1325 alpha_heuristic_frame_prev_register (struct frame_info
*this_frame
,
1326 void **this_prologue_cache
, int regnum
)
1328 struct alpha_heuristic_unwind_cache
*info
1329 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1331 /* The PC of the previous frame is stored in the link register of
1332 the current frame. Frob regnum so that we pull the value from
1333 the correct place. */
1334 if (regnum
== ALPHA_PC_REGNUM
)
1335 regnum
= info
->return_reg
;
1337 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
1340 static const struct frame_unwind alpha_heuristic_frame_unwind
= {
1342 alpha_heuristic_frame_this_id
,
1343 alpha_heuristic_frame_prev_register
,
1345 default_frame_sniffer
1349 alpha_heuristic_frame_base_address (struct frame_info
*this_frame
,
1350 void **this_prologue_cache
)
1352 struct alpha_heuristic_unwind_cache
*info
1353 = alpha_heuristic_frame_unwind_cache (this_frame
, this_prologue_cache
, 0);
1358 static const struct frame_base alpha_heuristic_frame_base
= {
1359 &alpha_heuristic_frame_unwind
,
1360 alpha_heuristic_frame_base_address
,
1361 alpha_heuristic_frame_base_address
,
1362 alpha_heuristic_frame_base_address
1365 /* Just like reinit_frame_cache, but with the right arguments to be
1366 callable as an sfunc. Used by the "set heuristic-fence-post" command. */
1369 reinit_frame_cache_sfunc (char *args
, int from_tty
, struct cmd_list_element
*c
)
1371 reinit_frame_cache ();
1375 /* Assuming NEXT_FRAME->prev is a dummy, return the frame ID of that
1376 dummy frame. The frame ID's base needs to match the TOS value
1377 saved by save_dummy_frame_tos(), and the PC match the dummy frame's
1380 static struct frame_id
1381 alpha_dummy_id (struct gdbarch
*gdbarch
, struct frame_info
*this_frame
)
1384 base
= get_frame_register_unsigned (this_frame
, ALPHA_SP_REGNUM
);
1385 return frame_id_build (base
, get_frame_pc (this_frame
));
1389 alpha_unwind_pc (struct gdbarch
*gdbarch
, struct frame_info
*next_frame
)
1392 pc
= frame_unwind_register_unsigned (next_frame
, ALPHA_PC_REGNUM
);
1397 /* Helper routines for alpha*-nat.c files to move register sets to and
1398 from core files. The UNIQUE pointer is allowed to be NULL, as most
1399 targets don't supply this value in their core files. */
1402 alpha_supply_int_regs (struct regcache
*regcache
, int regno
,
1403 const void *r0_r30
, const void *pc
, const void *unique
)
1405 const gdb_byte
*regs
= r0_r30
;
1408 for (i
= 0; i
< 31; ++i
)
1409 if (regno
== i
|| regno
== -1)
1410 regcache_raw_supply (regcache
, i
, regs
+ i
* 8);
1412 if (regno
== ALPHA_ZERO_REGNUM
|| regno
== -1)
1413 regcache_raw_supply (regcache
, ALPHA_ZERO_REGNUM
, NULL
);
1415 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1416 regcache_raw_supply (regcache
, ALPHA_PC_REGNUM
, pc
);
1418 if (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1)
1419 regcache_raw_supply (regcache
, ALPHA_UNIQUE_REGNUM
, unique
);
1423 alpha_fill_int_regs (const struct regcache
*regcache
,
1424 int regno
, void *r0_r30
, void *pc
, void *unique
)
1426 gdb_byte
*regs
= r0_r30
;
1429 for (i
= 0; i
< 31; ++i
)
1430 if (regno
== i
|| regno
== -1)
1431 regcache_raw_collect (regcache
, i
, regs
+ i
* 8);
1433 if (regno
== ALPHA_PC_REGNUM
|| regno
== -1)
1434 regcache_raw_collect (regcache
, ALPHA_PC_REGNUM
, pc
);
1436 if (unique
&& (regno
== ALPHA_UNIQUE_REGNUM
|| regno
== -1))
1437 regcache_raw_collect (regcache
, ALPHA_UNIQUE_REGNUM
, unique
);
1441 alpha_supply_fp_regs (struct regcache
*regcache
, int regno
,
1442 const void *f0_f30
, const void *fpcr
)
1444 const gdb_byte
*regs
= f0_f30
;
1447 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1448 if (regno
== i
|| regno
== -1)
1449 regcache_raw_supply (regcache
, i
,
1450 regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1452 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1453 regcache_raw_supply (regcache
, ALPHA_FPCR_REGNUM
, fpcr
);
1457 alpha_fill_fp_regs (const struct regcache
*regcache
,
1458 int regno
, void *f0_f30
, void *fpcr
)
1460 gdb_byte
*regs
= f0_f30
;
1463 for (i
= ALPHA_FP0_REGNUM
; i
< ALPHA_FP0_REGNUM
+ 31; ++i
)
1464 if (regno
== i
|| regno
== -1)
1465 regcache_raw_collect (regcache
, i
,
1466 regs
+ (i
- ALPHA_FP0_REGNUM
) * 8);
1468 if (regno
== ALPHA_FPCR_REGNUM
|| regno
== -1)
1469 regcache_raw_collect (regcache
, ALPHA_FPCR_REGNUM
, fpcr
);
1474 /* Return nonzero if the G_floating register value in REG is equal to
1475 zero for FP control instructions. */
1478 fp_register_zero_p (LONGEST reg
)
1480 /* Check that all bits except the sign bit are zero. */
1481 const LONGEST zero_mask
= ((LONGEST
) 1 << 63) ^ -1;
1483 return ((reg
& zero_mask
) == 0);
1486 /* Return the value of the sign bit for the G_floating register
1487 value held in REG. */
1490 fp_register_sign_bit (LONGEST reg
)
1492 const LONGEST sign_mask
= (LONGEST
) 1 << 63;
1494 return ((reg
& sign_mask
) != 0);
1497 /* alpha_software_single_step() is called just before we want to resume
1498 the inferior, if we want to single-step it but there is no hardware
1499 or kernel single-step support (NetBSD on Alpha, for example). We find
1500 the target of the coming instruction and breakpoint it. */
1503 alpha_next_pc (struct frame_info
*frame
, CORE_ADDR pc
)
1505 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1512 insn
= alpha_read_insn (gdbarch
, pc
);
1514 /* Opcode is top 6 bits. */
1515 op
= (insn
>> 26) & 0x3f;
1519 /* Jump format: target PC is:
1521 return (get_frame_register_unsigned (frame
, (insn
>> 16) & 0x1f) & ~3);
1524 if ((op
& 0x30) == 0x30)
1526 /* Branch format: target PC is:
1527 (new PC) + (4 * sext(displacement)) */
1528 if (op
== 0x30 /* BR */
1529 || op
== 0x34) /* BSR */
1532 offset
= (insn
& 0x001fffff);
1533 if (offset
& 0x00100000)
1534 offset
|= 0xffe00000;
1535 offset
*= ALPHA_INSN_SIZE
;
1536 return (pc
+ ALPHA_INSN_SIZE
+ offset
);
1539 /* Need to determine if branch is taken; read RA. */
1540 regno
= (insn
>> 21) & 0x1f;
1543 case 0x31: /* FBEQ */
1544 case 0x36: /* FBGE */
1545 case 0x37: /* FBGT */
1546 case 0x33: /* FBLE */
1547 case 0x32: /* FBLT */
1548 case 0x35: /* FBNE */
1549 regno
+= gdbarch_fp0_regnum (gdbarch
);
1552 rav
= get_frame_register_signed (frame
, regno
);
1556 case 0x38: /* BLBC */
1560 case 0x3c: /* BLBS */
1564 case 0x39: /* BEQ */
1568 case 0x3d: /* BNE */
1572 case 0x3a: /* BLT */
1576 case 0x3b: /* BLE */
1580 case 0x3f: /* BGT */
1584 case 0x3e: /* BGE */
1589 /* Floating point branches. */
1591 case 0x31: /* FBEQ */
1592 if (fp_register_zero_p (rav
))
1595 case 0x36: /* FBGE */
1596 if (fp_register_sign_bit (rav
) == 0 || fp_register_zero_p (rav
))
1599 case 0x37: /* FBGT */
1600 if (fp_register_sign_bit (rav
) == 0 && ! fp_register_zero_p (rav
))
1603 case 0x33: /* FBLE */
1604 if (fp_register_sign_bit (rav
) == 1 || fp_register_zero_p (rav
))
1607 case 0x32: /* FBLT */
1608 if (fp_register_sign_bit (rav
) == 1 && ! fp_register_zero_p (rav
))
1611 case 0x35: /* FBNE */
1612 if (! fp_register_zero_p (rav
))
1618 /* Not a branch or branch not taken; target PC is:
1620 return (pc
+ ALPHA_INSN_SIZE
);
1624 alpha_software_single_step (struct frame_info
*frame
)
1626 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
1627 struct address_space
*aspace
= get_frame_address_space (frame
);
1628 CORE_ADDR pc
, next_pc
;
1630 pc
= get_frame_pc (frame
);
1631 next_pc
= alpha_next_pc (frame
, pc
);
1633 insert_single_step_breakpoint (gdbarch
, aspace
, next_pc
);
1638 /* Initialize the current architecture based on INFO. If possible, re-use an
1639 architecture from ARCHES, which is a list of architectures already created
1640 during this debugging session.
1642 Called e.g. at program startup, when reading a core file, and when reading
1645 static struct gdbarch
*
1646 alpha_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1648 struct gdbarch_tdep
*tdep
;
1649 struct gdbarch
*gdbarch
;
1651 /* Try to determine the ABI of the object we are loading. */
1652 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
1654 /* If it's an ECOFF file, assume it's OSF/1. */
1655 if (bfd_get_flavour (info
.abfd
) == bfd_target_ecoff_flavour
)
1656 info
.osabi
= GDB_OSABI_OSF1
;
1659 /* Find a candidate among extant architectures. */
1660 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1662 return arches
->gdbarch
;
1664 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
1665 gdbarch
= gdbarch_alloc (&info
, tdep
);
1667 /* Lowest text address. This is used by heuristic_proc_start()
1668 to decide when to stop looking. */
1669 tdep
->vm_min_address
= (CORE_ADDR
) 0x120000000LL
;
1671 tdep
->dynamic_sigtramp_offset
= NULL
;
1672 tdep
->sigcontext_addr
= NULL
;
1673 tdep
->sc_pc_offset
= 2 * 8;
1674 tdep
->sc_regs_offset
= 4 * 8;
1675 tdep
->sc_fpregs_offset
= tdep
->sc_regs_offset
+ 32 * 8 + 8;
1677 tdep
->jb_pc
= -1; /* longjmp support not enabled by default */
1679 tdep
->return_in_memory
= alpha_return_in_memory_always
;
1682 set_gdbarch_short_bit (gdbarch
, 16);
1683 set_gdbarch_int_bit (gdbarch
, 32);
1684 set_gdbarch_long_bit (gdbarch
, 64);
1685 set_gdbarch_long_long_bit (gdbarch
, 64);
1686 set_gdbarch_float_bit (gdbarch
, 32);
1687 set_gdbarch_double_bit (gdbarch
, 64);
1688 set_gdbarch_long_double_bit (gdbarch
, 64);
1689 set_gdbarch_ptr_bit (gdbarch
, 64);
1692 set_gdbarch_num_regs (gdbarch
, ALPHA_NUM_REGS
);
1693 set_gdbarch_sp_regnum (gdbarch
, ALPHA_SP_REGNUM
);
1694 set_gdbarch_pc_regnum (gdbarch
, ALPHA_PC_REGNUM
);
1695 set_gdbarch_fp0_regnum (gdbarch
, ALPHA_FP0_REGNUM
);
1697 set_gdbarch_register_name (gdbarch
, alpha_register_name
);
1698 set_gdbarch_register_type (gdbarch
, alpha_register_type
);
1700 set_gdbarch_cannot_fetch_register (gdbarch
, alpha_cannot_fetch_register
);
1701 set_gdbarch_cannot_store_register (gdbarch
, alpha_cannot_store_register
);
1703 set_gdbarch_convert_register_p (gdbarch
, alpha_convert_register_p
);
1704 set_gdbarch_register_to_value (gdbarch
, alpha_register_to_value
);
1705 set_gdbarch_value_to_register (gdbarch
, alpha_value_to_register
);
1707 set_gdbarch_register_reggroup_p (gdbarch
, alpha_register_reggroup_p
);
1709 /* Prologue heuristics. */
1710 set_gdbarch_skip_prologue (gdbarch
, alpha_skip_prologue
);
1713 set_gdbarch_print_insn (gdbarch
, print_insn_alpha
);
1717 set_gdbarch_return_value (gdbarch
, alpha_return_value
);
1719 /* Settings for calling functions in the inferior. */
1720 set_gdbarch_push_dummy_call (gdbarch
, alpha_push_dummy_call
);
1722 /* Methods for saving / extracting a dummy frame's ID. */
1723 set_gdbarch_dummy_id (gdbarch
, alpha_dummy_id
);
1725 /* Return the unwound PC value. */
1726 set_gdbarch_unwind_pc (gdbarch
, alpha_unwind_pc
);
1728 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1729 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
1731 set_gdbarch_breakpoint_from_pc (gdbarch
, alpha_breakpoint_from_pc
);
1732 set_gdbarch_decr_pc_after_break (gdbarch
, ALPHA_INSN_SIZE
);
1733 set_gdbarch_cannot_step_breakpoint (gdbarch
, 1);
1735 /* Hook in ABI-specific overrides, if they have been registered. */
1736 gdbarch_init_osabi (info
, gdbarch
);
1738 /* Now that we have tuned the configuration, set a few final things
1739 based on what the OS ABI has told us. */
1741 if (tdep
->jb_pc
>= 0)
1742 set_gdbarch_get_longjmp_target (gdbarch
, alpha_get_longjmp_target
);
1744 frame_unwind_append_unwinder (gdbarch
, &alpha_sigtramp_frame_unwind
);
1745 frame_unwind_append_unwinder (gdbarch
, &alpha_heuristic_frame_unwind
);
1747 frame_base_set_default (gdbarch
, &alpha_heuristic_frame_base
);
1753 alpha_dwarf2_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
1755 dwarf2_append_unwinders (gdbarch
);
1756 frame_base_append_sniffer (gdbarch
, dwarf2_frame_base_sniffer
);
1759 extern initialize_file_ftype _initialize_alpha_tdep
; /* -Wmissing-prototypes */
1762 _initialize_alpha_tdep (void)
1764 struct cmd_list_element
*c
;
1766 gdbarch_register (bfd_arch_alpha
, alpha_gdbarch_init
, NULL
);
1768 /* Let the user set the fence post for heuristic_proc_start. */
1770 /* We really would like to have both "0" and "unlimited" work, but
1771 command.c doesn't deal with that. So make it a var_zinteger
1772 because the user can always use "999999" or some such for unlimited. */
1773 /* We need to throw away the frame cache when we set this, since it
1774 might change our ability to get backtraces. */
1775 add_setshow_zinteger_cmd ("heuristic-fence-post", class_support
,
1776 &heuristic_fence_post
, _("\
1777 Set the distance searched for the start of a function."), _("\
1778 Show the distance searched for the start of a function."), _("\
1779 If you are debugging a stripped executable, GDB needs to search through the\n\
1780 program for the start of a function. This command sets the distance of the\n\
1781 search. The only need to set it is when debugging a stripped executable."),
1782 reinit_frame_cache_sfunc
,
1783 NULL
, /* FIXME: i18n: The distance searched for the start of a function is \"%d\". */
1784 &setlist
, &showlist
);