1 /* Target-dependent code for NetBSD/alpha.
3 Copyright (C) 2002, 2003, 2004, 2006 Free Software Foundation, Inc.
5 Contributed by Wasabi Systems, Inc.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 51 Franklin Street, Fifth Floor,
22 Boston, MA 02110-1301, USA. */
31 #include "gdb_string.h"
33 #include "alpha-tdep.h"
34 #include "alphabsd-tdep.h"
35 #include "nbsd-tdep.h"
36 #include "solib-svr4.h"
39 fetch_core_registers (char *core_reg_sect
, unsigned core_reg_size
, int which
,
45 /* Table to map a gdb register number to a trapframe register index. */
46 static const int regmap
[] =
57 #define SIZEOF_TRAPFRAME (33 * 8)
59 /* We get everything from one section. */
64 fpregs
= core_reg_sect
+ SIZEOF_TRAPFRAME
;
66 if (core_reg_size
< (SIZEOF_TRAPFRAME
+ SIZEOF_STRUCT_FPREG
))
68 warning (_("Wrong size register set in core file."));
72 /* Integer registers. */
73 for (regno
= 0; regno
< ALPHA_ZERO_REGNUM
; regno
++)
74 regcache_raw_supply (current_regcache
, regno
, regs
+ (regmap
[regno
] * 8));
75 regcache_raw_supply (current_regcache
, ALPHA_ZERO_REGNUM
, NULL
);
76 regcache_raw_supply (current_regcache
, PC_REGNUM
, regs
+ (28 * 8));
78 /* Floating point registers. */
79 alphabsd_supply_fpreg (fpregs
, -1);
83 fetch_elfcore_registers (char *core_reg_sect
, unsigned core_reg_size
, int which
,
88 case 0: /* Integer registers. */
89 if (core_reg_size
!= SIZEOF_STRUCT_REG
)
90 warning (_("Wrong size register set in core file."));
92 alphabsd_supply_reg (core_reg_sect
, -1);
95 case 2: /* Floating point registers. */
96 if (core_reg_size
!= SIZEOF_STRUCT_FPREG
)
97 warning (_("Wrong size FP register set in core file."));
99 alphabsd_supply_fpreg (core_reg_sect
, -1);
103 /* Don't know what kind of register request this is; just ignore it. */
108 static struct core_fns alphanbsd_core_fns
=
110 bfd_target_unknown_flavour
, /* core_flavour */
111 default_check_format
, /* check_format */
112 default_core_sniffer
, /* core_sniffer */
113 fetch_core_registers
, /* core_read_registers */
117 static struct core_fns alphanbsd_elfcore_fns
=
119 bfd_target_elf_flavour
, /* core_flavour */
120 default_check_format
, /* check_format */
121 default_core_sniffer
, /* core_sniffer */
122 fetch_elfcore_registers
, /* core_read_registers */
126 /* Under NetBSD/alpha, signal handler invocations can be identified by the
127 designated code sequence that is used to return from a signal handler.
128 In particular, the return address of a signal handler points to the
129 following code sequence:
133 lda v0, 295(zero) # __sigreturn14
136 Each instruction has a unique encoding, so we simply attempt to match
137 the instruction the PC is pointing to with any of the above instructions.
138 If there is a hit, we know the offset to the start of the designated
139 sequence and can then check whether we really are executing in the
140 signal trampoline. If not, -1 is returned, otherwise the offset from the
141 start of the return sequence is returned. */
142 static const unsigned char sigtramp_retcode
[] =
144 0x00, 0x00, 0x1e, 0xa6, /* ldq a0, 0(sp) */
145 0x10, 0x00, 0xde, 0x23, /* lda sp, 16(sp) */
146 0x27, 0x01, 0x1f, 0x20, /* lda v0, 295(zero) */
147 0x83, 0x00, 0x00, 0x00, /* call_pal callsys */
149 #define RETCODE_NWORDS 4
150 #define RETCODE_SIZE (RETCODE_NWORDS * 4)
153 alphanbsd_sigtramp_offset (CORE_ADDR pc
)
155 unsigned char ret
[RETCODE_SIZE
], w
[4];
159 if (deprecated_read_memory_nobpt (pc
, (char *) w
, 4) != 0)
162 for (i
= 0; i
< RETCODE_NWORDS
; i
++)
164 if (memcmp (w
, sigtramp_retcode
+ (i
* 4), 4) == 0)
167 if (i
== RETCODE_NWORDS
)
173 if (deprecated_read_memory_nobpt (pc
, (char *) ret
, sizeof (ret
)) != 0)
176 if (memcmp (ret
, sigtramp_retcode
, RETCODE_SIZE
) == 0)
183 alphanbsd_pc_in_sigtramp (CORE_ADDR pc
, char *func_name
)
185 return (nbsd_pc_in_sigtramp (pc
, func_name
)
186 || alphanbsd_sigtramp_offset (pc
) >= 0);
190 alphanbsd_sigcontext_addr (struct frame_info
*frame
)
192 /* FIXME: This is not correct for all versions of NetBSD/alpha.
193 We will probably need to disassemble the trampoline to figure
194 out which trampoline frame type we have. */
195 return get_frame_base (frame
);
199 alphanbsd_init_abi (struct gdbarch_info info
,
200 struct gdbarch
*gdbarch
)
202 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
204 /* Hook into the DWARF CFI frame unwinder. */
205 alpha_dwarf2_init_abi (info
, gdbarch
);
207 /* Hook into the MDEBUG frame unwinder. */
208 alpha_mdebug_init_abi (info
, gdbarch
);
210 /* NetBSD/alpha does not provide single step support via ptrace(2); we
211 must use software single-stepping. */
212 set_gdbarch_software_single_step (gdbarch
, alpha_software_single_step
);
214 /* NetBSD/alpha has SVR4-style shared libraries. */
215 set_solib_svr4_fetch_link_map_offsets
216 (gdbarch
, svr4_lp64_fetch_link_map_offsets
);
218 tdep
->dynamic_sigtramp_offset
= alphanbsd_sigtramp_offset
;
219 tdep
->pc_in_sigtramp
= alphanbsd_pc_in_sigtramp
;
220 tdep
->sigcontext_addr
= alphanbsd_sigcontext_addr
;
223 tdep
->jb_elt_size
= 8;
227 _initialize_alphanbsd_tdep (void)
229 gdbarch_register_osabi (bfd_arch_alpha
, 0, GDB_OSABI_NETBSD_ELF
,
231 gdbarch_register_osabi (bfd_arch_alpha
, 0, GDB_OSABI_OPENBSD_ELF
,
234 deprecated_add_core_fns (&alphanbsd_core_fns
);
235 deprecated_add_core_fns (&alphanbsd_elfcore_fns
);