gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2013 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "gdb_string.h"
  23 #include "regcache.h"
  24 #include "target.h"
  25 #include "linux-nat.h"
  26 #include "target-descriptions.h"
  27 #include "auxv.h"
  28 #include "observer.h"
  29 #include "gdbthread.h"
  30
  31 #include "arm-tdep.h"
  32 #include "arm-linux-tdep.h"
  33
  34 #include <elf/common.h>
  35 #include <sys/user.h>
  36 #include <sys/ptrace.h>
  37 #include <sys/utsname.h>
  38 #include <sys/procfs.h>
  39
  40 /* Prototypes for supply_gregset etc.  */
  41 #include "gregset.h"
  42
  43 /* Defines ps_err_e, struct ps_prochandle.  */
  44 #include "gdb_proc_service.h"
  45
  46 #ifndef PTRACE_GET_THREAD_AREA
  47 #define PTRACE_GET_THREAD_AREA 22
  48 #endif
  49
  50 #ifndef PTRACE_GETWMMXREGS
  51 #define PTRACE_GETWMMXREGS 18
  52 #define PTRACE_SETWMMXREGS 19
  53 #endif
  54
  55 #ifndef PTRACE_GETVFPREGS
  56 #define PTRACE_GETVFPREGS 27
  57 #define PTRACE_SETVFPREGS 28
  58 #endif
  59
  60 #ifndef PTRACE_GETHBPREGS
  61 #define PTRACE_GETHBPREGS 29
  62 #define PTRACE_SETHBPREGS 30
  63 #endif
  64
  65 /* A flag for whether the WMMX registers are available.  */
  66 static int arm_linux_has_wmmx_registers;
  67
  68 /* The number of 64-bit VFP registers we have (expect this to be 0,
  69    16, or 32).  */
  70 static int arm_linux_vfp_register_count;
  71
  72 extern int arm_apcs_32;
  73
  74 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  75    case we may be tracing more than one process at a time.  In that
  76    case, inferior_ptid will contain the main process ID and the
  77    individual thread (process) ID.  get_thread_id () is used to get
  78    the thread id if it's available, and the process id otherwise.  */
  79
  80 static int
  81 get_thread_id (ptid_t ptid)
  82 {
  83   int tid = TIDGET (ptid);
  84   if (0 == tid)
  85     tid = PIDGET (ptid);
  86   return tid;
  87 }
  88
  89 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  90
  91 /* Get the value of a particular register from the floating point
  92    state of the process and store it into regcache.  */
  93
  94 static void
  95 fetch_fpregister (struct regcache *regcache, int regno)
  96 {
  97   int ret, tid;
  98   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  99
 100   /* Get the thread id for the ptrace call.  */
 101   tid = GET_THREAD_ID (inferior_ptid);
 102
 103   /* Read the floating point state.  */
 104   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 105   if (ret < 0)
 106     {
 107       warning (_("Unable to fetch floating point register."));
 108       return;
 109     }
 110
 111   /* Fetch fpsr.  */
 112   if (ARM_FPS_REGNUM == regno)
 113     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 114                          fp + NWFPE_FPSR_OFFSET);
 115
 116   /* Fetch the floating point register.  */
 117   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 118     supply_nwfpe_register (regcache, regno, fp);
 119 }
 120
 121 /* Get the whole floating point state of the process and store it
 122    into regcache.  */
 123
 124 static void
 125 fetch_fpregs (struct regcache *regcache)
 126 {
 127   int ret, regno, tid;
 128   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 129
 130   /* Get the thread id for the ptrace call.  */
 131   tid = GET_THREAD_ID (inferior_ptid);
 132
 133   /* Read the floating point state.  */
 134   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 135   if (ret < 0)
 136     {
 137       warning (_("Unable to fetch the floating point registers."));
 138       return;
 139     }
 140
 141   /* Fetch fpsr.  */
 142   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 143                        fp + NWFPE_FPSR_OFFSET);
 144
 145   /* Fetch the floating point registers.  */
 146   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 147     supply_nwfpe_register (regcache, regno, fp);
 148 }
 149
 150 /* Save a particular register into the floating point state of the
 151    process using the contents from regcache.  */
 152
 153 static void
 154 store_fpregister (const struct regcache *regcache, int regno)
 155 {
 156   int ret, tid;
 157   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 158
 159   /* Get the thread id for the ptrace call.  */
 160   tid = GET_THREAD_ID (inferior_ptid);
 161
 162   /* Read the floating point state.  */
 163   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 164   if (ret < 0)
 165     {
 166       warning (_("Unable to fetch the floating point registers."));
 167       return;
 168     }
 169
 170   /* Store fpsr.  */
 171   if (ARM_FPS_REGNUM == regno
 172       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 173     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 174
 175   /* Store the floating point register.  */
 176   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 177     collect_nwfpe_register (regcache, regno, fp);
 178
 179   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 180   if (ret < 0)
 181     {
 182       warning (_("Unable to store floating point register."));
 183       return;
 184     }
 185 }
 186
 187 /* Save the whole floating point state of the process using
 188    the contents from regcache.  */
 189
 190 static void
 191 store_fpregs (const struct regcache *regcache)
 192 {
 193   int ret, regno, tid;
 194   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 195
 196   /* Get the thread id for the ptrace call.  */
 197   tid = GET_THREAD_ID (inferior_ptid);
 198
 199   /* Read the floating point state.  */
 200   ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 201   if (ret < 0)
 202     {
 203       warning (_("Unable to fetch the floating point registers."));
 204       return;
 205     }
 206
 207   /* Store fpsr.  */
 208   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 209     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 210
 211   /* Store the floating point registers.  */
 212   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 213     if (REG_VALID == regcache_register_status (regcache, regno))
 214       collect_nwfpe_register (regcache, regno, fp);
 215
 216   ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 217   if (ret < 0)
 218     {
 219       warning (_("Unable to store floating point registers."));
 220       return;
 221     }
 222 }
 223
 224 /* Fetch a general register of the process and store into
 225    regcache.  */
 226
 227 static void
 228 fetch_register (struct regcache *regcache, int regno)
 229 {
 230   int ret, tid;
 231   elf_gregset_t regs;
 232
 233   /* Get the thread id for the ptrace call.  */
 234   tid = GET_THREAD_ID (inferior_ptid);
 235
 236   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 237   if (ret < 0)
 238     {
 239       warning (_("Unable to fetch general register."));
 240       return;
 241     }
 242
 243   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 244     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 245
 246   if (ARM_PS_REGNUM == regno)
 247     {
 248       if (arm_apcs_32)
 249         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 250                              (char *) &regs[ARM_CPSR_GREGNUM]);
 251       else
 252         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 253                              (char *) &regs[ARM_PC_REGNUM]);
 254     }
 255
 256   if (ARM_PC_REGNUM == regno)
 257     {
 258       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 259                               (get_regcache_arch (regcache),
 260                                regs[ARM_PC_REGNUM]);
 261       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 262                            (char *) &regs[ARM_PC_REGNUM]);
 263     }
 264 }
 265
 266 /* Fetch all general registers of the process and store into
 267    regcache.  */
 268
 269 static void
 270 fetch_regs (struct regcache *regcache)
 271 {
 272   int ret, regno, tid;
 273   elf_gregset_t regs;
 274
 275   /* Get the thread id for the ptrace call.  */
 276   tid = GET_THREAD_ID (inferior_ptid);
 277
 278   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 279   if (ret < 0)
 280     {
 281       warning (_("Unable to fetch general registers."));
 282       return;
 283     }
 284
 285   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 286     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 287
 288   if (arm_apcs_32)
 289     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 290                          (char *) &regs[ARM_CPSR_GREGNUM]);
 291   else
 292     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 293                          (char *) &regs[ARM_PC_REGNUM]);
 294
 295   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 296                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 297   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 298                        (char *) &regs[ARM_PC_REGNUM]);
 299 }
 300
 301 /* Store all general registers of the process from the values in
 302    regcache.  */
 303
 304 static void
 305 store_register (const struct regcache *regcache, int regno)
 306 {
 307   int ret, tid;
 308   elf_gregset_t regs;
 309
 310   if (REG_VALID != regcache_register_status (regcache, regno))
 311     return;
 312
 313   /* Get the thread id for the ptrace call.  */
 314   tid = GET_THREAD_ID (inferior_ptid);
 315
 316   /* Get the general registers from the process.  */
 317   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 318   if (ret < 0)
 319     {
 320       warning (_("Unable to fetch general registers."));
 321       return;
 322     }
 323
 324   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 325     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 326   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 327     regcache_raw_collect (regcache, regno,
 328                          (char *) &regs[ARM_CPSR_GREGNUM]);
 329   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 330     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 331                          (char *) &regs[ARM_PC_REGNUM]);
 332
 333   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 334   if (ret < 0)
 335     {
 336       warning (_("Unable to store general register."));
 337       return;
 338     }
 339 }
 340
 341 static void
 342 store_regs (const struct regcache *regcache)
 343 {
 344   int ret, regno, tid;
 345   elf_gregset_t regs;
 346
 347   /* Get the thread id for the ptrace call.  */
 348   tid = GET_THREAD_ID (inferior_ptid);
 349
 350   /* Fetch the general registers.  */
 351   ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 352   if (ret < 0)
 353     {
 354       warning (_("Unable to fetch general registers."));
 355       return;
 356     }
 357
 358   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 359     {
 360       if (REG_VALID == regcache_register_status (regcache, regno))
 361         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 362     }
 363
 364   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 365     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 366                          (char *) &regs[ARM_CPSR_GREGNUM]);
 367
 368   ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 369
 370   if (ret < 0)
 371     {
 372       warning (_("Unable to store general registers."));
 373       return;
 374     }
 375 }
 376
 377 /* Fetch all WMMX registers of the process and store into
 378    regcache.  */
 379
 380 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 381
 382 static void
 383 fetch_wmmx_regs (struct regcache *regcache)
 384 {
 385   char regbuf[IWMMXT_REGS_SIZE];
 386   int ret, regno, tid;
 387
 388   /* Get the thread id for the ptrace call.  */
 389   tid = GET_THREAD_ID (inferior_ptid);
 390
 391   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 392   if (ret < 0)
 393     {
 394       warning (_("Unable to fetch WMMX registers."));
 395       return;
 396     }
 397
 398   for (regno = 0; regno < 16; regno++)
 399     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 400                          &regbuf[regno * 8]);
 401
 402   for (regno = 0; regno < 2; regno++)
 403     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 404                          &regbuf[16 * 8 + regno * 4]);
 405
 406   for (regno = 0; regno < 4; regno++)
 407     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 408                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 409 }
 410
 411 static void
 412 store_wmmx_regs (const struct regcache *regcache)
 413 {
 414   char regbuf[IWMMXT_REGS_SIZE];
 415   int ret, regno, tid;
 416
 417   /* Get the thread id for the ptrace call.  */
 418   tid = GET_THREAD_ID (inferior_ptid);
 419
 420   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 421   if (ret < 0)
 422     {
 423       warning (_("Unable to fetch WMMX registers."));
 424       return;
 425     }
 426
 427   for (regno = 0; regno < 16; regno++)
 428     if (REG_VALID == regcache_register_status (regcache,
 429                                                regno + ARM_WR0_REGNUM))
 430       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 431                             &regbuf[regno * 8]);
 432
 433   for (regno = 0; regno < 2; regno++)
 434     if (REG_VALID == regcache_register_status (regcache,
 435                                                regno + ARM_WCSSF_REGNUM))
 436       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 437                             &regbuf[16 * 8 + regno * 4]);
 438
 439   for (regno = 0; regno < 4; regno++)
 440     if (REG_VALID == regcache_register_status (regcache,
 441                                                regno + ARM_WCGR0_REGNUM))
 442       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 443                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 444
 445   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 446
 447   if (ret < 0)
 448     {
 449       warning (_("Unable to store WMMX registers."));
 450       return;
 451     }
 452 }
 453
 454 /* Fetch and store VFP Registers.  The kernel object has space for 32
 455    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 456    VFPv3D16 target.  */
 457 #define VFP_REGS_SIZE (32 * 8 + 4)
 458
 459 static void
 460 fetch_vfp_regs (struct regcache *regcache)
 461 {
 462   char regbuf[VFP_REGS_SIZE];
 463   int ret, regno, tid;
 464
 465   /* Get the thread id for the ptrace call.  */
 466   tid = GET_THREAD_ID (inferior_ptid);
 467
 468   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 469   if (ret < 0)
 470     {
 471       warning (_("Unable to fetch VFP registers."));
 472       return;
 473     }
 474
 475   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 476     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 477                          (char *) regbuf + regno * 8);
 478
 479   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 480                        (char *) regbuf + 32 * 8);
 481 }
 482
 483 static void
 484 store_vfp_regs (const struct regcache *regcache)
 485 {
 486   char regbuf[VFP_REGS_SIZE];
 487   int ret, regno, tid;
 488
 489   /* Get the thread id for the ptrace call.  */
 490   tid = GET_THREAD_ID (inferior_ptid);
 491
 492   ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 493   if (ret < 0)
 494     {
 495       warning (_("Unable to fetch VFP registers (for update)."));
 496       return;
 497     }
 498
 499   for (regno = 0; regno < arm_linux_vfp_register_count; regno++)
 500     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 501                           (char *) regbuf + regno * 8);
 502
 503   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 504                         (char *) regbuf + 32 * 8);
 505
 506   ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 507
 508   if (ret < 0)
 509     {
 510       warning (_("Unable to store VFP registers."));
 511       return;
 512     }
 513 }
 514
 515 /* Fetch registers from the child process.  Fetch all registers if
 516    regno == -1, otherwise fetch all general registers or all floating
 517    point registers depending upon the value of regno.  */
 518
 519 static void
 520 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 521                                     struct regcache *regcache, int regno)
 522 {
 523   if (-1 == regno)
 524     {
 525       fetch_regs (regcache);
 526       fetch_fpregs (regcache);
 527       if (arm_linux_has_wmmx_registers)
 528         fetch_wmmx_regs (regcache);
 529       if (arm_linux_vfp_register_count > 0)
 530         fetch_vfp_regs (regcache);
 531     }
 532   else
 533     {
 534       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 535         fetch_register (regcache, regno);
 536       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 537         fetch_fpregister (regcache, regno);
 538       else if (arm_linux_has_wmmx_registers
 539                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 540         fetch_wmmx_regs (regcache);
 541       else if (arm_linux_vfp_register_count > 0
 542                && regno >= ARM_D0_REGNUM
 543                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 544         fetch_vfp_regs (regcache);
 545     }
 546 }
 547
 548 /* Store registers back into the inferior.  Store all registers if
 549    regno == -1, otherwise store all general registers or all floating
 550    point registers depending upon the value of regno.  */
 551
 552 static void
 553 arm_linux_store_inferior_registers (struct target_ops *ops,
 554                                     struct regcache *regcache, int regno)
 555 {
 556   if (-1 == regno)
 557     {
 558       store_regs (regcache);
 559       store_fpregs (regcache);
 560       if (arm_linux_has_wmmx_registers)
 561         store_wmmx_regs (regcache);
 562       if (arm_linux_vfp_register_count > 0)
 563         store_vfp_regs (regcache);
 564     }
 565   else
 566     {
 567       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 568         store_register (regcache, regno);
 569       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 570         store_fpregister (regcache, regno);
 571       else if (arm_linux_has_wmmx_registers
 572                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 573         store_wmmx_regs (regcache);
 574       else if (arm_linux_vfp_register_count > 0
 575                && regno >= ARM_D0_REGNUM
 576                && regno <= ARM_D0_REGNUM + arm_linux_vfp_register_count)
 577         store_vfp_regs (regcache);
 578     }
 579 }
 580
 581 /* Wrapper functions for the standard regset handling, used by
 582    thread debugging.  */
 583
 584 void
 585 fill_gregset (const struct regcache *regcache,
 586               gdb_gregset_t *gregsetp, int regno)
 587 {
 588   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 589 }
 590
 591 void
 592 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 593 {
 594   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 595 }
 596
 597 void
 598 fill_fpregset (const struct regcache *regcache,
 599                gdb_fpregset_t *fpregsetp, int regno)
 600 {
 601   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 602 }
 603
 604 /* Fill GDB's register array with the floating-point register values
 605    in *fpregsetp.  */
 606
 607 void
 608 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 609 {
 610   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 611 }
 612
 613 /* Fetch the thread-local storage pointer for libthread_db.  */
 614
 615 ps_err_e
 616 ps_get_thread_area (const struct ps_prochandle *ph,
 617                     lwpid_t lwpid, int idx, void **base)
 618 {
 619   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 620     return PS_ERR;
 621
 622   /* IDX is the bias from the thread pointer to the beginning of the
 623      thread descriptor.  It has to be subtracted due to implementation
 624      quirks in libthread_db.  */
 625   *base = (void *) ((char *)*base - idx);
 626
 627   return PS_OK;
 628 }
 629
 630 static const struct target_desc *
 631 arm_linux_read_description (struct target_ops *ops)
 632 {
 633   CORE_ADDR arm_hwcap = 0;
 634   arm_linux_has_wmmx_registers = 0;
 635   arm_linux_vfp_register_count = 0;
 636
 637   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 638     {
 639       return NULL;
 640     }
 641
 642   if (arm_hwcap & HWCAP_IWMMXT)
 643     {
 644       arm_linux_has_wmmx_registers = 1;
 645       return tdesc_arm_with_iwmmxt;
 646     }
 647
 648   if (arm_hwcap & HWCAP_VFP)
 649     {
 650       int pid;
 651       char *buf;
 652       const struct target_desc * result = NULL;
 653
 654       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 655          Neon with VFPv3-D32.  */
 656       if (arm_hwcap & HWCAP_NEON)
 657         {
 658           arm_linux_vfp_register_count = 32;
 659           result = tdesc_arm_with_neon;
 660         }
 661       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 662         {
 663           arm_linux_vfp_register_count = 32;
 664           result = tdesc_arm_with_vfpv3;
 665         }
 666       else
 667         {
 668           arm_linux_vfp_register_count = 16;
 669           result = tdesc_arm_with_vfpv2;
 670         }
 671
 672       /* Now make sure that the kernel supports reading these
 673          registers.  Support was added in 2.6.30.  */
 674       pid = GET_LWP (inferior_ptid);
 675       errno = 0;
 676       buf = alloca (VFP_REGS_SIZE);
 677       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 678           && errno == EIO)
 679         result = NULL;
 680
 681       return result;
 682     }
 683
 684   return NULL;
 685 }
 686
 687 /* Information describing the hardware breakpoint capabilities.  */
 688 struct arm_linux_hwbp_cap
 689 {
 690   gdb_byte arch;
 691   gdb_byte max_wp_length;
 692   gdb_byte wp_count;
 693   gdb_byte bp_count;
 694 };
 695
 696 /* Get hold of the Hardware Breakpoint information for the target we are
 697    attached to.  Returns NULL if the kernel doesn't support Hardware
 698    breakpoints at all, or a pointer to the information structure.  */
 699 static const struct arm_linux_hwbp_cap *
 700 arm_linux_get_hwbp_cap (void)
 701 {
 702   /* The info structure we return.  */
 703   static struct arm_linux_hwbp_cap info;
 704
 705   /* Is INFO in a good state?  -1 means that no attempt has been made to
 706      initialize INFO; 0 means an attempt has been made, but it failed; 1
 707      means INFO is in an initialized state.  */
 708   static int available = -1;
 709
 710   if (available == -1)
 711     {
 712       int tid;
 713       unsigned int val;
 714
 715       tid = GET_THREAD_ID (inferior_ptid);
 716       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 717         available = 0;
 718       else
 719         {
 720           info.arch = (gdb_byte)((val >> 24) & 0xff);
 721           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 722           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 723           info.bp_count = (gdb_byte)(val & 0xff);
 724           available = (info.arch != 0);
 725         }
 726     }
 727
 728   return available == 1 ? &info : NULL;
 729 }
 730
 731 /* How many hardware breakpoints are available?  */
 732 static int
 733 arm_linux_get_hw_breakpoint_count (void)
 734 {
 735   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 736   return cap != NULL ? cap->bp_count : 0;
 737 }
 738
 739 /* How many hardware watchpoints are available?  */
 740 static int
 741 arm_linux_get_hw_watchpoint_count (void)
 742 {
 743   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 744   return cap != NULL ? cap->wp_count : 0;
 745 }
 746
 747 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 748    there is not an appropriate resource available, otherwise returns 1.  */
 749 static int
 750 arm_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
 751 {
 752   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 753       || type == bp_access_watchpoint || type == bp_watchpoint)
 754     {
 755       if (cnt + ot > arm_linux_get_hw_watchpoint_count ())
 756         return -1;
 757     }
 758   else if (type == bp_hardware_breakpoint)
 759     {
 760       if (cnt > arm_linux_get_hw_breakpoint_count ())
 761         return -1;
 762     }
 763   else
 764     gdb_assert (FALSE);
 765
 766   return 1;
 767 }
 768
 769 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 770 typedef enum
 771 {
 772   arm_hwbp_break = 0,
 773   arm_hwbp_load = 1,
 774   arm_hwbp_store = 2,
 775   arm_hwbp_access = 3
 776 } arm_hwbp_type;
 777
 778 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 779 typedef unsigned int arm_hwbp_control_t;
 780
 781 /* Structure used to keep track of hardware break-/watch-points.  */
 782 struct arm_linux_hw_breakpoint
 783 {
 784   /* Address to break on, or being watched.  */
 785   unsigned int address;
 786   /* Control register for break-/watch- point.  */
 787   arm_hwbp_control_t control;
 788 };
 789
 790 /* Structure containing arrays of the break and watch points which are have
 791    active in each thread.
 792
 793    The Linux ptrace interface to hardware break-/watch-points presents the
 794    values in a vector centred around 0 (which is used fo generic information).
 795    Positive indicies refer to breakpoint addresses/control registers, negative
 796    indices to watchpoint addresses/control registers.
 797
 798    The Linux vector is indexed as follows:
 799       -((i << 1) + 2): Control register for watchpoint i.
 800       -((i << 1) + 1): Address register for watchpoint i.
 801                     0: Information register.
 802        ((i << 1) + 1): Address register for breakpoint i.
 803        ((i << 1) + 2): Control register for breakpoint i.
 804
 805    This structure is used as a per-thread cache of the state stored by the
 806    kernel, so that we don't need to keep calling into the kernel to find a
 807    free breakpoint.
 808
 809    We treat break-/watch-points with their enable bit clear as being deleted.
 810    */
 811 typedef struct arm_linux_thread_points
 812 {
 813   /* Thread ID.  */
 814   int tid;
 815   /* Breakpoints for thread.  */
 816   struct arm_linux_hw_breakpoint *bpts;
 817   /* Watchpoint for threads.  */
 818   struct arm_linux_hw_breakpoint *wpts;
 819 } *arm_linux_thread_points_p;
 820 DEF_VEC_P (arm_linux_thread_points_p);
 821
 822 /* Vector of hardware breakpoints for each thread.  */
 823 VEC(arm_linux_thread_points_p) *arm_threads = NULL;
 824
 825 /* Find the list of hardware break-/watch-points for a thread with id TID.
 826    If no list exists for TID we return NULL if ALLOC_NEW is 0, otherwise we
 827    create a new list and return that.  */
 828 static struct arm_linux_thread_points *
 829 arm_linux_find_breakpoints_by_tid (int tid, int alloc_new)
 830 {
 831   int i;
 832   struct arm_linux_thread_points *t;
 833
 834   for (i = 0; VEC_iterate (arm_linux_thread_points_p, arm_threads, i, t); ++i)
 835     {
 836       if (t->tid == tid)
 837         return t;
 838     }
 839
 840   t = NULL;
 841
 842   if (alloc_new)
 843     {
 844       t = xmalloc (sizeof (struct arm_linux_thread_points));
 845       t->tid = tid;
 846       t->bpts = xzalloc (arm_linux_get_hw_breakpoint_count ()
 847                          * sizeof (struct arm_linux_hw_breakpoint));
 848       t->wpts = xzalloc (arm_linux_get_hw_watchpoint_count ()
 849                          * sizeof (struct arm_linux_hw_breakpoint));
 850       VEC_safe_push (arm_linux_thread_points_p, arm_threads, t);
 851     }
 852
 853   return t;
 854 }
 855
 856 /* Initialize an ARM hardware break-/watch-point control register value.
 857    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 858    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 859    */
 860 static arm_hwbp_control_t
 861 arm_hwbp_control_initialize (unsigned byte_address_select,
 862                              arm_hwbp_type hwbp_type,
 863                              int enable)
 864 {
 865   gdb_assert ((byte_address_select & ~0xffU) == 0);
 866   gdb_assert (hwbp_type != arm_hwbp_break
 867               || ((byte_address_select & 0xfU) != 0));
 868
 869   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 870 }
 871
 872 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 873 static int
 874 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 875 {
 876   return control & 0x1;
 877 }
 878
 879 /* Change a breakpoint control word so that it is in the disabled state.  */
 880 static arm_hwbp_control_t
 881 arm_hwbp_control_disable (arm_hwbp_control_t control)
 882 {
 883   return control & ~0x1;
 884 }
 885
 886 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 887    enabled, and will point to the placed address of BP_TGT.  */
 888 static void
 889 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 890                                     struct bp_target_info *bp_tgt,
 891                                     struct arm_linux_hw_breakpoint *p)
 892 {
 893   unsigned mask;
 894   CORE_ADDR address = bp_tgt->placed_address;
 895
 896   /* We have to create a mask for the control register which says which bits
 897      of the word pointed to by address to break on.  */
 898   if (arm_pc_is_thumb (gdbarch, address))
 899     {
 900       mask = 0x3;
 901       address &= ~1;
 902     }
 903   else
 904     {
 905       mask = 0xf;
 906       address &= ~3;
 907     }
 908
 909   p->address = (unsigned int) address;
 910   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 911 }
 912
 913 /* Get the ARM hardware breakpoint type from the RW value we're given when
 914    asked to set a watchpoint.  */
 915 static arm_hwbp_type
 916 arm_linux_get_hwbp_type (int rw)
 917 {
 918   if (rw == hw_read)
 919     return arm_hwbp_load;
 920   else if (rw == hw_write)
 921     return arm_hwbp_store;
 922   else
 923     return arm_hwbp_access;
 924 }
 925
 926 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
 927    to LEN.  The type of watchpoint is given in RW.  */
 928 static void
 929 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
 930                                     struct arm_linux_hw_breakpoint *p)
 931 {
 932   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 933   unsigned mask;
 934
 935   gdb_assert (cap != NULL);
 936   gdb_assert (cap->max_wp_length != 0);
 937
 938   mask = (1 << len) - 1;
 939
 940   p->address = (unsigned int) addr;
 941   p->control = arm_hwbp_control_initialize (mask,
 942                                             arm_linux_get_hwbp_type (rw), 1);
 943 }
 944
 945 /* Are two break-/watch-points equal?  */
 946 static int
 947 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 948                                const struct arm_linux_hw_breakpoint *p2)
 949 {
 950   return p1->address == p2->address && p1->control == p2->control;
 951 }
 952
 953 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
 954    =1) BPT for thread TID.  */
 955 static void
 956 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
 957                                 int tid, int watchpoint)
 958 {
 959   struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 1);
 960   gdb_byte count, i;
 961   struct arm_linux_hw_breakpoint* bpts;
 962   int dir;
 963
 964   gdb_assert (t != NULL);
 965
 966   if (watchpoint)
 967     {
 968       count = arm_linux_get_hw_watchpoint_count ();
 969       bpts = t->wpts;
 970       dir = -1;
 971     }
 972   else
 973     {
 974       count = arm_linux_get_hw_breakpoint_count ();
 975       bpts = t->bpts;
 976       dir = 1;
 977     }
 978
 979   for (i = 0; i < count; ++i)
 980     if (!arm_hwbp_control_is_enabled (bpts[i].control))
 981       {
 982         errno = 0;
 983         if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 1),
 984                     &bpt->address) < 0)
 985           perror_with_name (_("Unexpected error setting breakpoint address"));
 986         if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
 987                     &bpt->control) < 0)
 988           perror_with_name (_("Unexpected error setting breakpoint"));
 989
 990         memcpy (bpts + i, bpt, sizeof (struct arm_linux_hw_breakpoint));
 991         break;
 992       }
 993
 994   gdb_assert (i != count);
 995 }
 996
 997 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
 998    (WATCHPOINT = 1) BPT for thread TID.  */
 999 static void
1000 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1001                                  int tid, int watchpoint)
1002 {
1003   struct arm_linux_thread_points *t = arm_linux_find_breakpoints_by_tid (tid, 0);
1004   gdb_byte count, i;
1005   struct arm_linux_hw_breakpoint *bpts;
1006   int dir;
1007
1008   gdb_assert (t != NULL);
1009
1010   if (watchpoint)
1011     {
1012       count = arm_linux_get_hw_watchpoint_count ();
1013       bpts = t->wpts;
1014       dir = -1;
1015     }
1016   else
1017     {
1018       count = arm_linux_get_hw_breakpoint_count ();
1019       bpts = t->bpts;
1020       dir = 1;
1021     }
1022
1023   for (i = 0; i < count; ++i)
1024     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1025       {
1026         errno = 0;
1027         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1028         if (ptrace (PTRACE_SETHBPREGS, tid, dir * ((i << 1) + 2),
1029                     &bpts[i].control) < 0)
1030           perror_with_name (_("Unexpected error clearing breakpoint"));
1031         break;
1032       }
1033
1034   gdb_assert (i != count);
1035 }
1036
1037 /* Insert a Hardware breakpoint.  */
1038 static int
1039 arm_linux_insert_hw_breakpoint (struct gdbarch *gdbarch,
1040                                 struct bp_target_info *bp_tgt)
1041 {
1042   struct lwp_info *lp;
1043   struct arm_linux_hw_breakpoint p;
1044
1045   if (arm_linux_get_hw_breakpoint_count () == 0)
1046     return -1;
1047
1048   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1049   ALL_LWPS (lp)
1050     arm_linux_insert_hw_breakpoint1 (&p, TIDGET (lp->ptid), 0);
1051
1052   return 0;
1053 }
1054
1055 /* Remove a hardware breakpoint.  */
1056 static int
1057 arm_linux_remove_hw_breakpoint (struct gdbarch *gdbarch,
1058                                 struct bp_target_info *bp_tgt)
1059 {
1060   struct lwp_info *lp;
1061   struct arm_linux_hw_breakpoint p;
1062
1063   if (arm_linux_get_hw_breakpoint_count () == 0)
1064     return -1;
1065
1066   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1067   ALL_LWPS (lp)
1068     arm_linux_remove_hw_breakpoint1 (&p, TIDGET (lp->ptid), 0);
1069
1070   return 0;
1071 }
1072
1073 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1074    ADDR?  */
1075 static int
1076 arm_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr, int len)
1077 {
1078   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1079   CORE_ADDR max_wp_length, aligned_addr;
1080
1081   /* Can not set watchpoints for zero or negative lengths.  */
1082   if (len <= 0)
1083     return 0;
1084
1085   /* Need to be able to use the ptrace interface.  */
1086   if (cap == NULL || cap->wp_count == 0)
1087     return 0;
1088
1089   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1090      range covered by a watchpoint.  */
1091   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1092   aligned_addr = addr & ~(max_wp_length - 1);
1093
1094   if (aligned_addr + max_wp_length < addr + len)
1095     return 0;
1096
1097   /* The current ptrace interface can only handle watchpoints that are a
1098      power of 2.  */
1099   if ((len & (len - 1)) != 0)
1100     return 0;
1101
1102   /* All tests passed so we must be able to set a watchpoint.  */
1103   return 1;
1104 }
1105
1106 /* Insert a Hardware breakpoint.  */
1107 static int
1108 arm_linux_insert_watchpoint (CORE_ADDR addr, int len, int rw,
1109                              struct expression *cond)
1110 {
1111   struct lwp_info *lp;
1112   struct arm_linux_hw_breakpoint p;
1113
1114   if (arm_linux_get_hw_watchpoint_count () == 0)
1115     return -1;
1116
1117   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1118   ALL_LWPS (lp)
1119     arm_linux_insert_hw_breakpoint1 (&p, TIDGET (lp->ptid), 1);
1120
1121   return 0;
1122 }
1123
1124 /* Remove a hardware breakpoint.  */
1125 static int
1126 arm_linux_remove_watchpoint (CORE_ADDR addr, int len, int rw,
1127                              struct expression *cond)
1128 {
1129   struct lwp_info *lp;
1130   struct arm_linux_hw_breakpoint p;
1131
1132   if (arm_linux_get_hw_watchpoint_count () == 0)
1133     return -1;
1134
1135   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1136   ALL_LWPS (lp)
1137     arm_linux_remove_hw_breakpoint1 (&p, TIDGET (lp->ptid), 1);
1138
1139   return 0;
1140 }
1141
1142 /* What was the data address the target was stopped on accessing.  */
1143 static int
1144 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1145 {
1146   siginfo_t siginfo;
1147   int slot;
1148
1149   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1150     return 0;
1151
1152   /* This must be a hardware breakpoint.  */
1153   if (siginfo.si_signo != SIGTRAP
1154       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1155     return 0;
1156
1157   /* We must be able to set hardware watchpoints.  */
1158   if (arm_linux_get_hw_watchpoint_count () == 0)
1159     return 0;
1160
1161   slot = siginfo.si_errno;
1162
1163   /* If we are in a positive slot then we're looking at a breakpoint and not
1164      a watchpoint.  */
1165   if (slot >= 0)
1166     return 0;
1167
1168   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1169   return 1;
1170 }
1171
1172 /* Has the target been stopped by hitting a watchpoint?  */
1173 static int
1174 arm_linux_stopped_by_watchpoint (void)
1175 {
1176   CORE_ADDR addr;
1177   return arm_linux_stopped_data_address (&current_target, &addr);
1178 }
1179
1180 static int
1181 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1182                                         CORE_ADDR addr,
1183                                         CORE_ADDR start, int length)
1184 {
1185   return start <= addr && start + length - 1 >= addr;
1186 }
1187
1188 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1189    in the parent thread to the child thread.  */
1190 static void
1191 arm_linux_new_thread (struct lwp_info *lp)
1192 {
1193   int tid = TIDGET (lp->ptid);
1194   const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
1195
1196   if (info != NULL)
1197     {
1198       int i;
1199       struct arm_linux_thread_points *p;
1200       struct arm_linux_hw_breakpoint *bpts;
1201
1202       if (VEC_empty (arm_linux_thread_points_p, arm_threads))
1203         return;
1204
1205       /* Get a list of breakpoints from any thread. */
1206       p = VEC_last (arm_linux_thread_points_p, arm_threads);
1207
1208       /* Copy that thread's breakpoints and watchpoints to the new thread. */
1209       for (i = 0; i < info->bp_count; i++)
1210         if (arm_hwbp_control_is_enabled (p->bpts[i].control))
1211           arm_linux_insert_hw_breakpoint1 (p->bpts + i, tid, 0);
1212       for (i = 0; i < info->wp_count; i++)
1213         if (arm_hwbp_control_is_enabled (p->wpts[i].control))
1214           arm_linux_insert_hw_breakpoint1 (p->wpts + i, tid, 1);
1215     }
1216 }
1217
1218 /* Handle thread exit.  Tidy up the memory that has been allocated for the
1219    thread.  */
1220 static void
1221 arm_linux_thread_exit (struct thread_info *tp, int silent)
1222 {
1223   const struct arm_linux_hwbp_cap *info = arm_linux_get_hwbp_cap ();
1224
1225   if (info != NULL)
1226     {
1227       int i;
1228       int tid = TIDGET (tp->ptid);
1229       struct arm_linux_thread_points *t = NULL, *p;
1230
1231       for (i = 0;
1232            VEC_iterate (arm_linux_thread_points_p, arm_threads, i, p); i++)
1233         {
1234           if (p->tid == tid)
1235             {
1236               t = p;
1237               break;
1238             }
1239         }
1240
1241       if (t == NULL)
1242         return;
1243
1244       VEC_unordered_remove (arm_linux_thread_points_p, arm_threads, i);
1245
1246       xfree (t->bpts);
1247       xfree (t->wpts);
1248       xfree (t);
1249     }
1250 }
1251
1252 void _initialize_arm_linux_nat (void);
1253
1254 void
1255 _initialize_arm_linux_nat (void)
1256 {
1257   struct target_ops *t;
1258
1259   /* Fill in the generic GNU/Linux methods.  */
1260   t = linux_target ();
1261
1262   /* Add our register access methods.  */
1263   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1264   t->to_store_registers = arm_linux_store_inferior_registers;
1265
1266   /* Add our hardware breakpoint and watchpoint implementation.  */
1267   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1268   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1269   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1270   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1271   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1272   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1273   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1274   t->to_stopped_data_address = arm_linux_stopped_data_address;
1275   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1276
1277   t->to_read_description = arm_linux_read_description;
1278
1279   /* Register the target.  */
1280   linux_nat_add_target (t);
1281
1282   /* Handle thread creation and exit */
1283   observer_attach_thread_exit (arm_linux_thread_exit);
1284   linux_nat_set_new_thread (t, arm_linux_new_thread);
1285 }