1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
3 2010, 2011 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #include "gdb_string.h"
26 #include "linux-nat.h"
27 #include "target-descriptions.h"
30 #include "gdbthread.h"
33 #include "arm-linux-tdep.h"
35 #include <elf/common.h>
37 #include <sys/ptrace.h>
38 #include <sys/utsname.h>
39 #include <sys/procfs.h>
41 /* Prototypes for supply_gregset etc. */
44 /* Defines ps_err_e, struct ps_prochandle. */
45 #include "gdb_proc_service.h"
47 #ifndef PTRACE_GET_THREAD_AREA
48 #define PTRACE_GET_THREAD_AREA 22
51 #ifndef PTRACE_GETWMMXREGS
52 #define PTRACE_GETWMMXREGS 18
53 #define PTRACE_SETWMMXREGS 19
56 #ifndef PTRACE_GETVFPREGS
57 #define PTRACE_GETVFPREGS 27
58 #define PTRACE_SETVFPREGS 28
61 #ifndef PTRACE_GETHBPREGS
62 #define PTRACE_GETHBPREGS 29
63 #define PTRACE_SETHBPREGS 30
66 /* A flag for whether the WMMX registers are available. */
67 static int arm_linux_has_wmmx_registers
;
69 /* The number of 64-bit VFP registers we have (expect this to be 0,
71 static int arm_linux_vfp_register_count
;
73 extern int arm_apcs_32
;
75 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
76 case we may be tracing more than one process at a time. In that
77 case, inferior_ptid will contain the main process ID and the
78 individual thread (process) ID. get_thread_id () is used to get
79 the thread id if it's available, and the process id otherwise. */
82 get_thread_id (ptid_t ptid
)
84 int tid
= TIDGET (ptid
);
90 #define GET_THREAD_ID(PTID) get_thread_id (PTID)
92 /* Get the value of a particular register from the floating point
93 state of the process and store it into regcache. */
96 fetch_fpregister (struct regcache
*regcache
, int regno
)
99 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
101 /* Get the thread id for the ptrace call. */
102 tid
= GET_THREAD_ID (inferior_ptid
);
104 /* Read the floating point state. */
105 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
108 warning (_("Unable to fetch floating point register."));
113 if (ARM_FPS_REGNUM
== regno
)
114 regcache_raw_supply (regcache
, ARM_FPS_REGNUM
,
115 fp
+ NWFPE_FPSR_OFFSET
);
117 /* Fetch the floating point register. */
118 if (regno
>= ARM_F0_REGNUM
&& regno
<= ARM_F7_REGNUM
)
119 supply_nwfpe_register (regcache
, regno
, fp
);
122 /* Get the whole floating point state of the process and store it
126 fetch_fpregs (struct regcache
*regcache
)
129 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
131 /* Get the thread id for the ptrace call. */
132 tid
= GET_THREAD_ID (inferior_ptid
);
134 /* Read the floating point state. */
135 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
138 warning (_("Unable to fetch the floating point registers."));
143 regcache_raw_supply (regcache
, ARM_FPS_REGNUM
,
144 fp
+ NWFPE_FPSR_OFFSET
);
146 /* Fetch the floating point registers. */
147 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
148 supply_nwfpe_register (regcache
, regno
, fp
);
151 /* Save a particular register into the floating point state of the
152 process using the contents from regcache. */
155 store_fpregister (const struct regcache
*regcache
, int regno
)
158 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
160 /* Get the thread id for the ptrace call. */
161 tid
= GET_THREAD_ID (inferior_ptid
);
163 /* Read the floating point state. */
164 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
167 warning (_("Unable to fetch the floating point registers."));
172 if (ARM_FPS_REGNUM
== regno
173 && REG_VALID
== regcache_register_status (regcache
, ARM_FPS_REGNUM
))
174 regcache_raw_collect (regcache
, ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
176 /* Store the floating point register. */
177 if (regno
>= ARM_F0_REGNUM
&& regno
<= ARM_F7_REGNUM
)
178 collect_nwfpe_register (regcache
, regno
, fp
);
180 ret
= ptrace (PTRACE_SETFPREGS
, tid
, 0, fp
);
183 warning (_("Unable to store floating point register."));
188 /* Save the whole floating point state of the process using
189 the contents from regcache. */
192 store_fpregs (const struct regcache
*regcache
)
195 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
197 /* Get the thread id for the ptrace call. */
198 tid
= GET_THREAD_ID (inferior_ptid
);
200 /* Read the floating point state. */
201 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
204 warning (_("Unable to fetch the floating point registers."));
209 if (REG_VALID
== regcache_register_status (regcache
, ARM_FPS_REGNUM
))
210 regcache_raw_collect (regcache
, ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
212 /* Store the floating point registers. */
213 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
214 if (REG_VALID
== regcache_register_status (regcache
, regno
))
215 collect_nwfpe_register (regcache
, regno
, fp
);
217 ret
= ptrace (PTRACE_SETFPREGS
, tid
, 0, fp
);
220 warning (_("Unable to store floating point registers."));
225 /* Fetch a general register of the process and store into
229 fetch_register (struct regcache
*regcache
, int regno
)
234 /* Get the thread id for the ptrace call. */
235 tid
= GET_THREAD_ID (inferior_ptid
);
237 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
240 warning (_("Unable to fetch general register."));
244 if (regno
>= ARM_A1_REGNUM
&& regno
< ARM_PC_REGNUM
)
245 regcache_raw_supply (regcache
, regno
, (char *) ®s
[regno
]);
247 if (ARM_PS_REGNUM
== regno
)
250 regcache_raw_supply (regcache
, ARM_PS_REGNUM
,
251 (char *) ®s
[ARM_CPSR_GREGNUM
]);
253 regcache_raw_supply (regcache
, ARM_PS_REGNUM
,
254 (char *) ®s
[ARM_PC_REGNUM
]);
257 if (ARM_PC_REGNUM
== regno
)
259 regs
[ARM_PC_REGNUM
] = gdbarch_addr_bits_remove
260 (get_regcache_arch (regcache
),
261 regs
[ARM_PC_REGNUM
]);
262 regcache_raw_supply (regcache
, ARM_PC_REGNUM
,
263 (char *) ®s
[ARM_PC_REGNUM
]);
267 /* Fetch all general registers of the process and store into
271 fetch_regs (struct regcache
*regcache
)
276 /* Get the thread id for the ptrace call. */
277 tid
= GET_THREAD_ID (inferior_ptid
);
279 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
282 warning (_("Unable to fetch general registers."));
286 for (regno
= ARM_A1_REGNUM
; regno
< ARM_PC_REGNUM
; regno
++)
287 regcache_raw_supply (regcache
, regno
, (char *) ®s
[regno
]);
290 regcache_raw_supply (regcache
, ARM_PS_REGNUM
,
291 (char *) ®s
[ARM_CPSR_GREGNUM
]);
293 regcache_raw_supply (regcache
, ARM_PS_REGNUM
,
294 (char *) ®s
[ARM_PC_REGNUM
]);
296 regs
[ARM_PC_REGNUM
] = gdbarch_addr_bits_remove
297 (get_regcache_arch (regcache
), regs
[ARM_PC_REGNUM
]);
298 regcache_raw_supply (regcache
, ARM_PC_REGNUM
,
299 (char *) ®s
[ARM_PC_REGNUM
]);
302 /* Store all general registers of the process from the values in
306 store_register (const struct regcache
*regcache
, int regno
)
311 if (REG_VALID
!= regcache_register_status (regcache
, regno
))
314 /* Get the thread id for the ptrace call. */
315 tid
= GET_THREAD_ID (inferior_ptid
);
317 /* Get the general registers from the process. */
318 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
321 warning (_("Unable to fetch general registers."));
325 if (regno
>= ARM_A1_REGNUM
&& regno
<= ARM_PC_REGNUM
)
326 regcache_raw_collect (regcache
, regno
, (char *) ®s
[regno
]);
327 else if (arm_apcs_32
&& regno
== ARM_PS_REGNUM
)
328 regcache_raw_collect (regcache
, regno
,
329 (char *) ®s
[ARM_CPSR_GREGNUM
]);
330 else if (!arm_apcs_32
&& regno
== ARM_PS_REGNUM
)
331 regcache_raw_collect (regcache
, ARM_PC_REGNUM
,
332 (char *) ®s
[ARM_PC_REGNUM
]);
334 ret
= ptrace (PTRACE_SETREGS
, tid
, 0, ®s
);
337 warning (_("Unable to store general register."));
343 store_regs (const struct regcache
*regcache
)
348 /* Get the thread id for the ptrace call. */
349 tid
= GET_THREAD_ID (inferior_ptid
);
351 /* Fetch the general registers. */
352 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
355 warning (_("Unable to fetch general registers."));
359 for (regno
= ARM_A1_REGNUM
; regno
<= ARM_PC_REGNUM
; regno
++)
361 if (REG_VALID
== regcache_register_status (regcache
, regno
))
362 regcache_raw_collect (regcache
, regno
, (char *) ®s
[regno
]);
365 if (arm_apcs_32
&& REG_VALID
== regcache_register_status (regcache
, ARM_PS_REGNUM
))
366 regcache_raw_collect (regcache
, ARM_PS_REGNUM
,
367 (char *) ®s
[ARM_CPSR_GREGNUM
]);
369 ret
= ptrace (PTRACE_SETREGS
, tid
, 0, ®s
);
373 warning (_("Unable to store general registers."));
378 /* Fetch all WMMX registers of the process and store into
381 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
384 fetch_wmmx_regs (struct regcache
*regcache
)
386 char regbuf
[IWMMXT_REGS_SIZE
];
389 /* Get the thread id for the ptrace call. */
390 tid
= GET_THREAD_ID (inferior_ptid
);
392 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
395 warning (_("Unable to fetch WMMX registers."));
399 for (regno
= 0; regno
< 16; regno
++)
400 regcache_raw_supply (regcache
, regno
+ ARM_WR0_REGNUM
,
403 for (regno
= 0; regno
< 2; regno
++)
404 regcache_raw_supply (regcache
, regno
+ ARM_WCSSF_REGNUM
,
405 ®buf
[16 * 8 + regno
* 4]);
407 for (regno
= 0; regno
< 4; regno
++)
408 regcache_raw_supply (regcache
, regno
+ ARM_WCGR0_REGNUM
,
409 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
413 store_wmmx_regs (const struct regcache
*regcache
)
415 char regbuf
[IWMMXT_REGS_SIZE
];
418 /* Get the thread id for the ptrace call. */
419 tid
= GET_THREAD_ID (inferior_ptid
);
421 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
424 warning (_("Unable to fetch WMMX registers."));
428 for (regno
= 0; regno
< 16; regno
++)
429 if (REG_VALID
== regcache_register_status (regcache
,
430 regno
+ ARM_WR0_REGNUM
))
431 regcache_raw_collect (regcache
, regno
+ ARM_WR0_REGNUM
,
434 for (regno
= 0; regno
< 2; regno
++)
435 if (REG_VALID
== regcache_register_status (regcache
,
436 regno
+ ARM_WCSSF_REGNUM
))
437 regcache_raw_collect (regcache
, regno
+ ARM_WCSSF_REGNUM
,
438 ®buf
[16 * 8 + regno
* 4]);
440 for (regno
= 0; regno
< 4; regno
++)
441 if (REG_VALID
== regcache_register_status (regcache
,
442 regno
+ ARM_WCGR0_REGNUM
))
443 regcache_raw_collect (regcache
, regno
+ ARM_WCGR0_REGNUM
,
444 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
446 ret
= ptrace (PTRACE_SETWMMXREGS
, tid
, 0, regbuf
);
450 warning (_("Unable to store WMMX registers."));
455 /* Fetch and store VFP Registers. The kernel object has space for 32
456 64-bit registers, and the FPSCR. This is even when on a VFPv2 or
458 #define VFP_REGS_SIZE (32 * 8 + 4)
461 fetch_vfp_regs (struct regcache
*regcache
)
463 char regbuf
[VFP_REGS_SIZE
];
466 /* Get the thread id for the ptrace call. */
467 tid
= GET_THREAD_ID (inferior_ptid
);
469 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
472 warning (_("Unable to fetch VFP registers."));
476 for (regno
= 0; regno
< arm_linux_vfp_register_count
; regno
++)
477 regcache_raw_supply (regcache
, regno
+ ARM_D0_REGNUM
,
478 (char *) regbuf
+ regno
* 8);
480 regcache_raw_supply (regcache
, ARM_FPSCR_REGNUM
,
481 (char *) regbuf
+ 32 * 8);
485 store_vfp_regs (const struct regcache
*regcache
)
487 char regbuf
[VFP_REGS_SIZE
];
490 /* Get the thread id for the ptrace call. */
491 tid
= GET_THREAD_ID (inferior_ptid
);
493 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
496 warning (_("Unable to fetch VFP registers (for update)."));
500 for (regno
= 0; regno
< arm_linux_vfp_register_count
; regno
++)
501 regcache_raw_collect (regcache
, regno
+ ARM_D0_REGNUM
,
502 (char *) regbuf
+ regno
* 8);
504 regcache_raw_collect (regcache
, ARM_FPSCR_REGNUM
,
505 (char *) regbuf
+ 32 * 8);
507 ret
= ptrace (PTRACE_SETVFPREGS
, tid
, 0, regbuf
);
511 warning (_("Unable to store VFP registers."));
516 /* Fetch registers from the child process. Fetch all registers if
517 regno == -1, otherwise fetch all general registers or all floating
518 point registers depending upon the value of regno. */
521 arm_linux_fetch_inferior_registers (struct target_ops
*ops
,
522 struct regcache
*regcache
, int regno
)
526 fetch_regs (regcache
);
527 fetch_fpregs (regcache
);
528 if (arm_linux_has_wmmx_registers
)
529 fetch_wmmx_regs (regcache
);
530 if (arm_linux_vfp_register_count
> 0)
531 fetch_vfp_regs (regcache
);
535 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
536 fetch_register (regcache
, regno
);
537 else if (regno
>= ARM_F0_REGNUM
&& regno
<= ARM_FPS_REGNUM
)
538 fetch_fpregister (regcache
, regno
);
539 else if (arm_linux_has_wmmx_registers
540 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
541 fetch_wmmx_regs (regcache
);
542 else if (arm_linux_vfp_register_count
> 0
543 && regno
>= ARM_D0_REGNUM
544 && regno
<= ARM_D0_REGNUM
+ arm_linux_vfp_register_count
)
545 fetch_vfp_regs (regcache
);
549 /* Store registers back into the inferior. Store all registers if
550 regno == -1, otherwise store all general registers or all floating
551 point registers depending upon the value of regno. */
554 arm_linux_store_inferior_registers (struct target_ops
*ops
,
555 struct regcache
*regcache
, int regno
)
559 store_regs (regcache
);
560 store_fpregs (regcache
);
561 if (arm_linux_has_wmmx_registers
)
562 store_wmmx_regs (regcache
);
563 if (arm_linux_vfp_register_count
> 0)
564 store_vfp_regs (regcache
);
568 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
569 store_register (regcache
, regno
);
570 else if ((regno
>= ARM_F0_REGNUM
) && (regno
<= ARM_FPS_REGNUM
))
571 store_fpregister (regcache
, regno
);
572 else if (arm_linux_has_wmmx_registers
573 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
574 store_wmmx_regs (regcache
);
575 else if (arm_linux_vfp_register_count
> 0
576 && regno
>= ARM_D0_REGNUM
577 && regno
<= ARM_D0_REGNUM
+ arm_linux_vfp_register_count
)
578 store_vfp_regs (regcache
);
582 /* Wrapper functions for the standard regset handling, used by
586 fill_gregset (const struct regcache
*regcache
,
587 gdb_gregset_t
*gregsetp
, int regno
)
589 arm_linux_collect_gregset (NULL
, regcache
, regno
, gregsetp
, 0);
593 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
595 arm_linux_supply_gregset (NULL
, regcache
, -1, gregsetp
, 0);
599 fill_fpregset (const struct regcache
*regcache
,
600 gdb_fpregset_t
*fpregsetp
, int regno
)
602 arm_linux_collect_nwfpe (NULL
, regcache
, regno
, fpregsetp
, 0);
605 /* Fill GDB's register array with the floating-point register values
609 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
611 arm_linux_supply_nwfpe (NULL
, regcache
, -1, fpregsetp
, 0);
614 /* Fetch the thread-local storage pointer for libthread_db. */
617 ps_get_thread_area (const struct ps_prochandle
*ph
,
618 lwpid_t lwpid
, int idx
, void **base
)
620 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
623 /* IDX is the bias from the thread pointer to the beginning of the
624 thread descriptor. It has to be subtracted due to implementation
625 quirks in libthread_db. */
626 *base
= (void *) ((char *)*base
- idx
);
631 static const struct target_desc
*
632 arm_linux_read_description (struct target_ops
*ops
)
634 CORE_ADDR arm_hwcap
= 0;
635 arm_linux_has_wmmx_registers
= 0;
636 arm_linux_vfp_register_count
= 0;
638 if (target_auxv_search (ops
, AT_HWCAP
, &arm_hwcap
) != 1)
643 if (arm_hwcap
& HWCAP_IWMMXT
)
645 arm_linux_has_wmmx_registers
= 1;
646 return tdesc_arm_with_iwmmxt
;
649 if (arm_hwcap
& HWCAP_VFP
)
653 const struct target_desc
* result
= NULL
;
655 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
656 Neon with VFPv3-D32. */
657 if (arm_hwcap
& HWCAP_NEON
)
659 arm_linux_vfp_register_count
= 32;
660 result
= tdesc_arm_with_neon
;
662 else if ((arm_hwcap
& (HWCAP_VFPv3
| HWCAP_VFPv3D16
)) == HWCAP_VFPv3
)
664 arm_linux_vfp_register_count
= 32;
665 result
= tdesc_arm_with_vfpv3
;
669 arm_linux_vfp_register_count
= 16;
670 result
= tdesc_arm_with_vfpv2
;
673 /* Now make sure that the kernel supports reading these
674 registers. Support was added in 2.6.30. */
675 pid
= GET_LWP (inferior_ptid
);
677 buf
= alloca (VFP_REGS_SIZE
);
678 if (ptrace (PTRACE_GETVFPREGS
, pid
, 0, buf
) < 0
688 /* Information describing the hardware breakpoint capabilities. */
689 struct arm_linux_hwbp_cap
692 gdb_byte max_wp_length
;
697 /* Get hold of the Hardware Breakpoint information for the target we are
698 attached to. Returns NULL if the kernel doesn't support Hardware
699 breakpoints at all, or a pointer to the information structure. */
700 static const struct arm_linux_hwbp_cap
*
701 arm_linux_get_hwbp_cap (void)
703 /* The info structure we return. */
704 static struct arm_linux_hwbp_cap info
;
706 /* Is INFO in a good state? -1 means that no attempt has been made to
707 initialize INFO; 0 means an attempt has been made, but it failed; 1
708 means INFO is in an initialized state. */
709 static int available
= -1;
716 tid
= GET_THREAD_ID (inferior_ptid
);
717 if (ptrace (PTRACE_GETHBPREGS
, tid
, 0, &val
) < 0)
721 info
.arch
= (gdb_byte
)((val
>> 24) & 0xff);
722 info
.max_wp_length
= (gdb_byte
)((val
>> 16) & 0xff);
723 info
.wp_count
= (gdb_byte
)((val
>> 8) & 0xff);
724 info
.bp_count
= (gdb_byte
)(val
& 0xff);
725 available
= (info
.arch
!= 0);
729 return available
== 1 ? &info
: NULL
;
732 /* How many hardware breakpoints are available? */
734 arm_linux_get_hw_breakpoint_count (void)
736 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
737 return cap
!= NULL
? cap
->bp_count
: 0;
740 /* How many hardware watchpoints are available? */
742 arm_linux_get_hw_watchpoint_count (void)
744 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
745 return cap
!= NULL
? cap
->wp_count
: 0;
748 /* Have we got a free break-/watch-point available for use? Returns -1 if
749 there is not an appropriate resource available, otherwise returns 1. */
751 arm_linux_can_use_hw_breakpoint (int type
, int cnt
, int ot
)
753 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
754 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
756 if (cnt
+ ot
> arm_linux_get_hw_watchpoint_count ())
759 else if (type
== bp_hardware_breakpoint
)
761 if (cnt
> arm_linux_get_hw_breakpoint_count ())
770 /* Enum describing the different types of ARM hardware break-/watch-points. */
779 /* Type describing an ARM Hardware Breakpoint Control register value. */
780 typedef unsigned int arm_hwbp_control_t
;
782 /* Structure used to keep track of hardware break-/watch-points. */
783 struct arm_linux_hw_breakpoint
785 /* Address to break on, or being watched. */
786 unsigned int address
;
787 /* Control register for break-/watch- point. */
788 arm_hwbp_control_t control
;
791 /* Structure containing arrays of the break and watch points which are have
792 active in each thread.
794 The Linux ptrace interface to hardware break-/watch-points presents the
795 values in a vector centred around 0 (which is used fo generic information).
796 Positive indicies refer to breakpoint addresses/control registers, negative
797 indices to watchpoint addresses/control registers.
799 The Linux vector is indexed as follows:
800 -((i << 1) + 2): Control register for watchpoint i.
801 -((i << 1) + 1): Address register for watchpoint i.
802 0: Information register.
803 ((i << 1) + 1): Address register for breakpoint i.
804 ((i << 1) + 2): Control register for breakpoint i.
806 This structure is used as a per-thread cache of the state stored by the
807 kernel, so that we don't need to keep calling into the kernel to find a
810 We treat break-/watch-points with their enable bit clear as being deleted.
812 typedef struct arm_linux_thread_points
816 /* Breakpoints for thread. */
817 struct arm_linux_hw_breakpoint
*bpts
;
818 /* Watchpoint for threads. */
819 struct arm_linux_hw_breakpoint
*wpts
;
820 } *arm_linux_thread_points_p
;
821 DEF_VEC_P (arm_linux_thread_points_p
);
823 /* Vector of hardware breakpoints for each thread. */
824 VEC(arm_linux_thread_points_p
) *arm_threads
= NULL
;
826 /* Find the list of hardware break-/watch-points for a thread with id TID.
827 If no list exists for TID we return NULL if ALLOC_NEW is 0, otherwise we
828 create a new list and return that. */
829 static struct arm_linux_thread_points
*
830 arm_linux_find_breakpoints_by_tid (int tid
, int alloc_new
)
833 struct arm_linux_thread_points
*t
;
835 for (i
= 0; VEC_iterate (arm_linux_thread_points_p
, arm_threads
, i
, t
); ++i
)
845 t
= xmalloc (sizeof (struct arm_linux_thread_points
));
847 t
->bpts
= xzalloc (arm_linux_get_hw_breakpoint_count ()
848 * sizeof (struct arm_linux_hw_breakpoint
));
849 t
->wpts
= xzalloc (arm_linux_get_hw_watchpoint_count ()
850 * sizeof (struct arm_linux_hw_breakpoint
));
851 VEC_safe_push (arm_linux_thread_points_p
, arm_threads
, t
);
857 /* Initialize an ARM hardware break-/watch-point control register value.
858 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
859 type of break-/watch-point; ENABLE indicates whether the point is enabled.
861 static arm_hwbp_control_t
862 arm_hwbp_control_initialize (unsigned byte_address_select
,
863 arm_hwbp_type hwbp_type
,
866 gdb_assert ((byte_address_select
& ~0xffU
) == 0);
867 gdb_assert (hwbp_type
!= arm_hwbp_break
868 || ((byte_address_select
& 0xfU
) != 0));
870 return (byte_address_select
<< 5) | (hwbp_type
<< 3) | (3 << 1) | enable
;
873 /* Does the breakpoint control value CONTROL have the enable bit set? */
875 arm_hwbp_control_is_enabled (arm_hwbp_control_t control
)
877 return control
& 0x1;
880 /* Change a breakpoint control word so that it is in the disabled state. */
881 static arm_hwbp_control_t
882 arm_hwbp_control_disable (arm_hwbp_control_t control
)
884 return control
& ~0x1;
887 /* Initialise the hardware breakpoint structure P. The breakpoint will be
888 enabled, and will point to the placed address of BP_TGT. */
890 arm_linux_hw_breakpoint_initialize (struct gdbarch
*gdbarch
,
891 struct bp_target_info
*bp_tgt
,
892 struct arm_linux_hw_breakpoint
*p
)
895 CORE_ADDR address
= bp_tgt
->placed_address
;
897 /* We have to create a mask for the control register which says which bits
898 of the word pointed to by address to break on. */
899 if (arm_pc_is_thumb (gdbarch
, address
))
900 mask
= 0x3 << (address
& 2);
904 p
->address
= (unsigned int) (address
& ~3);
905 p
->control
= arm_hwbp_control_initialize (mask
, arm_hwbp_break
, 1);
908 /* Get the ARM hardware breakpoint type from the RW value we're given when
909 asked to set a watchpoint. */
911 arm_linux_get_hwbp_type (int rw
)
914 return arm_hwbp_load
;
915 else if (rw
== hw_write
)
916 return arm_hwbp_store
;
918 return arm_hwbp_access
;
921 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
922 to LEN. The type of watchpoint is given in RW. */
924 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr
, int len
, int rw
,
925 struct arm_linux_hw_breakpoint
*p
)
927 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
930 gdb_assert (cap
!= NULL
);
931 gdb_assert (cap
->max_wp_length
!= 0);
933 mask
= (1 << len
) - 1;
935 p
->address
= (unsigned int) addr
;
936 p
->control
= arm_hwbp_control_initialize (mask
,
937 arm_linux_get_hwbp_type (rw
), 1);
940 /* Are two break-/watch-points equal? */
942 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint
*p1
,
943 const struct arm_linux_hw_breakpoint
*p2
)
945 return p1
->address
== p2
->address
&& p1
->control
== p2
->control
;
948 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
949 =1) BPT for thread TID. */
951 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
* bpt
,
952 int tid
, int watchpoint
)
954 struct arm_linux_thread_points
*t
= arm_linux_find_breakpoints_by_tid (tid
, 1);
956 struct arm_linux_hw_breakpoint
* bpts
;
959 gdb_assert (t
!= NULL
);
963 count
= arm_linux_get_hw_watchpoint_count ();
969 count
= arm_linux_get_hw_breakpoint_count ();
974 for (i
= 0; i
< count
; ++i
)
975 if (!arm_hwbp_control_is_enabled (bpts
[i
].control
))
978 if (ptrace (PTRACE_SETHBPREGS
, tid
, dir
* ((i
<< 1) + 1),
980 perror_with_name (_("Unexpected error setting breakpoint address"));
981 if (ptrace (PTRACE_SETHBPREGS
, tid
, dir
* ((i
<< 1) + 2),
983 perror_with_name (_("Unexpected error setting breakpoint"));
985 memcpy (bpts
+ i
, bpt
, sizeof (struct arm_linux_hw_breakpoint
));
989 gdb_assert (i
!= count
);
992 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
993 (WATCHPOINT = 1) BPT for thread TID. */
995 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
*bpt
,
996 int tid
, int watchpoint
)
998 struct arm_linux_thread_points
*t
= arm_linux_find_breakpoints_by_tid (tid
, 0);
1000 struct arm_linux_hw_breakpoint
*bpts
;
1003 gdb_assert (t
!= NULL
);
1007 count
= arm_linux_get_hw_watchpoint_count ();
1013 count
= arm_linux_get_hw_breakpoint_count ();
1018 for (i
= 0; i
< count
; ++i
)
1019 if (arm_linux_hw_breakpoint_equal (bpt
, bpts
+ i
))
1022 bpts
[i
].control
= arm_hwbp_control_disable (bpts
[i
].control
);
1023 if (ptrace (PTRACE_SETHBPREGS
, tid
, dir
* ((i
<< 1) + 2),
1024 &bpts
[i
].control
) < 0)
1025 perror_with_name (_("Unexpected error clearing breakpoint"));
1029 gdb_assert (i
!= count
);
1032 /* Insert a Hardware breakpoint. */
1034 arm_linux_insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1035 struct bp_target_info
*bp_tgt
)
1037 struct lwp_info
*lp
;
1038 struct arm_linux_hw_breakpoint p
;
1040 if (arm_linux_get_hw_breakpoint_count () == 0)
1043 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1045 arm_linux_insert_hw_breakpoint1 (&p
, TIDGET (lp
->ptid
), 0);
1050 /* Remove a hardware breakpoint. */
1052 arm_linux_remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1053 struct bp_target_info
*bp_tgt
)
1055 struct lwp_info
*lp
;
1056 struct arm_linux_hw_breakpoint p
;
1058 if (arm_linux_get_hw_breakpoint_count () == 0)
1061 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1063 arm_linux_remove_hw_breakpoint1 (&p
, TIDGET (lp
->ptid
), 0);
1068 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1071 arm_linux_region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1073 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
1074 CORE_ADDR max_wp_length
, aligned_addr
;
1076 /* Can not set watchpoints for zero or negative lengths. */
1080 /* Need to be able to use the ptrace interface. */
1081 if (cap
== NULL
|| cap
->wp_count
== 0)
1084 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1085 range covered by a watchpoint. */
1086 max_wp_length
= (CORE_ADDR
)cap
->max_wp_length
;
1087 aligned_addr
= addr
& ~(max_wp_length
- 1);
1089 if (aligned_addr
+ max_wp_length
< addr
+ len
)
1092 /* The current ptrace interface can only handle watchpoints that are a
1094 if ((len
& (len
- 1)) != 0)
1097 /* All tests passed so we must be able to set a watchpoint. */
1101 /* Insert a Hardware breakpoint. */
1103 arm_linux_insert_watchpoint (CORE_ADDR addr
, int len
, int rw
,
1104 struct expression
*cond
)
1106 struct lwp_info
*lp
;
1107 struct arm_linux_hw_breakpoint p
;
1109 if (arm_linux_get_hw_watchpoint_count () == 0)
1112 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1114 arm_linux_insert_hw_breakpoint1 (&p
, TIDGET (lp
->ptid
), 1);
1119 /* Remove a hardware breakpoint. */
1121 arm_linux_remove_watchpoint (CORE_ADDR addr
, int len
, int rw
,
1122 struct expression
*cond
)
1124 struct lwp_info
*lp
;
1125 struct arm_linux_hw_breakpoint p
;
1127 if (arm_linux_get_hw_watchpoint_count () == 0)
1130 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1132 arm_linux_remove_hw_breakpoint1 (&p
, TIDGET (lp
->ptid
), 1);
1137 /* What was the data address the target was stopped on accessing. */
1139 arm_linux_stopped_data_address (struct target_ops
*target
, CORE_ADDR
*addr_p
)
1141 struct siginfo
*siginfo_p
= linux_nat_get_siginfo (inferior_ptid
);
1142 int slot
= siginfo_p
->si_errno
;
1144 /* This must be a hardware breakpoint. */
1145 if (siginfo_p
->si_signo
!= SIGTRAP
1146 || (siginfo_p
->si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1149 /* We must be able to set hardware watchpoints. */
1150 if (arm_linux_get_hw_watchpoint_count () == 0)
1153 /* If we are in a positive slot then we're looking at a breakpoint and not
1158 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo_p
->si_addr
;
1162 /* Has the target been stopped by hitting a watchpoint? */
1164 arm_linux_stopped_by_watchpoint (void)
1167 return arm_linux_stopped_data_address (¤t_target
, &addr
);
1171 arm_linux_watchpoint_addr_within_range (struct target_ops
*target
,
1173 CORE_ADDR start
, int length
)
1175 return start
<= addr
&& start
+ length
- 1 >= addr
;
1178 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1179 in the parent thread to the child thread. */
1181 arm_linux_new_thread (struct lwp_info
*lp
)
1183 int tid
= TIDGET (lp
->ptid
);
1184 const struct arm_linux_hwbp_cap
*info
= arm_linux_get_hwbp_cap ();
1189 struct arm_linux_thread_points
*p
;
1190 struct arm_linux_hw_breakpoint
*bpts
;
1192 if (VEC_empty (arm_linux_thread_points_p
, arm_threads
))
1195 /* Get a list of breakpoints from any thread. */
1196 p
= VEC_last (arm_linux_thread_points_p
, arm_threads
);
1198 /* Copy that thread's breakpoints and watchpoints to the new thread. */
1199 for (i
= 0; i
< info
->bp_count
; i
++)
1200 if (arm_hwbp_control_is_enabled (p
->bpts
[i
].control
))
1201 arm_linux_insert_hw_breakpoint1 (p
->bpts
+ i
, tid
, 0);
1202 for (i
= 0; i
< info
->wp_count
; i
++)
1203 if (arm_hwbp_control_is_enabled (p
->wpts
[i
].control
))
1204 arm_linux_insert_hw_breakpoint1 (p
->wpts
+ i
, tid
, 1);
1208 /* Handle thread exit. Tidy up the memory that has been allocated for the
1211 arm_linux_thread_exit (struct thread_info
*tp
, int silent
)
1213 const struct arm_linux_hwbp_cap
*info
= arm_linux_get_hwbp_cap ();
1218 int tid
= TIDGET (tp
->ptid
);
1219 struct arm_linux_thread_points
*t
= NULL
, *p
;
1222 VEC_iterate (arm_linux_thread_points_p
, arm_threads
, i
, p
); i
++)
1234 VEC_unordered_remove (arm_linux_thread_points_p
, arm_threads
, i
);
1242 void _initialize_arm_linux_nat (void);
1245 _initialize_arm_linux_nat (void)
1247 struct target_ops
*t
;
1249 /* Fill in the generic GNU/Linux methods. */
1250 t
= linux_target ();
1252 /* Add our register access methods. */
1253 t
->to_fetch_registers
= arm_linux_fetch_inferior_registers
;
1254 t
->to_store_registers
= arm_linux_store_inferior_registers
;
1256 /* Add our hardware breakpoint and watchpoint implementation. */
1257 t
->to_can_use_hw_breakpoint
= arm_linux_can_use_hw_breakpoint
;
1258 t
->to_insert_hw_breakpoint
= arm_linux_insert_hw_breakpoint
;
1259 t
->to_remove_hw_breakpoint
= arm_linux_remove_hw_breakpoint
;
1260 t
->to_region_ok_for_hw_watchpoint
= arm_linux_region_ok_for_hw_watchpoint
;
1261 t
->to_insert_watchpoint
= arm_linux_insert_watchpoint
;
1262 t
->to_remove_watchpoint
= arm_linux_remove_watchpoint
;
1263 t
->to_stopped_by_watchpoint
= arm_linux_stopped_by_watchpoint
;
1264 t
->to_stopped_data_address
= arm_linux_stopped_data_address
;
1265 t
->to_watchpoint_addr_within_range
= arm_linux_watchpoint_addr_within_range
;
1267 t
->to_read_description
= arm_linux_read_description
;
1269 /* Register the target. */
1270 linux_nat_add_target (t
);
1272 /* Handle thread creation and exit */
1273 observer_attach_thread_exit (arm_linux_thread_exit
);
1274 linux_nat_set_new_thread (t
, arm_linux_new_thread
);