gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2016 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32 #include "aarch32-linux-nat.h"
  33
  34 #include <elf/common.h>
  35 #include <sys/user.h>
  36 #include "nat/gdb_ptrace.h"
  37 #include <sys/utsname.h>
  38 #include <sys/procfs.h>
  39
  40 #include "nat/linux-ptrace.h"
  41
  42 /* Prototypes for supply_gregset etc.  */
  43 #include "gregset.h"
  44
  45 /* Defines ps_err_e, struct ps_prochandle.  */
  46 #include "gdb_proc_service.h"
  47
  48 #ifndef PTRACE_GET_THREAD_AREA
  49 #define PTRACE_GET_THREAD_AREA 22
  50 #endif
  51
  52 #ifndef PTRACE_GETWMMXREGS
  53 #define PTRACE_GETWMMXREGS 18
  54 #define PTRACE_SETWMMXREGS 19
  55 #endif
  56
  57 #ifndef PTRACE_GETVFPREGS
  58 #define PTRACE_GETVFPREGS 27
  59 #define PTRACE_SETVFPREGS 28
  60 #endif
  61
  62 #ifndef PTRACE_GETHBPREGS
  63 #define PTRACE_GETHBPREGS 29
  64 #define PTRACE_SETHBPREGS 30
  65 #endif
  66
  67 extern int arm_apcs_32;
  68
  69 /* Get the whole floating point state of the process and store it
  70    into regcache.  */
  71
  72 static void
  73 fetch_fpregs (struct regcache *regcache)
  74 {
  75   int ret, regno, tid;
  76   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  77
  78   /* Get the thread id for the ptrace call.  */
  79   tid = ptid_get_lwp (inferior_ptid);
  80
  81   /* Read the floating point state.  */
  82   if (have_ptrace_getregset == TRIBOOL_TRUE)
  83     {
  84       struct iovec iov;
  85
  86       iov.iov_base = &fp;
  87       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
  88
  89       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
  90     }
  91   else
  92     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
  93
  94   if (ret < 0)
  95     perror_with_name (_("Unable to fetch the floating point registers."));
  96
  97   /* Fetch fpsr.  */
  98   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
  99                        fp + NWFPE_FPSR_OFFSET);
 100
 101   /* Fetch the floating point registers.  */
 102   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 103     supply_nwfpe_register (regcache, regno, fp);
 104 }
 105
 106 /* Save the whole floating point state of the process using
 107    the contents from regcache.  */
 108
 109 static void
 110 store_fpregs (const struct regcache *regcache)
 111 {
 112   int ret, regno, tid;
 113   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 114
 115   /* Get the thread id for the ptrace call.  */
 116   tid = ptid_get_lwp (inferior_ptid);
 117
 118   /* Read the floating point state.  */
 119   if (have_ptrace_getregset == TRIBOOL_TRUE)
 120     {
 121       elf_fpregset_t fpregs;
 122       struct iovec iov;
 123
 124       iov.iov_base = &fpregs;
 125       iov.iov_len = sizeof (fpregs);
 126
 127       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 128     }
 129   else
 130     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 131
 132   if (ret < 0)
 133     perror_with_name (_("Unable to fetch the floating point registers."));
 134
 135   /* Store fpsr.  */
 136   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 137     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 138
 139   /* Store the floating point registers.  */
 140   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 141     if (REG_VALID == regcache_register_status (regcache, regno))
 142       collect_nwfpe_register (regcache, regno, fp);
 143
 144   if (have_ptrace_getregset == TRIBOOL_TRUE)
 145     {
 146       struct iovec iov;
 147
 148       iov.iov_base = &fp;
 149       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 150
 151       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 152     }
 153   else
 154     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 155
 156   if (ret < 0)
 157     perror_with_name (_("Unable to store floating point registers."));
 158 }
 159
 160 /* Fetch all general registers of the process and store into
 161    regcache.  */
 162
 163 static void
 164 fetch_regs (struct regcache *regcache)
 165 {
 166   int ret, regno, tid;
 167   elf_gregset_t regs;
 168
 169   /* Get the thread id for the ptrace call.  */
 170   tid = ptid_get_lwp (inferior_ptid);
 171
 172   if (have_ptrace_getregset == TRIBOOL_TRUE)
 173     {
 174       struct iovec iov;
 175
 176       iov.iov_base = &regs;
 177       iov.iov_len = sizeof (regs);
 178
 179       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 180     }
 181   else
 182     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 183
 184   if (ret < 0)
 185     perror_with_name (_("Unable to fetch general registers."));
 186
 187   aarch32_gp_regcache_supply (regcache, (uint32_t *) regs, arm_apcs_32);
 188 }
 189
 190 static void
 191 store_regs (const struct regcache *regcache)
 192 {
 193   int ret, regno, tid;
 194   elf_gregset_t regs;
 195
 196   /* Get the thread id for the ptrace call.  */
 197   tid = ptid_get_lwp (inferior_ptid);
 198
 199   /* Fetch the general registers.  */
 200   if (have_ptrace_getregset == TRIBOOL_TRUE)
 201     {
 202       struct iovec iov;
 203
 204       iov.iov_base = &regs;
 205       iov.iov_len = sizeof (regs);
 206
 207       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 208     }
 209   else
 210     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 211
 212   if (ret < 0)
 213     perror_with_name (_("Unable to fetch general registers."));
 214
 215   aarch32_gp_regcache_collect (regcache, (uint32_t *) regs, arm_apcs_32);
 216
 217   if (have_ptrace_getregset == TRIBOOL_TRUE)
 218     {
 219       struct iovec iov;
 220
 221       iov.iov_base = &regs;
 222       iov.iov_len = sizeof (regs);
 223
 224       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 225     }
 226   else
 227     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 228
 229   if (ret < 0)
 230     perror_with_name (_("Unable to store general registers."));
 231 }
 232
 233 /* Fetch all WMMX registers of the process and store into
 234    regcache.  */
 235
 236 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 237
 238 static void
 239 fetch_wmmx_regs (struct regcache *regcache)
 240 {
 241   char regbuf[IWMMXT_REGS_SIZE];
 242   int ret, regno, tid;
 243
 244   /* Get the thread id for the ptrace call.  */
 245   tid = ptid_get_lwp (inferior_ptid);
 246
 247   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 248   if (ret < 0)
 249     perror_with_name (_("Unable to fetch WMMX registers."));
 250
 251   for (regno = 0; regno < 16; regno++)
 252     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 253                          &regbuf[regno * 8]);
 254
 255   for (regno = 0; regno < 2; regno++)
 256     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 257                          &regbuf[16 * 8 + regno * 4]);
 258
 259   for (regno = 0; regno < 4; regno++)
 260     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 261                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 262 }
 263
 264 static void
 265 store_wmmx_regs (const struct regcache *regcache)
 266 {
 267   char regbuf[IWMMXT_REGS_SIZE];
 268   int ret, regno, tid;
 269
 270   /* Get the thread id for the ptrace call.  */
 271   tid = ptid_get_lwp (inferior_ptid);
 272
 273   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 274   if (ret < 0)
 275     perror_with_name (_("Unable to fetch WMMX registers."));
 276
 277   for (regno = 0; regno < 16; regno++)
 278     if (REG_VALID == regcache_register_status (regcache,
 279                                                regno + ARM_WR0_REGNUM))
 280       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 281                             &regbuf[regno * 8]);
 282
 283   for (regno = 0; regno < 2; regno++)
 284     if (REG_VALID == regcache_register_status (regcache,
 285                                                regno + ARM_WCSSF_REGNUM))
 286       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 287                             &regbuf[16 * 8 + regno * 4]);
 288
 289   for (regno = 0; regno < 4; regno++)
 290     if (REG_VALID == regcache_register_status (regcache,
 291                                                regno + ARM_WCGR0_REGNUM))
 292       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 293                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 294
 295   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 296
 297   if (ret < 0)
 298     perror_with_name (_("Unable to store WMMX registers."));
 299 }
 300
 301 static void
 302 fetch_vfp_regs (struct regcache *regcache)
 303 {
 304   gdb_byte regbuf[VFP_REGS_SIZE];
 305   int ret, regno, tid;
 306   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 307   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 308
 309   /* Get the thread id for the ptrace call.  */
 310   tid = ptid_get_lwp (inferior_ptid);
 311
 312   if (have_ptrace_getregset == TRIBOOL_TRUE)
 313     {
 314       struct iovec iov;
 315
 316       iov.iov_base = regbuf;
 317       iov.iov_len = VFP_REGS_SIZE;
 318       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 319     }
 320   else
 321     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 322
 323   if (ret < 0)
 324     perror_with_name (_("Unable to fetch VFP registers."));
 325
 326   aarch32_vfp_regcache_supply (regcache, regbuf,
 327                                tdep->vfp_register_count);
 328 }
 329
 330 static void
 331 store_vfp_regs (const struct regcache *regcache)
 332 {
 333   gdb_byte regbuf[VFP_REGS_SIZE];
 334   int ret, regno, tid;
 335   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 336   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 337
 338   /* Get the thread id for the ptrace call.  */
 339   tid = ptid_get_lwp (inferior_ptid);
 340
 341   if (have_ptrace_getregset == TRIBOOL_TRUE)
 342     {
 343       struct iovec iov;
 344
 345       iov.iov_base = regbuf;
 346       iov.iov_len = VFP_REGS_SIZE;
 347       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 348     }
 349   else
 350     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 351
 352   if (ret < 0)
 353     perror_with_name (_("Unable to fetch VFP registers (for update)."));
 354
 355   aarch32_vfp_regcache_collect (regcache, regbuf,
 356                                 tdep->vfp_register_count);
 357
 358   if (have_ptrace_getregset == TRIBOOL_TRUE)
 359     {
 360       struct iovec iov;
 361
 362       iov.iov_base = regbuf;
 363       iov.iov_len = VFP_REGS_SIZE;
 364       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
 365     }
 366   else
 367     ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 368
 369   if (ret < 0)
 370     perror_with_name (_("Unable to store VFP registers."));
 371 }
 372
 373 /* Fetch registers from the child process.  Fetch all registers if
 374    regno == -1, otherwise fetch all general registers or all floating
 375    point registers depending upon the value of regno.  */
 376
 377 static void
 378 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 379                                     struct regcache *regcache, int regno)
 380 {
 381   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 382   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 383
 384   if (-1 == regno)
 385     {
 386       fetch_regs (regcache);
 387       fetch_fpregs (regcache);
 388       if (tdep->have_wmmx_registers)
 389         fetch_wmmx_regs (regcache);
 390       if (tdep->vfp_register_count > 0)
 391         fetch_vfp_regs (regcache);
 392     }
 393   else
 394     {
 395       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 396         fetch_regs (regcache);
 397       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 398         fetch_fpregs (regcache);
 399       else if (tdep->have_wmmx_registers
 400                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 401         fetch_wmmx_regs (regcache);
 402       else if (tdep->vfp_register_count > 0
 403                && regno >= ARM_D0_REGNUM
 404                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 405         fetch_vfp_regs (regcache);
 406     }
 407 }
 408
 409 /* Store registers back into the inferior.  Store all registers if
 410    regno == -1, otherwise store all general registers or all floating
 411    point registers depending upon the value of regno.  */
 412
 413 static void
 414 arm_linux_store_inferior_registers (struct target_ops *ops,
 415                                     struct regcache *regcache, int regno)
 416 {
 417   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 418   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 419
 420   if (-1 == regno)
 421     {
 422       store_regs (regcache);
 423       store_fpregs (regcache);
 424       if (tdep->have_wmmx_registers)
 425         store_wmmx_regs (regcache);
 426       if (tdep->vfp_register_count > 0)
 427         store_vfp_regs (regcache);
 428     }
 429   else
 430     {
 431       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 432         store_regs (regcache);
 433       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 434         store_fpregs (regcache);
 435       else if (tdep->have_wmmx_registers
 436                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 437         store_wmmx_regs (regcache);
 438       else if (tdep->vfp_register_count > 0
 439                && regno >= ARM_D0_REGNUM
 440                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 441         store_vfp_regs (regcache);
 442     }
 443 }
 444
 445 /* Wrapper functions for the standard regset handling, used by
 446    thread debugging.  */
 447
 448 void
 449 fill_gregset (const struct regcache *regcache,
 450               gdb_gregset_t *gregsetp, int regno)
 451 {
 452   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 453 }
 454
 455 void
 456 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 457 {
 458   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 459 }
 460
 461 void
 462 fill_fpregset (const struct regcache *regcache,
 463                gdb_fpregset_t *fpregsetp, int regno)
 464 {
 465   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 466 }
 467
 468 /* Fill GDB's register array with the floating-point register values
 469    in *fpregsetp.  */
 470
 471 void
 472 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 473 {
 474   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 475 }
 476
 477 /* Fetch the thread-local storage pointer for libthread_db.  */
 478
 479 ps_err_e
 480 ps_get_thread_area (const struct ps_prochandle *ph,
 481                     lwpid_t lwpid, int idx, void **base)
 482 {
 483   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 484     return PS_ERR;
 485
 486   /* IDX is the bias from the thread pointer to the beginning of the
 487      thread descriptor.  It has to be subtracted due to implementation
 488      quirks in libthread_db.  */
 489   *base = (void *) ((char *)*base - idx);
 490
 491   return PS_OK;
 492 }
 493
 494 static const struct target_desc *
 495 arm_linux_read_description (struct target_ops *ops)
 496 {
 497   CORE_ADDR arm_hwcap = 0;
 498
 499   if (have_ptrace_getregset == TRIBOOL_UNKNOWN)
 500     {
 501       elf_gregset_t gpregs;
 502       struct iovec iov;
 503       int tid = ptid_get_lwp (inferior_ptid);
 504
 505       iov.iov_base = &gpregs;
 506       iov.iov_len = sizeof (gpregs);
 507
 508       /* Check if PTRACE_GETREGSET works.  */
 509       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 510         have_ptrace_getregset = TRIBOOL_FALSE;
 511       else
 512         have_ptrace_getregset = TRIBOOL_TRUE;
 513     }
 514
 515   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 516     {
 517       return ops->beneath->to_read_description (ops->beneath);
 518     }
 519
 520   if (arm_hwcap & HWCAP_IWMMXT)
 521     return tdesc_arm_with_iwmmxt;
 522
 523   if (arm_hwcap & HWCAP_VFP)
 524     {
 525       int pid;
 526       char *buf;
 527       const struct target_desc * result = NULL;
 528
 529       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 530          Neon with VFPv3-D32.  */
 531       if (arm_hwcap & HWCAP_NEON)
 532         result = tdesc_arm_with_neon;
 533       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 534         result = tdesc_arm_with_vfpv3;
 535       else
 536         result = tdesc_arm_with_vfpv2;
 537
 538       /* Now make sure that the kernel supports reading these
 539          registers.  Support was added in 2.6.30.  */
 540       pid = ptid_get_lwp (inferior_ptid);
 541       errno = 0;
 542       buf = (char *) alloca (VFP_REGS_SIZE);
 543       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 544           && errno == EIO)
 545         result = NULL;
 546
 547       return result;
 548     }
 549
 550   return ops->beneath->to_read_description (ops->beneath);
 551 }
 552
 553 /* Information describing the hardware breakpoint capabilities.  */
 554 struct arm_linux_hwbp_cap
 555 {
 556   gdb_byte arch;
 557   gdb_byte max_wp_length;
 558   gdb_byte wp_count;
 559   gdb_byte bp_count;
 560 };
 561
 562 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 563    assume a maximum number of supported break-/watchpoints.  */
 564 #define MAX_BPTS 16
 565 #define MAX_WPTS 16
 566
 567 /* Get hold of the Hardware Breakpoint information for the target we are
 568    attached to.  Returns NULL if the kernel doesn't support Hardware
 569    breakpoints at all, or a pointer to the information structure.  */
 570 static const struct arm_linux_hwbp_cap *
 571 arm_linux_get_hwbp_cap (void)
 572 {
 573   /* The info structure we return.  */
 574   static struct arm_linux_hwbp_cap info;
 575
 576   /* Is INFO in a good state?  -1 means that no attempt has been made to
 577      initialize INFO; 0 means an attempt has been made, but it failed; 1
 578      means INFO is in an initialized state.  */
 579   static int available = -1;
 580
 581   if (available == -1)
 582     {
 583       int tid;
 584       unsigned int val;
 585
 586       tid = ptid_get_lwp (inferior_ptid);
 587       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 588         available = 0;
 589       else
 590         {
 591           info.arch = (gdb_byte)((val >> 24) & 0xff);
 592           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 593           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 594           info.bp_count = (gdb_byte)(val & 0xff);
 595
 596       if (info.wp_count > MAX_WPTS)
 597         {
 598           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 599                       supports %d"), MAX_WPTS, info.wp_count);
 600           info.wp_count = MAX_WPTS;
 601         }
 602
 603       if (info.bp_count > MAX_BPTS)
 604         {
 605           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 606                       supports %d"), MAX_BPTS, info.bp_count);
 607           info.bp_count = MAX_BPTS;
 608         }
 609           available = (info.arch != 0);
 610         }
 611     }
 612
 613   return available == 1 ? &info : NULL;
 614 }
 615
 616 /* How many hardware breakpoints are available?  */
 617 static int
 618 arm_linux_get_hw_breakpoint_count (void)
 619 {
 620   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 621   return cap != NULL ? cap->bp_count : 0;
 622 }
 623
 624 /* How many hardware watchpoints are available?  */
 625 static int
 626 arm_linux_get_hw_watchpoint_count (void)
 627 {
 628   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 629   return cap != NULL ? cap->wp_count : 0;
 630 }
 631
 632 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 633    there is not an appropriate resource available, otherwise returns 1.  */
 634 static int
 635 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 636                                  enum bptype type,
 637                                  int cnt, int ot)
 638 {
 639   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 640       || type == bp_access_watchpoint || type == bp_watchpoint)
 641     {
 642       int count = arm_linux_get_hw_watchpoint_count ();
 643
 644       if (count == 0)
 645         return 0;
 646       else if (cnt + ot > count)
 647         return -1;
 648     }
 649   else if (type == bp_hardware_breakpoint)
 650     {
 651       int count = arm_linux_get_hw_breakpoint_count ();
 652
 653       if (count == 0)
 654         return 0;
 655       else if (cnt > count)
 656         return -1;
 657     }
 658   else
 659     gdb_assert (FALSE);
 660
 661   return 1;
 662 }
 663
 664 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 665 typedef enum
 666 {
 667   arm_hwbp_break = 0,
 668   arm_hwbp_load = 1,
 669   arm_hwbp_store = 2,
 670   arm_hwbp_access = 3
 671 } arm_hwbp_type;
 672
 673 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 674 typedef unsigned int arm_hwbp_control_t;
 675
 676 /* Structure used to keep track of hardware break-/watch-points.  */
 677 struct arm_linux_hw_breakpoint
 678 {
 679   /* Address to break on, or being watched.  */
 680   unsigned int address;
 681   /* Control register for break-/watch- point.  */
 682   arm_hwbp_control_t control;
 683 };
 684
 685 /* Structure containing arrays of per process hardware break-/watchpoints
 686    for caching address and control information.
 687
 688    The Linux ptrace interface to hardware break-/watch-points presents the
 689    values in a vector centred around 0 (which is used fo generic information).
 690    Positive indicies refer to breakpoint addresses/control registers, negative
 691    indices to watchpoint addresses/control registers.
 692
 693    The Linux vector is indexed as follows:
 694       -((i << 1) + 2): Control register for watchpoint i.
 695       -((i << 1) + 1): Address register for watchpoint i.
 696                     0: Information register.
 697        ((i << 1) + 1): Address register for breakpoint i.
 698        ((i << 1) + 2): Control register for breakpoint i.
 699
 700    This structure is used as a per-thread cache of the state stored by the
 701    kernel, so that we don't need to keep calling into the kernel to find a
 702    free breakpoint.
 703
 704    We treat break-/watch-points with their enable bit clear as being deleted.
 705    */
 706 struct arm_linux_debug_reg_state
 707 {
 708   /* Hardware breakpoints for this process.  */
 709   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
 710   /* Hardware watchpoints for this process.  */
 711   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
 712 };
 713
 714 /* Per-process arch-specific data we want to keep.  */
 715 struct arm_linux_process_info
 716 {
 717   /* Linked list.  */
 718   struct arm_linux_process_info *next;
 719   /* The process identifier.  */
 720   pid_t pid;
 721   /* Hardware break-/watchpoints state information.  */
 722   struct arm_linux_debug_reg_state state;
 723
 724 };
 725
 726 /* Per-thread arch-specific data we want to keep.  */
 727 struct arch_lwp_info
 728 {
 729   /* Non-zero if our copy differs from what's recorded in the thread.  */
 730   char bpts_changed[MAX_BPTS];
 731   char wpts_changed[MAX_WPTS];
 732 };
 733
 734 static struct arm_linux_process_info *arm_linux_process_list = NULL;
 735
 736 /* Find process data for process PID.  */
 737
 738 static struct arm_linux_process_info *
 739 arm_linux_find_process_pid (pid_t pid)
 740 {
 741   struct arm_linux_process_info *proc;
 742
 743   for (proc = arm_linux_process_list; proc; proc = proc->next)
 744     if (proc->pid == pid)
 745       return proc;
 746
 747   return NULL;
 748 }
 749
 750 /* Add process data for process PID.  Returns newly allocated info
 751    object.  */
 752
 753 static struct arm_linux_process_info *
 754 arm_linux_add_process (pid_t pid)
 755 {
 756   struct arm_linux_process_info *proc;
 757
 758   proc = XCNEW (struct arm_linux_process_info);
 759   proc->pid = pid;
 760
 761   proc->next = arm_linux_process_list;
 762   arm_linux_process_list = proc;
 763
 764   return proc;
 765 }
 766
 767 /* Get data specific info for process PID, creating it if necessary.
 768    Never returns NULL.  */
 769
 770 static struct arm_linux_process_info *
 771 arm_linux_process_info_get (pid_t pid)
 772 {
 773   struct arm_linux_process_info *proc;
 774
 775   proc = arm_linux_find_process_pid (pid);
 776   if (proc == NULL)
 777     proc = arm_linux_add_process (pid);
 778
 779   return proc;
 780 }
 781
 782 /* Called whenever GDB is no longer debugging process PID.  It deletes
 783    data structures that keep track of debug register state.  */
 784
 785 static void
 786 arm_linux_forget_process (pid_t pid)
 787 {
 788   struct arm_linux_process_info *proc, **proc_link;
 789
 790   proc = arm_linux_process_list;
 791   proc_link = &arm_linux_process_list;
 792
 793   while (proc != NULL)
 794     {
 795       if (proc->pid == pid)
 796     {
 797       *proc_link = proc->next;
 798
 799       xfree (proc);
 800       return;
 801     }
 802
 803       proc_link = &proc->next;
 804       proc = *proc_link;
 805     }
 806 }
 807
 808 /* Get hardware break-/watchpoint state for process PID.  */
 809
 810 static struct arm_linux_debug_reg_state *
 811 arm_linux_get_debug_reg_state (pid_t pid)
 812 {
 813   return &arm_linux_process_info_get (pid)->state;
 814 }
 815
 816 /* Initialize an ARM hardware break-/watch-point control register value.
 817    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
 818    type of break-/watch-point; ENABLE indicates whether the point is enabled.
 819    */
 820 static arm_hwbp_control_t
 821 arm_hwbp_control_initialize (unsigned byte_address_select,
 822                              arm_hwbp_type hwbp_type,
 823                              int enable)
 824 {
 825   gdb_assert ((byte_address_select & ~0xffU) == 0);
 826   gdb_assert (hwbp_type != arm_hwbp_break
 827               || ((byte_address_select & 0xfU) != 0));
 828
 829   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
 830 }
 831
 832 /* Does the breakpoint control value CONTROL have the enable bit set?  */
 833 static int
 834 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
 835 {
 836   return control & 0x1;
 837 }
 838
 839 /* Change a breakpoint control word so that it is in the disabled state.  */
 840 static arm_hwbp_control_t
 841 arm_hwbp_control_disable (arm_hwbp_control_t control)
 842 {
 843   return control & ~0x1;
 844 }
 845
 846 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
 847    enabled, and will point to the placed address of BP_TGT.  */
 848 static void
 849 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
 850                                     struct bp_target_info *bp_tgt,
 851                                     struct arm_linux_hw_breakpoint *p)
 852 {
 853   unsigned mask;
 854   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
 855
 856   /* We have to create a mask for the control register which says which bits
 857      of the word pointed to by address to break on.  */
 858   if (arm_pc_is_thumb (gdbarch, address))
 859     {
 860       mask = 0x3;
 861       address &= ~1;
 862     }
 863   else
 864     {
 865       mask = 0xf;
 866       address &= ~3;
 867     }
 868
 869   p->address = (unsigned int) address;
 870   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
 871 }
 872
 873 /* Get the ARM hardware breakpoint type from the TYPE value we're
 874    given when asked to set a watchpoint.  */
 875 static arm_hwbp_type
 876 arm_linux_get_hwbp_type (enum target_hw_bp_type type)
 877 {
 878   if (type == hw_read)
 879     return arm_hwbp_load;
 880   else if (type == hw_write)
 881     return arm_hwbp_store;
 882   else
 883     return arm_hwbp_access;
 884 }
 885
 886 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
 887    to LEN.  The type of watchpoint is given in RW.  */
 888 static void
 889 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len,
 890                                     enum target_hw_bp_type type,
 891                                     struct arm_linux_hw_breakpoint *p)
 892 {
 893   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 894   unsigned mask;
 895
 896   gdb_assert (cap != NULL);
 897   gdb_assert (cap->max_wp_length != 0);
 898
 899   mask = (1 << len) - 1;
 900
 901   p->address = (unsigned int) addr;
 902   p->control = arm_hwbp_control_initialize (mask,
 903                                             arm_linux_get_hwbp_type (type), 1);
 904 }
 905
 906 /* Are two break-/watch-points equal?  */
 907 static int
 908 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
 909                                const struct arm_linux_hw_breakpoint *p2)
 910 {
 911   return p1->address == p2->address && p1->control == p2->control;
 912 }
 913
 914 /* Callback to mark a watch-/breakpoint to be updated in all threads of
 915    the current process.  */
 916
 917 struct update_registers_data
 918 {
 919   int watch;
 920   int index;
 921 };
 922
 923 static int
 924 update_registers_callback (struct lwp_info *lwp, void *arg)
 925 {
 926   struct update_registers_data *data = (struct update_registers_data *) arg;
 927
 928   if (lwp->arch_private == NULL)
 929     lwp->arch_private = XCNEW (struct arch_lwp_info);
 930
 931   /* The actual update is done later just before resuming the lwp,
 932      we just mark that the registers need updating.  */
 933   if (data->watch)
 934     lwp->arch_private->wpts_changed[data->index] = 1;
 935   else
 936     lwp->arch_private->bpts_changed[data->index] = 1;
 937
 938   /* If the lwp isn't stopped, force it to momentarily pause, so
 939      we can update its breakpoint registers.  */
 940   if (!lwp->stopped)
 941     linux_stop_lwp (lwp);
 942
 943   return 0;
 944 }
 945
 946 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
 947    =1) BPT for thread TID.  */
 948 static void
 949 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
 950                                  int watchpoint)
 951 {
 952   int pid;
 953   ptid_t pid_ptid;
 954   gdb_byte count, i;
 955   struct arm_linux_hw_breakpoint* bpts;
 956   struct update_registers_data data;
 957
 958   pid = ptid_get_pid (inferior_ptid);
 959   pid_ptid = pid_to_ptid (pid);
 960
 961   if (watchpoint)
 962     {
 963       count = arm_linux_get_hw_watchpoint_count ();
 964       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
 965     }
 966   else
 967     {
 968       count = arm_linux_get_hw_breakpoint_count ();
 969       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
 970     }
 971
 972   for (i = 0; i < count; ++i)
 973     if (!arm_hwbp_control_is_enabled (bpts[i].control))
 974       {
 975         data.watch = watchpoint;
 976         data.index = i;
 977         bpts[i] = *bpt;
 978         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
 979         break;
 980       }
 981
 982   gdb_assert (i != count);
 983 }
 984
 985 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
 986    (WATCHPOINT = 1) BPT for thread TID.  */
 987 static void
 988 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
 989                                  int watchpoint)
 990 {
 991   int pid;
 992   gdb_byte count, i;
 993   ptid_t pid_ptid;
 994   struct arm_linux_hw_breakpoint* bpts;
 995   struct update_registers_data data;
 996
 997   pid = ptid_get_pid (inferior_ptid);
 998   pid_ptid = pid_to_ptid (pid);
 999
1000   if (watchpoint)
1001     {
1002       count = arm_linux_get_hw_watchpoint_count ();
1003       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1004     }
1005   else
1006     {
1007       count = arm_linux_get_hw_breakpoint_count ();
1008       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1009     }
1010
1011   for (i = 0; i < count; ++i)
1012     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1013       {
1014         data.watch = watchpoint;
1015         data.index = i;
1016         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1017         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1018         break;
1019       }
1020
1021   gdb_assert (i != count);
1022 }
1023
1024 /* Insert a Hardware breakpoint.  */
1025 static int
1026 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1027                                 struct gdbarch *gdbarch,
1028                                 struct bp_target_info *bp_tgt)
1029 {
1030   struct lwp_info *lp;
1031   struct arm_linux_hw_breakpoint p;
1032
1033   if (arm_linux_get_hw_breakpoint_count () == 0)
1034     return -1;
1035
1036   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1037
1038   arm_linux_insert_hw_breakpoint1 (&p, 0);
1039
1040   return 0;
1041 }
1042
1043 /* Remove a hardware breakpoint.  */
1044 static int
1045 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1046                                 struct gdbarch *gdbarch,
1047                                 struct bp_target_info *bp_tgt)
1048 {
1049   struct lwp_info *lp;
1050   struct arm_linux_hw_breakpoint p;
1051
1052   if (arm_linux_get_hw_breakpoint_count () == 0)
1053     return -1;
1054
1055   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1056
1057   arm_linux_remove_hw_breakpoint1 (&p, 0);
1058
1059   return 0;
1060 }
1061
1062 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1063    ADDR?  */
1064 static int
1065 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1066                                        CORE_ADDR addr, int len)
1067 {
1068   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1069   CORE_ADDR max_wp_length, aligned_addr;
1070
1071   /* Can not set watchpoints for zero or negative lengths.  */
1072   if (len <= 0)
1073     return 0;
1074
1075   /* Need to be able to use the ptrace interface.  */
1076   if (cap == NULL || cap->wp_count == 0)
1077     return 0;
1078
1079   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1080      range covered by a watchpoint.  */
1081   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1082   aligned_addr = addr & ~(max_wp_length - 1);
1083
1084   if (aligned_addr + max_wp_length < addr + len)
1085     return 0;
1086
1087   /* The current ptrace interface can only handle watchpoints that are a
1088      power of 2.  */
1089   if ((len & (len - 1)) != 0)
1090     return 0;
1091
1092   /* All tests passed so we must be able to set a watchpoint.  */
1093   return 1;
1094 }
1095
1096 /* Insert a Hardware breakpoint.  */
1097 static int
1098 arm_linux_insert_watchpoint (struct target_ops *self,
1099                              CORE_ADDR addr, int len,
1100                              enum target_hw_bp_type rw,
1101                              struct expression *cond)
1102 {
1103   struct lwp_info *lp;
1104   struct arm_linux_hw_breakpoint p;
1105
1106   if (arm_linux_get_hw_watchpoint_count () == 0)
1107     return -1;
1108
1109   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1110
1111   arm_linux_insert_hw_breakpoint1 (&p, 1);
1112
1113   return 0;
1114 }
1115
1116 /* Remove a hardware breakpoint.  */
1117 static int
1118 arm_linux_remove_watchpoint (struct target_ops *self, CORE_ADDR addr,
1119                              int len, enum target_hw_bp_type rw,
1120                              struct expression *cond)
1121 {
1122   struct lwp_info *lp;
1123   struct arm_linux_hw_breakpoint p;
1124
1125   if (arm_linux_get_hw_watchpoint_count () == 0)
1126     return -1;
1127
1128   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1129
1130   arm_linux_remove_hw_breakpoint1 (&p, 1);
1131
1132   return 0;
1133 }
1134
1135 /* What was the data address the target was stopped on accessing.  */
1136 static int
1137 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1138 {
1139   siginfo_t siginfo;
1140   int slot;
1141
1142   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1143     return 0;
1144
1145   /* This must be a hardware breakpoint.  */
1146   if (siginfo.si_signo != SIGTRAP
1147       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1148     return 0;
1149
1150   /* We must be able to set hardware watchpoints.  */
1151   if (arm_linux_get_hw_watchpoint_count () == 0)
1152     return 0;
1153
1154   slot = siginfo.si_errno;
1155
1156   /* If we are in a positive slot then we're looking at a breakpoint and not
1157      a watchpoint.  */
1158   if (slot >= 0)
1159     return 0;
1160
1161   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1162   return 1;
1163 }
1164
1165 /* Has the target been stopped by hitting a watchpoint?  */
1166 static int
1167 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1168 {
1169   CORE_ADDR addr;
1170   return arm_linux_stopped_data_address (ops, &addr);
1171 }
1172
1173 static int
1174 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1175                                         CORE_ADDR addr,
1176                                         CORE_ADDR start, int length)
1177 {
1178   return start <= addr && start + length - 1 >= addr;
1179 }
1180
1181 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1182    in the parent thread to the child thread.  */
1183 static void
1184 arm_linux_new_thread (struct lwp_info *lp)
1185 {
1186   int i;
1187   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1188
1189   /* Mark that all the hardware breakpoint/watchpoint register pairs
1190      for this thread need to be initialized.  */
1191
1192   for (i = 0; i < MAX_BPTS; i++)
1193     {
1194       info->bpts_changed[i] = 1;
1195       info->wpts_changed[i] = 1;
1196     }
1197
1198   lp->arch_private = info;
1199 }
1200
1201 /* Called when resuming a thread.
1202    The hardware debug registers are updated when there is any change.  */
1203
1204 static void
1205 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1206 {
1207   int pid, i;
1208   struct arm_linux_hw_breakpoint *bpts, *wpts;
1209   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1210
1211   pid = ptid_get_lwp (lwp->ptid);
1212   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1213   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1214
1215   /* NULL means this is the main thread still going through the shell,
1216      or, no watchpoint has been set yet.  In that case, there's
1217      nothing to do.  */
1218   if (arm_lwp_info == NULL)
1219     return;
1220
1221   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1222     if (arm_lwp_info->bpts_changed[i])
1223       {
1224         errno = 0;
1225         if (arm_hwbp_control_is_enabled (bpts[i].control))
1226           if (ptrace (PTRACE_SETHBPREGS, pid,
1227               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1228             perror_with_name (_("Unexpected error setting breakpoint"));
1229
1230         if (bpts[i].control != 0)
1231           if (ptrace (PTRACE_SETHBPREGS, pid,
1232               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1233             perror_with_name (_("Unexpected error setting breakpoint"));
1234
1235         arm_lwp_info->bpts_changed[i] = 0;
1236       }
1237
1238   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1239     if (arm_lwp_info->wpts_changed[i])
1240       {
1241         errno = 0;
1242         if (arm_hwbp_control_is_enabled (wpts[i].control))
1243           if (ptrace (PTRACE_SETHBPREGS, pid,
1244               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1245             perror_with_name (_("Unexpected error setting watchpoint"));
1246
1247         if (wpts[i].control != 0)
1248           if (ptrace (PTRACE_SETHBPREGS, pid,
1249               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1250             perror_with_name (_("Unexpected error setting watchpoint"));
1251
1252         arm_lwp_info->wpts_changed[i] = 0;
1253       }
1254 }
1255
1256 /* linux_nat_new_fork hook.  */
1257
1258 static void
1259 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1260 {
1261   pid_t parent_pid;
1262   struct arm_linux_debug_reg_state *parent_state;
1263   struct arm_linux_debug_reg_state *child_state;
1264
1265   /* NULL means no watchpoint has ever been set in the parent.  In
1266      that case, there's nothing to do.  */
1267   if (parent->arch_private == NULL)
1268     return;
1269
1270   /* GDB core assumes the child inherits the watchpoints/hw
1271      breakpoints of the parent, and will remove them all from the
1272      forked off process.  Copy the debug registers mirrors into the
1273      new process so that all breakpoints and watchpoints can be
1274      removed together.  */
1275
1276   parent_pid = ptid_get_pid (parent->ptid);
1277   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1278   child_state = arm_linux_get_debug_reg_state (child_pid);
1279   *child_state = *parent_state;
1280 }
1281
1282 void _initialize_arm_linux_nat (void);
1283
1284 void
1285 _initialize_arm_linux_nat (void)
1286 {
1287   struct target_ops *t;
1288
1289   /* Fill in the generic GNU/Linux methods.  */
1290   t = linux_target ();
1291
1292   /* Add our register access methods.  */
1293   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1294   t->to_store_registers = arm_linux_store_inferior_registers;
1295
1296   /* Add our hardware breakpoint and watchpoint implementation.  */
1297   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1298   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1299   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1300   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1301   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1302   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1303   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1304   t->to_stopped_data_address = arm_linux_stopped_data_address;
1305   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1306
1307   t->to_read_description = arm_linux_read_description;
1308
1309   /* Register the target.  */
1310   linux_nat_add_target (t);
1311
1312   /* Handle thread creation and exit.  */
1313   linux_nat_set_new_thread (t, arm_linux_new_thread);
1314   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1315
1316   /* Handle process creation and exit.  */
1317   linux_nat_set_new_fork (t, arm_linux_new_fork);
1318   linux_nat_set_forget_process (t, arm_linux_forget_process);
1319 }