1 /* GNU/Linux on ARM native support.
2 Copyright (C) 1999-2019 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
24 #include "linux-nat.h"
25 #include "target-descriptions.h"
27 #include "observable.h"
28 #include "gdbthread.h"
31 #include "arm-linux-tdep.h"
32 #include "aarch32-linux-nat.h"
34 #include <elf/common.h>
36 #include "nat/gdb_ptrace.h"
37 #include <sys/utsname.h>
38 #include <sys/procfs.h>
40 #include "nat/linux-ptrace.h"
41 #include "linux-tdep.h"
43 /* Prototypes for supply_gregset etc. */
46 /* Defines ps_err_e, struct ps_prochandle. */
47 #include "gdb_proc_service.h"
49 #ifndef PTRACE_GET_THREAD_AREA
50 #define PTRACE_GET_THREAD_AREA 22
53 #ifndef PTRACE_GETWMMXREGS
54 #define PTRACE_GETWMMXREGS 18
55 #define PTRACE_SETWMMXREGS 19
58 #ifndef PTRACE_GETVFPREGS
59 #define PTRACE_GETVFPREGS 27
60 #define PTRACE_SETVFPREGS 28
63 #ifndef PTRACE_GETHBPREGS
64 #define PTRACE_GETHBPREGS 29
65 #define PTRACE_SETHBPREGS 30
68 extern int arm_apcs_32
;
70 class arm_linux_nat_target final
: public linux_nat_target
73 /* Add our register access methods. */
74 void fetch_registers (struct regcache
*, int) override
;
75 void store_registers (struct regcache
*, int) override
;
77 /* Add our hardware breakpoint and watchpoint implementation. */
78 int can_use_hw_breakpoint (enum bptype
, int, int) override
;
80 int insert_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
82 int remove_hw_breakpoint (struct gdbarch
*, struct bp_target_info
*) override
;
84 int region_ok_for_hw_watchpoint (CORE_ADDR
, int) override
;
86 int insert_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
87 struct expression
*) override
;
89 int remove_watchpoint (CORE_ADDR
, int, enum target_hw_bp_type
,
90 struct expression
*) override
;
91 bool stopped_by_watchpoint () override
;
93 bool stopped_data_address (CORE_ADDR
*) override
;
95 bool watchpoint_addr_within_range (CORE_ADDR
, CORE_ADDR
, int) override
;
97 const struct target_desc
*read_description () override
;
99 /* Override linux_nat_target low methods. */
101 /* Handle thread creation and exit. */
102 void low_new_thread (struct lwp_info
*lp
) override
;
103 void low_delete_thread (struct arch_lwp_info
*lp
) override
;
104 void low_prepare_to_resume (struct lwp_info
*lp
) override
;
106 /* Handle process creation and exit. */
107 void low_new_fork (struct lwp_info
*parent
, pid_t child_pid
) override
;
108 void low_forget_process (pid_t pid
) override
;
111 static arm_linux_nat_target the_arm_linux_nat_target
;
113 /* Get the whole floating point state of the process and store it
117 fetch_fpregs (struct regcache
*regcache
)
120 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
122 /* Get the thread id for the ptrace call. */
123 tid
= regcache
->ptid ().lwp ();
125 /* Read the floating point state. */
126 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
131 iov
.iov_len
= ARM_LINUX_SIZEOF_NWFPE
;
133 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iov
);
136 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
139 perror_with_name (_("Unable to fetch the floating point registers."));
142 regcache
->raw_supply (ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
144 /* Fetch the floating point registers. */
145 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
146 supply_nwfpe_register (regcache
, regno
, fp
);
149 /* Save the whole floating point state of the process using
150 the contents from regcache. */
153 store_fpregs (const struct regcache
*regcache
)
156 gdb_byte fp
[ARM_LINUX_SIZEOF_NWFPE
];
158 /* Get the thread id for the ptrace call. */
159 tid
= regcache
->ptid ().lwp ();
161 /* Read the floating point state. */
162 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
164 elf_fpregset_t fpregs
;
167 iov
.iov_base
= &fpregs
;
168 iov
.iov_len
= sizeof (fpregs
);
170 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_FPREGSET
, &iov
);
173 ret
= ptrace (PT_GETFPREGS
, tid
, 0, fp
);
176 perror_with_name (_("Unable to fetch the floating point registers."));
179 if (REG_VALID
== regcache
->get_register_status (ARM_FPS_REGNUM
))
180 regcache
->raw_collect (ARM_FPS_REGNUM
, fp
+ NWFPE_FPSR_OFFSET
);
182 /* Store the floating point registers. */
183 for (regno
= ARM_F0_REGNUM
; regno
<= ARM_F7_REGNUM
; regno
++)
184 if (REG_VALID
== regcache
->get_register_status (regno
))
185 collect_nwfpe_register (regcache
, regno
, fp
);
187 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
192 iov
.iov_len
= ARM_LINUX_SIZEOF_NWFPE
;
194 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_FPREGSET
, &iov
);
197 ret
= ptrace (PTRACE_SETFPREGS
, tid
, 0, fp
);
200 perror_with_name (_("Unable to store floating point registers."));
203 /* Fetch all general registers of the process and store into
207 fetch_regs (struct regcache
*regcache
)
212 /* Get the thread id for the ptrace call. */
213 tid
= regcache
->ptid ().lwp ();
215 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
219 iov
.iov_base
= ®s
;
220 iov
.iov_len
= sizeof (regs
);
222 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
);
225 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
228 perror_with_name (_("Unable to fetch general registers."));
230 aarch32_gp_regcache_supply (regcache
, (uint32_t *) regs
, arm_apcs_32
);
234 store_regs (const struct regcache
*regcache
)
239 /* Get the thread id for the ptrace call. */
240 tid
= regcache
->ptid ().lwp ();
242 /* Fetch the general registers. */
243 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
247 iov
.iov_base
= ®s
;
248 iov
.iov_len
= sizeof (regs
);
250 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
);
253 ret
= ptrace (PTRACE_GETREGS
, tid
, 0, ®s
);
256 perror_with_name (_("Unable to fetch general registers."));
258 aarch32_gp_regcache_collect (regcache
, (uint32_t *) regs
, arm_apcs_32
);
260 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
264 iov
.iov_base
= ®s
;
265 iov
.iov_len
= sizeof (regs
);
267 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_PRSTATUS
, &iov
);
270 ret
= ptrace (PTRACE_SETREGS
, tid
, 0, ®s
);
273 perror_with_name (_("Unable to store general registers."));
276 /* Fetch all WMMX registers of the process and store into
280 fetch_wmmx_regs (struct regcache
*regcache
)
282 char regbuf
[IWMMXT_REGS_SIZE
];
285 /* Get the thread id for the ptrace call. */
286 tid
= regcache
->ptid ().lwp ();
288 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
290 perror_with_name (_("Unable to fetch WMMX registers."));
292 for (regno
= 0; regno
< 16; regno
++)
293 regcache
->raw_supply (regno
+ ARM_WR0_REGNUM
, ®buf
[regno
* 8]);
295 for (regno
= 0; regno
< 2; regno
++)
296 regcache
->raw_supply (regno
+ ARM_WCSSF_REGNUM
,
297 ®buf
[16 * 8 + regno
* 4]);
299 for (regno
= 0; regno
< 4; regno
++)
300 regcache
->raw_supply (regno
+ ARM_WCGR0_REGNUM
,
301 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
305 store_wmmx_regs (const struct regcache
*regcache
)
307 char regbuf
[IWMMXT_REGS_SIZE
];
310 /* Get the thread id for the ptrace call. */
311 tid
= regcache
->ptid ().lwp ();
313 ret
= ptrace (PTRACE_GETWMMXREGS
, tid
, 0, regbuf
);
315 perror_with_name (_("Unable to fetch WMMX registers."));
317 for (regno
= 0; regno
< 16; regno
++)
318 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WR0_REGNUM
))
319 regcache
->raw_collect (regno
+ ARM_WR0_REGNUM
, ®buf
[regno
* 8]);
321 for (regno
= 0; regno
< 2; regno
++)
322 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WCSSF_REGNUM
))
323 regcache
->raw_collect (regno
+ ARM_WCSSF_REGNUM
,
324 ®buf
[16 * 8 + regno
* 4]);
326 for (regno
= 0; regno
< 4; regno
++)
327 if (REG_VALID
== regcache
->get_register_status (regno
+ ARM_WCGR0_REGNUM
))
328 regcache
->raw_collect (regno
+ ARM_WCGR0_REGNUM
,
329 ®buf
[16 * 8 + 2 * 4 + regno
* 4]);
331 ret
= ptrace (PTRACE_SETWMMXREGS
, tid
, 0, regbuf
);
334 perror_with_name (_("Unable to store WMMX registers."));
338 fetch_vfp_regs (struct regcache
*regcache
)
340 gdb_byte regbuf
[ARM_VFP3_REGS_SIZE
];
342 struct gdbarch
*gdbarch
= regcache
->arch ();
343 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
345 /* Get the thread id for the ptrace call. */
346 tid
= regcache
->ptid ().lwp ();
348 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
352 iov
.iov_base
= regbuf
;
353 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
354 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iov
);
357 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
360 perror_with_name (_("Unable to fetch VFP registers."));
362 aarch32_vfp_regcache_supply (regcache
, regbuf
,
363 tdep
->vfp_register_count
);
367 store_vfp_regs (const struct regcache
*regcache
)
369 gdb_byte regbuf
[ARM_VFP3_REGS_SIZE
];
371 struct gdbarch
*gdbarch
= regcache
->arch ();
372 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
374 /* Get the thread id for the ptrace call. */
375 tid
= regcache
->ptid ().lwp ();
377 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
381 iov
.iov_base
= regbuf
;
382 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
383 ret
= ptrace (PTRACE_GETREGSET
, tid
, NT_ARM_VFP
, &iov
);
386 ret
= ptrace (PTRACE_GETVFPREGS
, tid
, 0, regbuf
);
389 perror_with_name (_("Unable to fetch VFP registers (for update)."));
391 aarch32_vfp_regcache_collect (regcache
, regbuf
,
392 tdep
->vfp_register_count
);
394 if (have_ptrace_getregset
== TRIBOOL_TRUE
)
398 iov
.iov_base
= regbuf
;
399 iov
.iov_len
= ARM_VFP3_REGS_SIZE
;
400 ret
= ptrace (PTRACE_SETREGSET
, tid
, NT_ARM_VFP
, &iov
);
403 ret
= ptrace (PTRACE_SETVFPREGS
, tid
, 0, regbuf
);
406 perror_with_name (_("Unable to store VFP registers."));
409 /* Fetch registers from the child process. Fetch all registers if
410 regno == -1, otherwise fetch all general registers or all floating
411 point registers depending upon the value of regno. */
414 arm_linux_nat_target::fetch_registers (struct regcache
*regcache
, int regno
)
416 struct gdbarch
*gdbarch
= regcache
->arch ();
417 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
421 fetch_regs (regcache
);
422 if (tdep
->have_wmmx_registers
)
423 fetch_wmmx_regs (regcache
);
424 if (tdep
->vfp_register_count
> 0)
425 fetch_vfp_regs (regcache
);
426 if (tdep
->have_fpa_registers
)
427 fetch_fpregs (regcache
);
431 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
432 fetch_regs (regcache
);
433 else if (regno
>= ARM_F0_REGNUM
&& regno
<= ARM_FPS_REGNUM
)
434 fetch_fpregs (regcache
);
435 else if (tdep
->have_wmmx_registers
436 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
437 fetch_wmmx_regs (regcache
);
438 else if (tdep
->vfp_register_count
> 0
439 && regno
>= ARM_D0_REGNUM
440 && (regno
< ARM_D0_REGNUM
+ tdep
->vfp_register_count
441 || regno
== ARM_FPSCR_REGNUM
))
442 fetch_vfp_regs (regcache
);
446 /* Store registers back into the inferior. Store all registers if
447 regno == -1, otherwise store all general registers or all floating
448 point registers depending upon the value of regno. */
451 arm_linux_nat_target::store_registers (struct regcache
*regcache
, int regno
)
453 struct gdbarch
*gdbarch
= regcache
->arch ();
454 struct gdbarch_tdep
*tdep
= gdbarch_tdep (gdbarch
);
458 store_regs (regcache
);
459 if (tdep
->have_wmmx_registers
)
460 store_wmmx_regs (regcache
);
461 if (tdep
->vfp_register_count
> 0)
462 store_vfp_regs (regcache
);
463 if (tdep
->have_fpa_registers
)
464 store_fpregs (regcache
);
468 if (regno
< ARM_F0_REGNUM
|| regno
== ARM_PS_REGNUM
)
469 store_regs (regcache
);
470 else if ((regno
>= ARM_F0_REGNUM
) && (regno
<= ARM_FPS_REGNUM
))
471 store_fpregs (regcache
);
472 else if (tdep
->have_wmmx_registers
473 && regno
>= ARM_WR0_REGNUM
&& regno
<= ARM_WCGR7_REGNUM
)
474 store_wmmx_regs (regcache
);
475 else if (tdep
->vfp_register_count
> 0
476 && regno
>= ARM_D0_REGNUM
477 && (regno
< ARM_D0_REGNUM
+ tdep
->vfp_register_count
478 || regno
== ARM_FPSCR_REGNUM
))
479 store_vfp_regs (regcache
);
483 /* Wrapper functions for the standard regset handling, used by
487 fill_gregset (const struct regcache
*regcache
,
488 gdb_gregset_t
*gregsetp
, int regno
)
490 arm_linux_collect_gregset (NULL
, regcache
, regno
, gregsetp
, 0);
494 supply_gregset (struct regcache
*regcache
, const gdb_gregset_t
*gregsetp
)
496 arm_linux_supply_gregset (NULL
, regcache
, -1, gregsetp
, 0);
500 fill_fpregset (const struct regcache
*regcache
,
501 gdb_fpregset_t
*fpregsetp
, int regno
)
503 arm_linux_collect_nwfpe (NULL
, regcache
, regno
, fpregsetp
, 0);
506 /* Fill GDB's register array with the floating-point register values
510 supply_fpregset (struct regcache
*regcache
, const gdb_fpregset_t
*fpregsetp
)
512 arm_linux_supply_nwfpe (NULL
, regcache
, -1, fpregsetp
, 0);
515 /* Fetch the thread-local storage pointer for libthread_db. */
518 ps_get_thread_area (struct ps_prochandle
*ph
,
519 lwpid_t lwpid
, int idx
, void **base
)
521 if (ptrace (PTRACE_GET_THREAD_AREA
, lwpid
, NULL
, base
) != 0)
524 /* IDX is the bias from the thread pointer to the beginning of the
525 thread descriptor. It has to be subtracted due to implementation
526 quirks in libthread_db. */
527 *base
= (void *) ((char *)*base
- idx
);
532 const struct target_desc
*
533 arm_linux_nat_target::read_description ()
535 CORE_ADDR arm_hwcap
= linux_get_hwcap (this);
537 if (have_ptrace_getregset
== TRIBOOL_UNKNOWN
)
539 elf_gregset_t gpregs
;
541 int tid
= inferior_ptid
.lwp ();
543 iov
.iov_base
= &gpregs
;
544 iov
.iov_len
= sizeof (gpregs
);
546 /* Check if PTRACE_GETREGSET works. */
547 if (ptrace (PTRACE_GETREGSET
, tid
, NT_PRSTATUS
, &iov
) < 0)
548 have_ptrace_getregset
= TRIBOOL_FALSE
;
550 have_ptrace_getregset
= TRIBOOL_TRUE
;
553 if (arm_hwcap
& HWCAP_IWMMXT
)
554 return tdesc_arm_with_iwmmxt
;
556 if (arm_hwcap
& HWCAP_VFP
)
558 /* Make sure that the kernel supports reading VFP registers. Support was
560 int pid
= inferior_ptid
.lwp ();
562 char *buf
= (char *) alloca (ARM_VFP3_REGS_SIZE
);
563 if (ptrace (PTRACE_GETVFPREGS
, pid
, 0, buf
) < 0 && errno
== EIO
)
566 /* NEON implies VFPv3-D32 or no-VFP unit. Say that we only support
567 Neon with VFPv3-D32. */
568 if (arm_hwcap
& HWCAP_NEON
)
569 return tdesc_arm_with_neon
;
570 else if ((arm_hwcap
& (HWCAP_VFPv3
| HWCAP_VFPv3D16
)) == HWCAP_VFPv3
)
571 return tdesc_arm_with_vfpv3
;
573 return tdesc_arm_with_vfpv2
;
576 return this->beneath ()->read_description ();
579 /* Information describing the hardware breakpoint capabilities. */
580 struct arm_linux_hwbp_cap
583 gdb_byte max_wp_length
;
588 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
589 assume a maximum number of supported break-/watchpoints. */
593 /* Get hold of the Hardware Breakpoint information for the target we are
594 attached to. Returns NULL if the kernel doesn't support Hardware
595 breakpoints at all, or a pointer to the information structure. */
596 static const struct arm_linux_hwbp_cap
*
597 arm_linux_get_hwbp_cap (void)
599 /* The info structure we return. */
600 static struct arm_linux_hwbp_cap info
;
602 /* Is INFO in a good state? -1 means that no attempt has been made to
603 initialize INFO; 0 means an attempt has been made, but it failed; 1
604 means INFO is in an initialized state. */
605 static int available
= -1;
612 tid
= inferior_ptid
.lwp ();
613 if (ptrace (PTRACE_GETHBPREGS
, tid
, 0, &val
) < 0)
617 info
.arch
= (gdb_byte
)((val
>> 24) & 0xff);
618 info
.max_wp_length
= (gdb_byte
)((val
>> 16) & 0xff);
619 info
.wp_count
= (gdb_byte
)((val
>> 8) & 0xff);
620 info
.bp_count
= (gdb_byte
)(val
& 0xff);
622 if (info
.wp_count
> MAX_WPTS
)
624 warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
625 supports %d"), MAX_WPTS
, info
.wp_count
);
626 info
.wp_count
= MAX_WPTS
;
629 if (info
.bp_count
> MAX_BPTS
)
631 warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
632 supports %d"), MAX_BPTS
, info
.bp_count
);
633 info
.bp_count
= MAX_BPTS
;
635 available
= (info
.arch
!= 0);
639 return available
== 1 ? &info
: NULL
;
642 /* How many hardware breakpoints are available? */
644 arm_linux_get_hw_breakpoint_count (void)
646 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
647 return cap
!= NULL
? cap
->bp_count
: 0;
650 /* How many hardware watchpoints are available? */
652 arm_linux_get_hw_watchpoint_count (void)
654 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
655 return cap
!= NULL
? cap
->wp_count
: 0;
658 /* Have we got a free break-/watch-point available for use? Returns -1 if
659 there is not an appropriate resource available, otherwise returns 1. */
661 arm_linux_nat_target::can_use_hw_breakpoint (enum bptype type
,
664 if (type
== bp_hardware_watchpoint
|| type
== bp_read_watchpoint
665 || type
== bp_access_watchpoint
|| type
== bp_watchpoint
)
667 int count
= arm_linux_get_hw_watchpoint_count ();
671 else if (cnt
+ ot
> count
)
674 else if (type
== bp_hardware_breakpoint
)
676 int count
= arm_linux_get_hw_breakpoint_count ();
680 else if (cnt
> count
)
684 gdb_assert_not_reached ("unknown breakpoint type");
689 /* Enum describing the different types of ARM hardware break-/watch-points. */
698 /* Type describing an ARM Hardware Breakpoint Control register value. */
699 typedef unsigned int arm_hwbp_control_t
;
701 /* Structure used to keep track of hardware break-/watch-points. */
702 struct arm_linux_hw_breakpoint
704 /* Address to break on, or being watched. */
705 unsigned int address
;
706 /* Control register for break-/watch- point. */
707 arm_hwbp_control_t control
;
710 /* Structure containing arrays of per process hardware break-/watchpoints
711 for caching address and control information.
713 The Linux ptrace interface to hardware break-/watch-points presents the
714 values in a vector centred around 0 (which is used fo generic information).
715 Positive indicies refer to breakpoint addresses/control registers, negative
716 indices to watchpoint addresses/control registers.
718 The Linux vector is indexed as follows:
719 -((i << 1) + 2): Control register for watchpoint i.
720 -((i << 1) + 1): Address register for watchpoint i.
721 0: Information register.
722 ((i << 1) + 1): Address register for breakpoint i.
723 ((i << 1) + 2): Control register for breakpoint i.
725 This structure is used as a per-thread cache of the state stored by the
726 kernel, so that we don't need to keep calling into the kernel to find a
729 We treat break-/watch-points with their enable bit clear as being deleted.
731 struct arm_linux_debug_reg_state
733 /* Hardware breakpoints for this process. */
734 struct arm_linux_hw_breakpoint bpts
[MAX_BPTS
];
735 /* Hardware watchpoints for this process. */
736 struct arm_linux_hw_breakpoint wpts
[MAX_WPTS
];
739 /* Per-process arch-specific data we want to keep. */
740 struct arm_linux_process_info
743 struct arm_linux_process_info
*next
;
744 /* The process identifier. */
746 /* Hardware break-/watchpoints state information. */
747 struct arm_linux_debug_reg_state state
;
751 /* Per-thread arch-specific data we want to keep. */
754 /* Non-zero if our copy differs from what's recorded in the thread. */
755 char bpts_changed
[MAX_BPTS
];
756 char wpts_changed
[MAX_WPTS
];
759 static struct arm_linux_process_info
*arm_linux_process_list
= NULL
;
761 /* Find process data for process PID. */
763 static struct arm_linux_process_info
*
764 arm_linux_find_process_pid (pid_t pid
)
766 struct arm_linux_process_info
*proc
;
768 for (proc
= arm_linux_process_list
; proc
; proc
= proc
->next
)
769 if (proc
->pid
== pid
)
775 /* Add process data for process PID. Returns newly allocated info
778 static struct arm_linux_process_info
*
779 arm_linux_add_process (pid_t pid
)
781 struct arm_linux_process_info
*proc
;
783 proc
= XCNEW (struct arm_linux_process_info
);
786 proc
->next
= arm_linux_process_list
;
787 arm_linux_process_list
= proc
;
792 /* Get data specific info for process PID, creating it if necessary.
793 Never returns NULL. */
795 static struct arm_linux_process_info
*
796 arm_linux_process_info_get (pid_t pid
)
798 struct arm_linux_process_info
*proc
;
800 proc
= arm_linux_find_process_pid (pid
);
802 proc
= arm_linux_add_process (pid
);
807 /* Called whenever GDB is no longer debugging process PID. It deletes
808 data structures that keep track of debug register state. */
811 arm_linux_nat_target::low_forget_process (pid_t pid
)
813 struct arm_linux_process_info
*proc
, **proc_link
;
815 proc
= arm_linux_process_list
;
816 proc_link
= &arm_linux_process_list
;
820 if (proc
->pid
== pid
)
822 *proc_link
= proc
->next
;
828 proc_link
= &proc
->next
;
833 /* Get hardware break-/watchpoint state for process PID. */
835 static struct arm_linux_debug_reg_state
*
836 arm_linux_get_debug_reg_state (pid_t pid
)
838 return &arm_linux_process_info_get (pid
)->state
;
841 /* Initialize an ARM hardware break-/watch-point control register value.
842 BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
843 type of break-/watch-point; ENABLE indicates whether the point is enabled.
845 static arm_hwbp_control_t
846 arm_hwbp_control_initialize (unsigned byte_address_select
,
847 arm_hwbp_type hwbp_type
,
850 gdb_assert ((byte_address_select
& ~0xffU
) == 0);
851 gdb_assert (hwbp_type
!= arm_hwbp_break
852 || ((byte_address_select
& 0xfU
) != 0));
854 return (byte_address_select
<< 5) | (hwbp_type
<< 3) | (3 << 1) | enable
;
857 /* Does the breakpoint control value CONTROL have the enable bit set? */
859 arm_hwbp_control_is_enabled (arm_hwbp_control_t control
)
861 return control
& 0x1;
864 /* Change a breakpoint control word so that it is in the disabled state. */
865 static arm_hwbp_control_t
866 arm_hwbp_control_disable (arm_hwbp_control_t control
)
868 return control
& ~0x1;
871 /* Initialise the hardware breakpoint structure P. The breakpoint will be
872 enabled, and will point to the placed address of BP_TGT. */
874 arm_linux_hw_breakpoint_initialize (struct gdbarch
*gdbarch
,
875 struct bp_target_info
*bp_tgt
,
876 struct arm_linux_hw_breakpoint
*p
)
879 CORE_ADDR address
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
881 /* We have to create a mask for the control register which says which bits
882 of the word pointed to by address to break on. */
883 if (arm_pc_is_thumb (gdbarch
, address
))
894 p
->address
= (unsigned int) address
;
895 p
->control
= arm_hwbp_control_initialize (mask
, arm_hwbp_break
, 1);
898 /* Get the ARM hardware breakpoint type from the TYPE value we're
899 given when asked to set a watchpoint. */
901 arm_linux_get_hwbp_type (enum target_hw_bp_type type
)
904 return arm_hwbp_load
;
905 else if (type
== hw_write
)
906 return arm_hwbp_store
;
908 return arm_hwbp_access
;
911 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
912 to LEN. The type of watchpoint is given in RW. */
914 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr
, int len
,
915 enum target_hw_bp_type type
,
916 struct arm_linux_hw_breakpoint
*p
)
918 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
921 gdb_assert (cap
!= NULL
);
922 gdb_assert (cap
->max_wp_length
!= 0);
924 mask
= (1 << len
) - 1;
926 p
->address
= (unsigned int) addr
;
927 p
->control
= arm_hwbp_control_initialize (mask
,
928 arm_linux_get_hwbp_type (type
), 1);
931 /* Are two break-/watch-points equal? */
933 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint
*p1
,
934 const struct arm_linux_hw_breakpoint
*p2
)
936 return p1
->address
== p2
->address
&& p1
->control
== p2
->control
;
939 /* Callback to mark a watch-/breakpoint to be updated in all threads of
940 the current process. */
943 update_registers_callback (struct lwp_info
*lwp
, int watch
, int index
)
945 if (lwp
->arch_private
== NULL
)
946 lwp
->arch_private
= XCNEW (struct arch_lwp_info
);
948 /* The actual update is done later just before resuming the lwp,
949 we just mark that the registers need updating. */
951 lwp
->arch_private
->wpts_changed
[index
] = 1;
953 lwp
->arch_private
->bpts_changed
[index
] = 1;
955 /* If the lwp isn't stopped, force it to momentarily pause, so
956 we can update its breakpoint registers. */
958 linux_stop_lwp (lwp
);
963 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
964 =1) BPT for thread TID. */
966 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
* bpt
,
972 struct arm_linux_hw_breakpoint
* bpts
;
974 pid
= inferior_ptid
.pid ();
975 pid_ptid
= ptid_t (pid
);
979 count
= arm_linux_get_hw_watchpoint_count ();
980 bpts
= arm_linux_get_debug_reg_state (pid
)->wpts
;
984 count
= arm_linux_get_hw_breakpoint_count ();
985 bpts
= arm_linux_get_debug_reg_state (pid
)->bpts
;
988 for (i
= 0; i
< count
; ++i
)
989 if (!arm_hwbp_control_is_enabled (bpts
[i
].control
))
992 iterate_over_lwps (pid_ptid
,
993 [=] (struct lwp_info
*info
)
995 return update_registers_callback (info
, watchpoint
,
1001 gdb_assert (i
!= count
);
1004 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1005 (WATCHPOINT = 1) BPT for thread TID. */
1007 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint
*bpt
,
1013 struct arm_linux_hw_breakpoint
* bpts
;
1015 pid
= inferior_ptid
.pid ();
1016 pid_ptid
= ptid_t (pid
);
1020 count
= arm_linux_get_hw_watchpoint_count ();
1021 bpts
= arm_linux_get_debug_reg_state (pid
)->wpts
;
1025 count
= arm_linux_get_hw_breakpoint_count ();
1026 bpts
= arm_linux_get_debug_reg_state (pid
)->bpts
;
1029 for (i
= 0; i
< count
; ++i
)
1030 if (arm_linux_hw_breakpoint_equal (bpt
, bpts
+ i
))
1032 bpts
[i
].control
= arm_hwbp_control_disable (bpts
[i
].control
);
1033 iterate_over_lwps (pid_ptid
,
1034 [=] (struct lwp_info
*info
)
1036 return update_registers_callback (info
, watchpoint
,
1042 gdb_assert (i
!= count
);
1045 /* Insert a Hardware breakpoint. */
1047 arm_linux_nat_target::insert_hw_breakpoint (struct gdbarch
*gdbarch
,
1048 struct bp_target_info
*bp_tgt
)
1050 struct arm_linux_hw_breakpoint p
;
1052 if (arm_linux_get_hw_breakpoint_count () == 0)
1055 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1057 arm_linux_insert_hw_breakpoint1 (&p
, 0);
1062 /* Remove a hardware breakpoint. */
1064 arm_linux_nat_target::remove_hw_breakpoint (struct gdbarch
*gdbarch
,
1065 struct bp_target_info
*bp_tgt
)
1067 struct arm_linux_hw_breakpoint p
;
1069 if (arm_linux_get_hw_breakpoint_count () == 0)
1072 arm_linux_hw_breakpoint_initialize (gdbarch
, bp_tgt
, &p
);
1074 arm_linux_remove_hw_breakpoint1 (&p
, 0);
1079 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1082 arm_linux_nat_target::region_ok_for_hw_watchpoint (CORE_ADDR addr
, int len
)
1084 const struct arm_linux_hwbp_cap
*cap
= arm_linux_get_hwbp_cap ();
1085 CORE_ADDR max_wp_length
, aligned_addr
;
1087 /* Can not set watchpoints for zero or negative lengths. */
1091 /* Need to be able to use the ptrace interface. */
1092 if (cap
== NULL
|| cap
->wp_count
== 0)
1095 /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1096 range covered by a watchpoint. */
1097 max_wp_length
= (CORE_ADDR
)cap
->max_wp_length
;
1098 aligned_addr
= addr
& ~(max_wp_length
- 1);
1100 if (aligned_addr
+ max_wp_length
< addr
+ len
)
1103 /* The current ptrace interface can only handle watchpoints that are a
1105 if ((len
& (len
- 1)) != 0)
1108 /* All tests passed so we must be able to set a watchpoint. */
1112 /* Insert a Hardware breakpoint. */
1114 arm_linux_nat_target::insert_watchpoint (CORE_ADDR addr
, int len
,
1115 enum target_hw_bp_type rw
,
1116 struct expression
*cond
)
1118 struct arm_linux_hw_breakpoint p
;
1120 if (arm_linux_get_hw_watchpoint_count () == 0)
1123 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1125 arm_linux_insert_hw_breakpoint1 (&p
, 1);
1130 /* Remove a hardware breakpoint. */
1132 arm_linux_nat_target::remove_watchpoint (CORE_ADDR addr
,
1133 int len
, enum target_hw_bp_type rw
,
1134 struct expression
*cond
)
1136 struct arm_linux_hw_breakpoint p
;
1138 if (arm_linux_get_hw_watchpoint_count () == 0)
1141 arm_linux_hw_watchpoint_initialize (addr
, len
, rw
, &p
);
1143 arm_linux_remove_hw_breakpoint1 (&p
, 1);
1148 /* What was the data address the target was stopped on accessing. */
1150 arm_linux_nat_target::stopped_data_address (CORE_ADDR
*addr_p
)
1155 if (!linux_nat_get_siginfo (inferior_ptid
, &siginfo
))
1158 /* This must be a hardware breakpoint. */
1159 if (siginfo
.si_signo
!= SIGTRAP
1160 || (siginfo
.si_code
& 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1163 /* We must be able to set hardware watchpoints. */
1164 if (arm_linux_get_hw_watchpoint_count () == 0)
1167 slot
= siginfo
.si_errno
;
1169 /* If we are in a positive slot then we're looking at a breakpoint and not
1174 *addr_p
= (CORE_ADDR
) (uintptr_t) siginfo
.si_addr
;
1178 /* Has the target been stopped by hitting a watchpoint? */
1180 arm_linux_nat_target::stopped_by_watchpoint ()
1183 return stopped_data_address (&addr
);
1187 arm_linux_nat_target::watchpoint_addr_within_range (CORE_ADDR addr
,
1191 return start
<= addr
&& start
+ length
- 1 >= addr
;
1194 /* Handle thread creation. We need to copy the breakpoints and watchpoints
1195 in the parent thread to the child thread. */
1197 arm_linux_nat_target::low_new_thread (struct lwp_info
*lp
)
1200 struct arch_lwp_info
*info
= XCNEW (struct arch_lwp_info
);
1202 /* Mark that all the hardware breakpoint/watchpoint register pairs
1203 for this thread need to be initialized. */
1205 for (i
= 0; i
< MAX_BPTS
; i
++)
1207 info
->bpts_changed
[i
] = 1;
1208 info
->wpts_changed
[i
] = 1;
1211 lp
->arch_private
= info
;
1214 /* Function to call when a thread is being deleted. */
1217 arm_linux_nat_target::low_delete_thread (struct arch_lwp_info
*arch_lwp
)
1222 /* Called when resuming a thread.
1223 The hardware debug registers are updated when there is any change. */
1226 arm_linux_nat_target::low_prepare_to_resume (struct lwp_info
*lwp
)
1229 struct arm_linux_hw_breakpoint
*bpts
, *wpts
;
1230 struct arch_lwp_info
*arm_lwp_info
= lwp
->arch_private
;
1232 pid
= lwp
->ptid
.lwp ();
1233 bpts
= arm_linux_get_debug_reg_state (lwp
->ptid
.pid ())->bpts
;
1234 wpts
= arm_linux_get_debug_reg_state (lwp
->ptid
.pid ())->wpts
;
1236 /* NULL means this is the main thread still going through the shell,
1237 or, no watchpoint has been set yet. In that case, there's
1239 if (arm_lwp_info
== NULL
)
1242 for (i
= 0; i
< arm_linux_get_hw_breakpoint_count (); i
++)
1243 if (arm_lwp_info
->bpts_changed
[i
])
1246 if (arm_hwbp_control_is_enabled (bpts
[i
].control
))
1247 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1248 (PTRACE_TYPE_ARG3
) ((i
<< 1) + 1), &bpts
[i
].address
) < 0)
1249 perror_with_name (_("Unexpected error setting breakpoint"));
1251 if (bpts
[i
].control
!= 0)
1252 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1253 (PTRACE_TYPE_ARG3
) ((i
<< 1) + 2), &bpts
[i
].control
) < 0)
1254 perror_with_name (_("Unexpected error setting breakpoint"));
1256 arm_lwp_info
->bpts_changed
[i
] = 0;
1259 for (i
= 0; i
< arm_linux_get_hw_watchpoint_count (); i
++)
1260 if (arm_lwp_info
->wpts_changed
[i
])
1263 if (arm_hwbp_control_is_enabled (wpts
[i
].control
))
1264 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1265 (PTRACE_TYPE_ARG3
) -((i
<< 1) + 1), &wpts
[i
].address
) < 0)
1266 perror_with_name (_("Unexpected error setting watchpoint"));
1268 if (wpts
[i
].control
!= 0)
1269 if (ptrace (PTRACE_SETHBPREGS
, pid
,
1270 (PTRACE_TYPE_ARG3
) -((i
<< 1) + 2), &wpts
[i
].control
) < 0)
1271 perror_with_name (_("Unexpected error setting watchpoint"));
1273 arm_lwp_info
->wpts_changed
[i
] = 0;
1277 /* linux_nat_new_fork hook. */
1280 arm_linux_nat_target::low_new_fork (struct lwp_info
*parent
, pid_t child_pid
)
1283 struct arm_linux_debug_reg_state
*parent_state
;
1284 struct arm_linux_debug_reg_state
*child_state
;
1286 /* NULL means no watchpoint has ever been set in the parent. In
1287 that case, there's nothing to do. */
1288 if (parent
->arch_private
== NULL
)
1291 /* GDB core assumes the child inherits the watchpoints/hw
1292 breakpoints of the parent, and will remove them all from the
1293 forked off process. Copy the debug registers mirrors into the
1294 new process so that all breakpoints and watchpoints can be
1295 removed together. */
1297 parent_pid
= parent
->ptid
.pid ();
1298 parent_state
= arm_linux_get_debug_reg_state (parent_pid
);
1299 child_state
= arm_linux_get_debug_reg_state (child_pid
);
1300 *child_state
= *parent_state
;
1304 _initialize_arm_linux_nat (void)
1306 /* Register the target. */
1307 linux_target
= &the_arm_linux_nat_target
;
1308 add_inf_child_target (&the_arm_linux_nat_target
);