gdb/arm-linux-nat.c

   1 /* GNU/Linux on ARM native support.
   2    Copyright (C) 1999-2015 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 3 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  18
  19 #include "defs.h"
  20 #include "inferior.h"
  21 #include "gdbcore.h"
  22 #include "regcache.h"
  23 #include "target.h"
  24 #include "linux-nat.h"
  25 #include "target-descriptions.h"
  26 #include "auxv.h"
  27 #include "observer.h"
  28 #include "gdbthread.h"
  29
  30 #include "arm-tdep.h"
  31 #include "arm-linux-tdep.h"
  32
  33 #include <elf/common.h>
  34 #include <sys/user.h>
  35 #include <sys/ptrace.h>
  36 #include <sys/utsname.h>
  37 #include <sys/procfs.h>
  38
  39 /* Prototypes for supply_gregset etc.  */
  40 #include "gregset.h"
  41
  42 /* Defines ps_err_e, struct ps_prochandle.  */
  43 #include "gdb_proc_service.h"
  44
  45 #ifndef PTRACE_GET_THREAD_AREA
  46 #define PTRACE_GET_THREAD_AREA 22
  47 #endif
  48
  49 #ifndef PTRACE_GETWMMXREGS
  50 #define PTRACE_GETWMMXREGS 18
  51 #define PTRACE_SETWMMXREGS 19
  52 #endif
  53
  54 #ifndef PTRACE_GETVFPREGS
  55 #define PTRACE_GETVFPREGS 27
  56 #define PTRACE_SETVFPREGS 28
  57 #endif
  58
  59 #ifndef PTRACE_GETHBPREGS
  60 #define PTRACE_GETHBPREGS 29
  61 #define PTRACE_SETHBPREGS 30
  62 #endif
  63
  64 extern int arm_apcs_32;
  65
  66 /* On GNU/Linux, threads are implemented as pseudo-processes, in which
  67    case we may be tracing more than one process at a time.  In that
  68    case, inferior_ptid will contain the main process ID and the
  69    individual thread (process) ID.  get_thread_id () is used to get
  70    the thread id if it's available, and the process id otherwise.  */
  71
  72 static int
  73 get_thread_id (ptid_t ptid)
  74 {
  75   int tid = ptid_get_lwp (ptid);
  76   if (0 == tid)
  77     tid = ptid_get_pid (ptid);
  78   return tid;
  79 }
  80
  81 #define GET_THREAD_ID(PTID)     get_thread_id (PTID)
  82
  83 /* Get the value of a particular register from the floating point
  84    state of the process and store it into regcache.  */
  85
  86 static void
  87 fetch_fpregister (struct regcache *regcache, int regno)
  88 {
  89   int ret, tid;
  90   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
  91
  92   /* Get the thread id for the ptrace call.  */
  93   tid = GET_THREAD_ID (inferior_ptid);
  94
  95   /* Read the floating point state.  */
  96   if (have_ptrace_getregset)
  97     {
  98       struct iovec iov;
  99
 100       iov.iov_base = &fp;
 101       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 102
 103       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 104     }
 105   else
 106     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 107
 108   if (ret < 0)
 109     {
 110       warning (_("Unable to fetch floating point register."));
 111       return;
 112     }
 113
 114   /* Fetch fpsr.  */
 115   if (ARM_FPS_REGNUM == regno)
 116     regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 117                          fp + NWFPE_FPSR_OFFSET);
 118
 119   /* Fetch the floating point register.  */
 120   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 121     supply_nwfpe_register (regcache, regno, fp);
 122 }
 123
 124 /* Get the whole floating point state of the process and store it
 125    into regcache.  */
 126
 127 static void
 128 fetch_fpregs (struct regcache *regcache)
 129 {
 130   int ret, regno, tid;
 131   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 132
 133   /* Get the thread id for the ptrace call.  */
 134   tid = GET_THREAD_ID (inferior_ptid);
 135
 136   /* Read the floating point state.  */
 137   if (have_ptrace_getregset)
 138     {
 139       struct iovec iov;
 140
 141       iov.iov_base = &fp;
 142       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 143
 144       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 145     }
 146   else
 147     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 148
 149   if (ret < 0)
 150     {
 151       warning (_("Unable to fetch the floating point registers."));
 152       return;
 153     }
 154
 155   /* Fetch fpsr.  */
 156   regcache_raw_supply (regcache, ARM_FPS_REGNUM,
 157                        fp + NWFPE_FPSR_OFFSET);
 158
 159   /* Fetch the floating point registers.  */
 160   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 161     supply_nwfpe_register (regcache, regno, fp);
 162 }
 163
 164 /* Save a particular register into the floating point state of the
 165    process using the contents from regcache.  */
 166
 167 static void
 168 store_fpregister (const struct regcache *regcache, int regno)
 169 {
 170   int ret, tid;
 171   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 172
 173   /* Get the thread id for the ptrace call.  */
 174   tid = GET_THREAD_ID (inferior_ptid);
 175
 176   /* Read the floating point state.  */
 177   if (have_ptrace_getregset)
 178     {
 179       struct iovec iov;
 180
 181       iov.iov_base = &fp;
 182       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 183
 184       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 185     }
 186   else
 187     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 188
 189   if (ret < 0)
 190     {
 191       warning (_("Unable to fetch the floating point registers."));
 192       return;
 193     }
 194
 195   /* Store fpsr.  */
 196   if (ARM_FPS_REGNUM == regno
 197       && REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 198     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 199
 200   /* Store the floating point register.  */
 201   if (regno >= ARM_F0_REGNUM && regno <= ARM_F7_REGNUM)
 202     collect_nwfpe_register (regcache, regno, fp);
 203
 204   if (have_ptrace_getregset)
 205     {
 206       struct iovec iov;
 207
 208       iov.iov_base = &fp;
 209       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 210
 211       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 212     }
 213   else
 214     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 215
 216   if (ret < 0)
 217     {
 218       warning (_("Unable to store floating point register."));
 219       return;
 220     }
 221 }
 222
 223 /* Save the whole floating point state of the process using
 224    the contents from regcache.  */
 225
 226 static void
 227 store_fpregs (const struct regcache *regcache)
 228 {
 229   int ret, regno, tid;
 230   gdb_byte fp[ARM_LINUX_SIZEOF_NWFPE];
 231
 232   /* Get the thread id for the ptrace call.  */
 233   tid = GET_THREAD_ID (inferior_ptid);
 234
 235   /* Read the floating point state.  */
 236   if (have_ptrace_getregset)
 237     {
 238       elf_fpregset_t fpregs;
 239       struct iovec iov;
 240
 241       iov.iov_base = &fpregs;
 242       iov.iov_len = sizeof (fpregs);
 243
 244       ret = ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iov);
 245     }
 246   else
 247     ret = ptrace (PT_GETFPREGS, tid, 0, fp);
 248
 249   if (ret < 0)
 250     {
 251       warning (_("Unable to fetch the floating point registers."));
 252       return;
 253     }
 254
 255   /* Store fpsr.  */
 256   if (REG_VALID == regcache_register_status (regcache, ARM_FPS_REGNUM))
 257     regcache_raw_collect (regcache, ARM_FPS_REGNUM, fp + NWFPE_FPSR_OFFSET);
 258
 259   /* Store the floating point registers.  */
 260   for (regno = ARM_F0_REGNUM; regno <= ARM_F7_REGNUM; regno++)
 261     if (REG_VALID == regcache_register_status (regcache, regno))
 262       collect_nwfpe_register (regcache, regno, fp);
 263
 264   if (have_ptrace_getregset)
 265     {
 266       struct iovec iov;
 267
 268       iov.iov_base = &fp;
 269       iov.iov_len = ARM_LINUX_SIZEOF_NWFPE;
 270
 271       ret = ptrace (PTRACE_SETREGSET, tid, NT_FPREGSET, &iov);
 272     }
 273   else
 274     ret = ptrace (PTRACE_SETFPREGS, tid, 0, fp);
 275
 276   if (ret < 0)
 277     {
 278       warning (_("Unable to store floating point registers."));
 279       return;
 280     }
 281 }
 282
 283 /* Fetch a general register of the process and store into
 284    regcache.  */
 285
 286 static void
 287 fetch_register (struct regcache *regcache, int regno)
 288 {
 289   int ret, tid;
 290   elf_gregset_t regs;
 291
 292   /* Get the thread id for the ptrace call.  */
 293   tid = GET_THREAD_ID (inferior_ptid);
 294
 295   if (have_ptrace_getregset)
 296     {
 297       struct iovec iov;
 298
 299       iov.iov_base = &regs;
 300       iov.iov_len = sizeof (regs);
 301
 302       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 303     }
 304   else
 305     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 306
 307   if (ret < 0)
 308     {
 309       warning (_("Unable to fetch general register."));
 310       return;
 311     }
 312
 313   if (regno >= ARM_A1_REGNUM && regno < ARM_PC_REGNUM)
 314     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 315
 316   if (ARM_PS_REGNUM == regno)
 317     {
 318       if (arm_apcs_32)
 319         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 320                              (char *) &regs[ARM_CPSR_GREGNUM]);
 321       else
 322         regcache_raw_supply (regcache, ARM_PS_REGNUM,
 323                              (char *) &regs[ARM_PC_REGNUM]);
 324     }
 325
 326   if (ARM_PC_REGNUM == regno)
 327     {
 328       regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 329                               (get_regcache_arch (regcache),
 330                                regs[ARM_PC_REGNUM]);
 331       regcache_raw_supply (regcache, ARM_PC_REGNUM,
 332                            (char *) &regs[ARM_PC_REGNUM]);
 333     }
 334 }
 335
 336 /* Fetch all general registers of the process and store into
 337    regcache.  */
 338
 339 static void
 340 fetch_regs (struct regcache *regcache)
 341 {
 342   int ret, regno, tid;
 343   elf_gregset_t regs;
 344
 345   /* Get the thread id for the ptrace call.  */
 346   tid = GET_THREAD_ID (inferior_ptid);
 347
 348   if (have_ptrace_getregset)
 349     {
 350       struct iovec iov;
 351
 352       iov.iov_base = &regs;
 353       iov.iov_len = sizeof (regs);
 354
 355       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 356     }
 357   else
 358     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 359
 360   if (ret < 0)
 361     {
 362       warning (_("Unable to fetch general registers."));
 363       return;
 364     }
 365
 366   for (regno = ARM_A1_REGNUM; regno < ARM_PC_REGNUM; regno++)
 367     regcache_raw_supply (regcache, regno, (char *) &regs[regno]);
 368
 369   if (arm_apcs_32)
 370     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 371                          (char *) &regs[ARM_CPSR_GREGNUM]);
 372   else
 373     regcache_raw_supply (regcache, ARM_PS_REGNUM,
 374                          (char *) &regs[ARM_PC_REGNUM]);
 375
 376   regs[ARM_PC_REGNUM] = gdbarch_addr_bits_remove
 377                           (get_regcache_arch (regcache), regs[ARM_PC_REGNUM]);
 378   regcache_raw_supply (regcache, ARM_PC_REGNUM,
 379                        (char *) &regs[ARM_PC_REGNUM]);
 380 }
 381
 382 /* Store all general registers of the process from the values in
 383    regcache.  */
 384
 385 static void
 386 store_register (const struct regcache *regcache, int regno)
 387 {
 388   int ret, tid;
 389   elf_gregset_t regs;
 390
 391   if (REG_VALID != regcache_register_status (regcache, regno))
 392     return;
 393
 394   /* Get the thread id for the ptrace call.  */
 395   tid = GET_THREAD_ID (inferior_ptid);
 396
 397   /* Get the general registers from the process.  */
 398   if (have_ptrace_getregset)
 399     {
 400       struct iovec iov;
 401
 402       iov.iov_base = &regs;
 403       iov.iov_len = sizeof (regs);
 404
 405       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 406     }
 407   else
 408     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 409
 410   if (ret < 0)
 411     {
 412       warning (_("Unable to fetch general registers."));
 413       return;
 414     }
 415
 416   if (regno >= ARM_A1_REGNUM && regno <= ARM_PC_REGNUM)
 417     regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 418   else if (arm_apcs_32 && regno == ARM_PS_REGNUM)
 419     regcache_raw_collect (regcache, regno,
 420                          (char *) &regs[ARM_CPSR_GREGNUM]);
 421   else if (!arm_apcs_32 && regno == ARM_PS_REGNUM)
 422     regcache_raw_collect (regcache, ARM_PC_REGNUM,
 423                          (char *) &regs[ARM_PC_REGNUM]);
 424
 425   if (have_ptrace_getregset)
 426     {
 427       struct iovec iov;
 428
 429       iov.iov_base = &regs;
 430       iov.iov_len = sizeof (regs);
 431
 432       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 433     }
 434   else
 435     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 436
 437   if (ret < 0)
 438     {
 439       warning (_("Unable to store general register."));
 440       return;
 441     }
 442 }
 443
 444 static void
 445 store_regs (const struct regcache *regcache)
 446 {
 447   int ret, regno, tid;
 448   elf_gregset_t regs;
 449
 450   /* Get the thread id for the ptrace call.  */
 451   tid = GET_THREAD_ID (inferior_ptid);
 452
 453   /* Fetch the general registers.  */
 454   if (have_ptrace_getregset)
 455     {
 456       struct iovec iov;
 457
 458       iov.iov_base = &regs;
 459       iov.iov_len = sizeof (regs);
 460
 461       ret = ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov);
 462     }
 463   else
 464     ret = ptrace (PTRACE_GETREGS, tid, 0, &regs);
 465
 466   if (ret < 0)
 467     {
 468       warning (_("Unable to fetch general registers."));
 469       return;
 470     }
 471
 472   for (regno = ARM_A1_REGNUM; regno <= ARM_PC_REGNUM; regno++)
 473     {
 474       if (REG_VALID == regcache_register_status (regcache, regno))
 475         regcache_raw_collect (regcache, regno, (char *) &regs[regno]);
 476     }
 477
 478   if (arm_apcs_32 && REG_VALID == regcache_register_status (regcache, ARM_PS_REGNUM))
 479     regcache_raw_collect (regcache, ARM_PS_REGNUM,
 480                          (char *) &regs[ARM_CPSR_GREGNUM]);
 481
 482   if (have_ptrace_getregset)
 483     {
 484       struct iovec iov;
 485
 486       iov.iov_base = &regs;
 487       iov.iov_len = sizeof (regs);
 488
 489       ret = ptrace (PTRACE_SETREGSET, tid, NT_PRSTATUS, &iov);
 490     }
 491   else
 492     ret = ptrace (PTRACE_SETREGS, tid, 0, &regs);
 493
 494   if (ret < 0)
 495     {
 496       warning (_("Unable to store general registers."));
 497       return;
 498     }
 499 }
 500
 501 /* Fetch all WMMX registers of the process and store into
 502    regcache.  */
 503
 504 #define IWMMXT_REGS_SIZE (16 * 8 + 6 * 4)
 505
 506 static void
 507 fetch_wmmx_regs (struct regcache *regcache)
 508 {
 509   char regbuf[IWMMXT_REGS_SIZE];
 510   int ret, regno, tid;
 511
 512   /* Get the thread id for the ptrace call.  */
 513   tid = GET_THREAD_ID (inferior_ptid);
 514
 515   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 516   if (ret < 0)
 517     {
 518       warning (_("Unable to fetch WMMX registers."));
 519       return;
 520     }
 521
 522   for (regno = 0; regno < 16; regno++)
 523     regcache_raw_supply (regcache, regno + ARM_WR0_REGNUM,
 524                          &regbuf[regno * 8]);
 525
 526   for (regno = 0; regno < 2; regno++)
 527     regcache_raw_supply (regcache, regno + ARM_WCSSF_REGNUM,
 528                          &regbuf[16 * 8 + regno * 4]);
 529
 530   for (regno = 0; regno < 4; regno++)
 531     regcache_raw_supply (regcache, regno + ARM_WCGR0_REGNUM,
 532                          &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 533 }
 534
 535 static void
 536 store_wmmx_regs (const struct regcache *regcache)
 537 {
 538   char regbuf[IWMMXT_REGS_SIZE];
 539   int ret, regno, tid;
 540
 541   /* Get the thread id for the ptrace call.  */
 542   tid = GET_THREAD_ID (inferior_ptid);
 543
 544   ret = ptrace (PTRACE_GETWMMXREGS, tid, 0, regbuf);
 545   if (ret < 0)
 546     {
 547       warning (_("Unable to fetch WMMX registers."));
 548       return;
 549     }
 550
 551   for (regno = 0; regno < 16; regno++)
 552     if (REG_VALID == regcache_register_status (regcache,
 553                                                regno + ARM_WR0_REGNUM))
 554       regcache_raw_collect (regcache, regno + ARM_WR0_REGNUM,
 555                             &regbuf[regno * 8]);
 556
 557   for (regno = 0; regno < 2; regno++)
 558     if (REG_VALID == regcache_register_status (regcache,
 559                                                regno + ARM_WCSSF_REGNUM))
 560       regcache_raw_collect (regcache, regno + ARM_WCSSF_REGNUM,
 561                             &regbuf[16 * 8 + regno * 4]);
 562
 563   for (regno = 0; regno < 4; regno++)
 564     if (REG_VALID == regcache_register_status (regcache,
 565                                                regno + ARM_WCGR0_REGNUM))
 566       regcache_raw_collect (regcache, regno + ARM_WCGR0_REGNUM,
 567                             &regbuf[16 * 8 + 2 * 4 + regno * 4]);
 568
 569   ret = ptrace (PTRACE_SETWMMXREGS, tid, 0, regbuf);
 570
 571   if (ret < 0)
 572     {
 573       warning (_("Unable to store WMMX registers."));
 574       return;
 575     }
 576 }
 577
 578 /* Fetch and store VFP Registers.  The kernel object has space for 32
 579    64-bit registers, and the FPSCR.  This is even when on a VFPv2 or
 580    VFPv3D16 target.  */
 581 #define VFP_REGS_SIZE (32 * 8 + 4)
 582
 583 static void
 584 fetch_vfp_regs (struct regcache *regcache)
 585 {
 586   char regbuf[VFP_REGS_SIZE];
 587   int ret, regno, tid;
 588   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 589   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 590
 591   /* Get the thread id for the ptrace call.  */
 592   tid = GET_THREAD_ID (inferior_ptid);
 593
 594   if (have_ptrace_getregset)
 595     {
 596       struct iovec iov;
 597
 598       iov.iov_base = regbuf;
 599       iov.iov_len = VFP_REGS_SIZE;
 600       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 601     }
 602   else
 603     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 604
 605   if (ret < 0)
 606     {
 607       warning (_("Unable to fetch VFP registers."));
 608       return;
 609     }
 610
 611   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 612     regcache_raw_supply (regcache, regno + ARM_D0_REGNUM,
 613                          (char *) regbuf + regno * 8);
 614
 615   regcache_raw_supply (regcache, ARM_FPSCR_REGNUM,
 616                        (char *) regbuf + 32 * 8);
 617 }
 618
 619 static void
 620 store_vfp_regs (const struct regcache *regcache)
 621 {
 622   char regbuf[VFP_REGS_SIZE];
 623   int ret, regno, tid;
 624   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 625   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 626
 627   /* Get the thread id for the ptrace call.  */
 628   tid = GET_THREAD_ID (inferior_ptid);
 629
 630   if (have_ptrace_getregset)
 631     {
 632       struct iovec iov;
 633
 634       iov.iov_base = regbuf;
 635       iov.iov_len = VFP_REGS_SIZE;
 636       ret = ptrace (PTRACE_GETREGSET, tid, NT_ARM_VFP, &iov);
 637     }
 638   else
 639     ret = ptrace (PTRACE_GETVFPREGS, tid, 0, regbuf);
 640
 641   if (ret < 0)
 642     {
 643       warning (_("Unable to fetch VFP registers (for update)."));
 644       return;
 645     }
 646
 647   for (regno = 0; regno < tdep->vfp_register_count; regno++)
 648     regcache_raw_collect (regcache, regno + ARM_D0_REGNUM,
 649                           (char *) regbuf + regno * 8);
 650
 651   regcache_raw_collect (regcache, ARM_FPSCR_REGNUM,
 652                         (char *) regbuf + 32 * 8);
 653
 654   if (have_ptrace_getregset)
 655     {
 656       struct iovec iov;
 657
 658       iov.iov_base = regbuf;
 659       iov.iov_len = VFP_REGS_SIZE;
 660       ret = ptrace (PTRACE_SETREGSET, tid, NT_ARM_VFP, &iov);
 661     }
 662   else
 663     ret = ptrace (PTRACE_SETVFPREGS, tid, 0, regbuf);
 664
 665   if (ret < 0)
 666     {
 667       warning (_("Unable to store VFP registers."));
 668       return;
 669     }
 670 }
 671
 672 /* Fetch registers from the child process.  Fetch all registers if
 673    regno == -1, otherwise fetch all general registers or all floating
 674    point registers depending upon the value of regno.  */
 675
 676 static void
 677 arm_linux_fetch_inferior_registers (struct target_ops *ops,
 678                                     struct regcache *regcache, int regno)
 679 {
 680   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 681   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 682
 683   if (-1 == regno)
 684     {
 685       fetch_regs (regcache);
 686       fetch_fpregs (regcache);
 687       if (tdep->have_wmmx_registers)
 688         fetch_wmmx_regs (regcache);
 689       if (tdep->vfp_register_count > 0)
 690         fetch_vfp_regs (regcache);
 691     }
 692   else
 693     {
 694       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 695         fetch_register (regcache, regno);
 696       else if (regno >= ARM_F0_REGNUM && regno <= ARM_FPS_REGNUM)
 697         fetch_fpregister (regcache, regno);
 698       else if (tdep->have_wmmx_registers
 699                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 700         fetch_wmmx_regs (regcache);
 701       else if (tdep->vfp_register_count > 0
 702                && regno >= ARM_D0_REGNUM
 703                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 704         fetch_vfp_regs (regcache);
 705     }
 706 }
 707
 708 /* Store registers back into the inferior.  Store all registers if
 709    regno == -1, otherwise store all general registers or all floating
 710    point registers depending upon the value of regno.  */
 711
 712 static void
 713 arm_linux_store_inferior_registers (struct target_ops *ops,
 714                                     struct regcache *regcache, int regno)
 715 {
 716   struct gdbarch *gdbarch = get_regcache_arch (regcache);
 717   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 718
 719   if (-1 == regno)
 720     {
 721       store_regs (regcache);
 722       store_fpregs (regcache);
 723       if (tdep->have_wmmx_registers)
 724         store_wmmx_regs (regcache);
 725       if (tdep->vfp_register_count > 0)
 726         store_vfp_regs (regcache);
 727     }
 728   else
 729     {
 730       if (regno < ARM_F0_REGNUM || regno == ARM_PS_REGNUM)
 731         store_register (regcache, regno);
 732       else if ((regno >= ARM_F0_REGNUM) && (regno <= ARM_FPS_REGNUM))
 733         store_fpregister (regcache, regno);
 734       else if (tdep->have_wmmx_registers
 735                && regno >= ARM_WR0_REGNUM && regno <= ARM_WCGR7_REGNUM)
 736         store_wmmx_regs (regcache);
 737       else if (tdep->vfp_register_count > 0
 738                && regno >= ARM_D0_REGNUM
 739                && regno <= ARM_D0_REGNUM + tdep->vfp_register_count)
 740         store_vfp_regs (regcache);
 741     }
 742 }
 743
 744 /* Wrapper functions for the standard regset handling, used by
 745    thread debugging.  */
 746
 747 void
 748 fill_gregset (const struct regcache *regcache,
 749               gdb_gregset_t *gregsetp, int regno)
 750 {
 751   arm_linux_collect_gregset (NULL, regcache, regno, gregsetp, 0);
 752 }
 753
 754 void
 755 supply_gregset (struct regcache *regcache, const gdb_gregset_t *gregsetp)
 756 {
 757   arm_linux_supply_gregset (NULL, regcache, -1, gregsetp, 0);
 758 }
 759
 760 void
 761 fill_fpregset (const struct regcache *regcache,
 762                gdb_fpregset_t *fpregsetp, int regno)
 763 {
 764   arm_linux_collect_nwfpe (NULL, regcache, regno, fpregsetp, 0);
 765 }
 766
 767 /* Fill GDB's register array with the floating-point register values
 768    in *fpregsetp.  */
 769
 770 void
 771 supply_fpregset (struct regcache *regcache, const gdb_fpregset_t *fpregsetp)
 772 {
 773   arm_linux_supply_nwfpe (NULL, regcache, -1, fpregsetp, 0);
 774 }
 775
 776 /* Fetch the thread-local storage pointer for libthread_db.  */
 777
 778 ps_err_e
 779 ps_get_thread_area (const struct ps_prochandle *ph,
 780                     lwpid_t lwpid, int idx, void **base)
 781 {
 782   if (ptrace (PTRACE_GET_THREAD_AREA, lwpid, NULL, base) != 0)
 783     return PS_ERR;
 784
 785   /* IDX is the bias from the thread pointer to the beginning of the
 786      thread descriptor.  It has to be subtracted due to implementation
 787      quirks in libthread_db.  */
 788   *base = (void *) ((char *)*base - idx);
 789
 790   return PS_OK;
 791 }
 792
 793 static const struct target_desc *
 794 arm_linux_read_description (struct target_ops *ops)
 795 {
 796   CORE_ADDR arm_hwcap = 0;
 797
 798   if (have_ptrace_getregset == -1)
 799     {
 800       elf_gregset_t gpregs;
 801       struct iovec iov;
 802       int tid = GET_THREAD_ID (inferior_ptid);
 803
 804       iov.iov_base = &gpregs;
 805       iov.iov_len = sizeof (gpregs);
 806
 807       /* Check if PTRACE_GETREGSET works.  */
 808       if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iov) < 0)
 809         have_ptrace_getregset = 0;
 810       else
 811         have_ptrace_getregset = 1;
 812     }
 813
 814   if (target_auxv_search (ops, AT_HWCAP, &arm_hwcap) != 1)
 815     {
 816       return ops->beneath->to_read_description (ops->beneath);
 817     }
 818
 819   if (arm_hwcap & HWCAP_IWMMXT)
 820     return tdesc_arm_with_iwmmxt;
 821
 822   if (arm_hwcap & HWCAP_VFP)
 823     {
 824       int pid;
 825       char *buf;
 826       const struct target_desc * result = NULL;
 827
 828       /* NEON implies VFPv3-D32 or no-VFP unit.  Say that we only support
 829          Neon with VFPv3-D32.  */
 830       if (arm_hwcap & HWCAP_NEON)
 831         result = tdesc_arm_with_neon;
 832       else if ((arm_hwcap & (HWCAP_VFPv3 | HWCAP_VFPv3D16)) == HWCAP_VFPv3)
 833         result = tdesc_arm_with_vfpv3;
 834       else
 835         result = tdesc_arm_with_vfpv2;
 836
 837       /* Now make sure that the kernel supports reading these
 838          registers.  Support was added in 2.6.30.  */
 839       pid = ptid_get_lwp (inferior_ptid);
 840       errno = 0;
 841       buf = alloca (VFP_REGS_SIZE);
 842       if (ptrace (PTRACE_GETVFPREGS, pid, 0, buf) < 0
 843           && errno == EIO)
 844         result = NULL;
 845
 846       return result;
 847     }
 848
 849   return ops->beneath->to_read_description (ops->beneath);
 850 }
 851
 852 /* Information describing the hardware breakpoint capabilities.  */
 853 struct arm_linux_hwbp_cap
 854 {
 855   gdb_byte arch;
 856   gdb_byte max_wp_length;
 857   gdb_byte wp_count;
 858   gdb_byte bp_count;
 859 };
 860
 861 /* Since we cannot dynamically allocate subfields of arm_linux_process_info,
 862    assume a maximum number of supported break-/watchpoints.  */
 863 #define MAX_BPTS 16
 864 #define MAX_WPTS 16
 865
 866 /* Get hold of the Hardware Breakpoint information for the target we are
 867    attached to.  Returns NULL if the kernel doesn't support Hardware
 868    breakpoints at all, or a pointer to the information structure.  */
 869 static const struct arm_linux_hwbp_cap *
 870 arm_linux_get_hwbp_cap (void)
 871 {
 872   /* The info structure we return.  */
 873   static struct arm_linux_hwbp_cap info;
 874
 875   /* Is INFO in a good state?  -1 means that no attempt has been made to
 876      initialize INFO; 0 means an attempt has been made, but it failed; 1
 877      means INFO is in an initialized state.  */
 878   static int available = -1;
 879
 880   if (available == -1)
 881     {
 882       int tid;
 883       unsigned int val;
 884
 885       tid = GET_THREAD_ID (inferior_ptid);
 886       if (ptrace (PTRACE_GETHBPREGS, tid, 0, &val) < 0)
 887         available = 0;
 888       else
 889         {
 890           info.arch = (gdb_byte)((val >> 24) & 0xff);
 891           info.max_wp_length = (gdb_byte)((val >> 16) & 0xff);
 892           info.wp_count = (gdb_byte)((val >> 8) & 0xff);
 893           info.bp_count = (gdb_byte)(val & 0xff);
 894
 895       if (info.wp_count > MAX_WPTS)
 896         {
 897           warning (_("arm-linux-gdb supports %d hardware watchpoints but target \
 898                       supports %d"), MAX_WPTS, info.wp_count);
 899           info.wp_count = MAX_WPTS;
 900         }
 901
 902       if (info.bp_count > MAX_BPTS)
 903         {
 904           warning (_("arm-linux-gdb supports %d hardware breakpoints but target \
 905                       supports %d"), MAX_BPTS, info.bp_count);
 906           info.bp_count = MAX_BPTS;
 907         }
 908           available = (info.arch != 0);
 909         }
 910     }
 911
 912   return available == 1 ? &info : NULL;
 913 }
 914
 915 /* How many hardware breakpoints are available?  */
 916 static int
 917 arm_linux_get_hw_breakpoint_count (void)
 918 {
 919   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 920   return cap != NULL ? cap->bp_count : 0;
 921 }
 922
 923 /* How many hardware watchpoints are available?  */
 924 static int
 925 arm_linux_get_hw_watchpoint_count (void)
 926 {
 927   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
 928   return cap != NULL ? cap->wp_count : 0;
 929 }
 930
 931 /* Have we got a free break-/watch-point available for use?  Returns -1 if
 932    there is not an appropriate resource available, otherwise returns 1.  */
 933 static int
 934 arm_linux_can_use_hw_breakpoint (struct target_ops *self,
 935                                  int type, int cnt, int ot)
 936 {
 937   if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
 938       || type == bp_access_watchpoint || type == bp_watchpoint)
 939     {
 940       int count = arm_linux_get_hw_watchpoint_count ();
 941
 942       if (count == 0)
 943         return 0;
 944       else if (cnt + ot > count)
 945         return -1;
 946     }
 947   else if (type == bp_hardware_breakpoint)
 948     {
 949       int count = arm_linux_get_hw_breakpoint_count ();
 950
 951       if (count == 0)
 952         return 0;
 953       else if (cnt > count)
 954         return -1;
 955     }
 956   else
 957     gdb_assert (FALSE);
 958
 959   return 1;
 960 }
 961
 962 /* Enum describing the different types of ARM hardware break-/watch-points.  */
 963 typedef enum
 964 {
 965   arm_hwbp_break = 0,
 966   arm_hwbp_load = 1,
 967   arm_hwbp_store = 2,
 968   arm_hwbp_access = 3
 969 } arm_hwbp_type;
 970
 971 /* Type describing an ARM Hardware Breakpoint Control register value.  */
 972 typedef unsigned int arm_hwbp_control_t;
 973
 974 /* Structure used to keep track of hardware break-/watch-points.  */
 975 struct arm_linux_hw_breakpoint
 976 {
 977   /* Address to break on, or being watched.  */
 978   unsigned int address;
 979   /* Control register for break-/watch- point.  */
 980   arm_hwbp_control_t control;
 981 };
 982
 983 /* Structure containing arrays of per process hardware break-/watchpoints
 984    for caching address and control information.
 985
 986    The Linux ptrace interface to hardware break-/watch-points presents the
 987    values in a vector centred around 0 (which is used fo generic information).
 988    Positive indicies refer to breakpoint addresses/control registers, negative
 989    indices to watchpoint addresses/control registers.
 990
 991    The Linux vector is indexed as follows:
 992       -((i << 1) + 2): Control register for watchpoint i.
 993       -((i << 1) + 1): Address register for watchpoint i.
 994                     0: Information register.
 995        ((i << 1) + 1): Address register for breakpoint i.
 996        ((i << 1) + 2): Control register for breakpoint i.
 997
 998    This structure is used as a per-thread cache of the state stored by the
 999    kernel, so that we don't need to keep calling into the kernel to find a
1000    free breakpoint.
1001
1002    We treat break-/watch-points with their enable bit clear as being deleted.
1003    */
1004 struct arm_linux_debug_reg_state
1005 {
1006   /* Hardware breakpoints for this process.  */
1007   struct arm_linux_hw_breakpoint bpts[MAX_BPTS];
1008   /* Hardware watchpoints for this process.  */
1009   struct arm_linux_hw_breakpoint wpts[MAX_WPTS];
1010 };
1011
1012 /* Per-process arch-specific data we want to keep.  */
1013 struct arm_linux_process_info
1014 {
1015   /* Linked list.  */
1016   struct arm_linux_process_info *next;
1017   /* The process identifier.  */
1018   pid_t pid;
1019   /* Hardware break-/watchpoints state information.  */
1020   struct arm_linux_debug_reg_state state;
1021
1022 };
1023
1024 /* Per-thread arch-specific data we want to keep.  */
1025 struct arch_lwp_info
1026 {
1027   /* Non-zero if our copy differs from what's recorded in the thread.  */
1028   char bpts_changed[MAX_BPTS];
1029   char wpts_changed[MAX_WPTS];
1030 };
1031
1032 static struct arm_linux_process_info *arm_linux_process_list = NULL;
1033
1034 /* Find process data for process PID.  */
1035
1036 static struct arm_linux_process_info *
1037 arm_linux_find_process_pid (pid_t pid)
1038 {
1039   struct arm_linux_process_info *proc;
1040
1041   for (proc = arm_linux_process_list; proc; proc = proc->next)
1042     if (proc->pid == pid)
1043       return proc;
1044
1045   return NULL;
1046 }
1047
1048 /* Add process data for process PID.  Returns newly allocated info
1049    object.  */
1050
1051 static struct arm_linux_process_info *
1052 arm_linux_add_process (pid_t pid)
1053 {
1054   struct arm_linux_process_info *proc;
1055
1056   proc = xcalloc (1, sizeof (*proc));
1057   proc->pid = pid;
1058
1059   proc->next = arm_linux_process_list;
1060   arm_linux_process_list = proc;
1061
1062   return proc;
1063 }
1064
1065 /* Get data specific info for process PID, creating it if necessary.
1066    Never returns NULL.  */
1067
1068 static struct arm_linux_process_info *
1069 arm_linux_process_info_get (pid_t pid)
1070 {
1071   struct arm_linux_process_info *proc;
1072
1073   proc = arm_linux_find_process_pid (pid);
1074   if (proc == NULL)
1075     proc = arm_linux_add_process (pid);
1076
1077   return proc;
1078 }
1079
1080 /* Called whenever GDB is no longer debugging process PID.  It deletes
1081    data structures that keep track of debug register state.  */
1082
1083 static void
1084 arm_linux_forget_process (pid_t pid)
1085 {
1086   struct arm_linux_process_info *proc, **proc_link;
1087
1088   proc = arm_linux_process_list;
1089   proc_link = &arm_linux_process_list;
1090
1091   while (proc != NULL)
1092     {
1093       if (proc->pid == pid)
1094     {
1095       *proc_link = proc->next;
1096
1097       xfree (proc);
1098       return;
1099     }
1100
1101       proc_link = &proc->next;
1102       proc = *proc_link;
1103     }
1104 }
1105
1106 /* Get hardware break-/watchpoint state for process PID.  */
1107
1108 static struct arm_linux_debug_reg_state *
1109 arm_linux_get_debug_reg_state (pid_t pid)
1110 {
1111   return &arm_linux_process_info_get (pid)->state;
1112 }
1113
1114 /* Initialize an ARM hardware break-/watch-point control register value.
1115    BYTE_ADDRESS_SELECT is the mask of bytes to trigger on; HWBP_TYPE is the
1116    type of break-/watch-point; ENABLE indicates whether the point is enabled.
1117    */
1118 static arm_hwbp_control_t
1119 arm_hwbp_control_initialize (unsigned byte_address_select,
1120                              arm_hwbp_type hwbp_type,
1121                              int enable)
1122 {
1123   gdb_assert ((byte_address_select & ~0xffU) == 0);
1124   gdb_assert (hwbp_type != arm_hwbp_break
1125               || ((byte_address_select & 0xfU) != 0));
1126
1127   return (byte_address_select << 5) | (hwbp_type << 3) | (3 << 1) | enable;
1128 }
1129
1130 /* Does the breakpoint control value CONTROL have the enable bit set?  */
1131 static int
1132 arm_hwbp_control_is_enabled (arm_hwbp_control_t control)
1133 {
1134   return control & 0x1;
1135 }
1136
1137 /* Change a breakpoint control word so that it is in the disabled state.  */
1138 static arm_hwbp_control_t
1139 arm_hwbp_control_disable (arm_hwbp_control_t control)
1140 {
1141   return control & ~0x1;
1142 }
1143
1144 /* Initialise the hardware breakpoint structure P.  The breakpoint will be
1145    enabled, and will point to the placed address of BP_TGT.  */
1146 static void
1147 arm_linux_hw_breakpoint_initialize (struct gdbarch *gdbarch,
1148                                     struct bp_target_info *bp_tgt,
1149                                     struct arm_linux_hw_breakpoint *p)
1150 {
1151   unsigned mask;
1152   CORE_ADDR address = bp_tgt->placed_address = bp_tgt->reqstd_address;
1153
1154   /* We have to create a mask for the control register which says which bits
1155      of the word pointed to by address to break on.  */
1156   if (arm_pc_is_thumb (gdbarch, address))
1157     {
1158       mask = 0x3;
1159       address &= ~1;
1160     }
1161   else
1162     {
1163       mask = 0xf;
1164       address &= ~3;
1165     }
1166
1167   p->address = (unsigned int) address;
1168   p->control = arm_hwbp_control_initialize (mask, arm_hwbp_break, 1);
1169 }
1170
1171 /* Get the ARM hardware breakpoint type from the RW value we're given when
1172    asked to set a watchpoint.  */
1173 static arm_hwbp_type
1174 arm_linux_get_hwbp_type (int rw)
1175 {
1176   if (rw == hw_read)
1177     return arm_hwbp_load;
1178   else if (rw == hw_write)
1179     return arm_hwbp_store;
1180   else
1181     return arm_hwbp_access;
1182 }
1183
1184 /* Initialize the hardware breakpoint structure P for a watchpoint at ADDR
1185    to LEN.  The type of watchpoint is given in RW.  */
1186 static void
1187 arm_linux_hw_watchpoint_initialize (CORE_ADDR addr, int len, int rw,
1188                                     struct arm_linux_hw_breakpoint *p)
1189 {
1190   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1191   unsigned mask;
1192
1193   gdb_assert (cap != NULL);
1194   gdb_assert (cap->max_wp_length != 0);
1195
1196   mask = (1 << len) - 1;
1197
1198   p->address = (unsigned int) addr;
1199   p->control = arm_hwbp_control_initialize (mask,
1200                                             arm_linux_get_hwbp_type (rw), 1);
1201 }
1202
1203 /* Are two break-/watch-points equal?  */
1204 static int
1205 arm_linux_hw_breakpoint_equal (const struct arm_linux_hw_breakpoint *p1,
1206                                const struct arm_linux_hw_breakpoint *p2)
1207 {
1208   return p1->address == p2->address && p1->control == p2->control;
1209 }
1210
1211 /* Callback to mark a watch-/breakpoint to be updated in all threads of
1212    the current process.  */
1213
1214 struct update_registers_data
1215 {
1216   int watch;
1217   int index;
1218 };
1219
1220 static int
1221 update_registers_callback (struct lwp_info *lwp, void *arg)
1222 {
1223   struct update_registers_data *data = (struct update_registers_data *) arg;
1224
1225   if (lwp->arch_private == NULL)
1226     lwp->arch_private = XCNEW (struct arch_lwp_info);
1227
1228   /* The actual update is done later just before resuming the lwp,
1229      we just mark that the registers need updating.  */
1230   if (data->watch)
1231     lwp->arch_private->wpts_changed[data->index] = 1;
1232   else
1233     lwp->arch_private->bpts_changed[data->index] = 1;
1234
1235   /* If the lwp isn't stopped, force it to momentarily pause, so
1236      we can update its breakpoint registers.  */
1237   if (!lwp->stopped)
1238     linux_stop_lwp (lwp);
1239
1240   return 0;
1241 }
1242
1243 /* Insert the hardware breakpoint (WATCHPOINT = 0) or watchpoint (WATCHPOINT
1244    =1) BPT for thread TID.  */
1245 static void
1246 arm_linux_insert_hw_breakpoint1 (const struct arm_linux_hw_breakpoint* bpt,
1247                                  int watchpoint)
1248 {
1249   int pid;
1250   ptid_t pid_ptid;
1251   gdb_byte count, i;
1252   struct arm_linux_hw_breakpoint* bpts;
1253   struct update_registers_data data;
1254
1255   pid = ptid_get_pid (inferior_ptid);
1256   pid_ptid = pid_to_ptid (pid);
1257
1258   if (watchpoint)
1259     {
1260       count = arm_linux_get_hw_watchpoint_count ();
1261       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1262     }
1263   else
1264     {
1265       count = arm_linux_get_hw_breakpoint_count ();
1266       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1267     }
1268
1269   for (i = 0; i < count; ++i)
1270     if (!arm_hwbp_control_is_enabled (bpts[i].control))
1271       {
1272         data.watch = watchpoint;
1273         data.index = i;
1274         bpts[i] = *bpt;
1275         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1276         break;
1277       }
1278
1279   gdb_assert (i != count);
1280 }
1281
1282 /* Remove the hardware breakpoint (WATCHPOINT = 0) or watchpoint
1283    (WATCHPOINT = 1) BPT for thread TID.  */
1284 static void
1285 arm_linux_remove_hw_breakpoint1 (const struct arm_linux_hw_breakpoint *bpt,
1286                                  int watchpoint)
1287 {
1288   int pid;
1289   gdb_byte count, i;
1290   ptid_t pid_ptid;
1291   struct arm_linux_hw_breakpoint* bpts;
1292   struct update_registers_data data;
1293
1294   pid = ptid_get_pid (inferior_ptid);
1295   pid_ptid = pid_to_ptid (pid);
1296
1297   if (watchpoint)
1298     {
1299       count = arm_linux_get_hw_watchpoint_count ();
1300       bpts = arm_linux_get_debug_reg_state (pid)->wpts;
1301     }
1302   else
1303     {
1304       count = arm_linux_get_hw_breakpoint_count ();
1305       bpts = arm_linux_get_debug_reg_state (pid)->bpts;
1306     }
1307
1308   for (i = 0; i < count; ++i)
1309     if (arm_linux_hw_breakpoint_equal (bpt, bpts + i))
1310       {
1311         data.watch = watchpoint;
1312         data.index = i;
1313         bpts[i].control = arm_hwbp_control_disable (bpts[i].control);
1314         iterate_over_lwps (pid_ptid, update_registers_callback, &data);
1315         break;
1316       }
1317
1318   gdb_assert (i != count);
1319 }
1320
1321 /* Insert a Hardware breakpoint.  */
1322 static int
1323 arm_linux_insert_hw_breakpoint (struct target_ops *self,
1324                                 struct gdbarch *gdbarch,
1325                                 struct bp_target_info *bp_tgt)
1326 {
1327   struct lwp_info *lp;
1328   struct arm_linux_hw_breakpoint p;
1329
1330   if (arm_linux_get_hw_breakpoint_count () == 0)
1331     return -1;
1332
1333   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1334
1335   arm_linux_insert_hw_breakpoint1 (&p, 0);
1336
1337   return 0;
1338 }
1339
1340 /* Remove a hardware breakpoint.  */
1341 static int
1342 arm_linux_remove_hw_breakpoint (struct target_ops *self,
1343                                 struct gdbarch *gdbarch,
1344                                 struct bp_target_info *bp_tgt)
1345 {
1346   struct lwp_info *lp;
1347   struct arm_linux_hw_breakpoint p;
1348
1349   if (arm_linux_get_hw_breakpoint_count () == 0)
1350     return -1;
1351
1352   arm_linux_hw_breakpoint_initialize (gdbarch, bp_tgt, &p);
1353
1354   arm_linux_remove_hw_breakpoint1 (&p, 0);
1355
1356   return 0;
1357 }
1358
1359 /* Are we able to use a hardware watchpoint for the LEN bytes starting at
1360    ADDR?  */
1361 static int
1362 arm_linux_region_ok_for_hw_watchpoint (struct target_ops *self,
1363                                        CORE_ADDR addr, int len)
1364 {
1365   const struct arm_linux_hwbp_cap *cap = arm_linux_get_hwbp_cap ();
1366   CORE_ADDR max_wp_length, aligned_addr;
1367
1368   /* Can not set watchpoints for zero or negative lengths.  */
1369   if (len <= 0)
1370     return 0;
1371
1372   /* Need to be able to use the ptrace interface.  */
1373   if (cap == NULL || cap->wp_count == 0)
1374     return 0;
1375
1376   /* Test that the range [ADDR, ADDR + LEN) fits into the largest address
1377      range covered by a watchpoint.  */
1378   max_wp_length = (CORE_ADDR)cap->max_wp_length;
1379   aligned_addr = addr & ~(max_wp_length - 1);
1380
1381   if (aligned_addr + max_wp_length < addr + len)
1382     return 0;
1383
1384   /* The current ptrace interface can only handle watchpoints that are a
1385      power of 2.  */
1386   if ((len & (len - 1)) != 0)
1387     return 0;
1388
1389   /* All tests passed so we must be able to set a watchpoint.  */
1390   return 1;
1391 }
1392
1393 /* Insert a Hardware breakpoint.  */
1394 static int
1395 arm_linux_insert_watchpoint (struct target_ops *self,
1396                              CORE_ADDR addr, int len, int rw,
1397                              struct expression *cond)
1398 {
1399   struct lwp_info *lp;
1400   struct arm_linux_hw_breakpoint p;
1401
1402   if (arm_linux_get_hw_watchpoint_count () == 0)
1403     return -1;
1404
1405   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1406
1407   arm_linux_insert_hw_breakpoint1 (&p, 1);
1408
1409   return 0;
1410 }
1411
1412 /* Remove a hardware breakpoint.  */
1413 static int
1414 arm_linux_remove_watchpoint (struct target_ops *self,
1415                              CORE_ADDR addr, int len, int rw,
1416                              struct expression *cond)
1417 {
1418   struct lwp_info *lp;
1419   struct arm_linux_hw_breakpoint p;
1420
1421   if (arm_linux_get_hw_watchpoint_count () == 0)
1422     return -1;
1423
1424   arm_linux_hw_watchpoint_initialize (addr, len, rw, &p);
1425
1426   arm_linux_remove_hw_breakpoint1 (&p, 1);
1427
1428   return 0;
1429 }
1430
1431 /* What was the data address the target was stopped on accessing.  */
1432 static int
1433 arm_linux_stopped_data_address (struct target_ops *target, CORE_ADDR *addr_p)
1434 {
1435   siginfo_t siginfo;
1436   int slot;
1437
1438   if (!linux_nat_get_siginfo (inferior_ptid, &siginfo))
1439     return 0;
1440
1441   /* This must be a hardware breakpoint.  */
1442   if (siginfo.si_signo != SIGTRAP
1443       || (siginfo.si_code & 0xffff) != 0x0004 /* TRAP_HWBKPT */)
1444     return 0;
1445
1446   /* We must be able to set hardware watchpoints.  */
1447   if (arm_linux_get_hw_watchpoint_count () == 0)
1448     return 0;
1449
1450   slot = siginfo.si_errno;
1451
1452   /* If we are in a positive slot then we're looking at a breakpoint and not
1453      a watchpoint.  */
1454   if (slot >= 0)
1455     return 0;
1456
1457   *addr_p = (CORE_ADDR) (uintptr_t) siginfo.si_addr;
1458   return 1;
1459 }
1460
1461 /* Has the target been stopped by hitting a watchpoint?  */
1462 static int
1463 arm_linux_stopped_by_watchpoint (struct target_ops *ops)
1464 {
1465   CORE_ADDR addr;
1466   return arm_linux_stopped_data_address (ops, &addr);
1467 }
1468
1469 static int
1470 arm_linux_watchpoint_addr_within_range (struct target_ops *target,
1471                                         CORE_ADDR addr,
1472                                         CORE_ADDR start, int length)
1473 {
1474   return start <= addr && start + length - 1 >= addr;
1475 }
1476
1477 /* Handle thread creation.  We need to copy the breakpoints and watchpoints
1478    in the parent thread to the child thread.  */
1479 static void
1480 arm_linux_new_thread (struct lwp_info *lp)
1481 {
1482   int i;
1483   struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
1484
1485   /* Mark that all the hardware breakpoint/watchpoint register pairs
1486      for this thread need to be initialized.  */
1487
1488   for (i = 0; i < MAX_BPTS; i++)
1489     {
1490       info->bpts_changed[i] = 1;
1491       info->wpts_changed[i] = 1;
1492     }
1493
1494   lp->arch_private = info;
1495 }
1496
1497 /* Called when resuming a thread.
1498    The hardware debug registers are updated when there is any change.  */
1499
1500 static void
1501 arm_linux_prepare_to_resume (struct lwp_info *lwp)
1502 {
1503   int pid, i;
1504   struct arm_linux_hw_breakpoint *bpts, *wpts;
1505   struct arch_lwp_info *arm_lwp_info = lwp->arch_private;
1506
1507   pid = ptid_get_lwp (lwp->ptid);
1508   bpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->bpts;
1509   wpts = arm_linux_get_debug_reg_state (ptid_get_pid (lwp->ptid))->wpts;
1510
1511   /* NULL means this is the main thread still going through the shell,
1512      or, no watchpoint has been set yet.  In that case, there's
1513      nothing to do.  */
1514   if (arm_lwp_info == NULL)
1515     return;
1516
1517   for (i = 0; i < arm_linux_get_hw_breakpoint_count (); i++)
1518     if (arm_lwp_info->bpts_changed[i])
1519       {
1520         errno = 0;
1521         if (arm_hwbp_control_is_enabled (bpts[i].control))
1522           if (ptrace (PTRACE_SETHBPREGS, pid,
1523               (PTRACE_TYPE_ARG3) ((i << 1) + 1), &bpts[i].address) < 0)
1524             perror_with_name (_("Unexpected error setting breakpoint"));
1525
1526         if (bpts[i].control != 0)
1527           if (ptrace (PTRACE_SETHBPREGS, pid,
1528               (PTRACE_TYPE_ARG3) ((i << 1) + 2), &bpts[i].control) < 0)
1529             perror_with_name (_("Unexpected error setting breakpoint"));
1530
1531         arm_lwp_info->bpts_changed[i] = 0;
1532       }
1533
1534   for (i = 0; i < arm_linux_get_hw_watchpoint_count (); i++)
1535     if (arm_lwp_info->wpts_changed[i])
1536       {
1537         errno = 0;
1538         if (arm_hwbp_control_is_enabled (wpts[i].control))
1539           if (ptrace (PTRACE_SETHBPREGS, pid,
1540               (PTRACE_TYPE_ARG3) -((i << 1) + 1), &wpts[i].address) < 0)
1541             perror_with_name (_("Unexpected error setting watchpoint"));
1542
1543         if (wpts[i].control != 0)
1544           if (ptrace (PTRACE_SETHBPREGS, pid,
1545               (PTRACE_TYPE_ARG3) -((i << 1) + 2), &wpts[i].control) < 0)
1546             perror_with_name (_("Unexpected error setting watchpoint"));
1547
1548         arm_lwp_info->wpts_changed[i] = 0;
1549       }
1550 }
1551
1552 /* linux_nat_new_fork hook.  */
1553
1554 static void
1555 arm_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
1556 {
1557   pid_t parent_pid;
1558   struct arm_linux_debug_reg_state *parent_state;
1559   struct arm_linux_debug_reg_state *child_state;
1560
1561   /* NULL means no watchpoint has ever been set in the parent.  In
1562      that case, there's nothing to do.  */
1563   if (parent->arch_private == NULL)
1564     return;
1565
1566   /* GDB core assumes the child inherits the watchpoints/hw
1567      breakpoints of the parent, and will remove them all from the
1568      forked off process.  Copy the debug registers mirrors into the
1569      new process so that all breakpoints and watchpoints can be
1570      removed together.  */
1571
1572   parent_pid = ptid_get_pid (parent->ptid);
1573   parent_state = arm_linux_get_debug_reg_state (parent_pid);
1574   child_state = arm_linux_get_debug_reg_state (child_pid);
1575   *child_state = *parent_state;
1576 }
1577
1578 void _initialize_arm_linux_nat (void);
1579
1580 void
1581 _initialize_arm_linux_nat (void)
1582 {
1583   struct target_ops *t;
1584
1585   /* Fill in the generic GNU/Linux methods.  */
1586   t = linux_target ();
1587
1588   /* Add our register access methods.  */
1589   t->to_fetch_registers = arm_linux_fetch_inferior_registers;
1590   t->to_store_registers = arm_linux_store_inferior_registers;
1591
1592   /* Add our hardware breakpoint and watchpoint implementation.  */
1593   t->to_can_use_hw_breakpoint = arm_linux_can_use_hw_breakpoint;
1594   t->to_insert_hw_breakpoint = arm_linux_insert_hw_breakpoint;
1595   t->to_remove_hw_breakpoint = arm_linux_remove_hw_breakpoint;
1596   t->to_region_ok_for_hw_watchpoint = arm_linux_region_ok_for_hw_watchpoint;
1597   t->to_insert_watchpoint = arm_linux_insert_watchpoint;
1598   t->to_remove_watchpoint = arm_linux_remove_watchpoint;
1599   t->to_stopped_by_watchpoint = arm_linux_stopped_by_watchpoint;
1600   t->to_stopped_data_address = arm_linux_stopped_data_address;
1601   t->to_watchpoint_addr_within_range = arm_linux_watchpoint_addr_within_range;
1602
1603   t->to_read_description = arm_linux_read_description;
1604
1605   /* Register the target.  */
1606   linux_nat_add_target (t);
1607
1608   /* Handle thread creation and exit.  */
1609   linux_nat_set_new_thread (t, arm_linux_new_thread);
1610   linux_nat_set_prepare_to_resume (t, arm_linux_prepare_to_resume);
1611
1612   /* Handle process creation and exit.  */
1613   linux_nat_set_new_fork (t, arm_linux_new_fork);
1614   linux_nat_set_forget_process (t, arm_linux_forget_process);
1615 }