* arm-tdep.c (fp_model_strings): Add terminating NULL.
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
1 /* GNU/Linux on ARM target support.
2
3 Copyright 1999, 2000, 2001, 2002, 2003, 2005 Free Software
4 Foundation, Inc.
5
6 This file is part of GDB.
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
22
23 #include "defs.h"
24 #include "target.h"
25 #include "value.h"
26 #include "gdbtypes.h"
27 #include "floatformat.h"
28 #include "gdbcore.h"
29 #include "frame.h"
30 #include "regcache.h"
31 #include "doublest.h"
32 #include "solib-svr4.h"
33 #include "osabi.h"
34
35 #include "arm-tdep.h"
36 #include "glibc-tdep.h"
37
38 /* Under ARM GNU/Linux the traditional way of performing a breakpoint
39 is to execute a particular software interrupt, rather than use a
40 particular undefined instruction to provoke a trap. Upon exection
41 of the software interrupt the kernel stops the inferior with a
42 SIGTRAP, and wakes the debugger. */
43
44 static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
45
46 static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
47
48 static const char arm_linux_thumb_be_breakpoint[] = {0xde, 0x01};
49
50 static const char arm_linux_thumb_le_breakpoint[] = {0x01, 0xde};
51
52 /* Description of the longjmp buffer. */
53 #define ARM_LINUX_JB_ELEMENT_SIZE INT_REGISTER_SIZE
54 #define ARM_LINUX_JB_PC 21
55
56 /* Extract from an array REGBUF containing the (raw) register state
57 a function return value of type TYPE, and copy that, in virtual format,
58 into VALBUF. */
59 /* FIXME rearnsha/2002-02-23: This function shouldn't be necessary.
60 The ARM generic one should be able to handle the model used by
61 linux and the low-level formatting of the registers should be
62 hidden behind the regcache abstraction. */
63 static void
64 arm_linux_extract_return_value (struct type *type,
65 char regbuf[],
66 char *valbuf)
67 {
68 /* ScottB: This needs to be looked at to handle the different
69 floating point emulators on ARM GNU/Linux. Right now the code
70 assumes that fetch inferior registers does the right thing for
71 GDB. I suspect this won't handle NWFPE registers correctly, nor
72 will the default ARM version (arm_extract_return_value()). */
73
74 int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type))
75 ? ARM_F0_REGNUM : ARM_A1_REGNUM);
76 memcpy (valbuf, &regbuf[DEPRECATED_REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
77 }
78
79 /* Note: ScottB
80
81 This function does not support passing parameters using the FPA
82 variant of the APCS. It passes any floating point arguments in the
83 general registers and/or on the stack.
84
85 FIXME: This and arm_push_arguments should be merged. However this
86 function breaks on a little endian host, big endian target
87 using the COFF file format. ELF is ok.
88
89 ScottB. */
90
91 /* Addresses for calling Thumb functions have the bit 0 set.
92 Here are some macros to test, set, or clear bit 0 of addresses. */
93 #define IS_THUMB_ADDR(addr) ((addr) & 1)
94 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
95 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
96
97 static CORE_ADDR
98 arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
99 int struct_return, CORE_ADDR struct_addr)
100 {
101 char *fp;
102 int argnum, argreg, nstack_size;
103
104 /* Walk through the list of args and determine how large a temporary
105 stack is required. Need to take care here as structs may be
106 passed on the stack, and we have to to push them. */
107 nstack_size = -4 * DEPRECATED_REGISTER_SIZE; /* Some arguments go into A1-A4. */
108
109 if (struct_return) /* The struct address goes in A1. */
110 nstack_size += DEPRECATED_REGISTER_SIZE;
111
112 /* Walk through the arguments and add their size to nstack_size. */
113 for (argnum = 0; argnum < nargs; argnum++)
114 {
115 int len;
116 struct type *arg_type;
117
118 arg_type = check_typedef (value_type (args[argnum]));
119 len = TYPE_LENGTH (arg_type);
120
121 /* ANSI C code passes float arguments as integers, K&R code
122 passes float arguments as doubles. Correct for this here. */
123 if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && DEPRECATED_REGISTER_SIZE == len)
124 nstack_size += TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
125 else
126 nstack_size += len;
127 }
128
129 /* Allocate room on the stack, and initialize our stack frame
130 pointer. */
131 fp = NULL;
132 if (nstack_size > 0)
133 {
134 sp -= nstack_size;
135 fp = (char *) sp;
136 }
137
138 /* Initialize the integer argument register pointer. */
139 argreg = ARM_A1_REGNUM;
140
141 /* The struct_return pointer occupies the first parameter passing
142 register. */
143 if (struct_return)
144 write_register (argreg++, struct_addr);
145
146 /* Process arguments from left to right. Store as many as allowed
147 in the parameter passing registers (A1-A4), and save the rest on
148 the temporary stack. */
149 for (argnum = 0; argnum < nargs; argnum++)
150 {
151 int len;
152 char *val;
153 CORE_ADDR regval;
154 enum type_code typecode;
155 struct type *arg_type, *target_type;
156
157 arg_type = check_typedef (value_type (args[argnum]));
158 target_type = TYPE_TARGET_TYPE (arg_type);
159 len = TYPE_LENGTH (arg_type);
160 typecode = TYPE_CODE (arg_type);
161 val = (char *) value_contents (args[argnum]);
162
163 /* ANSI C code passes float arguments as integers, K&R code
164 passes float arguments as doubles. The .stabs record for
165 for ANSI prototype floating point arguments records the
166 type as FP_INTEGER, while a K&R style (no prototype)
167 .stabs records the type as FP_FLOAT. In this latter case
168 the compiler converts the float arguments to double before
169 calling the function. */
170 if (TYPE_CODE_FLT == typecode && DEPRECATED_REGISTER_SIZE == len)
171 {
172 DOUBLEST dblval;
173 dblval = deprecated_extract_floating (val, len);
174 len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
175 val = alloca (len);
176 deprecated_store_floating (val, len, dblval);
177 }
178
179 /* If the argument is a pointer to a function, and it is a Thumb
180 function, set the low bit of the pointer. */
181 if (TYPE_CODE_PTR == typecode
182 && NULL != target_type
183 && TYPE_CODE_FUNC == TYPE_CODE (target_type))
184 {
185 CORE_ADDR regval = extract_unsigned_integer (val, len);
186 if (arm_pc_is_thumb (regval))
187 store_unsigned_integer (val, len, MAKE_THUMB_ADDR (regval));
188 }
189
190 /* Copy the argument to general registers or the stack in
191 register-sized pieces. Large arguments are split between
192 registers and stack. */
193 while (len > 0)
194 {
195 int partial_len = len < DEPRECATED_REGISTER_SIZE ? len : DEPRECATED_REGISTER_SIZE;
196
197 if (argreg <= ARM_LAST_ARG_REGNUM)
198 {
199 /* It's an argument being passed in a general register. */
200 regval = extract_unsigned_integer (val, partial_len);
201 write_register (argreg++, regval);
202 }
203 else
204 {
205 /* Push the arguments onto the stack. */
206 write_memory ((CORE_ADDR) fp, val, DEPRECATED_REGISTER_SIZE);
207 fp += DEPRECATED_REGISTER_SIZE;
208 }
209
210 len -= partial_len;
211 val += partial_len;
212 }
213 }
214
215 /* Return adjusted stack pointer. */
216 return sp;
217 }
218
219 /*
220 Dynamic Linking on ARM GNU/Linux
221 --------------------------------
222
223 Note: PLT = procedure linkage table
224 GOT = global offset table
225
226 As much as possible, ELF dynamic linking defers the resolution of
227 jump/call addresses until the last minute. The technique used is
228 inspired by the i386 ELF design, and is based on the following
229 constraints.
230
231 1) The calling technique should not force a change in the assembly
232 code produced for apps; it MAY cause changes in the way assembly
233 code is produced for position independent code (i.e. shared
234 libraries).
235
236 2) The technique must be such that all executable areas must not be
237 modified; and any modified areas must not be executed.
238
239 To do this, there are three steps involved in a typical jump:
240
241 1) in the code
242 2) through the PLT
243 3) using a pointer from the GOT
244
245 When the executable or library is first loaded, each GOT entry is
246 initialized to point to the code which implements dynamic name
247 resolution and code finding. This is normally a function in the
248 program interpreter (on ARM GNU/Linux this is usually
249 ld-linux.so.2, but it does not have to be). On the first
250 invocation, the function is located and the GOT entry is replaced
251 with the real function address. Subsequent calls go through steps
252 1, 2 and 3 and end up calling the real code.
253
254 1) In the code:
255
256 b function_call
257 bl function_call
258
259 This is typical ARM code using the 26 bit relative branch or branch
260 and link instructions. The target of the instruction
261 (function_call is usually the address of the function to be called.
262 In position independent code, the target of the instruction is
263 actually an entry in the PLT when calling functions in a shared
264 library. Note that this call is identical to a normal function
265 call, only the target differs.
266
267 2) In the PLT:
268
269 The PLT is a synthetic area, created by the linker. It exists in
270 both executables and libraries. It is an array of stubs, one per
271 imported function call. It looks like this:
272
273 PLT[0]:
274 str lr, [sp, #-4]! @push the return address (lr)
275 ldr lr, [pc, #16] @load from 6 words ahead
276 add lr, pc, lr @form an address for GOT[0]
277 ldr pc, [lr, #8]! @jump to the contents of that addr
278
279 The return address (lr) is pushed on the stack and used for
280 calculations. The load on the second line loads the lr with
281 &GOT[3] - . - 20. The addition on the third leaves:
282
283 lr = (&GOT[3] - . - 20) + (. + 8)
284 lr = (&GOT[3] - 12)
285 lr = &GOT[0]
286
287 On the fourth line, the pc and lr are both updated, so that:
288
289 pc = GOT[2]
290 lr = &GOT[0] + 8
291 = &GOT[2]
292
293 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
294 "tight", but allows us to keep all the PLT entries the same size.
295
296 PLT[n+1]:
297 ldr ip, [pc, #4] @load offset from gotoff
298 add ip, pc, ip @add the offset to the pc
299 ldr pc, [ip] @jump to that address
300 gotoff: .word GOT[n+3] - .
301
302 The load on the first line, gets an offset from the fourth word of
303 the PLT entry. The add on the second line makes ip = &GOT[n+3],
304 which contains either a pointer to PLT[0] (the fixup trampoline) or
305 a pointer to the actual code.
306
307 3) In the GOT:
308
309 The GOT contains helper pointers for both code (PLT) fixups and
310 data fixups. The first 3 entries of the GOT are special. The next
311 M entries (where M is the number of entries in the PLT) belong to
312 the PLT fixups. The next D (all remaining) entries belong to
313 various data fixups. The actual size of the GOT is 3 + M + D.
314
315 The GOT is also a synthetic area, created by the linker. It exists
316 in both executables and libraries. When the GOT is first
317 initialized , all the GOT entries relating to PLT fixups are
318 pointing to code back at PLT[0].
319
320 The special entries in the GOT are:
321
322 GOT[0] = linked list pointer used by the dynamic loader
323 GOT[1] = pointer to the reloc table for this module
324 GOT[2] = pointer to the fixup/resolver code
325
326 The first invocation of function call comes through and uses the
327 fixup/resolver code. On the entry to the fixup/resolver code:
328
329 ip = &GOT[n+3]
330 lr = &GOT[2]
331 stack[0] = return address (lr) of the function call
332 [r0, r1, r2, r3] are still the arguments to the function call
333
334 This is enough information for the fixup/resolver code to work
335 with. Before the fixup/resolver code returns, it actually calls
336 the requested function and repairs &GOT[n+3]. */
337
338 /* Fetch, and possibly build, an appropriate link_map_offsets structure
339 for ARM linux targets using the struct offsets defined in <link.h>.
340 Note, however, that link.h is not actually referred to in this file.
341 Instead, the relevant structs offsets were obtained from examining
342 link.h. (We can't refer to link.h from this file because the host
343 system won't necessarily have it, or if it does, the structs which
344 it defines will refer to the host system, not the target). */
345
346 static struct link_map_offsets *
347 arm_linux_svr4_fetch_link_map_offsets (void)
348 {
349 static struct link_map_offsets lmo;
350 static struct link_map_offsets *lmp = 0;
351
352 if (lmp == 0)
353 {
354 lmp = &lmo;
355
356 lmo.r_debug_size = 8; /* Actual size is 20, but this is all we
357 need. */
358
359 lmo.r_map_offset = 4;
360 lmo.r_map_size = 4;
361
362 lmo.link_map_size = 20; /* Actual size is 552, but this is all we
363 need. */
364
365 lmo.l_addr_offset = 0;
366 lmo.l_addr_size = 4;
367
368 lmo.l_name_offset = 4;
369 lmo.l_name_size = 4;
370
371 lmo.l_next_offset = 12;
372 lmo.l_next_size = 4;
373
374 lmo.l_prev_offset = 16;
375 lmo.l_prev_size = 4;
376 }
377
378 return lmp;
379 }
380
381 /* The constants below were determined by examining the following files
382 in the linux kernel sources:
383
384 arch/arm/kernel/signal.c
385 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
386 include/asm-arm/unistd.h
387 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
388
389 #define ARM_LINUX_SIGRETURN_INSTR 0xef900077
390 #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
391
392 /* arm_linux_in_sigtramp determines if PC points at one of the
393 instructions which cause control to return to the Linux kernel upon
394 return from a signal handler. FUNC_NAME is unused. */
395
396 int
397 arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
398 {
399 unsigned long inst;
400
401 inst = read_memory_integer (pc, 4);
402
403 return (inst == ARM_LINUX_SIGRETURN_INSTR
404 || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
405
406 }
407
408 /* arm_linux_sigcontext_register_address returns the address in the
409 sigcontext of register REGNO given a stack pointer value SP and
410 program counter value PC. The value 0 is returned if PC is not
411 pointing at one of the signal return instructions or if REGNO is
412 not saved in the sigcontext struct. */
413
414 CORE_ADDR
415 arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
416 {
417 unsigned long inst;
418 CORE_ADDR reg_addr = 0;
419
420 inst = read_memory_integer (pc, 4);
421
422 if (inst == ARM_LINUX_SIGRETURN_INSTR
423 || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
424 {
425 CORE_ADDR sigcontext_addr;
426
427 /* The sigcontext structure is at different places for the two
428 signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
429 it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
430 it is at SP+8. For the latter instruction, it may also be
431 the case that the address of this structure may be determined
432 by reading the 4 bytes at SP, but I'm not convinced this is
433 reliable.
434
435 In any event, these magic constants (0 and 8) may be
436 determined by examining struct sigframe and struct
437 rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
438 sources. */
439
440 if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
441 sigcontext_addr = sp + 8;
442 else /* inst == ARM_LINUX_SIGRETURN_INSTR */
443 sigcontext_addr = sp + 0;
444
445 /* The layout of the sigcontext structure for ARM GNU/Linux is
446 in include/asm-arm/sigcontext.h in the Linux kernel sources.
447
448 There are three 4-byte fields which precede the saved r0
449 field. (This accounts for the 12 in the code below.) The
450 sixteen registers (4 bytes per field) follow in order. The
451 PSR value follows the sixteen registers which accounts for
452 the constant 19 below. */
453
454 if (0 <= regno && regno <= ARM_PC_REGNUM)
455 reg_addr = sigcontext_addr + 12 + (4 * regno);
456 else if (regno == ARM_PS_REGNUM)
457 reg_addr = sigcontext_addr + 19 * 4;
458 }
459
460 return reg_addr;
461 }
462
463 static void
464 arm_linux_init_abi (struct gdbarch_info info,
465 struct gdbarch *gdbarch)
466 {
467 struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
468
469 tdep->lowest_pc = 0x8000;
470 if (info.byte_order == BFD_ENDIAN_BIG)
471 {
472 tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
473 tdep->thumb_breakpoint = arm_linux_thumb_be_breakpoint;
474 }
475 else
476 {
477 tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
478 tdep->thumb_breakpoint = arm_linux_thumb_le_breakpoint;
479 }
480 tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
481 tdep->thumb_breakpoint_size = sizeof (arm_linux_thumb_le_breakpoint);
482
483 if (tdep->fp_model == ARM_FLOAT_AUTO)
484 tdep->fp_model = ARM_FLOAT_FPA;
485
486 tdep->jb_pc = ARM_LINUX_JB_PC;
487 tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
488
489 set_solib_svr4_fetch_link_map_offsets
490 (gdbarch, arm_linux_svr4_fetch_link_map_offsets);
491
492 /* The following two overrides shouldn't be needed. */
493 set_gdbarch_deprecated_extract_return_value (gdbarch, arm_linux_extract_return_value);
494 set_gdbarch_deprecated_push_arguments (gdbarch, arm_linux_push_arguments);
495
496 /* Shared library handling. */
497 set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
498 set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
499
500 /* Enable TLS support. */
501 set_gdbarch_fetch_tls_load_module_address (gdbarch,
502 svr4_fetch_objfile_link_map);
503 }
504
505 void
506 _initialize_arm_linux_tdep (void)
507 {
508 gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
509 arm_linux_init_abi);
510 }
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