* arm-tdep.h: New file.
[deliverable/binutils-gdb.git] / gdb / arm-linux-tdep.c
1 /* GNU/Linux on ARM target support.
2 Copyright 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
3
4 This file is part of GDB.
5
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
10
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
15
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
20
21 #include "defs.h"
22 #include "target.h"
23 #include "value.h"
24 #include "gdbtypes.h"
25 #include "floatformat.h"
26 #include "gdbcore.h"
27 #include "frame.h"
28 #include "regcache.h"
29 #include "doublest.h"
30
31 #include "arm-tdep.h"
32
33 /* For arm_linux_skip_solib_resolver. */
34 #include "symtab.h"
35 #include "symfile.h"
36 #include "objfiles.h"
37
38 /* CALL_DUMMY_WORDS:
39 This sequence of words is the instructions
40
41 mov lr, pc
42 mov pc, r4
43 swi bkpt_swi
44
45 Note this is 12 bytes. */
46
47 LONGEST arm_linux_call_dummy_words[] =
48 {
49 0xe1a0e00f, 0xe1a0f004, 0xef9f001
50 };
51
52 #ifdef GET_LONGJMP_TARGET
53
54 /* Figure out where the longjmp will land. We expect that we have
55 just entered longjmp and haven't yet altered r0, r1, so the
56 arguments are still in the registers. (ARM_A1_REGNUM) points at
57 the jmp_buf structure from which we extract the pc (JB_PC) that we
58 will land at. The pc is copied into ADDR. This routine returns
59 true on success. */
60
61 #define LONGJMP_TARGET_SIZE sizeof(int)
62 #define JB_ELEMENT_SIZE sizeof(int)
63 #define JB_SL 18
64 #define JB_FP 19
65 #define JB_SP 20
66 #define JB_PC 21
67
68 int
69 arm_get_longjmp_target (CORE_ADDR * pc)
70 {
71 CORE_ADDR jb_addr;
72 char buf[LONGJMP_TARGET_SIZE];
73
74 jb_addr = read_register (ARM_A1_REGNUM);
75
76 if (target_read_memory (jb_addr + JB_PC * JB_ELEMENT_SIZE, buf,
77 LONGJMP_TARGET_SIZE))
78 return 0;
79
80 *pc = extract_address (buf, LONGJMP_TARGET_SIZE);
81 return 1;
82 }
83
84 #endif /* GET_LONGJMP_TARGET */
85
86 /* Extract from an array REGBUF containing the (raw) register state
87 a function return value of type TYPE, and copy that, in virtual format,
88 into VALBUF. */
89
90 void
91 arm_linux_extract_return_value (struct type *type,
92 char regbuf[REGISTER_BYTES],
93 char *valbuf)
94 {
95 /* ScottB: This needs to be looked at to handle the different
96 floating point emulators on ARM Linux. Right now the code
97 assumes that fetch inferior registers does the right thing for
98 GDB. I suspect this won't handle NWFPE registers correctly, nor
99 will the default ARM version (arm_extract_return_value()). */
100
101 int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type))
102 ? ARM_F0_REGNUM : ARM_A1_REGNUM);
103 memcpy (valbuf, &regbuf[REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
104 }
105
106 /* Note: ScottB
107
108 This function does not support passing parameters using the FPA
109 variant of the APCS. It passes any floating point arguments in the
110 general registers and/or on the stack.
111
112 FIXME: This and arm_push_arguments should be merged. However this
113 function breaks on a little endian host, big endian target
114 using the COFF file format. ELF is ok.
115
116 ScottB. */
117
118 /* Addresses for calling Thumb functions have the bit 0 set.
119 Here are some macros to test, set, or clear bit 0 of addresses. */
120 #define IS_THUMB_ADDR(addr) ((addr) & 1)
121 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
122 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
123
124 CORE_ADDR
125 arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
126 int struct_return, CORE_ADDR struct_addr)
127 {
128 char *fp;
129 int argnum, argreg, nstack_size;
130
131 /* Walk through the list of args and determine how large a temporary
132 stack is required. Need to take care here as structs may be
133 passed on the stack, and we have to to push them. */
134 nstack_size = -4 * REGISTER_SIZE; /* Some arguments go into A1-A4. */
135
136 if (struct_return) /* The struct address goes in A1. */
137 nstack_size += REGISTER_SIZE;
138
139 /* Walk through the arguments and add their size to nstack_size. */
140 for (argnum = 0; argnum < nargs; argnum++)
141 {
142 int len;
143 struct type *arg_type;
144
145 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
146 len = TYPE_LENGTH (arg_type);
147
148 /* ANSI C code passes float arguments as integers, K&R code
149 passes float arguments as doubles. Correct for this here. */
150 if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && REGISTER_SIZE == len)
151 nstack_size += FP_REGISTER_VIRTUAL_SIZE;
152 else
153 nstack_size += len;
154 }
155
156 /* Allocate room on the stack, and initialize our stack frame
157 pointer. */
158 fp = NULL;
159 if (nstack_size > 0)
160 {
161 sp -= nstack_size;
162 fp = (char *) sp;
163 }
164
165 /* Initialize the integer argument register pointer. */
166 argreg = ARM_A1_REGNUM;
167
168 /* The struct_return pointer occupies the first parameter passing
169 register. */
170 if (struct_return)
171 write_register (argreg++, struct_addr);
172
173 /* Process arguments from left to right. Store as many as allowed
174 in the parameter passing registers (A1-A4), and save the rest on
175 the temporary stack. */
176 for (argnum = 0; argnum < nargs; argnum++)
177 {
178 int len;
179 char *val;
180 CORE_ADDR regval;
181 enum type_code typecode;
182 struct type *arg_type, *target_type;
183
184 arg_type = check_typedef (VALUE_TYPE (args[argnum]));
185 target_type = TYPE_TARGET_TYPE (arg_type);
186 len = TYPE_LENGTH (arg_type);
187 typecode = TYPE_CODE (arg_type);
188 val = (char *) VALUE_CONTENTS (args[argnum]);
189
190 /* ANSI C code passes float arguments as integers, K&R code
191 passes float arguments as doubles. The .stabs record for
192 for ANSI prototype floating point arguments records the
193 type as FP_INTEGER, while a K&R style (no prototype)
194 .stabs records the type as FP_FLOAT. In this latter case
195 the compiler converts the float arguments to double before
196 calling the function. */
197 if (TYPE_CODE_FLT == typecode && REGISTER_SIZE == len)
198 {
199 DOUBLEST dblval;
200 dblval = extract_floating (val, len);
201 len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
202 val = alloca (len);
203 store_floating (val, len, dblval);
204 }
205
206 /* If the argument is a pointer to a function, and it is a Thumb
207 function, set the low bit of the pointer. */
208 if (TYPE_CODE_PTR == typecode
209 && NULL != target_type
210 && TYPE_CODE_FUNC == TYPE_CODE (target_type))
211 {
212 CORE_ADDR regval = extract_address (val, len);
213 if (arm_pc_is_thumb (regval))
214 store_address (val, len, MAKE_THUMB_ADDR (regval));
215 }
216
217 /* Copy the argument to general registers or the stack in
218 register-sized pieces. Large arguments are split between
219 registers and stack. */
220 while (len > 0)
221 {
222 int partial_len = len < REGISTER_SIZE ? len : REGISTER_SIZE;
223
224 if (argreg <= ARM_LAST_ARG_REGNUM)
225 {
226 /* It's an argument being passed in a general register. */
227 regval = extract_address (val, partial_len);
228 write_register (argreg++, regval);
229 }
230 else
231 {
232 /* Push the arguments onto the stack. */
233 write_memory ((CORE_ADDR) fp, val, REGISTER_SIZE);
234 fp += REGISTER_SIZE;
235 }
236
237 len -= partial_len;
238 val += partial_len;
239 }
240 }
241
242 /* Return adjusted stack pointer. */
243 return sp;
244 }
245
246 /*
247 Dynamic Linking on ARM Linux
248 ----------------------------
249
250 Note: PLT = procedure linkage table
251 GOT = global offset table
252
253 As much as possible, ELF dynamic linking defers the resolution of
254 jump/call addresses until the last minute. The technique used is
255 inspired by the i386 ELF design, and is based on the following
256 constraints.
257
258 1) The calling technique should not force a change in the assembly
259 code produced for apps; it MAY cause changes in the way assembly
260 code is produced for position independent code (i.e. shared
261 libraries).
262
263 2) The technique must be such that all executable areas must not be
264 modified; and any modified areas must not be executed.
265
266 To do this, there are three steps involved in a typical jump:
267
268 1) in the code
269 2) through the PLT
270 3) using a pointer from the GOT
271
272 When the executable or library is first loaded, each GOT entry is
273 initialized to point to the code which implements dynamic name
274 resolution and code finding. This is normally a function in the
275 program interpreter (on ARM Linux this is usually ld-linux.so.2,
276 but it does not have to be). On the first invocation, the function
277 is located and the GOT entry is replaced with the real function
278 address. Subsequent calls go through steps 1, 2 and 3 and end up
279 calling the real code.
280
281 1) In the code:
282
283 b function_call
284 bl function_call
285
286 This is typical ARM code using the 26 bit relative branch or branch
287 and link instructions. The target of the instruction
288 (function_call is usually the address of the function to be called.
289 In position independent code, the target of the instruction is
290 actually an entry in the PLT when calling functions in a shared
291 library. Note that this call is identical to a normal function
292 call, only the target differs.
293
294 2) In the PLT:
295
296 The PLT is a synthetic area, created by the linker. It exists in
297 both executables and libraries. It is an array of stubs, one per
298 imported function call. It looks like this:
299
300 PLT[0]:
301 str lr, [sp, #-4]! @push the return address (lr)
302 ldr lr, [pc, #16] @load from 6 words ahead
303 add lr, pc, lr @form an address for GOT[0]
304 ldr pc, [lr, #8]! @jump to the contents of that addr
305
306 The return address (lr) is pushed on the stack and used for
307 calculations. The load on the second line loads the lr with
308 &GOT[3] - . - 20. The addition on the third leaves:
309
310 lr = (&GOT[3] - . - 20) + (. + 8)
311 lr = (&GOT[3] - 12)
312 lr = &GOT[0]
313
314 On the fourth line, the pc and lr are both updated, so that:
315
316 pc = GOT[2]
317 lr = &GOT[0] + 8
318 = &GOT[2]
319
320 NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
321 "tight", but allows us to keep all the PLT entries the same size.
322
323 PLT[n+1]:
324 ldr ip, [pc, #4] @load offset from gotoff
325 add ip, pc, ip @add the offset to the pc
326 ldr pc, [ip] @jump to that address
327 gotoff: .word GOT[n+3] - .
328
329 The load on the first line, gets an offset from the fourth word of
330 the PLT entry. The add on the second line makes ip = &GOT[n+3],
331 which contains either a pointer to PLT[0] (the fixup trampoline) or
332 a pointer to the actual code.
333
334 3) In the GOT:
335
336 The GOT contains helper pointers for both code (PLT) fixups and
337 data fixups. The first 3 entries of the GOT are special. The next
338 M entries (where M is the number of entries in the PLT) belong to
339 the PLT fixups. The next D (all remaining) entries belong to
340 various data fixups. The actual size of the GOT is 3 + M + D.
341
342 The GOT is also a synthetic area, created by the linker. It exists
343 in both executables and libraries. When the GOT is first
344 initialized , all the GOT entries relating to PLT fixups are
345 pointing to code back at PLT[0].
346
347 The special entries in the GOT are:
348
349 GOT[0] = linked list pointer used by the dynamic loader
350 GOT[1] = pointer to the reloc table for this module
351 GOT[2] = pointer to the fixup/resolver code
352
353 The first invocation of function call comes through and uses the
354 fixup/resolver code. On the entry to the fixup/resolver code:
355
356 ip = &GOT[n+3]
357 lr = &GOT[2]
358 stack[0] = return address (lr) of the function call
359 [r0, r1, r2, r3] are still the arguments to the function call
360
361 This is enough information for the fixup/resolver code to work
362 with. Before the fixup/resolver code returns, it actually calls
363 the requested function and repairs &GOT[n+3]. */
364
365 /* Find the minimal symbol named NAME, and return both the minsym
366 struct and its objfile. This probably ought to be in minsym.c, but
367 everything there is trying to deal with things like C++ and
368 SOFUN_ADDRESS_MAYBE_TURQUOISE, ... Since this is so simple, it may
369 be considered too special-purpose for general consumption. */
370
371 static struct minimal_symbol *
372 find_minsym_and_objfile (char *name, struct objfile **objfile_p)
373 {
374 struct objfile *objfile;
375
376 ALL_OBJFILES (objfile)
377 {
378 struct minimal_symbol *msym;
379
380 ALL_OBJFILE_MSYMBOLS (objfile, msym)
381 {
382 if (SYMBOL_NAME (msym)
383 && STREQ (SYMBOL_NAME (msym), name))
384 {
385 *objfile_p = objfile;
386 return msym;
387 }
388 }
389 }
390
391 return 0;
392 }
393
394
395 static CORE_ADDR
396 skip_hurd_resolver (CORE_ADDR pc)
397 {
398 /* The HURD dynamic linker is part of the GNU C library, so many
399 GNU/Linux distributions use it. (All ELF versions, as far as I
400 know.) An unresolved PLT entry points to "_dl_runtime_resolve",
401 which calls "fixup" to patch the PLT, and then passes control to
402 the function.
403
404 We look for the symbol `_dl_runtime_resolve', and find `fixup' in
405 the same objfile. If we are at the entry point of `fixup', then
406 we set a breakpoint at the return address (at the top of the
407 stack), and continue.
408
409 It's kind of gross to do all these checks every time we're
410 called, since they don't change once the executable has gotten
411 started. But this is only a temporary hack --- upcoming versions
412 of Linux will provide a portable, efficient interface for
413 debugging programs that use shared libraries. */
414
415 struct objfile *objfile;
416 struct minimal_symbol *resolver
417 = find_minsym_and_objfile ("_dl_runtime_resolve", &objfile);
418
419 if (resolver)
420 {
421 struct minimal_symbol *fixup
422 = lookup_minimal_symbol ("fixup", NULL, objfile);
423
424 if (fixup && SYMBOL_VALUE_ADDRESS (fixup) == pc)
425 return (SAVED_PC_AFTER_CALL (get_current_frame ()));
426 }
427
428 return 0;
429 }
430
431 /* See the comments for SKIP_SOLIB_RESOLVER at the top of infrun.c.
432 This function:
433 1) decides whether a PLT has sent us into the linker to resolve
434 a function reference, and
435 2) if so, tells us where to set a temporary breakpoint that will
436 trigger when the dynamic linker is done. */
437
438 CORE_ADDR
439 arm_linux_skip_solib_resolver (CORE_ADDR pc)
440 {
441 CORE_ADDR result;
442
443 /* Plug in functions for other kinds of resolvers here. */
444 result = skip_hurd_resolver (pc);
445
446 if (result)
447 return result;
448
449 return 0;
450 }
451
452 /* The constants below were determined by examining the following files
453 in the linux kernel sources:
454
455 arch/arm/kernel/signal.c
456 - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
457 include/asm-arm/unistd.h
458 - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
459
460 #define ARM_LINUX_SIGRETURN_INSTR 0xef900077
461 #define ARM_LINUX_RT_SIGRETURN_INSTR 0xef9000ad
462
463 /* arm_linux_in_sigtramp determines if PC points at one of the
464 instructions which cause control to return to the Linux kernel upon
465 return from a signal handler. FUNC_NAME is unused. */
466
467 int
468 arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
469 {
470 unsigned long inst;
471
472 inst = read_memory_integer (pc, 4);
473
474 return (inst == ARM_LINUX_SIGRETURN_INSTR
475 || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
476
477 }
478
479 /* arm_linux_sigcontext_register_address returns the address in the
480 sigcontext of register REGNO given a stack pointer value SP and
481 program counter value PC. The value 0 is returned if PC is not
482 pointing at one of the signal return instructions or if REGNO is
483 not saved in the sigcontext struct. */
484
485 CORE_ADDR
486 arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
487 {
488 unsigned long inst;
489 CORE_ADDR reg_addr = 0;
490
491 inst = read_memory_integer (pc, 4);
492
493 if (inst == ARM_LINUX_SIGRETURN_INSTR || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
494 {
495 CORE_ADDR sigcontext_addr;
496
497 /* The sigcontext structure is at different places for the two
498 signal return instructions. For ARM_LINUX_SIGRETURN_INSTR,
499 it starts at the SP value. For ARM_LINUX_RT_SIGRETURN_INSTR,
500 it is at SP+8. For the latter instruction, it may also be
501 the case that the address of this structure may be determined
502 by reading the 4 bytes at SP, but I'm not convinced this is
503 reliable.
504
505 In any event, these magic constants (0 and 8) may be
506 determined by examining struct sigframe and struct
507 rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
508 sources. */
509
510 if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
511 sigcontext_addr = sp + 8;
512 else /* inst == ARM_LINUX_SIGRETURN_INSTR */
513 sigcontext_addr = sp + 0;
514
515 /* The layout of the sigcontext structure for ARM GNU/Linux is
516 in include/asm-arm/sigcontext.h in the Linux kernel sources.
517
518 There are three 4-byte fields which precede the saved r0
519 field. (This accounts for the 12 in the code below.) The
520 sixteen registers (4 bytes per field) follow in order. The
521 PSR value follows the sixteen registers which accounts for
522 the constant 19 below. */
523
524 if (0 <= regno && regno <= ARM_PC_REGNUM)
525 reg_addr = sigcontext_addr + 12 + (4 * regno);
526 else if (regno == ARM_PS_REGNUM)
527 reg_addr = sigcontext_addr + 19 * 4;
528 }
529
530 return reg_addr;
531 }
532
533 void
534 _initialize_arm_linux_tdep (void)
535 {
536 }
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