gdb/arm-linux-tdep.c

   1 /* GNU/Linux on ARM target support.
   2    Copyright 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
   3
   4    This file is part of GDB.
   5
   6    This program is free software; you can redistribute it and/or modify
   7    it under the terms of the GNU General Public License as published by
   8    the Free Software Foundation; either version 2 of the License, or
   9    (at your option) any later version.
  10
  11    This program is distributed in the hope that it will be useful,
  12    but WITHOUT ANY WARRANTY; without even the implied warranty of
  13    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14    GNU General Public License for more details.
  15
  16    You should have received a copy of the GNU General Public License
  17    along with this program; if not, write to the Free Software
  18    Foundation, Inc., 59 Temple Place - Suite 330,
  19    Boston, MA 02111-1307, USA.  */
  20
  21 #include "defs.h"
  22 #include "target.h"
  23 #include "value.h"
  24 #include "gdbtypes.h"
  25 #include "floatformat.h"
  26 #include "gdbcore.h"
  27 #include "frame.h"
  28 #include "regcache.h"
  29 #include "doublest.h"
  30 #include "solib-svr4.h"
  31 #include "osabi.h"
  32
  33 #include "arm-tdep.h"
  34 #include "glibc-tdep.h"
  35
  36 /* Under ARM GNU/Linux the traditional way of performing a breakpoint
  37    is to execute a particular software interrupt, rather than use a
  38    particular undefined instruction to provoke a trap.  Upon exection
  39    of the software interrupt the kernel stops the inferior with a
  40    SIGTRAP, and wakes the debugger.  Since ARM GNU/Linux doesn't support
  41    Thumb at the moment we only override the ARM breakpoints.  */
  42
  43 static const char arm_linux_arm_le_breakpoint[] = { 0x01, 0x00, 0x9f, 0xef };
  44
  45 static const char arm_linux_arm_be_breakpoint[] = { 0xef, 0x9f, 0x00, 0x01 };
  46
  47 /* Description of the longjmp buffer.  */
  48 #define ARM_LINUX_JB_ELEMENT_SIZE       INT_REGISTER_SIZE
  49 #define ARM_LINUX_JB_PC                 21
  50
  51 /* Extract from an array REGBUF containing the (raw) register state
  52    a function return value of type TYPE, and copy that, in virtual format,
  53    into VALBUF.  */
  54 /* FIXME rearnsha/2002-02-23: This function shouldn't be necessary.
  55    The ARM generic one should be able to handle the model used by
  56    linux and the low-level formatting of the registers should be
  57    hidden behind the regcache abstraction.  */
  58 static void
  59 arm_linux_extract_return_value (struct type *type,
  60                                 char regbuf[],
  61                                 char *valbuf)
  62 {
  63   /* ScottB: This needs to be looked at to handle the different
  64      floating point emulators on ARM GNU/Linux.  Right now the code
  65      assumes that fetch inferior registers does the right thing for
  66      GDB.  I suspect this won't handle NWFPE registers correctly, nor
  67      will the default ARM version (arm_extract_return_value()).  */
  68
  69   int regnum = ((TYPE_CODE_FLT == TYPE_CODE (type))
  70                 ? ARM_F0_REGNUM : ARM_A1_REGNUM);
  71   memcpy (valbuf, &regbuf[DEPRECATED_REGISTER_BYTE (regnum)], TYPE_LENGTH (type));
  72 }
  73
  74 /* Note: ScottB
  75
  76    This function does not support passing parameters using the FPA
  77    variant of the APCS.  It passes any floating point arguments in the
  78    general registers and/or on the stack.
  79
  80    FIXME:  This and arm_push_arguments should be merged.  However this
  81            function breaks on a little endian host, big endian target
  82            using the COFF file format.  ELF is ok.
  83
  84            ScottB.  */
  85
  86 /* Addresses for calling Thumb functions have the bit 0 set.
  87    Here are some macros to test, set, or clear bit 0 of addresses.  */
  88 #define IS_THUMB_ADDR(addr)     ((addr) & 1)
  89 #define MAKE_THUMB_ADDR(addr)   ((addr) | 1)
  90 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
  91
  92 static CORE_ADDR
  93 arm_linux_push_arguments (int nargs, struct value **args, CORE_ADDR sp,
  94                           int struct_return, CORE_ADDR struct_addr)
  95 {
  96   char *fp;
  97   int argnum, argreg, nstack_size;
  98
  99   /* Walk through the list of args and determine how large a temporary
 100      stack is required.  Need to take care here as structs may be
 101      passed on the stack, and we have to to push them.  */
 102   nstack_size = -4 * DEPRECATED_REGISTER_SIZE;  /* Some arguments go into A1-A4.  */
 103
 104   if (struct_return)                    /* The struct address goes in A1.  */
 105     nstack_size += DEPRECATED_REGISTER_SIZE;
 106
 107   /* Walk through the arguments and add their size to nstack_size.  */
 108   for (argnum = 0; argnum < nargs; argnum++)
 109     {
 110       int len;
 111       struct type *arg_type;
 112
 113       arg_type = check_typedef (VALUE_TYPE (args[argnum]));
 114       len = TYPE_LENGTH (arg_type);
 115
 116       /* ANSI C code passes float arguments as integers, K&R code
 117          passes float arguments as doubles.  Correct for this here.  */
 118       if (TYPE_CODE_FLT == TYPE_CODE (arg_type) && DEPRECATED_REGISTER_SIZE == len)
 119         nstack_size += TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
 120       else
 121         nstack_size += len;
 122     }
 123
 124   /* Allocate room on the stack, and initialize our stack frame
 125      pointer.  */
 126   fp = NULL;
 127   if (nstack_size > 0)
 128     {
 129       sp -= nstack_size;
 130       fp = (char *) sp;
 131     }
 132
 133   /* Initialize the integer argument register pointer.  */
 134   argreg = ARM_A1_REGNUM;
 135
 136   /* The struct_return pointer occupies the first parameter passing
 137      register.  */
 138   if (struct_return)
 139     write_register (argreg++, struct_addr);
 140
 141   /* Process arguments from left to right.  Store as many as allowed
 142      in the parameter passing registers (A1-A4), and save the rest on
 143      the temporary stack.  */
 144   for (argnum = 0; argnum < nargs; argnum++)
 145     {
 146       int len;
 147       char *val;
 148       CORE_ADDR regval;
 149       enum type_code typecode;
 150       struct type *arg_type, *target_type;
 151
 152       arg_type = check_typedef (VALUE_TYPE (args[argnum]));
 153       target_type = TYPE_TARGET_TYPE (arg_type);
 154       len = TYPE_LENGTH (arg_type);
 155       typecode = TYPE_CODE (arg_type);
 156       val = (char *) VALUE_CONTENTS (args[argnum]);
 157
 158       /* ANSI C code passes float arguments as integers, K&R code
 159          passes float arguments as doubles.  The .stabs record for
 160          for ANSI prototype floating point arguments records the
 161          type as FP_INTEGER, while a K&R style (no prototype)
 162          .stabs records the type as FP_FLOAT.  In this latter case
 163          the compiler converts the float arguments to double before
 164          calling the function.  */
 165       if (TYPE_CODE_FLT == typecode && DEPRECATED_REGISTER_SIZE == len)
 166         {
 167           DOUBLEST dblval;
 168           dblval = deprecated_extract_floating (val, len);
 169           len = TARGET_DOUBLE_BIT / TARGET_CHAR_BIT;
 170           val = alloca (len);
 171           deprecated_store_floating (val, len, dblval);
 172         }
 173
 174       /* If the argument is a pointer to a function, and it is a Thumb
 175          function, set the low bit of the pointer.  */
 176       if (TYPE_CODE_PTR == typecode
 177           && NULL != target_type
 178           && TYPE_CODE_FUNC == TYPE_CODE (target_type))
 179         {
 180           CORE_ADDR regval = extract_unsigned_integer (val, len);
 181           if (arm_pc_is_thumb (regval))
 182             store_unsigned_integer (val, len, MAKE_THUMB_ADDR (regval));
 183         }
 184
 185       /* Copy the argument to general registers or the stack in
 186          register-sized pieces.  Large arguments are split between
 187          registers and stack.  */
 188       while (len > 0)
 189         {
 190           int partial_len = len < DEPRECATED_REGISTER_SIZE ? len : DEPRECATED_REGISTER_SIZE;
 191
 192           if (argreg <= ARM_LAST_ARG_REGNUM)
 193             {
 194               /* It's an argument being passed in a general register.  */
 195               regval = extract_unsigned_integer (val, partial_len);
 196               write_register (argreg++, regval);
 197             }
 198           else
 199             {
 200               /* Push the arguments onto the stack.  */
 201               write_memory ((CORE_ADDR) fp, val, DEPRECATED_REGISTER_SIZE);
 202               fp += DEPRECATED_REGISTER_SIZE;
 203             }
 204
 205           len -= partial_len;
 206           val += partial_len;
 207         }
 208     }
 209
 210   /* Return adjusted stack pointer.  */
 211   return sp;
 212 }
 213
 214 /*
 215    Dynamic Linking on ARM GNU/Linux
 216    --------------------------------
 217
 218    Note: PLT = procedure linkage table
 219    GOT = global offset table
 220
 221    As much as possible, ELF dynamic linking defers the resolution of
 222    jump/call addresses until the last minute. The technique used is
 223    inspired by the i386 ELF design, and is based on the following
 224    constraints.
 225
 226    1) The calling technique should not force a change in the assembly
 227    code produced for apps; it MAY cause changes in the way assembly
 228    code is produced for position independent code (i.e. shared
 229    libraries).
 230
 231    2) The technique must be such that all executable areas must not be
 232    modified; and any modified areas must not be executed.
 233
 234    To do this, there are three steps involved in a typical jump:
 235
 236    1) in the code
 237    2) through the PLT
 238    3) using a pointer from the GOT
 239
 240    When the executable or library is first loaded, each GOT entry is
 241    initialized to point to the code which implements dynamic name
 242    resolution and code finding.  This is normally a function in the
 243    program interpreter (on ARM GNU/Linux this is usually
 244    ld-linux.so.2, but it does not have to be).  On the first
 245    invocation, the function is located and the GOT entry is replaced
 246    with the real function address.  Subsequent calls go through steps
 247    1, 2 and 3 and end up calling the real code.
 248
 249    1) In the code:
 250
 251    b    function_call
 252    bl   function_call
 253
 254    This is typical ARM code using the 26 bit relative branch or branch
 255    and link instructions.  The target of the instruction
 256    (function_call is usually the address of the function to be called.
 257    In position independent code, the target of the instruction is
 258    actually an entry in the PLT when calling functions in a shared
 259    library.  Note that this call is identical to a normal function
 260    call, only the target differs.
 261
 262    2) In the PLT:
 263
 264    The PLT is a synthetic area, created by the linker. It exists in
 265    both executables and libraries. It is an array of stubs, one per
 266    imported function call. It looks like this:
 267
 268    PLT[0]:
 269    str     lr, [sp, #-4]!       @push the return address (lr)
 270    ldr     lr, [pc, #16]   @load from 6 words ahead
 271    add     lr, pc, lr      @form an address for GOT[0]
 272    ldr     pc, [lr, #8]!   @jump to the contents of that addr
 273
 274    The return address (lr) is pushed on the stack and used for
 275    calculations.  The load on the second line loads the lr with
 276    &GOT[3] - . - 20.  The addition on the third leaves:
 277
 278    lr = (&GOT[3] - . - 20) + (. + 8)
 279    lr = (&GOT[3] - 12)
 280    lr = &GOT[0]
 281
 282    On the fourth line, the pc and lr are both updated, so that:
 283
 284    pc = GOT[2]
 285    lr = &GOT[0] + 8
 286    = &GOT[2]
 287
 288    NOTE: PLT[0] borrows an offset .word from PLT[1]. This is a little
 289    "tight", but allows us to keep all the PLT entries the same size.
 290
 291    PLT[n+1]:
 292    ldr     ip, [pc, #4]    @load offset from gotoff
 293    add     ip, pc, ip      @add the offset to the pc
 294    ldr     pc, [ip]        @jump to that address
 295    gotoff: .word   GOT[n+3] - .
 296
 297    The load on the first line, gets an offset from the fourth word of
 298    the PLT entry.  The add on the second line makes ip = &GOT[n+3],
 299    which contains either a pointer to PLT[0] (the fixup trampoline) or
 300    a pointer to the actual code.
 301
 302    3) In the GOT:
 303
 304    The GOT contains helper pointers for both code (PLT) fixups and
 305    data fixups.  The first 3 entries of the GOT are special. The next
 306    M entries (where M is the number of entries in the PLT) belong to
 307    the PLT fixups. The next D (all remaining) entries belong to
 308    various data fixups. The actual size of the GOT is 3 + M + D.
 309
 310    The GOT is also a synthetic area, created by the linker. It exists
 311    in both executables and libraries.  When the GOT is first
 312    initialized , all the GOT entries relating to PLT fixups are
 313    pointing to code back at PLT[0].
 314
 315    The special entries in the GOT are:
 316
 317    GOT[0] = linked list pointer used by the dynamic loader
 318    GOT[1] = pointer to the reloc table for this module
 319    GOT[2] = pointer to the fixup/resolver code
 320
 321    The first invocation of function call comes through and uses the
 322    fixup/resolver code.  On the entry to the fixup/resolver code:
 323
 324    ip = &GOT[n+3]
 325    lr = &GOT[2]
 326    stack[0] = return address (lr) of the function call
 327    [r0, r1, r2, r3] are still the arguments to the function call
 328
 329    This is enough information for the fixup/resolver code to work
 330    with.  Before the fixup/resolver code returns, it actually calls
 331    the requested function and repairs &GOT[n+3].  */
 332
 333 /* Fetch, and possibly build, an appropriate link_map_offsets structure
 334    for ARM linux targets using the struct offsets defined in <link.h>.
 335    Note, however, that link.h is not actually referred to in this file.
 336    Instead, the relevant structs offsets were obtained from examining
 337    link.h.  (We can't refer to link.h from this file because the host
 338    system won't necessarily have it, or if it does, the structs which
 339    it defines will refer to the host system, not the target).  */
 340
 341 static struct link_map_offsets *
 342 arm_linux_svr4_fetch_link_map_offsets (void)
 343 {
 344   static struct link_map_offsets lmo;
 345   static struct link_map_offsets *lmp = 0;
 346
 347   if (lmp == 0)
 348     {
 349       lmp = &lmo;
 350
 351       lmo.r_debug_size = 8;     /* Actual size is 20, but this is all we
 352                                    need.  */
 353
 354       lmo.r_map_offset = 4;
 355       lmo.r_map_size   = 4;
 356
 357       lmo.link_map_size = 20;   /* Actual size is 552, but this is all we
 358                                    need.  */
 359
 360       lmo.l_addr_offset = 0;
 361       lmo.l_addr_size   = 4;
 362
 363       lmo.l_name_offset = 4;
 364       lmo.l_name_size   = 4;
 365
 366       lmo.l_next_offset = 12;
 367       lmo.l_next_size   = 4;
 368
 369       lmo.l_prev_offset = 16;
 370       lmo.l_prev_size   = 4;
 371     }
 372
 373     return lmp;
 374 }
 375
 376 /* The constants below were determined by examining the following files
 377    in the linux kernel sources:
 378
 379       arch/arm/kernel/signal.c
 380           - see SWI_SYS_SIGRETURN and SWI_SYS_RT_SIGRETURN
 381       include/asm-arm/unistd.h
 382           - see __NR_sigreturn, __NR_rt_sigreturn, and __NR_SYSCALL_BASE */
 383
 384 #define ARM_LINUX_SIGRETURN_INSTR       0xef900077
 385 #define ARM_LINUX_RT_SIGRETURN_INSTR    0xef9000ad
 386
 387 /* arm_linux_in_sigtramp determines if PC points at one of the
 388    instructions which cause control to return to the Linux kernel upon
 389    return from a signal handler.  FUNC_NAME is unused.  */
 390
 391 int
 392 arm_linux_in_sigtramp (CORE_ADDR pc, char *func_name)
 393 {
 394   unsigned long inst;
 395
 396   inst = read_memory_integer (pc, 4);
 397
 398   return (inst == ARM_LINUX_SIGRETURN_INSTR
 399           || inst == ARM_LINUX_RT_SIGRETURN_INSTR);
 400
 401 }
 402
 403 /* arm_linux_sigcontext_register_address returns the address in the
 404    sigcontext of register REGNO given a stack pointer value SP and
 405    program counter value PC.  The value 0 is returned if PC is not
 406    pointing at one of the signal return instructions or if REGNO is
 407    not saved in the sigcontext struct.  */
 408
 409 CORE_ADDR
 410 arm_linux_sigcontext_register_address (CORE_ADDR sp, CORE_ADDR pc, int regno)
 411 {
 412   unsigned long inst;
 413   CORE_ADDR reg_addr = 0;
 414
 415   inst = read_memory_integer (pc, 4);
 416
 417   if (inst == ARM_LINUX_SIGRETURN_INSTR
 418       || inst == ARM_LINUX_RT_SIGRETURN_INSTR)
 419     {
 420       CORE_ADDR sigcontext_addr;
 421
 422       /* The sigcontext structure is at different places for the two
 423          signal return instructions.  For ARM_LINUX_SIGRETURN_INSTR,
 424          it starts at the SP value.  For ARM_LINUX_RT_SIGRETURN_INSTR,
 425          it is at SP+8.  For the latter instruction, it may also be
 426          the case that the address of this structure may be determined
 427          by reading the 4 bytes at SP, but I'm not convinced this is
 428          reliable.
 429
 430          In any event, these magic constants (0 and 8) may be
 431          determined by examining struct sigframe and struct
 432          rt_sigframe in arch/arm/kernel/signal.c in the Linux kernel
 433          sources.  */
 434
 435       if (inst == ARM_LINUX_RT_SIGRETURN_INSTR)
 436         sigcontext_addr = sp + 8;
 437       else /* inst == ARM_LINUX_SIGRETURN_INSTR */
 438         sigcontext_addr = sp + 0;
 439
 440       /* The layout of the sigcontext structure for ARM GNU/Linux is
 441          in include/asm-arm/sigcontext.h in the Linux kernel sources.
 442
 443          There are three 4-byte fields which precede the saved r0
 444          field.  (This accounts for the 12 in the code below.)  The
 445          sixteen registers (4 bytes per field) follow in order.  The
 446          PSR value follows the sixteen registers which accounts for
 447          the constant 19 below. */
 448
 449       if (0 <= regno && regno <= ARM_PC_REGNUM)
 450         reg_addr = sigcontext_addr + 12 + (4 * regno);
 451       else if (regno == ARM_PS_REGNUM)
 452         reg_addr = sigcontext_addr + 19 * 4;
 453     }
 454
 455   return reg_addr;
 456 }
 457
 458 static void
 459 arm_linux_init_abi (struct gdbarch_info info,
 460                     struct gdbarch *gdbarch)
 461 {
 462   struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
 463
 464   tdep->lowest_pc = 0x8000;
 465   if (info.byte_order == BFD_ENDIAN_BIG)
 466     tdep->arm_breakpoint = arm_linux_arm_be_breakpoint;
 467   else
 468     tdep->arm_breakpoint = arm_linux_arm_le_breakpoint;
 469   tdep->arm_breakpoint_size = sizeof (arm_linux_arm_le_breakpoint);
 470
 471   tdep->fp_model = ARM_FLOAT_FPA;
 472
 473   tdep->jb_pc = ARM_LINUX_JB_PC;
 474   tdep->jb_elt_size = ARM_LINUX_JB_ELEMENT_SIZE;
 475
 476   set_solib_svr4_fetch_link_map_offsets
 477     (gdbarch, arm_linux_svr4_fetch_link_map_offsets);
 478
 479   /* The following two overrides shouldn't be needed.  */
 480   set_gdbarch_deprecated_extract_return_value (gdbarch, arm_linux_extract_return_value);
 481   set_gdbarch_deprecated_push_arguments (gdbarch, arm_linux_push_arguments);
 482
 483   /* Shared library handling.  */
 484   set_gdbarch_in_solib_call_trampoline (gdbarch, in_plt_section);
 485   set_gdbarch_skip_trampoline_code (gdbarch, find_solib_trampoline_target);
 486   set_gdbarch_skip_solib_resolver (gdbarch, glibc_skip_solib_resolver);
 487 }
 488
 489 void
 490 _initialize_arm_linux_tdep (void)
 491 {
 492   gdbarch_register_osabi (bfd_arch_arm, 0, GDB_OSABI_LINUX,
 493                           arm_linux_init_abi);
 494 }