1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register styles. */
35 #include "arch-utils.h"
36 #include "solib-svr4.h"
40 #include "gdb/sim-arm.h"
43 #include "coff/internal.h"
46 #include "gdb_assert.h"
50 /* Each OS has a different mechanism for accessing the various
51 registers stored in the sigcontext structure.
53 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
54 function pointer) which may be used to determine the addresses
55 of the various saved registers in the sigcontext structure.
57 For the ARM target, there are three parameters to this function.
58 The first is the pc value of the frame under consideration, the
59 second the stack pointer of this frame, and the last is the
60 register number to fetch.
62 If the tm.h file does not define this macro, then it's assumed that
63 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
66 When it comes time to multi-arching this code, see the identically
67 named machinery in ia64-tdep.c for an example of how it could be
68 done. It should not be necessary to modify the code below where
69 this macro is used. */
71 #ifdef SIGCONTEXT_REGISTER_ADDRESS
72 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
73 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
76 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
77 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
80 /* Macros for setting and testing a bit in a minimal symbol that marks
81 it as Thumb function. The MSB of the minimal symbol's "info" field
82 is used for this purpose. This field is already being used to store
83 the symbol size, so the assumption is that the symbol size cannot
86 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
87 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
88 MSYMBOL_SIZE Returns the size of the minimal symbol,
89 i.e. the "info" field with the "special" bit
92 #define MSYMBOL_SET_SPECIAL(msym) \
93 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
96 #define MSYMBOL_IS_SPECIAL(msym) \
97 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
99 #define MSYMBOL_SIZE(msym) \
100 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
102 /* The list of available "set arm ..." and "show arm ..." commands. */
103 static struct cmd_list_element
*setarmcmdlist
= NULL
;
104 static struct cmd_list_element
*showarmcmdlist
= NULL
;
106 /* The type of floating-point to use. Keep this in sync with enum
107 arm_float_model, and the help string in _initialize_arm_tdep. */
108 static const char *fp_model_strings
[] =
117 /* A variable that can be configured by the user. */
118 static enum arm_float_model arm_fp_model
= ARM_FLOAT_AUTO
;
119 static const char *current_fp_model
= "auto";
121 /* Number of different reg name sets (options). */
122 static int num_disassembly_options
;
124 /* We have more registers than the disassembler as gdb can print the value
125 of special registers as well.
126 The general register names are overwritten by whatever is being used by
127 the disassembler at the moment. We also adjust the case of cpsr and fps. */
129 /* Initial value: Register names used in ARM's ISA documentation. */
130 static char * arm_register_name_strings
[] =
131 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
132 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
133 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
134 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
135 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
136 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
137 "fps", "cpsr" }; /* 24 25 */
138 static char **arm_register_names
= arm_register_name_strings
;
140 /* Valid register name styles. */
141 static const char **valid_disassembly_styles
;
143 /* Disassembly style to use. Default to "std" register names. */
144 static const char *disassembly_style
;
145 /* Index to that option in the opcodes table. */
146 static int current_option
;
148 /* This is used to keep the bfd arch_info in sync with the disassembly
150 static void set_disassembly_style_sfunc(char *, int,
151 struct cmd_list_element
*);
152 static void set_disassembly_style (void);
154 static void convert_from_extended (const struct floatformat
*, const void *,
156 static void convert_to_extended (const struct floatformat
*, void *,
159 /* Define other aspects of the stack frame. We keep the offsets of
160 all saved registers, 'cause we need 'em a lot! We also keep the
161 current size of the stack frame, and the offset of the frame
162 pointer from the stack pointer (for frameless functions, and when
163 we're still in the prologue of a function with a frame). */
165 struct frame_extra_info
172 /* Addresses for calling Thumb functions have the bit 0 set.
173 Here are some macros to test, set, or clear bit 0 of addresses. */
174 #define IS_THUMB_ADDR(addr) ((addr) & 1)
175 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
176 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
179 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
181 return (DEPRECATED_FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
184 /* Set to true if the 32-bit mode is in use. */
188 /* Flag set by arm_fix_call_dummy that tells whether the target
189 function is a Thumb function. This flag is checked by
190 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
191 its use in valops.c) to pass the function address as an additional
194 static int target_is_thumb
;
196 /* Flag set by arm_fix_call_dummy that tells whether the calling
197 function is a Thumb function. This flag is checked by
198 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
200 static int caller_is_thumb
;
202 /* Determine if the program counter specified in MEMADDR is in a Thumb
206 arm_pc_is_thumb (CORE_ADDR memaddr
)
208 struct minimal_symbol
*sym
;
210 /* If bit 0 of the address is set, assume this is a Thumb address. */
211 if (IS_THUMB_ADDR (memaddr
))
214 /* Thumb functions have a "special" bit set in minimal symbols. */
215 sym
= lookup_minimal_symbol_by_pc (memaddr
);
218 return (MSYMBOL_IS_SPECIAL (sym
));
226 /* Determine if the program counter specified in MEMADDR is in a call
227 dummy being called from a Thumb function. */
230 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
232 CORE_ADDR sp
= read_sp ();
234 /* FIXME: Until we switch for the new call dummy macros, this heuristic
235 is the best we can do. We are trying to determine if the pc is on
236 the stack, which (hopefully) will only happen in a call dummy.
237 We hope the current stack pointer is not so far alway from the dummy
238 frame location (true if we have not pushed large data structures or
239 gone too many levels deep) and that our 1024 is not enough to consider
240 code regions as part of the stack (true for most practical purposes). */
241 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
242 return caller_is_thumb
;
247 /* Remove useless bits from addresses in a running program. */
249 arm_addr_bits_remove (CORE_ADDR val
)
252 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
254 return (val
& 0x03fffffc);
257 /* When reading symbols, we need to zap the low bit of the address,
258 which may be set to 1 for Thumb functions. */
260 arm_smash_text_address (CORE_ADDR val
)
265 /* Immediately after a function call, return the saved pc. Can't
266 always go through the frames for this because on some machines the
267 new frame is not set up until the new function executes some
271 arm_saved_pc_after_call (struct frame_info
*frame
)
273 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
276 /* Determine whether the function invocation represented by FI has a
277 frame on the stack associated with it. If it does return zero,
278 otherwise return 1. */
281 arm_frameless_function_invocation (struct frame_info
*fi
)
283 CORE_ADDR func_start
, after_prologue
;
286 /* Sometimes we have functions that do a little setup (like saving the
287 vN registers with the stmdb instruction, but DO NOT set up a frame.
288 The symbol table will report this as a prologue. However, it is
289 important not to try to parse these partial frames as frames, or we
290 will get really confused.
292 So I will demand 3 instructions between the start & end of the
293 prologue before I call it a real prologue, i.e. at least
298 func_start
= (get_frame_func (fi
) + FUNCTION_START_OFFSET
);
299 after_prologue
= SKIP_PROLOGUE (func_start
);
301 /* There are some frameless functions whose first two instructions
302 follow the standard APCS form, in which case after_prologue will
303 be func_start + 8. */
305 frameless
= (after_prologue
< func_start
+ 12);
309 /* The address of the arguments in the frame. */
311 arm_frame_args_address (struct frame_info
*fi
)
313 return get_frame_base (fi
);
316 /* The address of the local variables in the frame. */
318 arm_frame_locals_address (struct frame_info
*fi
)
320 return get_frame_base (fi
);
323 /* A typical Thumb prologue looks like this:
327 Sometimes the latter instruction may be replaced by:
335 or, on tpcs, like this:
342 There is always one instruction of three classes:
347 When we have found at least one of each class we are done with the prolog.
348 Note that the "sub sp, #NN" before the push does not count.
352 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
354 CORE_ADDR current_pc
;
356 bit 0 - push { rlist }
357 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
358 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
362 for (current_pc
= pc
;
363 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
366 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
368 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
370 findmask
|= 1; /* push found */
372 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
375 if ((findmask
& 1) == 0) /* before push ? */
378 findmask
|= 4; /* add/sub sp found */
380 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
382 findmask
|= 2; /* setting of r7 found */
384 else if (insn
== 0x466f) /* mov r7, sp */
386 findmask
|= 2; /* setting of r7 found */
388 else if (findmask
== (4+2+1))
390 /* We have found one of each type of prologue instruction */
394 /* Something in the prolog that we don't care about or some
395 instruction from outside the prolog scheduled here for
403 /* Advance the PC across any function entry prologue instructions to
404 reach some "real" code.
406 The APCS (ARM Procedure Call Standard) defines the following
410 [stmfd sp!, {a1,a2,a3,a4}]
411 stmfd sp!, {...,fp,ip,lr,pc}
412 [stfe f7, [sp, #-12]!]
413 [stfe f6, [sp, #-12]!]
414 [stfe f5, [sp, #-12]!]
415 [stfe f4, [sp, #-12]!]
416 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
419 arm_skip_prologue (CORE_ADDR pc
)
423 CORE_ADDR func_addr
, func_end
= 0;
425 struct symtab_and_line sal
;
427 /* If we're in a dummy frame, don't even try to skip the prologue. */
428 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
431 /* See what the symbol table says. */
433 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
437 /* Found a function. */
438 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
439 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
441 /* Don't use this trick for assembly source files. */
442 sal
= find_pc_line (func_addr
, 0);
443 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
448 /* Check if this is Thumb code. */
449 if (arm_pc_is_thumb (pc
))
450 return thumb_skip_prologue (pc
, func_end
);
452 /* Can't find the prologue end in the symbol table, try it the hard way
453 by disassembling the instructions. */
455 /* Like arm_scan_prologue, stop no later than pc + 64. */
456 if (func_end
== 0 || func_end
> pc
+ 64)
459 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
461 inst
= read_memory_integer (skip_pc
, 4);
463 /* "mov ip, sp" is no longer a required part of the prologue. */
464 if (inst
== 0xe1a0c00d) /* mov ip, sp */
467 /* Some prologues begin with "str lr, [sp, #-4]!". */
468 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
471 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
474 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
477 /* Any insns after this point may float into the code, if it makes
478 for better instruction scheduling, so we skip them only if we
479 find them, but still consider the function to be frame-ful. */
481 /* We may have either one sfmfd instruction here, or several stfe
482 insns, depending on the version of floating point code we
484 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
487 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
490 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
493 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
496 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
497 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
498 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
501 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
502 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
503 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
506 /* Un-recognized instruction; stop scanning. */
510 return skip_pc
; /* End of prologue */
514 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
515 This function decodes a Thumb function prologue to determine:
516 1) the size of the stack frame
517 2) which registers are saved on it
518 3) the offsets of saved regs
519 4) the offset from the stack pointer to the frame pointer
520 This information is stored in the "extra" fields of the frame_info.
522 A typical Thumb function prologue would create this stack frame
523 (offsets relative to FP)
524 old SP -> 24 stack parameters
527 R7 -> 0 local variables (16 bytes)
528 SP -> -12 additional stack space (12 bytes)
529 The frame size would thus be 36 bytes, and the frame offset would be
530 12 bytes. The frame register is R7.
532 The comments for thumb_skip_prolog() describe the algorithm we use
533 to detect the end of the prolog. */
537 thumb_scan_prologue (struct frame_info
*fi
)
539 CORE_ADDR prologue_start
;
540 CORE_ADDR prologue_end
;
541 CORE_ADDR current_pc
;
542 /* Which register has been copied to register n? */
545 bit 0 - push { rlist }
546 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
547 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
552 /* Don't try to scan dummy frames. */
554 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
557 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
559 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
561 if (sal
.line
== 0) /* no line info, use current PC */
562 prologue_end
= get_frame_pc (fi
);
563 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
564 prologue_end
= sal
.end
; /* (probably means no prologue) */
567 /* We're in the boondocks: allow for
568 16 pushes, an add, and "mv fp,sp". */
569 prologue_end
= prologue_start
+ 40;
571 prologue_end
= min (prologue_end
, get_frame_pc (fi
));
573 /* Initialize the saved register map. When register H is copied to
574 register L, we will put H in saved_reg[L]. */
575 for (i
= 0; i
< 16; i
++)
578 /* Search the prologue looking for instructions that set up the
579 frame pointer, adjust the stack pointer, and save registers.
580 Do this until all basic prolog instructions are found. */
582 get_frame_extra_info (fi
)->framesize
= 0;
583 for (current_pc
= prologue_start
;
584 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
591 insn
= read_memory_unsigned_integer (current_pc
, 2);
593 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
596 findmask
|= 1; /* push found */
597 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
598 whether to save LR (R14). */
599 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
601 /* Calculate offsets of saved R0-R7 and LR. */
602 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
603 if (mask
& (1 << regno
))
605 get_frame_extra_info (fi
)->framesize
+= 4;
606 get_frame_saved_regs (fi
)[saved_reg
[regno
]] =
607 -(get_frame_extra_info (fi
)->framesize
);
608 /* Reset saved register map. */
609 saved_reg
[regno
] = regno
;
612 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
615 if ((findmask
& 1) == 0) /* before push? */
618 findmask
|= 4; /* add/sub sp found */
620 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
621 if (insn
& 0x80) /* is it signed? (==subtracting) */
623 get_frame_extra_info (fi
)->frameoffset
+= offset
;
626 get_frame_extra_info (fi
)->framesize
-= offset
;
628 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
630 findmask
|= 2; /* setting of r7 found */
631 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
632 /* get scaled offset */
633 get_frame_extra_info (fi
)->frameoffset
= (insn
& 0xff) << 2;
635 else if (insn
== 0x466f) /* mov r7, sp */
637 findmask
|= 2; /* setting of r7 found */
638 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
639 get_frame_extra_info (fi
)->frameoffset
= 0;
640 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
642 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
644 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
645 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
646 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
649 /* Something in the prolog that we don't care about or some
650 instruction from outside the prolog scheduled here for
656 /* This function decodes an ARM function prologue to determine:
657 1) the size of the stack frame
658 2) which registers are saved on it
659 3) the offsets of saved regs
660 4) the offset from the stack pointer to the frame pointer
661 This information is stored in the "extra" fields of the frame_info.
663 There are two basic forms for the ARM prologue. The fixed argument
664 function call will look like:
667 stmfd sp!, {fp, ip, lr, pc}
671 Which would create this stack frame (offsets relative to FP):
672 IP -> 4 (caller's stack)
673 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
674 -4 LR (return address in caller)
675 -8 IP (copy of caller's SP)
677 SP -> -28 Local variables
679 The frame size would thus be 32 bytes, and the frame offset would be
680 28 bytes. The stmfd call can also save any of the vN registers it
681 plans to use, which increases the frame size accordingly.
683 Note: The stored PC is 8 off of the STMFD instruction that stored it
684 because the ARM Store instructions always store PC + 8 when you read
687 A variable argument function call will look like:
690 stmfd sp!, {a1, a2, a3, a4}
691 stmfd sp!, {fp, ip, lr, pc}
694 Which would create this stack frame (offsets relative to FP):
695 IP -> 20 (caller's stack)
700 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
701 -4 LR (return address in caller)
702 -8 IP (copy of caller's SP)
704 SP -> -28 Local variables
706 The frame size would thus be 48 bytes, and the frame offset would be
709 There is another potential complication, which is that the optimizer
710 will try to separate the store of fp in the "stmfd" instruction from
711 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
712 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
714 Also, note, the original version of the ARM toolchain claimed that there
717 instruction at the end of the prologue. I have never seen GCC produce
718 this, and the ARM docs don't mention it. We still test for it below in
724 arm_scan_prologue (struct frame_info
*fi
)
726 int regno
, sp_offset
, fp_offset
;
727 LONGEST return_value
;
728 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
730 /* Assume there is no frame until proven otherwise. */
731 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
732 get_frame_extra_info (fi
)->framesize
= 0;
733 get_frame_extra_info (fi
)->frameoffset
= 0;
735 /* Check for Thumb prologue. */
736 if (arm_pc_is_thumb (get_frame_pc (fi
)))
738 thumb_scan_prologue (fi
);
742 /* Find the function prologue. If we can't find the function in
743 the symbol table, peek in the stack frame to find the PC. */
744 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
746 /* One way to find the end of the prologue (which works well
747 for unoptimized code) is to do the following:
749 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
752 prologue_end = get_frame_pc (fi);
753 else if (sal.end < prologue_end)
754 prologue_end = sal.end;
756 This mechanism is very accurate so long as the optimizer
757 doesn't move any instructions from the function body into the
758 prologue. If this happens, sal.end will be the last
759 instruction in the first hunk of prologue code just before
760 the first instruction that the scheduler has moved from
761 the body to the prologue.
763 In order to make sure that we scan all of the prologue
764 instructions, we use a slightly less accurate mechanism which
765 may scan more than necessary. To help compensate for this
766 lack of accuracy, the prologue scanning loop below contains
767 several clauses which'll cause the loop to terminate early if
768 an implausible prologue instruction is encountered.
774 is a suitable endpoint since it accounts for the largest
775 possible prologue plus up to five instructions inserted by
778 if (prologue_end
> prologue_start
+ 64)
780 prologue_end
= prologue_start
+ 64; /* See above. */
785 /* Get address of the stmfd in the prologue of the callee;
786 the saved PC is the address of the stmfd + 8. */
787 if (!safe_read_memory_integer (get_frame_base (fi
), 4, &return_value
))
791 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
792 prologue_end
= prologue_start
+ 64; /* See above. */
796 /* Now search the prologue looking for instructions that set up the
797 frame pointer, adjust the stack pointer, and save registers.
799 Be careful, however, and if it doesn't look like a prologue,
800 don't try to scan it. If, for instance, a frameless function
801 begins with stmfd sp!, then we will tell ourselves there is
802 a frame, which will confuse stack traceback, as well as "finish"
803 and other operations that rely on a knowledge of the stack
806 In the APCS, the prologue should start with "mov ip, sp" so
807 if we don't see this as the first insn, we will stop.
809 [Note: This doesn't seem to be true any longer, so it's now an
810 optional part of the prologue. - Kevin Buettner, 2001-11-20]
812 [Note further: The "mov ip,sp" only seems to be missing in
813 frameless functions at optimization level "-O2" or above,
814 in which case it is often (but not always) replaced by
815 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
817 sp_offset
= fp_offset
= 0;
819 for (current_pc
= prologue_start
;
820 current_pc
< prologue_end
;
823 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
825 if (insn
== 0xe1a0c00d) /* mov ip, sp */
829 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
831 /* Function is frameless: extra_info defaults OK? */
834 else if ((insn
& 0xffff0000) == 0xe92d0000)
835 /* stmfd sp!, {..., fp, ip, lr, pc}
837 stmfd sp!, {a1, a2, a3, a4} */
839 int mask
= insn
& 0xffff;
841 /* Calculate offsets of saved registers. */
842 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
843 if (mask
& (1 << regno
))
846 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
849 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
850 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
851 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
853 /* No need to add this to saved_regs -- it's just an arg reg. */
856 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
857 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
858 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
860 /* No need to add this to saved_regs -- it's just an arg reg. */
863 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
865 unsigned imm
= insn
& 0xff; /* immediate value */
866 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
867 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
869 get_frame_extra_info (fi
)->framereg
= ARM_FP_REGNUM
;
871 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
873 unsigned imm
= insn
& 0xff; /* immediate value */
874 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
875 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
878 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
881 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
882 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
884 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
887 unsigned int fp_start_reg
, fp_bound_reg
;
889 if ((insn
& 0x800) == 0x800) /* N0 is set */
891 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
898 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
904 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
905 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
906 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
909 get_frame_saved_regs (fi
)[fp_start_reg
++] = sp_offset
;
912 else if ((insn
& 0xf0000000) != 0xe0000000)
913 break; /* Condition not true, exit early */
914 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
915 break; /* Don't scan past a block load */
917 /* The optimizer might shove anything into the prologue,
918 so we just skip what we don't recognize. */
922 /* The frame size is just the negative of the offset (from the
923 original SP) of the last thing thing we pushed on the stack.
924 The frame offset is [new FP] - [new SP]. */
925 get_frame_extra_info (fi
)->framesize
= -sp_offset
;
926 if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
)
927 get_frame_extra_info (fi
)->frameoffset
= fp_offset
- sp_offset
;
929 get_frame_extra_info (fi
)->frameoffset
= 0;
932 /* Find REGNUM on the stack. Otherwise, it's in an active register.
933 One thing we might want to do here is to check REGNUM against the
934 clobber mask, and somehow flag it as invalid if it isn't saved on
935 the stack somewhere. This would provide a graceful failure mode
936 when trying to get the value of caller-saves registers for an inner
940 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
942 /* NOTE: cagney/2002-05-03: This function really shouldn't be
943 needed. Instead the (still being written) register unwind
944 function could be called directly. */
945 for (; fi
; fi
= get_next_frame (fi
))
947 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
949 return deprecated_read_register_dummy (get_frame_pc (fi
),
950 get_frame_base (fi
), regnum
);
952 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
954 /* NOTE: cagney/2002-05-03: This would normally need to
955 handle ARM_SP_REGNUM as a special case as, according to
956 the frame.h comments, saved_regs[SP_REGNUM] contains the
957 SP value not its address. It appears that the ARM isn't
958 doing this though. */
959 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
960 REGISTER_RAW_SIZE (regnum
));
963 return read_register (regnum
);
965 /* Function: frame_chain Given a GDB frame, determine the address of
966 the calling function's frame. This will be used to create a new
967 GDB frame struct, and then DEPRECATED_INIT_EXTRA_FRAME_INFO and
968 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
969 ARM, we save the frame size when we initialize the frame_info. */
972 arm_frame_chain (struct frame_info
*fi
)
975 int framereg
= get_frame_extra_info (fi
)->framereg
;
977 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
978 /* A generic call dummy's frame is the same as caller's. */
979 return get_frame_base (fi
);
981 if (get_frame_pc (fi
) < LOWEST_PC
)
984 /* If the caller is the startup code, we're at the end of the chain. */
985 caller_pc
= DEPRECATED_FRAME_SAVED_PC (fi
);
987 /* If the caller is Thumb and the caller is ARM, or vice versa,
988 the frame register of the caller is different from ours.
989 So we must scan the prologue of the caller to determine its
990 frame register number. */
991 /* XXX Fixme, we should try to do this without creating a temporary
993 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
995 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
996 struct frame_info
*caller_fi
=
997 deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS
,
998 sizeof (struct frame_extra_info
));
1000 /* Now, scan the prologue and obtain the frame register. */
1001 deprecated_update_frame_pc_hack (caller_fi
, caller_pc
);
1002 arm_scan_prologue (caller_fi
);
1003 framereg
= get_frame_extra_info (caller_fi
)->framereg
;
1005 /* Deallocate the storage associated with the temporary frame
1007 do_cleanups (old_chain
);
1010 /* If the caller used a frame register, return its value.
1011 Otherwise, return the caller's stack pointer. */
1012 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
1013 return arm_find_callers_reg (fi
, framereg
);
1015 return get_frame_base (fi
) + get_frame_extra_info (fi
)->framesize
;
1018 /* This function actually figures out the frame address for a given pc
1019 and sp. This is tricky because we sometimes don't use an explicit
1020 frame pointer, and the previous stack pointer isn't necessarily
1021 recorded on the stack. The only reliable way to get this info is
1022 to examine the prologue. FROMLEAF is a little confusing, it means
1023 this is the next frame up the chain AFTER a frameless function. If
1024 this is true, then the frame value for this frame is still in the
1028 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1033 if (get_frame_saved_regs (fi
) == NULL
)
1034 frame_saved_regs_zalloc (fi
);
1036 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1038 get_frame_extra_info (fi
)->framesize
= 0;
1039 get_frame_extra_info (fi
)->frameoffset
= 0;
1040 get_frame_extra_info (fi
)->framereg
= 0;
1042 if (get_next_frame (fi
))
1043 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1045 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1047 /* Compute stack pointer for this frame. We use this value for both
1048 the sigtramp and call dummy cases. */
1049 if (!get_next_frame (fi
))
1051 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1052 /* For generic dummy frames, pull the value direct from the frame.
1053 Having an unwind function to do this would be nice. */
1054 sp
= deprecated_read_register_dummy (get_frame_pc (get_next_frame (fi
)),
1055 get_frame_base (get_next_frame (fi
)),
1058 sp
= (get_frame_base (get_next_frame (fi
))
1059 - get_frame_extra_info (get_next_frame (fi
))->frameoffset
1060 + get_frame_extra_info (get_next_frame (fi
))->framesize
);
1062 /* Determine whether or not we're in a sigtramp frame.
1063 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1064 == SIGTRAMP_FRAME) because this value is sometimes set after
1065 invoking DEPRECATED_INIT_EXTRA_FRAME_INFO. So we test *both*
1066 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1067 determine if we need to use the sigcontext addresses for the
1070 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1071 against the name of the function, the code below will have to be
1072 changed to first fetch the name of the function and then pass
1073 this name to PC_IN_SIGTRAMP. */
1075 /* FIXME: cagney/2002-11-18: This problem will go away once
1076 frame.c:get_prev_frame() is modified to set the frame's type
1077 before calling functions like this. */
1079 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1080 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1082 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1083 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1085 /* FIXME: What about thumb mode? */
1086 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
1087 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[get_frame_extra_info (fi
)->framereg
], REGISTER_RAW_SIZE (get_frame_extra_info (fi
)->framereg
)));
1088 get_frame_extra_info (fi
)->framesize
= 0;
1089 get_frame_extra_info (fi
)->frameoffset
= 0;
1094 arm_scan_prologue (fi
);
1096 if (!get_next_frame (fi
))
1097 /* This is the innermost frame? */
1098 deprecated_update_frame_base_hack (fi
, read_register (get_frame_extra_info (fi
)->framereg
));
1099 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1100 /* Next inner most frame is a dummy, just grab its frame.
1101 Dummy frames always have the same FP as their caller. */
1102 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
1103 else if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
1104 || get_frame_extra_info (fi
)->framereg
== THUMB_FP_REGNUM
)
1106 /* not the innermost frame */
1107 /* If we have an FP, the callee saved it. */
1108 if (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
] != 0)
1109 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
], 4));
1111 /* If we were called by a frameless fn. then our frame is
1112 still in the frame pointer register on the board... */
1113 deprecated_update_frame_base_hack (fi
, deprecated_read_fp ());
1116 /* Calculate actual addresses of saved registers using offsets
1117 determined by arm_scan_prologue. */
1118 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1119 if (get_frame_saved_regs (fi
)[reg
] != 0)
1120 get_frame_saved_regs (fi
)[reg
]
1121 += (get_frame_base (fi
)
1122 + get_frame_extra_info (fi
)->framesize
1123 - get_frame_extra_info (fi
)->frameoffset
);
1128 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1129 is saved in the stack anywhere, otherwise we get it from the
1132 The old definition of this function was a macro:
1133 #define FRAME_SAVED_PC(FRAME) \
1134 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1137 arm_frame_saved_pc (struct frame_info
*fi
)
1139 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1140 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1141 return deprecated_read_register_dummy (get_frame_pc (fi
),
1142 get_frame_base (fi
), ARM_PC_REGNUM
);
1144 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1145 (get_frame_base (fi
)
1146 - get_frame_extra_info (fi
)->frameoffset
),
1147 get_frame_base (fi
)))
1149 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1150 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1154 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1155 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1159 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1160 Examine the Program Status Register to decide which state we're in. */
1165 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1166 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1168 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1171 /* Store into a struct frame_saved_regs the addresses of the saved
1172 registers of frame described by FRAME_INFO. This includes special
1173 registers such as PC and FP saved in special ways in the stack
1174 frame. SP is even more special: the address we return for it IS
1175 the sp for the next frame. */
1178 arm_frame_init_saved_regs (struct frame_info
*fip
)
1181 if (get_frame_saved_regs (fip
))
1184 arm_init_extra_frame_info (0, fip
);
1187 /* Set the return address for a generic dummy frame. ARM uses the
1191 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1193 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1197 /* Push an empty stack frame, to record the current PC, etc. */
1200 arm_push_dummy_frame (void)
1202 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1203 CORE_ADDR sp
= old_sp
;
1204 CORE_ADDR fp
, prologue_start
;
1207 /* Push the two dummy prologue instructions in reverse order,
1208 so that they'll be in the correct low-to-high order in memory. */
1209 /* sub fp, ip, #4 */
1210 sp
= push_word (sp
, 0xe24cb004);
1211 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1212 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1214 /* Push a pointer to the dummy prologue + 12, because when stm
1215 instruction stores the PC, it stores the address of the stm
1216 instruction itself plus 12. */
1217 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1219 /* Push the processor status. */
1220 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1222 /* Push all 16 registers starting with r15. */
1223 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1224 sp
= push_word (sp
, read_register (regnum
));
1226 /* Update fp (for both Thumb and ARM) and sp. */
1227 write_register (ARM_FP_REGNUM
, fp
);
1228 write_register (THUMB_FP_REGNUM
, fp
);
1229 write_register (ARM_SP_REGNUM
, sp
);
1232 /* DEPRECATED_CALL_DUMMY_WORDS:
1233 This sequence of words is the instructions
1239 Note this is 12 bytes. */
1241 static LONGEST arm_call_dummy_words
[] =
1243 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1246 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1247 breakpoint to the proper address in the call dummy, so that
1248 `finish' after a stop in a call dummy works.
1250 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1251 optimal solution, but the call to arm_fix_call_dummy is immediately
1252 followed by a call to call_function_by_hand, which is the only
1253 function where call_dummy_breakpoint_offset is actually used. */
1257 arm_set_call_dummy_breakpoint_offset (void)
1259 if (caller_is_thumb
)
1260 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1262 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1265 /* Fix up the call dummy, based on whether the processor is currently
1266 in Thumb or ARM mode, and whether the target function is Thumb or
1267 ARM. There are three different situations requiring three
1270 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1271 been copied into the dummy parameter to this function.
1272 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1273 "mov pc,r4" instruction patched to be a "bx r4" instead.
1274 * Thumb calling anything: uses the Thumb dummy defined below, which
1275 works for calling both ARM and Thumb functions.
1277 All three call dummies expect to receive the target function
1278 address in R4, with the low bit set if it's a Thumb function. */
1281 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1282 struct value
**args
, struct type
*type
, int gcc_p
)
1284 static short thumb_dummy
[4] =
1286 0xf000, 0xf801, /* bl label */
1287 0xdf18, /* swi 24 */
1288 0x4720, /* label: bx r4 */
1290 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1292 /* Set flag indicating whether the current PC is in a Thumb function. */
1293 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1294 arm_set_call_dummy_breakpoint_offset ();
1296 /* If the target function is Thumb, set the low bit of the function
1297 address. And if the CPU is currently in ARM mode, patch the
1298 second instruction of call dummy to use a BX instruction to
1299 switch to Thumb mode. */
1300 target_is_thumb
= arm_pc_is_thumb (fun
);
1301 if (target_is_thumb
)
1304 if (!caller_is_thumb
)
1305 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1308 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1309 instead of the ARM one that's already been copied. This will
1310 work for both Thumb and ARM target functions. */
1311 if (caller_is_thumb
)
1315 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1317 for (i
= 0; i
< len
; i
++)
1319 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1320 p
+= sizeof (thumb_dummy
[0]);
1324 /* Put the target address in r4; the call dummy will copy this to
1326 write_register (4, fun
);
1329 /* Pop the current frame. So long as the frame info has been
1330 initialized properly (see arm_init_extra_frame_info), this code
1331 works for dummy frames as well as regular frames. I.e, there's no
1332 need to have a special case for dummy frames. */
1334 arm_pop_frame (void)
1337 struct frame_info
*frame
= get_current_frame ();
1338 CORE_ADDR old_SP
= (get_frame_base (frame
)
1339 - get_frame_extra_info (frame
)->frameoffset
1340 + get_frame_extra_info (frame
)->framesize
);
1342 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1343 get_frame_base (frame
),
1344 get_frame_base (frame
)))
1346 generic_pop_dummy_frame ();
1347 flush_cached_frames ();
1351 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1352 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1353 write_register (regnum
,
1354 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1355 REGISTER_RAW_SIZE (regnum
)));
1357 write_register (ARM_PC_REGNUM
, DEPRECATED_FRAME_SAVED_PC (frame
));
1358 write_register (ARM_SP_REGNUM
, old_SP
);
1360 flush_cached_frames ();
1363 /* When arguments must be pushed onto the stack, they go on in reverse
1364 order. The code below implements a FILO (stack) to do this. */
1369 struct stack_item
*prev
;
1373 static struct stack_item
*
1374 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1376 struct stack_item
*si
;
1377 si
= xmalloc (sizeof (struct stack_item
));
1378 si
->data
= xmalloc (len
);
1381 memcpy (si
->data
, contents
, len
);
1385 static struct stack_item
*
1386 pop_stack_item (struct stack_item
*si
)
1388 struct stack_item
*dead
= si
;
1395 /* We currently only support passing parameters in integer registers. This
1396 conforms with GCC's default model. Several other variants exist and
1397 we should probably support some of them based on the selected ABI. */
1400 arm_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1401 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1402 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1403 CORE_ADDR struct_addr
)
1408 struct stack_item
*si
= NULL
;
1410 /* Set the return address. For the ARM, the return breakpoint is
1411 always at BP_ADDR. */
1412 /* XXX Fix for Thumb. */
1413 regcache_cooked_write_unsigned (regcache
, ARM_LR_REGNUM
, bp_addr
);
1415 /* Walk through the list of args and determine how large a temporary
1416 stack is required. Need to take care here as structs may be
1417 passed on the stack, and we have to to push them. */
1420 argreg
= ARM_A1_REGNUM
;
1423 /* Some platforms require a double-word aligned stack. Make sure sp
1424 is correctly aligned before we start. We always do this even if
1425 it isn't really needed -- it can never hurt things. */
1426 sp
&= ~(CORE_ADDR
)(2 * DEPRECATED_REGISTER_SIZE
- 1);
1428 /* The struct_return pointer occupies the first parameter
1429 passing register. */
1433 fprintf_unfiltered (gdb_stdlog
, "struct return in %s = 0x%s\n",
1434 REGISTER_NAME (argreg
), paddr (struct_addr
));
1435 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
1439 for (argnum
= 0; argnum
< nargs
; argnum
++)
1442 struct type
*arg_type
;
1443 struct type
*target_type
;
1444 enum type_code typecode
;
1447 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1448 len
= TYPE_LENGTH (arg_type
);
1449 target_type
= TYPE_TARGET_TYPE (arg_type
);
1450 typecode
= TYPE_CODE (arg_type
);
1451 val
= VALUE_CONTENTS (args
[argnum
]);
1453 /* If the argument is a pointer to a function, and it is a
1454 Thumb function, create a LOCAL copy of the value and set
1455 the THUMB bit in it. */
1456 if (TYPE_CODE_PTR
== typecode
1457 && target_type
!= NULL
1458 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1460 CORE_ADDR regval
= extract_unsigned_integer (val
, len
);
1461 if (arm_pc_is_thumb (regval
))
1464 store_unsigned_integer (val
, len
, MAKE_THUMB_ADDR (regval
));
1468 /* Copy the argument to general registers or the stack in
1469 register-sized pieces. Large arguments are split between
1470 registers and stack. */
1473 int partial_len
= len
< DEPRECATED_REGISTER_SIZE
? len
: DEPRECATED_REGISTER_SIZE
;
1475 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1477 /* The argument is being passed in a general purpose
1479 CORE_ADDR regval
= extract_unsigned_integer (val
, partial_len
);
1481 fprintf_unfiltered (gdb_stdlog
, "arg %d in %s = 0x%s\n",
1482 argnum
, REGISTER_NAME (argreg
),
1483 phex (regval
, DEPRECATED_REGISTER_SIZE
));
1484 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1489 /* Push the arguments onto the stack. */
1491 fprintf_unfiltered (gdb_stdlog
, "arg %d @ sp + %d\n",
1493 si
= push_stack_item (si
, val
, DEPRECATED_REGISTER_SIZE
);
1494 nstack
+= DEPRECATED_REGISTER_SIZE
;
1501 /* If we have an odd number of words to push, then decrement the stack
1502 by one word now, so first stack argument will be dword aligned. */
1509 write_memory (sp
, si
->data
, si
->len
);
1510 si
= pop_stack_item (si
);
1513 /* Finally, update teh SP register. */
1514 regcache_cooked_write_unsigned (regcache
, ARM_SP_REGNUM
, sp
);
1520 print_fpu_flags (int flags
)
1522 if (flags
& (1 << 0))
1523 fputs ("IVO ", stdout
);
1524 if (flags
& (1 << 1))
1525 fputs ("DVZ ", stdout
);
1526 if (flags
& (1 << 2))
1527 fputs ("OFL ", stdout
);
1528 if (flags
& (1 << 3))
1529 fputs ("UFL ", stdout
);
1530 if (flags
& (1 << 4))
1531 fputs ("INX ", stdout
);
1535 /* Print interesting information about the floating point processor
1536 (if present) or emulator. */
1538 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1539 struct frame_info
*frame
, const char *args
)
1541 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1544 type
= (status
>> 24) & 127;
1545 printf ("%s FPU type %d\n",
1546 (status
& (1 << 31)) ? "Hardware" : "Software",
1548 fputs ("mask: ", stdout
);
1549 print_fpu_flags (status
>> 16);
1550 fputs ("flags: ", stdout
);
1551 print_fpu_flags (status
);
1554 /* Return the GDB type object for the "standard" data type of data in
1557 static struct type
*
1558 arm_register_type (int regnum
)
1560 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1562 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1563 return builtin_type_arm_ext_big
;
1565 return builtin_type_arm_ext_littlebyte_bigword
;
1568 return builtin_type_int32
;
1571 /* Index within `registers' of the first byte of the space for
1575 arm_register_byte (int regnum
)
1577 if (regnum
< ARM_F0_REGNUM
)
1578 return regnum
* INT_REGISTER_RAW_SIZE
;
1579 else if (regnum
< ARM_PS_REGNUM
)
1580 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1581 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1583 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1584 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1585 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1588 /* Number of bytes of storage in the actual machine representation for
1589 register N. All registers are 4 bytes, except fp0 - fp7, which are
1590 12 bytes in length. */
1593 arm_register_raw_size (int regnum
)
1595 if (regnum
< ARM_F0_REGNUM
)
1596 return INT_REGISTER_RAW_SIZE
;
1597 else if (regnum
< ARM_FPS_REGNUM
)
1598 return FP_REGISTER_RAW_SIZE
;
1600 return STATUS_REGISTER_SIZE
;
1603 /* Number of bytes of storage in a program's representation
1606 arm_register_virtual_size (int regnum
)
1608 if (regnum
< ARM_F0_REGNUM
)
1609 return INT_REGISTER_VIRTUAL_SIZE
;
1610 else if (regnum
< ARM_FPS_REGNUM
)
1611 return FP_REGISTER_VIRTUAL_SIZE
;
1613 return STATUS_REGISTER_SIZE
;
1616 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1618 arm_register_sim_regno (int regnum
)
1621 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1623 if (reg
< NUM_GREGS
)
1624 return SIM_ARM_R0_REGNUM
+ reg
;
1627 if (reg
< NUM_FREGS
)
1628 return SIM_ARM_FP0_REGNUM
+ reg
;
1631 if (reg
< NUM_SREGS
)
1632 return SIM_ARM_FPS_REGNUM
+ reg
;
1635 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1638 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1639 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1640 It is thought that this is is the floating-point register format on
1641 little-endian systems. */
1644 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1648 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1649 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1651 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1653 floatformat_from_doublest (fmt
, &d
, dbl
);
1657 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1660 floatformat_to_doublest (fmt
, ptr
, &d
);
1661 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1662 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1664 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1669 condition_true (unsigned long cond
, unsigned long status_reg
)
1671 if (cond
== INST_AL
|| cond
== INST_NV
)
1677 return ((status_reg
& FLAG_Z
) != 0);
1679 return ((status_reg
& FLAG_Z
) == 0);
1681 return ((status_reg
& FLAG_C
) != 0);
1683 return ((status_reg
& FLAG_C
) == 0);
1685 return ((status_reg
& FLAG_N
) != 0);
1687 return ((status_reg
& FLAG_N
) == 0);
1689 return ((status_reg
& FLAG_V
) != 0);
1691 return ((status_reg
& FLAG_V
) == 0);
1693 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1695 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1697 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1699 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1701 return (((status_reg
& FLAG_Z
) == 0) &&
1702 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1704 return (((status_reg
& FLAG_Z
) != 0) ||
1705 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1710 /* Support routines for single stepping. Calculate the next PC value. */
1711 #define submask(x) ((1L << ((x) + 1)) - 1)
1712 #define bit(obj,st) (((obj) >> (st)) & 1)
1713 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1714 #define sbits(obj,st,fn) \
1715 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1716 #define BranchDest(addr,instr) \
1717 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1720 static unsigned long
1721 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1722 unsigned long status_reg
)
1724 unsigned long res
, shift
;
1725 int rm
= bits (inst
, 0, 3);
1726 unsigned long shifttype
= bits (inst
, 5, 6);
1730 int rs
= bits (inst
, 8, 11);
1731 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1734 shift
= bits (inst
, 7, 11);
1737 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1738 + (bit (inst
, 4) ? 12 : 8))
1739 : read_register (rm
));
1744 res
= shift
>= 32 ? 0 : res
<< shift
;
1748 res
= shift
>= 32 ? 0 : res
>> shift
;
1754 res
= ((res
& 0x80000000L
)
1755 ? ~((~res
) >> shift
) : res
>> shift
);
1758 case 3: /* ROR/RRX */
1761 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1763 res
= (res
>> shift
) | (res
<< (32 - shift
));
1767 return res
& 0xffffffff;
1770 /* Return number of 1-bits in VAL. */
1773 bitcount (unsigned long val
)
1776 for (nbits
= 0; val
!= 0; nbits
++)
1777 val
&= val
- 1; /* delete rightmost 1-bit in val */
1782 thumb_get_next_pc (CORE_ADDR pc
)
1784 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1785 unsigned short inst1
= read_memory_integer (pc
, 2);
1786 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1787 unsigned long offset
;
1789 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1793 /* Fetch the saved PC from the stack. It's stored above
1794 all of the other registers. */
1795 offset
= bitcount (bits (inst1
, 0, 7)) * DEPRECATED_REGISTER_SIZE
;
1796 sp
= read_register (ARM_SP_REGNUM
);
1797 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1798 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1800 error ("Infinite loop detected");
1802 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1804 unsigned long status
= read_register (ARM_PS_REGNUM
);
1805 unsigned long cond
= bits (inst1
, 8, 11);
1806 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1807 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1809 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1811 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1813 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1815 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1816 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1817 nextpc
= pc_val
+ offset
;
1824 arm_get_next_pc (CORE_ADDR pc
)
1826 unsigned long pc_val
;
1827 unsigned long this_instr
;
1828 unsigned long status
;
1831 if (arm_pc_is_thumb (pc
))
1832 return thumb_get_next_pc (pc
);
1834 pc_val
= (unsigned long) pc
;
1835 this_instr
= read_memory_integer (pc
, 4);
1836 status
= read_register (ARM_PS_REGNUM
);
1837 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1839 if (condition_true (bits (this_instr
, 28, 31), status
))
1841 switch (bits (this_instr
, 24, 27))
1844 case 0x1: /* data processing */
1848 unsigned long operand1
, operand2
, result
= 0;
1852 if (bits (this_instr
, 12, 15) != 15)
1855 if (bits (this_instr
, 22, 25) == 0
1856 && bits (this_instr
, 4, 7) == 9) /* multiply */
1857 error ("Illegal update to pc in instruction");
1859 /* Multiply into PC */
1860 c
= (status
& FLAG_C
) ? 1 : 0;
1861 rn
= bits (this_instr
, 16, 19);
1862 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1864 if (bit (this_instr
, 25))
1866 unsigned long immval
= bits (this_instr
, 0, 7);
1867 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1868 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1871 else /* operand 2 is a shifted register */
1872 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1874 switch (bits (this_instr
, 21, 24))
1877 result
= operand1
& operand2
;
1881 result
= operand1
^ operand2
;
1885 result
= operand1
- operand2
;
1889 result
= operand2
- operand1
;
1893 result
= operand1
+ operand2
;
1897 result
= operand1
+ operand2
+ c
;
1901 result
= operand1
- operand2
+ c
;
1905 result
= operand2
- operand1
+ c
;
1911 case 0xb: /* tst, teq, cmp, cmn */
1912 result
= (unsigned long) nextpc
;
1916 result
= operand1
| operand2
;
1920 /* Always step into a function. */
1925 result
= operand1
& ~operand2
;
1932 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1935 error ("Infinite loop detected");
1940 case 0x5: /* data transfer */
1943 if (bit (this_instr
, 20))
1946 if (bits (this_instr
, 12, 15) == 15)
1952 if (bit (this_instr
, 22))
1953 error ("Illegal update to pc in instruction");
1955 /* byte write to PC */
1956 rn
= bits (this_instr
, 16, 19);
1957 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1958 if (bit (this_instr
, 24))
1961 int c
= (status
& FLAG_C
) ? 1 : 0;
1962 unsigned long offset
=
1963 (bit (this_instr
, 25)
1964 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1965 : bits (this_instr
, 0, 11));
1967 if (bit (this_instr
, 23))
1972 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1975 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1978 error ("Infinite loop detected");
1984 case 0x9: /* block transfer */
1985 if (bit (this_instr
, 20))
1988 if (bit (this_instr
, 15))
1993 if (bit (this_instr
, 23))
1996 unsigned long reglist
= bits (this_instr
, 0, 14);
1997 offset
= bitcount (reglist
) * 4;
1998 if (bit (this_instr
, 24)) /* pre */
2001 else if (bit (this_instr
, 24))
2005 unsigned long rn_val
=
2006 read_register (bits (this_instr
, 16, 19));
2008 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
2012 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2014 error ("Infinite loop detected");
2019 case 0xb: /* branch & link */
2020 case 0xa: /* branch */
2022 nextpc
= BranchDest (pc
, this_instr
);
2024 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2026 error ("Infinite loop detected");
2032 case 0xe: /* coproc ops */
2037 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2045 /* single_step() is called just before we want to resume the inferior,
2046 if we want to single-step it but there is no hardware or kernel
2047 single-step support. We find the target of the coming instruction
2050 single_step() is also called just after the inferior stops. If we
2051 had set up a simulated single-step, we undo our damage. */
2054 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2056 static int next_pc
; /* State between setting and unsetting. */
2057 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2061 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2062 target_insert_breakpoint (next_pc
, break_mem
);
2065 target_remove_breakpoint (next_pc
, break_mem
);
2068 #include "bfd-in2.h"
2069 #include "libcoff.h"
2072 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2074 if (arm_pc_is_thumb (memaddr
))
2076 static asymbol
*asym
;
2077 static combined_entry_type ce
;
2078 static struct coff_symbol_struct csym
;
2079 static struct bfd fake_bfd
;
2080 static bfd_target fake_target
;
2082 if (csym
.native
== NULL
)
2084 /* Create a fake symbol vector containing a Thumb symbol.
2085 This is solely so that the code in print_insn_little_arm()
2086 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2087 the presence of a Thumb symbol and switch to decoding
2088 Thumb instructions. */
2090 fake_target
.flavour
= bfd_target_coff_flavour
;
2091 fake_bfd
.xvec
= &fake_target
;
2092 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2094 csym
.symbol
.the_bfd
= &fake_bfd
;
2095 csym
.symbol
.name
= "fake";
2096 asym
= (asymbol
*) & csym
;
2099 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2100 info
->symbols
= &asym
;
2103 info
->symbols
= NULL
;
2105 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2106 return print_insn_big_arm (memaddr
, info
);
2108 return print_insn_little_arm (memaddr
, info
);
2111 /* The following define instruction sequences that will cause ARM
2112 cpu's to take an undefined instruction trap. These are used to
2113 signal a breakpoint to GDB.
2115 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2116 modes. A different instruction is required for each mode. The ARM
2117 cpu's can also be big or little endian. Thus four different
2118 instructions are needed to support all cases.
2120 Note: ARMv4 defines several new instructions that will take the
2121 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2122 not in fact add the new instructions. The new undefined
2123 instructions in ARMv4 are all instructions that had no defined
2124 behaviour in earlier chips. There is no guarantee that they will
2125 raise an exception, but may be treated as NOP's. In practice, it
2126 may only safe to rely on instructions matching:
2128 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2129 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2130 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2132 Even this may only true if the condition predicate is true. The
2133 following use a condition predicate of ALWAYS so it is always TRUE.
2135 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2136 and NetBSD all use a software interrupt rather than an undefined
2137 instruction to force a trap. This can be handled by by the
2138 abi-specific code during establishment of the gdbarch vector. */
2141 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2142 override these definitions. */
2143 #ifndef ARM_LE_BREAKPOINT
2144 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2146 #ifndef ARM_BE_BREAKPOINT
2147 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2149 #ifndef THUMB_LE_BREAKPOINT
2150 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2152 #ifndef THUMB_BE_BREAKPOINT
2153 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2156 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2157 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2158 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2159 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2161 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2162 the program counter value to determine whether a 16-bit or 32-bit
2163 breakpoint should be used. It returns a pointer to a string of
2164 bytes that encode a breakpoint instruction, stores the length of
2165 the string to *lenptr, and adjusts the program counter (if
2166 necessary) to point to the actual memory location where the
2167 breakpoint should be inserted. */
2169 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2170 breakpoints and storing their handles instread of what was in
2171 memory. It is nice that this is the same size as a handle -
2172 otherwise remote-rdp will have to change. */
2174 static const unsigned char *
2175 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2177 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2179 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2181 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2182 *lenptr
= tdep
->thumb_breakpoint_size
;
2183 return tdep
->thumb_breakpoint
;
2187 *lenptr
= tdep
->arm_breakpoint_size
;
2188 return tdep
->arm_breakpoint
;
2192 /* Extract from an array REGBUF containing the (raw) register state a
2193 function return value of type TYPE, and copy that, in virtual
2194 format, into VALBUF. */
2197 arm_extract_return_value (struct type
*type
,
2198 struct regcache
*regs
,
2201 bfd_byte
*valbuf
= dst
;
2203 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2205 switch (arm_get_fp_model (current_gdbarch
))
2209 /* The value is in register F0 in internal format. We need to
2210 extract the raw value and then convert it to the desired
2212 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2214 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2215 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2220 case ARM_FLOAT_SOFT_FPA
:
2221 case ARM_FLOAT_SOFT_VFP
:
2222 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2223 if (TYPE_LENGTH (type
) > 4)
2224 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2225 valbuf
+ INT_REGISTER_RAW_SIZE
);
2230 (__FILE__
, __LINE__
,
2231 "arm_extract_return_value: Floating point model not supported");
2235 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2236 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2237 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2238 || TYPE_CODE (type
) == TYPE_CODE_PTR
2239 || TYPE_CODE (type
) == TYPE_CODE_REF
2240 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2242 /* If the the type is a plain integer, then the access is
2243 straight-forward. Otherwise we have to play around a bit more. */
2244 int len
= TYPE_LENGTH (type
);
2245 int regno
= ARM_A1_REGNUM
;
2250 /* By using store_unsigned_integer we avoid having to do
2251 anything special for small big-endian values. */
2252 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2253 store_unsigned_integer (valbuf
,
2254 (len
> INT_REGISTER_RAW_SIZE
2255 ? INT_REGISTER_RAW_SIZE
: len
),
2257 len
-= INT_REGISTER_RAW_SIZE
;
2258 valbuf
+= INT_REGISTER_RAW_SIZE
;
2263 /* For a structure or union the behaviour is as if the value had
2264 been stored to word-aligned memory and then loaded into
2265 registers with 32-bit load instruction(s). */
2266 int len
= TYPE_LENGTH (type
);
2267 int regno
= ARM_A1_REGNUM
;
2268 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2272 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2273 memcpy (valbuf
, tmpbuf
,
2274 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2275 len
-= INT_REGISTER_RAW_SIZE
;
2276 valbuf
+= INT_REGISTER_RAW_SIZE
;
2281 /* Extract from an array REGBUF containing the (raw) register state
2282 the address in which a function should return its structure value. */
2285 arm_extract_struct_value_address (struct regcache
*regcache
)
2289 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2293 /* Will a function return an aggregate type in memory or in a
2294 register? Return 0 if an aggregate type can be returned in a
2295 register, 1 if it must be returned in memory. */
2298 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2301 register enum type_code code
;
2303 /* In the ARM ABI, "integer" like aggregate types are returned in
2304 registers. For an aggregate type to be integer like, its size
2305 must be less than or equal to DEPRECATED_REGISTER_SIZE and the
2306 offset of each addressable subfield must be zero. Note that bit
2307 fields are not addressable, and all addressable subfields of
2308 unions always start at offset zero.
2310 This function is based on the behaviour of GCC 2.95.1.
2311 See: gcc/arm.c: arm_return_in_memory() for details.
2313 Note: All versions of GCC before GCC 2.95.2 do not set up the
2314 parameters correctly for a function returning the following
2315 structure: struct { float f;}; This should be returned in memory,
2316 not a register. Richard Earnshaw sent me a patch, but I do not
2317 know of any way to detect if a function like the above has been
2318 compiled with the correct calling convention. */
2320 /* All aggregate types that won't fit in a register must be returned
2322 if (TYPE_LENGTH (type
) > DEPRECATED_REGISTER_SIZE
)
2327 /* The only aggregate types that can be returned in a register are
2328 structs and unions. Arrays must be returned in memory. */
2329 code
= TYPE_CODE (type
);
2330 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2335 /* Assume all other aggregate types can be returned in a register.
2336 Run a check for structures, unions and arrays. */
2339 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2342 /* Need to check if this struct/union is "integer" like. For
2343 this to be true, its size must be less than or equal to
2344 DEPRECATED_REGISTER_SIZE and the offset of each addressable
2345 subfield must be zero. Note that bit fields are not
2346 addressable, and unions always start at offset zero. If any
2347 of the subfields is a floating point type, the struct/union
2348 cannot be an integer type. */
2350 /* For each field in the object, check:
2351 1) Is it FP? --> yes, nRc = 1;
2352 2) Is it addressable (bitpos != 0) and
2353 not packed (bitsize == 0)?
2357 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2359 enum type_code field_type_code
;
2360 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2362 /* Is it a floating point type field? */
2363 if (field_type_code
== TYPE_CODE_FLT
)
2369 /* If bitpos != 0, then we have to care about it. */
2370 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2372 /* Bitfields are not addressable. If the field bitsize is
2373 zero, then the field is not packed. Hence it cannot be
2374 a bitfield or any other packed type. */
2375 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2387 /* Write into appropriate registers a function return value of type
2388 TYPE, given in virtual format. */
2391 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2394 const bfd_byte
*valbuf
= src
;
2396 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2398 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2400 switch (arm_get_fp_model (current_gdbarch
))
2404 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2405 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2408 case ARM_FLOAT_SOFT_FPA
:
2409 case ARM_FLOAT_SOFT_VFP
:
2410 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2411 if (TYPE_LENGTH (type
) > 4)
2412 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2413 valbuf
+ INT_REGISTER_RAW_SIZE
);
2418 (__FILE__
, __LINE__
,
2419 "arm_store_return_value: Floating point model not supported");
2423 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2424 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2425 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2426 || TYPE_CODE (type
) == TYPE_CODE_PTR
2427 || TYPE_CODE (type
) == TYPE_CODE_REF
2428 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2430 if (TYPE_LENGTH (type
) <= 4)
2432 /* Values of one word or less are zero/sign-extended and
2434 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2435 LONGEST val
= unpack_long (type
, valbuf
);
2437 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2438 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2442 /* Integral values greater than one word are stored in consecutive
2443 registers starting with r0. This will always be a multiple of
2444 the regiser size. */
2445 int len
= TYPE_LENGTH (type
);
2446 int regno
= ARM_A1_REGNUM
;
2450 regcache_cooked_write (regs
, regno
++, valbuf
);
2451 len
-= INT_REGISTER_RAW_SIZE
;
2452 valbuf
+= INT_REGISTER_RAW_SIZE
;
2458 /* For a structure or union the behaviour is as if the value had
2459 been stored to word-aligned memory and then loaded into
2460 registers with 32-bit load instruction(s). */
2461 int len
= TYPE_LENGTH (type
);
2462 int regno
= ARM_A1_REGNUM
;
2463 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2467 memcpy (tmpbuf
, valbuf
,
2468 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2469 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2470 len
-= INT_REGISTER_RAW_SIZE
;
2471 valbuf
+= INT_REGISTER_RAW_SIZE
;
2477 arm_get_longjmp_target (CORE_ADDR
*pc
)
2480 char buf
[INT_REGISTER_RAW_SIZE
];
2481 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2483 jb_addr
= read_register (ARM_A1_REGNUM
);
2485 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2486 INT_REGISTER_RAW_SIZE
))
2489 *pc
= extract_unsigned_integer (buf
, INT_REGISTER_RAW_SIZE
);
2493 /* Return non-zero if the PC is inside a thumb call thunk. */
2496 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2498 CORE_ADDR start_addr
;
2500 /* Find the starting address of the function containing the PC. If
2501 the caller didn't give us a name, look it up at the same time. */
2502 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2506 return strncmp (name
, "_call_via_r", 11) == 0;
2509 /* If PC is in a Thumb call or return stub, return the address of the
2510 target PC, which is in a register. The thunk functions are called
2511 _called_via_xx, where x is the register name. The possible names
2512 are r0-r9, sl, fp, ip, sp, and lr. */
2515 arm_skip_stub (CORE_ADDR pc
)
2518 CORE_ADDR start_addr
;
2520 /* Find the starting address and name of the function containing the PC. */
2521 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2524 /* Call thunks always start with "_call_via_". */
2525 if (strncmp (name
, "_call_via_", 10) == 0)
2527 /* Use the name suffix to determine which register contains the
2529 static char *table
[15] =
2530 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2531 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2535 for (regno
= 0; regno
<= 14; regno
++)
2536 if (strcmp (&name
[10], table
[regno
]) == 0)
2537 return read_register (regno
);
2540 return 0; /* not a stub */
2544 set_arm_command (char *args
, int from_tty
)
2546 printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
2547 help_list (setarmcmdlist
, "set arm ", all_commands
, gdb_stdout
);
2551 show_arm_command (char *args
, int from_tty
)
2553 cmd_show_list (showarmcmdlist
, from_tty
, "");
2556 enum arm_float_model
2557 arm_get_fp_model (struct gdbarch
*gdbarch
)
2559 if (arm_fp_model
== ARM_FLOAT_AUTO
)
2560 return gdbarch_tdep (gdbarch
)->fp_model
;
2562 return arm_fp_model
;
2566 arm_set_fp (struct gdbarch
*gdbarch
)
2568 enum arm_float_model fp_model
= arm_get_fp_model (gdbarch
);
2570 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
2571 && (fp_model
== ARM_FLOAT_SOFT_FPA
|| fp_model
== ARM_FLOAT_FPA
))
2573 set_gdbarch_double_format (gdbarch
,
2574 &floatformat_ieee_double_littlebyte_bigword
);
2575 set_gdbarch_long_double_format
2576 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
2580 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2581 set_gdbarch_long_double_format (gdbarch
,
2582 &floatformat_ieee_double_little
);
2587 set_fp_model_sfunc (char *args
, int from_tty
,
2588 struct cmd_list_element
*c
)
2590 enum arm_float_model fp_model
;
2592 for (fp_model
= ARM_FLOAT_AUTO
; fp_model
!= ARM_FLOAT_LAST
; fp_model
++)
2593 if (strcmp (current_fp_model
, fp_model_strings
[fp_model
]) == 0)
2595 arm_fp_model
= fp_model
;
2599 if (fp_model
== ARM_FLOAT_LAST
)
2600 internal_error (__FILE__
, __LINE__
, "Invalid fp model accepted: %s.",
2603 if (gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2604 arm_set_fp (current_gdbarch
);
2608 show_fp_model (char *args
, int from_tty
,
2609 struct cmd_list_element
*c
)
2611 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2613 if (arm_fp_model
== ARM_FLOAT_AUTO
2614 && gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2615 printf_filtered (" - the default for the current ABI is \"%s\".\n",
2616 fp_model_strings
[tdep
->fp_model
]);
2619 /* If the user changes the register disassembly style used for info
2620 register and other commands, we have to also switch the style used
2621 in opcodes for disassembly output. This function is run in the "set
2622 arm disassembly" command, and does that. */
2625 set_disassembly_style_sfunc (char *args
, int from_tty
,
2626 struct cmd_list_element
*c
)
2628 set_disassembly_style ();
2631 /* Return the ARM register name corresponding to register I. */
2633 arm_register_name (int i
)
2635 return arm_register_names
[i
];
2639 set_disassembly_style (void)
2641 const char *setname
, *setdesc
, **regnames
;
2644 /* Find the style that the user wants in the opcodes table. */
2646 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2647 while ((disassembly_style
!= setname
)
2648 && (current
< num_disassembly_options
))
2649 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2650 current_option
= current
;
2652 /* Fill our copy. */
2653 for (j
= 0; j
< numregs
; j
++)
2654 arm_register_names
[j
] = (char *) regnames
[j
];
2657 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2659 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2660 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2664 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2665 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2668 /* Synchronize the disassembler. */
2669 set_arm_regname_option (current
);
2672 /* arm_othernames implements the "othernames" command. This is deprecated
2673 by the "set arm disassembly" command. */
2676 arm_othernames (char *names
, int n
)
2678 /* Circle through the various flavors. */
2679 current_option
= (current_option
+ 1) % num_disassembly_options
;
2681 disassembly_style
= valid_disassembly_styles
[current_option
];
2682 set_disassembly_style ();
2685 /* Fetch, and possibly build, an appropriate link_map_offsets structure
2686 for ARM linux targets using the struct offsets defined in <link.h>.
2687 Note, however, that link.h is not actually referred to in this file.
2688 Instead, the relevant structs offsets were obtained from examining
2689 link.h. (We can't refer to link.h from this file because the host
2690 system won't necessarily have it, or if it does, the structs which
2691 it defines will refer to the host system, not the target). */
2693 struct link_map_offsets
*
2694 arm_linux_svr4_fetch_link_map_offsets (void)
2696 static struct link_map_offsets lmo
;
2697 static struct link_map_offsets
*lmp
= 0;
2703 lmo
.r_debug_size
= 8; /* Actual size is 20, but this is all we
2706 lmo
.r_map_offset
= 4;
2709 lmo
.link_map_size
= 20; /* Actual size is 552, but this is all we
2712 lmo
.l_addr_offset
= 0;
2713 lmo
.l_addr_size
= 4;
2715 lmo
.l_name_offset
= 4;
2716 lmo
.l_name_size
= 4;
2718 lmo
.l_next_offset
= 12;
2719 lmo
.l_next_size
= 4;
2721 lmo
.l_prev_offset
= 16;
2722 lmo
.l_prev_size
= 4;
2728 /* Test whether the coff symbol specific value corresponds to a Thumb
2732 coff_sym_is_thumb (int val
)
2734 return (val
== C_THUMBEXT
||
2735 val
== C_THUMBSTAT
||
2736 val
== C_THUMBEXTFUNC
||
2737 val
== C_THUMBSTATFUNC
||
2738 val
== C_THUMBLABEL
);
2741 /* arm_coff_make_msymbol_special()
2742 arm_elf_make_msymbol_special()
2744 These functions test whether the COFF or ELF symbol corresponds to
2745 an address in thumb code, and set a "special" bit in a minimal
2746 symbol to indicate that it does. */
2749 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2751 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2753 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2755 MSYMBOL_SET_SPECIAL (msym
);
2759 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2761 if (coff_sym_is_thumb (val
))
2762 MSYMBOL_SET_SPECIAL (msym
);
2766 static enum gdb_osabi
2767 arm_elf_osabi_sniffer (bfd
*abfd
)
2769 unsigned int elfosabi
, eflags
;
2770 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2772 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2777 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2778 file are conforming to the base specification for that machine
2779 (there are no OS-specific extensions). In order to determine the
2780 real OS in use we must look for OS notes that have been added. */
2781 bfd_map_over_sections (abfd
,
2782 generic_elf_osabi_sniff_abi_tag_sections
,
2784 if (osabi
== GDB_OSABI_UNKNOWN
)
2786 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2787 field for more information. */
2788 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2791 case EF_ARM_EABI_VER1
:
2792 osabi
= GDB_OSABI_ARM_EABI_V1
;
2795 case EF_ARM_EABI_VER2
:
2796 osabi
= GDB_OSABI_ARM_EABI_V2
;
2799 case EF_ARM_EABI_UNKNOWN
:
2800 /* Assume GNU tools. */
2801 osabi
= GDB_OSABI_ARM_APCS
;
2805 internal_error (__FILE__
, __LINE__
,
2806 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2807 "version 0x%x", eflags
);
2813 /* GNU tools use this value. Check note sections in this case,
2815 bfd_map_over_sections (abfd
,
2816 generic_elf_osabi_sniff_abi_tag_sections
,
2818 if (osabi
== GDB_OSABI_UNKNOWN
)
2820 /* Assume APCS ABI. */
2821 osabi
= GDB_OSABI_ARM_APCS
;
2825 case ELFOSABI_FREEBSD
:
2826 osabi
= GDB_OSABI_FREEBSD_ELF
;
2829 case ELFOSABI_NETBSD
:
2830 osabi
= GDB_OSABI_NETBSD_ELF
;
2833 case ELFOSABI_LINUX
:
2834 osabi
= GDB_OSABI_LINUX
;
2842 /* Initialize the current architecture based on INFO. If possible,
2843 re-use an architecture from ARCHES, which is a list of
2844 architectures already created during this debugging session.
2846 Called e.g. at program startup, when reading a core file, and when
2847 reading a binary file. */
2849 static struct gdbarch
*
2850 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2852 struct gdbarch_tdep
*tdep
;
2853 struct gdbarch
*gdbarch
;
2855 /* Try to deterimine the ABI of the object we are loading. */
2857 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2859 switch (bfd_get_flavour (info
.abfd
))
2861 case bfd_target_aout_flavour
:
2862 /* Assume it's an old APCS-style ABI. */
2863 info
.osabi
= GDB_OSABI_ARM_APCS
;
2866 case bfd_target_coff_flavour
:
2867 /* Assume it's an old APCS-style ABI. */
2869 info
.osabi
= GDB_OSABI_ARM_APCS
;
2873 /* Leave it as "unknown". */
2878 /* If there is already a candidate, use it. */
2879 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2881 return arches
->gdbarch
;
2883 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2884 gdbarch
= gdbarch_alloc (&info
, tdep
);
2886 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2887 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2888 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2890 /* We used to default to FPA for generic ARM, but almost nobody uses that
2891 now, and we now provide a way for the user to force the model. So
2892 default to the most useful variant. */
2893 tdep
->fp_model
= ARM_FLOAT_SOFT_FPA
;
2896 switch (info
.byte_order
)
2898 case BFD_ENDIAN_BIG
:
2899 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2900 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2901 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2902 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2906 case BFD_ENDIAN_LITTLE
:
2907 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2908 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2909 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2910 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2915 internal_error (__FILE__
, __LINE__
,
2916 "arm_gdbarch_init: bad byte order for float format");
2919 /* On ARM targets char defaults to unsigned. */
2920 set_gdbarch_char_signed (gdbarch
, 0);
2922 /* This should be low enough for everything. */
2923 tdep
->lowest_pc
= 0x20;
2924 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2926 set_gdbarch_deprecated_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2927 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, 0);
2929 set_gdbarch_push_dummy_call (gdbarch
, arm_push_dummy_call
);
2931 /* Frame handling. */
2932 set_gdbarch_deprecated_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2933 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2934 set_gdbarch_deprecated_target_read_fp (gdbarch
, arm_read_fp
);
2935 set_gdbarch_deprecated_frame_chain (gdbarch
, arm_frame_chain
);
2936 set_gdbarch_frameless_function_invocation
2937 (gdbarch
, arm_frameless_function_invocation
);
2938 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2939 set_gdbarch_frame_args_address (gdbarch
, arm_frame_args_address
);
2940 set_gdbarch_frame_locals_address (gdbarch
, arm_frame_locals_address
);
2941 set_gdbarch_frame_args_skip (gdbarch
, 0);
2942 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2943 set_gdbarch_deprecated_pop_frame (gdbarch
, arm_pop_frame
);
2945 /* Address manipulation. */
2946 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2947 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2949 /* Offset from address of function to start of its code. */
2950 set_gdbarch_function_start_offset (gdbarch
, 0);
2952 /* Advance PC across function entry code. */
2953 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2955 /* Get the PC when a frame might not be available. */
2956 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2958 /* The stack grows downward. */
2959 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2961 /* Breakpoint manipulation. */
2962 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2963 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2965 /* Information about registers, etc. */
2966 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2967 set_gdbarch_deprecated_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2968 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2969 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2970 set_gdbarch_register_byte (gdbarch
, arm_register_byte
);
2971 set_gdbarch_deprecated_register_bytes (gdbarch
,
2972 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2973 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2974 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2975 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2976 set_gdbarch_register_raw_size (gdbarch
, arm_register_raw_size
);
2977 set_gdbarch_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2978 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2979 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2980 set_gdbarch_register_virtual_type (gdbarch
, arm_register_type
);
2982 /* Internal <-> external register number maps. */
2983 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2985 /* Integer registers are 4 bytes. */
2986 set_gdbarch_deprecated_register_size (gdbarch
, 4);
2987 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2989 /* Returning results. */
2990 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2991 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2992 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2993 set_gdbarch_extract_struct_value_address (gdbarch
,
2994 arm_extract_struct_value_address
);
2996 /* Single stepping. */
2997 /* XXX For an RDI target we should ask the target if it can single-step. */
2998 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
3001 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_arm
);
3003 /* Minsymbol frobbing. */
3004 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
3005 set_gdbarch_coff_make_msymbol_special (gdbarch
,
3006 arm_coff_make_msymbol_special
);
3008 /* Hook in the ABI-specific overrides, if they have been registered. */
3009 gdbarch_init_osabi (info
, gdbarch
);
3011 /* Now we have tuned the configuration, set a few final things,
3012 based on what the OS ABI has told us. */
3014 if (tdep
->jb_pc
>= 0)
3015 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
3017 /* Floating point sizes and format. */
3018 switch (info
.byte_order
)
3020 case BFD_ENDIAN_BIG
:
3021 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
3022 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
3023 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
3027 case BFD_ENDIAN_LITTLE
:
3028 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
3029 arm_set_fp (gdbarch
);
3033 internal_error (__FILE__
, __LINE__
,
3034 "arm_gdbarch_init: bad byte order for float format");
3041 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3043 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3048 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
3049 (unsigned long) tdep
->lowest_pc
);
3053 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
3054 struct gdbarch
*gdbarch
)
3060 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3061 struct gdbarch
*gdbarch
)
3067 arm_init_abi_apcs (struct gdbarch_info info
,
3068 struct gdbarch
*gdbarch
)
3074 _initialize_arm_tdep (void)
3076 struct ui_file
*stb
;
3078 struct cmd_list_element
*new_set
, *new_show
;
3079 const char *setname
;
3080 const char *setdesc
;
3081 const char **regnames
;
3083 static char *helptext
;
3086 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3088 /* Register an ELF OS ABI sniffer for ARM binaries. */
3089 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3090 bfd_target_elf_flavour
,
3091 arm_elf_osabi_sniffer
);
3093 /* Register some ABI variants for embedded systems. */
3094 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3095 arm_init_abi_eabi_v1
);
3096 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3097 arm_init_abi_eabi_v2
);
3098 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3101 /* Get the number of possible sets of register names defined in opcodes. */
3102 num_disassembly_options
= get_arm_regname_num_options ();
3104 /* Add root prefix command for all "set arm"/"show arm" commands. */
3105 add_prefix_cmd ("arm", no_class
, set_arm_command
,
3106 "Various ARM-specific commands.",
3107 &setarmcmdlist
, "set arm ", 0, &setlist
);
3109 add_prefix_cmd ("arm", no_class
, show_arm_command
,
3110 "Various ARM-specific commands.",
3111 &showarmcmdlist
, "show arm ", 0, &showlist
);
3113 /* Sync the opcode insn printer with our register viewer. */
3114 parse_arm_disassembler_option ("reg-names-std");
3116 /* Begin creating the help text. */
3117 stb
= mem_fileopen ();
3118 fprintf_unfiltered (stb
, "Set the disassembly style.\n"
3119 "The valid values are:\n");
3121 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3122 valid_disassembly_styles
3123 = xmalloc ((num_disassembly_options
+ 1) * sizeof (char *));
3124 for (i
= 0; i
< num_disassembly_options
; i
++)
3126 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3127 valid_disassembly_styles
[i
] = setname
;
3128 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3130 /* Copy the default names (if found) and synchronize disassembler. */
3131 if (!strcmp (setname
, "std"))
3133 disassembly_style
= setname
;
3135 for (j
= 0; j
< numregs
; j
++)
3136 arm_register_names
[j
] = (char *) regnames
[j
];
3137 set_arm_regname_option (i
);
3140 /* Mark the end of valid options. */
3141 valid_disassembly_styles
[num_disassembly_options
] = NULL
;
3143 /* Finish the creation of the help text. */
3144 fprintf_unfiltered (stb
, "The default is \"std\".");
3145 helptext
= ui_file_xstrdup (stb
, &length
);
3146 ui_file_delete (stb
);
3148 /* Add the deprecated disassembly-flavor command. */
3149 new_set
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3150 valid_disassembly_styles
,
3154 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3155 deprecate_cmd (new_set
, "set arm disassembly");
3156 deprecate_cmd (add_show_from_set (new_set
, &showlist
),
3157 "show arm disassembly");
3159 /* And now add the new interface. */
3160 new_set
= add_set_enum_cmd ("disassembler", no_class
,
3161 valid_disassembly_styles
, &disassembly_style
,
3162 helptext
, &setarmcmdlist
);
3164 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3165 add_show_from_set (new_set
, &showarmcmdlist
);
3167 add_setshow_cmd_full ("apcs32", no_class
,
3168 var_boolean
, (char *) &arm_apcs_32
,
3169 "Set usage of ARM 32-bit mode.",
3170 "Show usage of ARM 32-bit mode.",
3172 &setlist
, &showlist
, &new_set
, &new_show
);
3173 deprecate_cmd (new_set
, "set arm apcs32");
3174 deprecate_cmd (new_show
, "show arm apcs32");
3176 add_setshow_boolean_cmd ("apcs32", no_class
, &arm_apcs_32
,
3177 "Set usage of ARM 32-bit mode. "
3178 "When off, a 26-bit PC will be used.",
3179 "Show usage of ARM 32-bit mode. "
3180 "When off, a 26-bit PC will be used.",
3182 &setarmcmdlist
, &showarmcmdlist
);
3184 /* Add a command to allow the user to force the FPU model. */
3185 new_set
= add_set_enum_cmd
3186 ("fpu", no_class
, fp_model_strings
, ¤t_fp_model
,
3187 "Set the floating point type.\n"
3188 "auto - Determine the FP typefrom the OS-ABI.\n"
3189 "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
3190 "fpa - FPA co-processor (GCC compiled).\n"
3191 "softvfp - Software FP with pure-endian doubles.\n"
3192 "vfp - VFP co-processor.",
3194 set_cmd_sfunc (new_set
, set_fp_model_sfunc
);
3195 set_cmd_sfunc (add_show_from_set (new_set
, &showarmcmdlist
), show_fp_model
);
3197 /* Add the deprecated "othernames" command. */
3198 deprecate_cmd (add_com ("othernames", class_obscure
, arm_othernames
,
3199 "Switch to the next set of register names."),
3200 "set arm disassembly");
3202 /* Debugging flag. */
3203 add_setshow_boolean_cmd ("arm", class_maintenance
, &arm_debug
,
3204 "Set ARM debugging. "
3205 "When on, arm-specific debugging is enabled.",
3206 "Show ARM debugging. "
3207 "When on, arm-specific debugging is enabled.",
3209 &setdebuglist
, &showdebuglist
);