1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register styles. */
35 #include "arch-utils.h"
39 #include "gdb/sim-arm.h"
42 #include "coff/internal.h"
45 #include "gdb_assert.h"
49 /* Each OS has a different mechanism for accessing the various
50 registers stored in the sigcontext structure.
52 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
53 function pointer) which may be used to determine the addresses
54 of the various saved registers in the sigcontext structure.
56 For the ARM target, there are three parameters to this function.
57 The first is the pc value of the frame under consideration, the
58 second the stack pointer of this frame, and the last is the
59 register number to fetch.
61 If the tm.h file does not define this macro, then it's assumed that
62 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
65 When it comes time to multi-arching this code, see the identically
66 named machinery in ia64-tdep.c for an example of how it could be
67 done. It should not be necessary to modify the code below where
68 this macro is used. */
70 #ifdef SIGCONTEXT_REGISTER_ADDRESS
71 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
72 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
75 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
76 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
79 /* Macros for setting and testing a bit in a minimal symbol that marks
80 it as Thumb function. The MSB of the minimal symbol's "info" field
81 is used for this purpose. This field is already being used to store
82 the symbol size, so the assumption is that the symbol size cannot
85 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
86 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
87 MSYMBOL_SIZE Returns the size of the minimal symbol,
88 i.e. the "info" field with the "special" bit
91 #define MSYMBOL_SET_SPECIAL(msym) \
92 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
95 #define MSYMBOL_IS_SPECIAL(msym) \
96 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
98 #define MSYMBOL_SIZE(msym) \
99 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
101 /* The list of available "set arm ..." and "show arm ..." commands. */
102 static struct cmd_list_element
*setarmcmdlist
= NULL
;
103 static struct cmd_list_element
*showarmcmdlist
= NULL
;
105 /* The type of floating-point to use. Keep this in sync with enum
106 arm_float_model, and the help string in _initialize_arm_tdep. */
107 static const char *fp_model_strings
[] =
116 /* A variable that can be configured by the user. */
117 static enum arm_float_model arm_fp_model
= ARM_FLOAT_AUTO
;
118 static const char *current_fp_model
= "auto";
120 /* Number of different reg name sets (options). */
121 static int num_disassembly_options
;
123 /* We have more registers than the disassembler as gdb can print the value
124 of special registers as well.
125 The general register names are overwritten by whatever is being used by
126 the disassembler at the moment. We also adjust the case of cpsr and fps. */
128 /* Initial value: Register names used in ARM's ISA documentation. */
129 static char * arm_register_name_strings
[] =
130 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
131 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
132 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
133 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
134 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
135 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
136 "fps", "cpsr" }; /* 24 25 */
137 static char **arm_register_names
= arm_register_name_strings
;
139 /* Valid register name styles. */
140 static const char **valid_disassembly_styles
;
142 /* Disassembly style to use. Default to "std" register names. */
143 static const char *disassembly_style
;
144 /* Index to that option in the opcodes table. */
145 static int current_option
;
147 /* This is used to keep the bfd arch_info in sync with the disassembly
149 static void set_disassembly_style_sfunc(char *, int,
150 struct cmd_list_element
*);
151 static void set_disassembly_style (void);
153 static void convert_from_extended (const struct floatformat
*, const void *,
155 static void convert_to_extended (const struct floatformat
*, void *,
158 /* Define other aspects of the stack frame. We keep the offsets of
159 all saved registers, 'cause we need 'em a lot! We also keep the
160 current size of the stack frame, and the offset of the frame
161 pointer from the stack pointer (for frameless functions, and when
162 we're still in the prologue of a function with a frame). */
164 struct frame_extra_info
171 /* Addresses for calling Thumb functions have the bit 0 set.
172 Here are some macros to test, set, or clear bit 0 of addresses. */
173 #define IS_THUMB_ADDR(addr) ((addr) & 1)
174 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
175 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
178 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
180 return (DEPRECATED_FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
183 /* Set to true if the 32-bit mode is in use. */
187 /* Flag set by arm_fix_call_dummy that tells whether the target
188 function is a Thumb function. This flag is checked by
189 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
190 its use in valops.c) to pass the function address as an additional
193 static int target_is_thumb
;
195 /* Flag set by arm_fix_call_dummy that tells whether the calling
196 function is a Thumb function. This flag is checked by
197 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
199 static int caller_is_thumb
;
201 /* Determine if the program counter specified in MEMADDR is in a Thumb
205 arm_pc_is_thumb (CORE_ADDR memaddr
)
207 struct minimal_symbol
*sym
;
209 /* If bit 0 of the address is set, assume this is a Thumb address. */
210 if (IS_THUMB_ADDR (memaddr
))
213 /* Thumb functions have a "special" bit set in minimal symbols. */
214 sym
= lookup_minimal_symbol_by_pc (memaddr
);
217 return (MSYMBOL_IS_SPECIAL (sym
));
225 /* Determine if the program counter specified in MEMADDR is in a call
226 dummy being called from a Thumb function. */
229 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
231 CORE_ADDR sp
= read_sp ();
233 /* FIXME: Until we switch for the new call dummy macros, this heuristic
234 is the best we can do. We are trying to determine if the pc is on
235 the stack, which (hopefully) will only happen in a call dummy.
236 We hope the current stack pointer is not so far alway from the dummy
237 frame location (true if we have not pushed large data structures or
238 gone too many levels deep) and that our 1024 is not enough to consider
239 code regions as part of the stack (true for most practical purposes). */
240 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
241 return caller_is_thumb
;
246 /* Remove useless bits from addresses in a running program. */
248 arm_addr_bits_remove (CORE_ADDR val
)
251 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
253 return (val
& 0x03fffffc);
256 /* When reading symbols, we need to zap the low bit of the address,
257 which may be set to 1 for Thumb functions. */
259 arm_smash_text_address (CORE_ADDR val
)
264 /* Immediately after a function call, return the saved pc. Can't
265 always go through the frames for this because on some machines the
266 new frame is not set up until the new function executes some
270 arm_saved_pc_after_call (struct frame_info
*frame
)
272 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
275 /* Determine whether the function invocation represented by FI has a
276 frame on the stack associated with it. If it does return zero,
277 otherwise return 1. */
280 arm_frameless_function_invocation (struct frame_info
*fi
)
282 CORE_ADDR func_start
, after_prologue
;
285 /* Sometimes we have functions that do a little setup (like saving the
286 vN registers with the stmdb instruction, but DO NOT set up a frame.
287 The symbol table will report this as a prologue. However, it is
288 important not to try to parse these partial frames as frames, or we
289 will get really confused.
291 So I will demand 3 instructions between the start & end of the
292 prologue before I call it a real prologue, i.e. at least
297 func_start
= (get_frame_func (fi
) + FUNCTION_START_OFFSET
);
298 after_prologue
= SKIP_PROLOGUE (func_start
);
300 /* There are some frameless functions whose first two instructions
301 follow the standard APCS form, in which case after_prologue will
302 be func_start + 8. */
304 frameless
= (after_prologue
< func_start
+ 12);
308 /* A typical Thumb prologue looks like this:
312 Sometimes the latter instruction may be replaced by:
320 or, on tpcs, like this:
327 There is always one instruction of three classes:
332 When we have found at least one of each class we are done with the prolog.
333 Note that the "sub sp, #NN" before the push does not count.
337 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
339 CORE_ADDR current_pc
;
341 bit 0 - push { rlist }
342 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
343 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
347 for (current_pc
= pc
;
348 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
351 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
353 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
355 findmask
|= 1; /* push found */
357 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
360 if ((findmask
& 1) == 0) /* before push ? */
363 findmask
|= 4; /* add/sub sp found */
365 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
367 findmask
|= 2; /* setting of r7 found */
369 else if (insn
== 0x466f) /* mov r7, sp */
371 findmask
|= 2; /* setting of r7 found */
373 else if (findmask
== (4+2+1))
375 /* We have found one of each type of prologue instruction */
379 /* Something in the prolog that we don't care about or some
380 instruction from outside the prolog scheduled here for
388 /* Advance the PC across any function entry prologue instructions to
389 reach some "real" code.
391 The APCS (ARM Procedure Call Standard) defines the following
395 [stmfd sp!, {a1,a2,a3,a4}]
396 stmfd sp!, {...,fp,ip,lr,pc}
397 [stfe f7, [sp, #-12]!]
398 [stfe f6, [sp, #-12]!]
399 [stfe f5, [sp, #-12]!]
400 [stfe f4, [sp, #-12]!]
401 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
404 arm_skip_prologue (CORE_ADDR pc
)
408 CORE_ADDR func_addr
, func_end
= 0;
410 struct symtab_and_line sal
;
412 /* If we're in a dummy frame, don't even try to skip the prologue. */
413 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
416 /* See what the symbol table says. */
418 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
422 /* Found a function. */
423 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
424 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
426 /* Don't use this trick for assembly source files. */
427 sal
= find_pc_line (func_addr
, 0);
428 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
433 /* Check if this is Thumb code. */
434 if (arm_pc_is_thumb (pc
))
435 return thumb_skip_prologue (pc
, func_end
);
437 /* Can't find the prologue end in the symbol table, try it the hard way
438 by disassembling the instructions. */
440 /* Like arm_scan_prologue, stop no later than pc + 64. */
441 if (func_end
== 0 || func_end
> pc
+ 64)
444 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
446 inst
= read_memory_integer (skip_pc
, 4);
448 /* "mov ip, sp" is no longer a required part of the prologue. */
449 if (inst
== 0xe1a0c00d) /* mov ip, sp */
452 /* Some prologues begin with "str lr, [sp, #-4]!". */
453 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
456 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
459 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
462 /* Any insns after this point may float into the code, if it makes
463 for better instruction scheduling, so we skip them only if we
464 find them, but still consider the function to be frame-ful. */
466 /* We may have either one sfmfd instruction here, or several stfe
467 insns, depending on the version of floating point code we
469 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
472 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
475 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
478 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
481 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
482 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
483 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
486 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
487 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
488 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
491 /* Un-recognized instruction; stop scanning. */
495 return skip_pc
; /* End of prologue */
499 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
500 This function decodes a Thumb function prologue to determine:
501 1) the size of the stack frame
502 2) which registers are saved on it
503 3) the offsets of saved regs
504 4) the offset from the stack pointer to the frame pointer
505 This information is stored in the "extra" fields of the frame_info.
507 A typical Thumb function prologue would create this stack frame
508 (offsets relative to FP)
509 old SP -> 24 stack parameters
512 R7 -> 0 local variables (16 bytes)
513 SP -> -12 additional stack space (12 bytes)
514 The frame size would thus be 36 bytes, and the frame offset would be
515 12 bytes. The frame register is R7.
517 The comments for thumb_skip_prolog() describe the algorithm we use
518 to detect the end of the prolog. */
522 thumb_scan_prologue (struct frame_info
*fi
)
524 CORE_ADDR prologue_start
;
525 CORE_ADDR prologue_end
;
526 CORE_ADDR current_pc
;
527 /* Which register has been copied to register n? */
530 bit 0 - push { rlist }
531 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
532 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
537 /* Don't try to scan dummy frames. */
539 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
542 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
544 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
546 if (sal
.line
== 0) /* no line info, use current PC */
547 prologue_end
= get_frame_pc (fi
);
548 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
549 prologue_end
= sal
.end
; /* (probably means no prologue) */
552 /* We're in the boondocks: allow for
553 16 pushes, an add, and "mv fp,sp". */
554 prologue_end
= prologue_start
+ 40;
556 prologue_end
= min (prologue_end
, get_frame_pc (fi
));
558 /* Initialize the saved register map. When register H is copied to
559 register L, we will put H in saved_reg[L]. */
560 for (i
= 0; i
< 16; i
++)
563 /* Search the prologue looking for instructions that set up the
564 frame pointer, adjust the stack pointer, and save registers.
565 Do this until all basic prolog instructions are found. */
567 get_frame_extra_info (fi
)->framesize
= 0;
568 for (current_pc
= prologue_start
;
569 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
576 insn
= read_memory_unsigned_integer (current_pc
, 2);
578 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
581 findmask
|= 1; /* push found */
582 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
583 whether to save LR (R14). */
584 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
586 /* Calculate offsets of saved R0-R7 and LR. */
587 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
588 if (mask
& (1 << regno
))
590 get_frame_extra_info (fi
)->framesize
+= 4;
591 get_frame_saved_regs (fi
)[saved_reg
[regno
]] =
592 -(get_frame_extra_info (fi
)->framesize
);
593 /* Reset saved register map. */
594 saved_reg
[regno
] = regno
;
597 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
600 if ((findmask
& 1) == 0) /* before push? */
603 findmask
|= 4; /* add/sub sp found */
605 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
606 if (insn
& 0x80) /* is it signed? (==subtracting) */
608 get_frame_extra_info (fi
)->frameoffset
+= offset
;
611 get_frame_extra_info (fi
)->framesize
-= offset
;
613 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
615 findmask
|= 2; /* setting of r7 found */
616 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
617 /* get scaled offset */
618 get_frame_extra_info (fi
)->frameoffset
= (insn
& 0xff) << 2;
620 else if (insn
== 0x466f) /* mov r7, sp */
622 findmask
|= 2; /* setting of r7 found */
623 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
624 get_frame_extra_info (fi
)->frameoffset
= 0;
625 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
627 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
629 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
630 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
631 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
634 /* Something in the prolog that we don't care about or some
635 instruction from outside the prolog scheduled here for
641 /* This function decodes an ARM function prologue to determine:
642 1) the size of the stack frame
643 2) which registers are saved on it
644 3) the offsets of saved regs
645 4) the offset from the stack pointer to the frame pointer
646 This information is stored in the "extra" fields of the frame_info.
648 There are two basic forms for the ARM prologue. The fixed argument
649 function call will look like:
652 stmfd sp!, {fp, ip, lr, pc}
656 Which would create this stack frame (offsets relative to FP):
657 IP -> 4 (caller's stack)
658 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
659 -4 LR (return address in caller)
660 -8 IP (copy of caller's SP)
662 SP -> -28 Local variables
664 The frame size would thus be 32 bytes, and the frame offset would be
665 28 bytes. The stmfd call can also save any of the vN registers it
666 plans to use, which increases the frame size accordingly.
668 Note: The stored PC is 8 off of the STMFD instruction that stored it
669 because the ARM Store instructions always store PC + 8 when you read
672 A variable argument function call will look like:
675 stmfd sp!, {a1, a2, a3, a4}
676 stmfd sp!, {fp, ip, lr, pc}
679 Which would create this stack frame (offsets relative to FP):
680 IP -> 20 (caller's stack)
685 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
686 -4 LR (return address in caller)
687 -8 IP (copy of caller's SP)
689 SP -> -28 Local variables
691 The frame size would thus be 48 bytes, and the frame offset would be
694 There is another potential complication, which is that the optimizer
695 will try to separate the store of fp in the "stmfd" instruction from
696 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
697 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
699 Also, note, the original version of the ARM toolchain claimed that there
702 instruction at the end of the prologue. I have never seen GCC produce
703 this, and the ARM docs don't mention it. We still test for it below in
709 arm_scan_prologue (struct frame_info
*fi
)
711 int regno
, sp_offset
, fp_offset
;
712 LONGEST return_value
;
713 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
715 /* Assume there is no frame until proven otherwise. */
716 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
717 get_frame_extra_info (fi
)->framesize
= 0;
718 get_frame_extra_info (fi
)->frameoffset
= 0;
720 /* Check for Thumb prologue. */
721 if (arm_pc_is_thumb (get_frame_pc (fi
)))
723 thumb_scan_prologue (fi
);
727 /* Find the function prologue. If we can't find the function in
728 the symbol table, peek in the stack frame to find the PC. */
729 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
731 /* One way to find the end of the prologue (which works well
732 for unoptimized code) is to do the following:
734 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
737 prologue_end = get_frame_pc (fi);
738 else if (sal.end < prologue_end)
739 prologue_end = sal.end;
741 This mechanism is very accurate so long as the optimizer
742 doesn't move any instructions from the function body into the
743 prologue. If this happens, sal.end will be the last
744 instruction in the first hunk of prologue code just before
745 the first instruction that the scheduler has moved from
746 the body to the prologue.
748 In order to make sure that we scan all of the prologue
749 instructions, we use a slightly less accurate mechanism which
750 may scan more than necessary. To help compensate for this
751 lack of accuracy, the prologue scanning loop below contains
752 several clauses which'll cause the loop to terminate early if
753 an implausible prologue instruction is encountered.
759 is a suitable endpoint since it accounts for the largest
760 possible prologue plus up to five instructions inserted by
763 if (prologue_end
> prologue_start
+ 64)
765 prologue_end
= prologue_start
+ 64; /* See above. */
770 /* Get address of the stmfd in the prologue of the callee;
771 the saved PC is the address of the stmfd + 8. */
772 if (!safe_read_memory_integer (get_frame_base (fi
), 4, &return_value
))
776 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
777 prologue_end
= prologue_start
+ 64; /* See above. */
781 /* Now search the prologue looking for instructions that set up the
782 frame pointer, adjust the stack pointer, and save registers.
784 Be careful, however, and if it doesn't look like a prologue,
785 don't try to scan it. If, for instance, a frameless function
786 begins with stmfd sp!, then we will tell ourselves there is
787 a frame, which will confuse stack traceback, as well as "finish"
788 and other operations that rely on a knowledge of the stack
791 In the APCS, the prologue should start with "mov ip, sp" so
792 if we don't see this as the first insn, we will stop.
794 [Note: This doesn't seem to be true any longer, so it's now an
795 optional part of the prologue. - Kevin Buettner, 2001-11-20]
797 [Note further: The "mov ip,sp" only seems to be missing in
798 frameless functions at optimization level "-O2" or above,
799 in which case it is often (but not always) replaced by
800 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
802 sp_offset
= fp_offset
= 0;
804 for (current_pc
= prologue_start
;
805 current_pc
< prologue_end
;
808 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
810 if (insn
== 0xe1a0c00d) /* mov ip, sp */
814 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
816 /* Function is frameless: extra_info defaults OK? */
819 else if ((insn
& 0xffff0000) == 0xe92d0000)
820 /* stmfd sp!, {..., fp, ip, lr, pc}
822 stmfd sp!, {a1, a2, a3, a4} */
824 int mask
= insn
& 0xffff;
826 /* Calculate offsets of saved registers. */
827 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
828 if (mask
& (1 << regno
))
831 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
834 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
835 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
836 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
838 /* No need to add this to saved_regs -- it's just an arg reg. */
841 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
842 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
843 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
845 /* No need to add this to saved_regs -- it's just an arg reg. */
848 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
850 unsigned imm
= insn
& 0xff; /* immediate value */
851 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
852 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
854 get_frame_extra_info (fi
)->framereg
= ARM_FP_REGNUM
;
856 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
858 unsigned imm
= insn
& 0xff; /* immediate value */
859 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
860 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
863 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
866 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
867 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
869 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
872 unsigned int fp_start_reg
, fp_bound_reg
;
874 if ((insn
& 0x800) == 0x800) /* N0 is set */
876 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
883 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
889 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
890 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
891 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
894 get_frame_saved_regs (fi
)[fp_start_reg
++] = sp_offset
;
897 else if ((insn
& 0xf0000000) != 0xe0000000)
898 break; /* Condition not true, exit early */
899 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
900 break; /* Don't scan past a block load */
902 /* The optimizer might shove anything into the prologue,
903 so we just skip what we don't recognize. */
907 /* The frame size is just the negative of the offset (from the
908 original SP) of the last thing thing we pushed on the stack.
909 The frame offset is [new FP] - [new SP]. */
910 get_frame_extra_info (fi
)->framesize
= -sp_offset
;
911 if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
)
912 get_frame_extra_info (fi
)->frameoffset
= fp_offset
- sp_offset
;
914 get_frame_extra_info (fi
)->frameoffset
= 0;
917 /* Find REGNUM on the stack. Otherwise, it's in an active register.
918 One thing we might want to do here is to check REGNUM against the
919 clobber mask, and somehow flag it as invalid if it isn't saved on
920 the stack somewhere. This would provide a graceful failure mode
921 when trying to get the value of caller-saves registers for an inner
925 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
927 /* NOTE: cagney/2002-05-03: This function really shouldn't be
928 needed. Instead the (still being written) register unwind
929 function could be called directly. */
930 for (; fi
; fi
= get_next_frame (fi
))
932 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
934 return deprecated_read_register_dummy (get_frame_pc (fi
),
935 get_frame_base (fi
), regnum
);
937 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
939 /* NOTE: cagney/2002-05-03: This would normally need to
940 handle ARM_SP_REGNUM as a special case as, according to
941 the frame.h comments, saved_regs[SP_REGNUM] contains the
942 SP value not its address. It appears that the ARM isn't
943 doing this though. */
944 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
945 REGISTER_RAW_SIZE (regnum
));
948 return read_register (regnum
);
950 /* Function: frame_chain Given a GDB frame, determine the address of
951 the calling function's frame. This will be used to create a new
952 GDB frame struct, and then DEPRECATED_INIT_EXTRA_FRAME_INFO and
953 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
954 ARM, we save the frame size when we initialize the frame_info. */
957 arm_frame_chain (struct frame_info
*fi
)
960 int framereg
= get_frame_extra_info (fi
)->framereg
;
962 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
963 /* A generic call dummy's frame is the same as caller's. */
964 return get_frame_base (fi
);
966 if (get_frame_pc (fi
) < LOWEST_PC
)
969 /* If the caller is the startup code, we're at the end of the chain. */
970 caller_pc
= DEPRECATED_FRAME_SAVED_PC (fi
);
972 /* If the caller is Thumb and the caller is ARM, or vice versa,
973 the frame register of the caller is different from ours.
974 So we must scan the prologue of the caller to determine its
975 frame register number. */
976 /* XXX Fixme, we should try to do this without creating a temporary
978 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
980 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
981 struct frame_info
*caller_fi
=
982 deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS
,
983 sizeof (struct frame_extra_info
));
985 /* Now, scan the prologue and obtain the frame register. */
986 deprecated_update_frame_pc_hack (caller_fi
, caller_pc
);
987 arm_scan_prologue (caller_fi
);
988 framereg
= get_frame_extra_info (caller_fi
)->framereg
;
990 /* Deallocate the storage associated with the temporary frame
992 do_cleanups (old_chain
);
995 /* If the caller used a frame register, return its value.
996 Otherwise, return the caller's stack pointer. */
997 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
998 return arm_find_callers_reg (fi
, framereg
);
1000 return get_frame_base (fi
) + get_frame_extra_info (fi
)->framesize
;
1003 /* This function actually figures out the frame address for a given pc
1004 and sp. This is tricky because we sometimes don't use an explicit
1005 frame pointer, and the previous stack pointer isn't necessarily
1006 recorded on the stack. The only reliable way to get this info is
1007 to examine the prologue. FROMLEAF is a little confusing, it means
1008 this is the next frame up the chain AFTER a frameless function. If
1009 this is true, then the frame value for this frame is still in the
1013 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1018 if (get_frame_saved_regs (fi
) == NULL
)
1019 frame_saved_regs_zalloc (fi
);
1021 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1023 get_frame_extra_info (fi
)->framesize
= 0;
1024 get_frame_extra_info (fi
)->frameoffset
= 0;
1025 get_frame_extra_info (fi
)->framereg
= 0;
1027 if (get_next_frame (fi
))
1028 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1030 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1032 /* Compute stack pointer for this frame. We use this value for both
1033 the sigtramp and call dummy cases. */
1034 if (!get_next_frame (fi
))
1036 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1037 /* For generic dummy frames, pull the value direct from the frame.
1038 Having an unwind function to do this would be nice. */
1039 sp
= deprecated_read_register_dummy (get_frame_pc (get_next_frame (fi
)),
1040 get_frame_base (get_next_frame (fi
)),
1043 sp
= (get_frame_base (get_next_frame (fi
))
1044 - get_frame_extra_info (get_next_frame (fi
))->frameoffset
1045 + get_frame_extra_info (get_next_frame (fi
))->framesize
);
1047 /* Determine whether or not we're in a sigtramp frame.
1048 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1049 == SIGTRAMP_FRAME) because this value is sometimes set after
1050 invoking DEPRECATED_INIT_EXTRA_FRAME_INFO. So we test *both*
1051 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1052 determine if we need to use the sigcontext addresses for the
1055 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1056 against the name of the function, the code below will have to be
1057 changed to first fetch the name of the function and then pass
1058 this name to PC_IN_SIGTRAMP. */
1060 /* FIXME: cagney/2002-11-18: This problem will go away once
1061 frame.c:get_prev_frame() is modified to set the frame's type
1062 before calling functions like this. */
1064 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1065 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1067 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1068 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1070 /* FIXME: What about thumb mode? */
1071 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
1072 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[get_frame_extra_info (fi
)->framereg
], REGISTER_RAW_SIZE (get_frame_extra_info (fi
)->framereg
)));
1073 get_frame_extra_info (fi
)->framesize
= 0;
1074 get_frame_extra_info (fi
)->frameoffset
= 0;
1079 arm_scan_prologue (fi
);
1081 if (!get_next_frame (fi
))
1082 /* This is the innermost frame? */
1083 deprecated_update_frame_base_hack (fi
, read_register (get_frame_extra_info (fi
)->framereg
));
1084 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1085 /* Next inner most frame is a dummy, just grab its frame.
1086 Dummy frames always have the same FP as their caller. */
1087 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
1088 else if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
1089 || get_frame_extra_info (fi
)->framereg
== THUMB_FP_REGNUM
)
1091 /* not the innermost frame */
1092 /* If we have an FP, the callee saved it. */
1093 if (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
] != 0)
1094 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
], 4));
1096 /* If we were called by a frameless fn. then our frame is
1097 still in the frame pointer register on the board... */
1098 deprecated_update_frame_base_hack (fi
, deprecated_read_fp ());
1101 /* Calculate actual addresses of saved registers using offsets
1102 determined by arm_scan_prologue. */
1103 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1104 if (get_frame_saved_regs (fi
)[reg
] != 0)
1105 get_frame_saved_regs (fi
)[reg
]
1106 += (get_frame_base (fi
)
1107 + get_frame_extra_info (fi
)->framesize
1108 - get_frame_extra_info (fi
)->frameoffset
);
1113 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1114 is saved in the stack anywhere, otherwise we get it from the
1117 The old definition of this function was a macro:
1118 #define FRAME_SAVED_PC(FRAME) \
1119 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1122 arm_frame_saved_pc (struct frame_info
*fi
)
1124 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1125 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1126 return deprecated_read_register_dummy (get_frame_pc (fi
),
1127 get_frame_base (fi
), ARM_PC_REGNUM
);
1129 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1130 (get_frame_base (fi
)
1131 - get_frame_extra_info (fi
)->frameoffset
),
1132 get_frame_base (fi
)))
1134 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1135 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1139 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1140 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1144 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1145 Examine the Program Status Register to decide which state we're in. */
1150 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1151 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1153 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1156 /* Store into a struct frame_saved_regs the addresses of the saved
1157 registers of frame described by FRAME_INFO. This includes special
1158 registers such as PC and FP saved in special ways in the stack
1159 frame. SP is even more special: the address we return for it IS
1160 the sp for the next frame. */
1163 arm_frame_init_saved_regs (struct frame_info
*fip
)
1166 if (get_frame_saved_regs (fip
))
1169 arm_init_extra_frame_info (0, fip
);
1172 /* Set the return address for a generic dummy frame. ARM uses the
1176 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1178 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1182 /* Push an empty stack frame, to record the current PC, etc. */
1185 arm_push_dummy_frame (void)
1187 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1188 CORE_ADDR sp
= old_sp
;
1189 CORE_ADDR fp
, prologue_start
;
1192 /* Push the two dummy prologue instructions in reverse order,
1193 so that they'll be in the correct low-to-high order in memory. */
1194 /* sub fp, ip, #4 */
1195 sp
= push_word (sp
, 0xe24cb004);
1196 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1197 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1199 /* Push a pointer to the dummy prologue + 12, because when stm
1200 instruction stores the PC, it stores the address of the stm
1201 instruction itself plus 12. */
1202 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1204 /* Push the processor status. */
1205 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1207 /* Push all 16 registers starting with r15. */
1208 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1209 sp
= push_word (sp
, read_register (regnum
));
1211 /* Update fp (for both Thumb and ARM) and sp. */
1212 write_register (ARM_FP_REGNUM
, fp
);
1213 write_register (THUMB_FP_REGNUM
, fp
);
1214 write_register (ARM_SP_REGNUM
, sp
);
1217 /* DEPRECATED_CALL_DUMMY_WORDS:
1218 This sequence of words is the instructions
1224 Note this is 12 bytes. */
1226 static LONGEST arm_call_dummy_words
[] =
1228 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1231 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1232 breakpoint to the proper address in the call dummy, so that
1233 `finish' after a stop in a call dummy works.
1235 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1236 optimal solution, but the call to arm_fix_call_dummy is immediately
1237 followed by a call to call_function_by_hand, which is the only
1238 function where call_dummy_breakpoint_offset is actually used. */
1242 arm_set_call_dummy_breakpoint_offset (void)
1244 if (caller_is_thumb
)
1245 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1247 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1250 /* Fix up the call dummy, based on whether the processor is currently
1251 in Thumb or ARM mode, and whether the target function is Thumb or
1252 ARM. There are three different situations requiring three
1255 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1256 been copied into the dummy parameter to this function.
1257 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1258 "mov pc,r4" instruction patched to be a "bx r4" instead.
1259 * Thumb calling anything: uses the Thumb dummy defined below, which
1260 works for calling both ARM and Thumb functions.
1262 All three call dummies expect to receive the target function
1263 address in R4, with the low bit set if it's a Thumb function. */
1266 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1267 struct value
**args
, struct type
*type
, int gcc_p
)
1269 static short thumb_dummy
[4] =
1271 0xf000, 0xf801, /* bl label */
1272 0xdf18, /* swi 24 */
1273 0x4720, /* label: bx r4 */
1275 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1277 /* Set flag indicating whether the current PC is in a Thumb function. */
1278 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1279 arm_set_call_dummy_breakpoint_offset ();
1281 /* If the target function is Thumb, set the low bit of the function
1282 address. And if the CPU is currently in ARM mode, patch the
1283 second instruction of call dummy to use a BX instruction to
1284 switch to Thumb mode. */
1285 target_is_thumb
= arm_pc_is_thumb (fun
);
1286 if (target_is_thumb
)
1289 if (!caller_is_thumb
)
1290 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1293 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1294 instead of the ARM one that's already been copied. This will
1295 work for both Thumb and ARM target functions. */
1296 if (caller_is_thumb
)
1300 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1302 for (i
= 0; i
< len
; i
++)
1304 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1305 p
+= sizeof (thumb_dummy
[0]);
1309 /* Put the target address in r4; the call dummy will copy this to
1311 write_register (4, fun
);
1314 /* Pop the current frame. So long as the frame info has been
1315 initialized properly (see arm_init_extra_frame_info), this code
1316 works for dummy frames as well as regular frames. I.e, there's no
1317 need to have a special case for dummy frames. */
1319 arm_pop_frame (void)
1322 struct frame_info
*frame
= get_current_frame ();
1323 CORE_ADDR old_SP
= (get_frame_base (frame
)
1324 - get_frame_extra_info (frame
)->frameoffset
1325 + get_frame_extra_info (frame
)->framesize
);
1327 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1328 get_frame_base (frame
),
1329 get_frame_base (frame
)))
1331 generic_pop_dummy_frame ();
1332 flush_cached_frames ();
1336 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1337 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1338 write_register (regnum
,
1339 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1340 REGISTER_RAW_SIZE (regnum
)));
1342 write_register (ARM_PC_REGNUM
, DEPRECATED_FRAME_SAVED_PC (frame
));
1343 write_register (ARM_SP_REGNUM
, old_SP
);
1345 flush_cached_frames ();
1348 /* When arguments must be pushed onto the stack, they go on in reverse
1349 order. The code below implements a FILO (stack) to do this. */
1354 struct stack_item
*prev
;
1358 static struct stack_item
*
1359 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1361 struct stack_item
*si
;
1362 si
= xmalloc (sizeof (struct stack_item
));
1363 si
->data
= xmalloc (len
);
1366 memcpy (si
->data
, contents
, len
);
1370 static struct stack_item
*
1371 pop_stack_item (struct stack_item
*si
)
1373 struct stack_item
*dead
= si
;
1380 /* We currently only support passing parameters in integer registers. This
1381 conforms with GCC's default model. Several other variants exist and
1382 we should probably support some of them based on the selected ABI. */
1385 arm_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1386 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1387 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1388 CORE_ADDR struct_addr
)
1393 struct stack_item
*si
= NULL
;
1395 /* Set the return address. For the ARM, the return breakpoint is
1396 always at BP_ADDR. */
1397 /* XXX Fix for Thumb. */
1398 regcache_cooked_write_unsigned (regcache
, ARM_LR_REGNUM
, bp_addr
);
1400 /* Walk through the list of args and determine how large a temporary
1401 stack is required. Need to take care here as structs may be
1402 passed on the stack, and we have to to push them. */
1405 argreg
= ARM_A1_REGNUM
;
1408 /* Some platforms require a double-word aligned stack. Make sure sp
1409 is correctly aligned before we start. We always do this even if
1410 it isn't really needed -- it can never hurt things. */
1411 sp
&= ~(CORE_ADDR
)(2 * DEPRECATED_REGISTER_SIZE
- 1);
1413 /* The struct_return pointer occupies the first parameter
1414 passing register. */
1418 fprintf_unfiltered (gdb_stdlog
, "struct return in %s = 0x%s\n",
1419 REGISTER_NAME (argreg
), paddr (struct_addr
));
1420 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
1424 for (argnum
= 0; argnum
< nargs
; argnum
++)
1427 struct type
*arg_type
;
1428 struct type
*target_type
;
1429 enum type_code typecode
;
1432 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1433 len
= TYPE_LENGTH (arg_type
);
1434 target_type
= TYPE_TARGET_TYPE (arg_type
);
1435 typecode
= TYPE_CODE (arg_type
);
1436 val
= VALUE_CONTENTS (args
[argnum
]);
1438 /* If the argument is a pointer to a function, and it is a
1439 Thumb function, create a LOCAL copy of the value and set
1440 the THUMB bit in it. */
1441 if (TYPE_CODE_PTR
== typecode
1442 && target_type
!= NULL
1443 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1445 CORE_ADDR regval
= extract_unsigned_integer (val
, len
);
1446 if (arm_pc_is_thumb (regval
))
1449 store_unsigned_integer (val
, len
, MAKE_THUMB_ADDR (regval
));
1453 /* Copy the argument to general registers or the stack in
1454 register-sized pieces. Large arguments are split between
1455 registers and stack. */
1458 int partial_len
= len
< DEPRECATED_REGISTER_SIZE
? len
: DEPRECATED_REGISTER_SIZE
;
1460 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1462 /* The argument is being passed in a general purpose
1464 CORE_ADDR regval
= extract_unsigned_integer (val
, partial_len
);
1466 fprintf_unfiltered (gdb_stdlog
, "arg %d in %s = 0x%s\n",
1467 argnum
, REGISTER_NAME (argreg
),
1468 phex (regval
, DEPRECATED_REGISTER_SIZE
));
1469 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1474 /* Push the arguments onto the stack. */
1476 fprintf_unfiltered (gdb_stdlog
, "arg %d @ sp + %d\n",
1478 si
= push_stack_item (si
, val
, DEPRECATED_REGISTER_SIZE
);
1479 nstack
+= DEPRECATED_REGISTER_SIZE
;
1486 /* If we have an odd number of words to push, then decrement the stack
1487 by one word now, so first stack argument will be dword aligned. */
1494 write_memory (sp
, si
->data
, si
->len
);
1495 si
= pop_stack_item (si
);
1498 /* Finally, update teh SP register. */
1499 regcache_cooked_write_unsigned (regcache
, ARM_SP_REGNUM
, sp
);
1505 print_fpu_flags (int flags
)
1507 if (flags
& (1 << 0))
1508 fputs ("IVO ", stdout
);
1509 if (flags
& (1 << 1))
1510 fputs ("DVZ ", stdout
);
1511 if (flags
& (1 << 2))
1512 fputs ("OFL ", stdout
);
1513 if (flags
& (1 << 3))
1514 fputs ("UFL ", stdout
);
1515 if (flags
& (1 << 4))
1516 fputs ("INX ", stdout
);
1520 /* Print interesting information about the floating point processor
1521 (if present) or emulator. */
1523 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1524 struct frame_info
*frame
, const char *args
)
1526 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1529 type
= (status
>> 24) & 127;
1530 printf ("%s FPU type %d\n",
1531 (status
& (1 << 31)) ? "Hardware" : "Software",
1533 fputs ("mask: ", stdout
);
1534 print_fpu_flags (status
>> 16);
1535 fputs ("flags: ", stdout
);
1536 print_fpu_flags (status
);
1539 /* Return the GDB type object for the "standard" data type of data in
1542 static struct type
*
1543 arm_register_type (int regnum
)
1545 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1547 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1548 return builtin_type_arm_ext_big
;
1550 return builtin_type_arm_ext_littlebyte_bigword
;
1553 return builtin_type_int32
;
1556 /* Index within `registers' of the first byte of the space for
1560 arm_register_byte (int regnum
)
1562 if (regnum
< ARM_F0_REGNUM
)
1563 return regnum
* INT_REGISTER_RAW_SIZE
;
1564 else if (regnum
< ARM_PS_REGNUM
)
1565 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1566 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1568 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1569 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1570 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1573 /* Number of bytes of storage in the actual machine representation for
1574 register N. All registers are 4 bytes, except fp0 - fp7, which are
1575 12 bytes in length. */
1578 arm_register_raw_size (int regnum
)
1580 if (regnum
< ARM_F0_REGNUM
)
1581 return INT_REGISTER_RAW_SIZE
;
1582 else if (regnum
< ARM_FPS_REGNUM
)
1583 return FP_REGISTER_RAW_SIZE
;
1585 return STATUS_REGISTER_SIZE
;
1588 /* Number of bytes of storage in a program's representation
1591 arm_register_virtual_size (int regnum
)
1593 if (regnum
< ARM_F0_REGNUM
)
1594 return INT_REGISTER_VIRTUAL_SIZE
;
1595 else if (regnum
< ARM_FPS_REGNUM
)
1596 return FP_REGISTER_VIRTUAL_SIZE
;
1598 return STATUS_REGISTER_SIZE
;
1601 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1603 arm_register_sim_regno (int regnum
)
1606 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1608 if (reg
< NUM_GREGS
)
1609 return SIM_ARM_R0_REGNUM
+ reg
;
1612 if (reg
< NUM_FREGS
)
1613 return SIM_ARM_FP0_REGNUM
+ reg
;
1616 if (reg
< NUM_SREGS
)
1617 return SIM_ARM_FPS_REGNUM
+ reg
;
1620 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1623 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1624 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1625 It is thought that this is is the floating-point register format on
1626 little-endian systems. */
1629 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1633 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1634 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1636 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1638 floatformat_from_doublest (fmt
, &d
, dbl
);
1642 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1645 floatformat_to_doublest (fmt
, ptr
, &d
);
1646 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1647 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1649 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1654 condition_true (unsigned long cond
, unsigned long status_reg
)
1656 if (cond
== INST_AL
|| cond
== INST_NV
)
1662 return ((status_reg
& FLAG_Z
) != 0);
1664 return ((status_reg
& FLAG_Z
) == 0);
1666 return ((status_reg
& FLAG_C
) != 0);
1668 return ((status_reg
& FLAG_C
) == 0);
1670 return ((status_reg
& FLAG_N
) != 0);
1672 return ((status_reg
& FLAG_N
) == 0);
1674 return ((status_reg
& FLAG_V
) != 0);
1676 return ((status_reg
& FLAG_V
) == 0);
1678 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1680 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1682 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1684 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1686 return (((status_reg
& FLAG_Z
) == 0) &&
1687 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1689 return (((status_reg
& FLAG_Z
) != 0) ||
1690 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1695 /* Support routines for single stepping. Calculate the next PC value. */
1696 #define submask(x) ((1L << ((x) + 1)) - 1)
1697 #define bit(obj,st) (((obj) >> (st)) & 1)
1698 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1699 #define sbits(obj,st,fn) \
1700 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1701 #define BranchDest(addr,instr) \
1702 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1705 static unsigned long
1706 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1707 unsigned long status_reg
)
1709 unsigned long res
, shift
;
1710 int rm
= bits (inst
, 0, 3);
1711 unsigned long shifttype
= bits (inst
, 5, 6);
1715 int rs
= bits (inst
, 8, 11);
1716 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1719 shift
= bits (inst
, 7, 11);
1722 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1723 + (bit (inst
, 4) ? 12 : 8))
1724 : read_register (rm
));
1729 res
= shift
>= 32 ? 0 : res
<< shift
;
1733 res
= shift
>= 32 ? 0 : res
>> shift
;
1739 res
= ((res
& 0x80000000L
)
1740 ? ~((~res
) >> shift
) : res
>> shift
);
1743 case 3: /* ROR/RRX */
1746 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1748 res
= (res
>> shift
) | (res
<< (32 - shift
));
1752 return res
& 0xffffffff;
1755 /* Return number of 1-bits in VAL. */
1758 bitcount (unsigned long val
)
1761 for (nbits
= 0; val
!= 0; nbits
++)
1762 val
&= val
- 1; /* delete rightmost 1-bit in val */
1767 thumb_get_next_pc (CORE_ADDR pc
)
1769 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1770 unsigned short inst1
= read_memory_integer (pc
, 2);
1771 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1772 unsigned long offset
;
1774 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1778 /* Fetch the saved PC from the stack. It's stored above
1779 all of the other registers. */
1780 offset
= bitcount (bits (inst1
, 0, 7)) * DEPRECATED_REGISTER_SIZE
;
1781 sp
= read_register (ARM_SP_REGNUM
);
1782 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1783 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1785 error ("Infinite loop detected");
1787 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1789 unsigned long status
= read_register (ARM_PS_REGNUM
);
1790 unsigned long cond
= bits (inst1
, 8, 11);
1791 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1792 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1794 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1796 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1798 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1800 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1801 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1802 nextpc
= pc_val
+ offset
;
1809 arm_get_next_pc (CORE_ADDR pc
)
1811 unsigned long pc_val
;
1812 unsigned long this_instr
;
1813 unsigned long status
;
1816 if (arm_pc_is_thumb (pc
))
1817 return thumb_get_next_pc (pc
);
1819 pc_val
= (unsigned long) pc
;
1820 this_instr
= read_memory_integer (pc
, 4);
1821 status
= read_register (ARM_PS_REGNUM
);
1822 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1824 if (condition_true (bits (this_instr
, 28, 31), status
))
1826 switch (bits (this_instr
, 24, 27))
1829 case 0x1: /* data processing */
1833 unsigned long operand1
, operand2
, result
= 0;
1837 if (bits (this_instr
, 12, 15) != 15)
1840 if (bits (this_instr
, 22, 25) == 0
1841 && bits (this_instr
, 4, 7) == 9) /* multiply */
1842 error ("Illegal update to pc in instruction");
1844 /* Multiply into PC */
1845 c
= (status
& FLAG_C
) ? 1 : 0;
1846 rn
= bits (this_instr
, 16, 19);
1847 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1849 if (bit (this_instr
, 25))
1851 unsigned long immval
= bits (this_instr
, 0, 7);
1852 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1853 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1856 else /* operand 2 is a shifted register */
1857 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1859 switch (bits (this_instr
, 21, 24))
1862 result
= operand1
& operand2
;
1866 result
= operand1
^ operand2
;
1870 result
= operand1
- operand2
;
1874 result
= operand2
- operand1
;
1878 result
= operand1
+ operand2
;
1882 result
= operand1
+ operand2
+ c
;
1886 result
= operand1
- operand2
+ c
;
1890 result
= operand2
- operand1
+ c
;
1896 case 0xb: /* tst, teq, cmp, cmn */
1897 result
= (unsigned long) nextpc
;
1901 result
= operand1
| operand2
;
1905 /* Always step into a function. */
1910 result
= operand1
& ~operand2
;
1917 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1920 error ("Infinite loop detected");
1925 case 0x5: /* data transfer */
1928 if (bit (this_instr
, 20))
1931 if (bits (this_instr
, 12, 15) == 15)
1937 if (bit (this_instr
, 22))
1938 error ("Illegal update to pc in instruction");
1940 /* byte write to PC */
1941 rn
= bits (this_instr
, 16, 19);
1942 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1943 if (bit (this_instr
, 24))
1946 int c
= (status
& FLAG_C
) ? 1 : 0;
1947 unsigned long offset
=
1948 (bit (this_instr
, 25)
1949 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1950 : bits (this_instr
, 0, 11));
1952 if (bit (this_instr
, 23))
1957 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1960 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1963 error ("Infinite loop detected");
1969 case 0x9: /* block transfer */
1970 if (bit (this_instr
, 20))
1973 if (bit (this_instr
, 15))
1978 if (bit (this_instr
, 23))
1981 unsigned long reglist
= bits (this_instr
, 0, 14);
1982 offset
= bitcount (reglist
) * 4;
1983 if (bit (this_instr
, 24)) /* pre */
1986 else if (bit (this_instr
, 24))
1990 unsigned long rn_val
=
1991 read_register (bits (this_instr
, 16, 19));
1993 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
1997 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1999 error ("Infinite loop detected");
2004 case 0xb: /* branch & link */
2005 case 0xa: /* branch */
2007 nextpc
= BranchDest (pc
, this_instr
);
2009 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2011 error ("Infinite loop detected");
2017 case 0xe: /* coproc ops */
2022 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2030 /* single_step() is called just before we want to resume the inferior,
2031 if we want to single-step it but there is no hardware or kernel
2032 single-step support. We find the target of the coming instruction
2035 single_step() is also called just after the inferior stops. If we
2036 had set up a simulated single-step, we undo our damage. */
2039 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2041 static int next_pc
; /* State between setting and unsetting. */
2042 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2046 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2047 target_insert_breakpoint (next_pc
, break_mem
);
2050 target_remove_breakpoint (next_pc
, break_mem
);
2053 #include "bfd-in2.h"
2054 #include "libcoff.h"
2057 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2059 if (arm_pc_is_thumb (memaddr
))
2061 static asymbol
*asym
;
2062 static combined_entry_type ce
;
2063 static struct coff_symbol_struct csym
;
2064 static struct bfd fake_bfd
;
2065 static bfd_target fake_target
;
2067 if (csym
.native
== NULL
)
2069 /* Create a fake symbol vector containing a Thumb symbol.
2070 This is solely so that the code in print_insn_little_arm()
2071 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2072 the presence of a Thumb symbol and switch to decoding
2073 Thumb instructions. */
2075 fake_target
.flavour
= bfd_target_coff_flavour
;
2076 fake_bfd
.xvec
= &fake_target
;
2077 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2079 csym
.symbol
.the_bfd
= &fake_bfd
;
2080 csym
.symbol
.name
= "fake";
2081 asym
= (asymbol
*) & csym
;
2084 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2085 info
->symbols
= &asym
;
2088 info
->symbols
= NULL
;
2090 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2091 return print_insn_big_arm (memaddr
, info
);
2093 return print_insn_little_arm (memaddr
, info
);
2096 /* The following define instruction sequences that will cause ARM
2097 cpu's to take an undefined instruction trap. These are used to
2098 signal a breakpoint to GDB.
2100 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2101 modes. A different instruction is required for each mode. The ARM
2102 cpu's can also be big or little endian. Thus four different
2103 instructions are needed to support all cases.
2105 Note: ARMv4 defines several new instructions that will take the
2106 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2107 not in fact add the new instructions. The new undefined
2108 instructions in ARMv4 are all instructions that had no defined
2109 behaviour in earlier chips. There is no guarantee that they will
2110 raise an exception, but may be treated as NOP's. In practice, it
2111 may only safe to rely on instructions matching:
2113 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2114 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2115 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2117 Even this may only true if the condition predicate is true. The
2118 following use a condition predicate of ALWAYS so it is always TRUE.
2120 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2121 and NetBSD all use a software interrupt rather than an undefined
2122 instruction to force a trap. This can be handled by by the
2123 abi-specific code during establishment of the gdbarch vector. */
2126 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2127 override these definitions. */
2128 #ifndef ARM_LE_BREAKPOINT
2129 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2131 #ifndef ARM_BE_BREAKPOINT
2132 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2134 #ifndef THUMB_LE_BREAKPOINT
2135 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2137 #ifndef THUMB_BE_BREAKPOINT
2138 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2141 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2142 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2143 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2144 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2146 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2147 the program counter value to determine whether a 16-bit or 32-bit
2148 breakpoint should be used. It returns a pointer to a string of
2149 bytes that encode a breakpoint instruction, stores the length of
2150 the string to *lenptr, and adjusts the program counter (if
2151 necessary) to point to the actual memory location where the
2152 breakpoint should be inserted. */
2154 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2155 breakpoints and storing their handles instread of what was in
2156 memory. It is nice that this is the same size as a handle -
2157 otherwise remote-rdp will have to change. */
2159 static const unsigned char *
2160 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2162 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2164 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2166 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2167 *lenptr
= tdep
->thumb_breakpoint_size
;
2168 return tdep
->thumb_breakpoint
;
2172 *lenptr
= tdep
->arm_breakpoint_size
;
2173 return tdep
->arm_breakpoint
;
2177 /* Extract from an array REGBUF containing the (raw) register state a
2178 function return value of type TYPE, and copy that, in virtual
2179 format, into VALBUF. */
2182 arm_extract_return_value (struct type
*type
,
2183 struct regcache
*regs
,
2186 bfd_byte
*valbuf
= dst
;
2188 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2190 switch (arm_get_fp_model (current_gdbarch
))
2194 /* The value is in register F0 in internal format. We need to
2195 extract the raw value and then convert it to the desired
2197 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2199 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2200 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2205 case ARM_FLOAT_SOFT_FPA
:
2206 case ARM_FLOAT_SOFT_VFP
:
2207 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2208 if (TYPE_LENGTH (type
) > 4)
2209 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2210 valbuf
+ INT_REGISTER_RAW_SIZE
);
2215 (__FILE__
, __LINE__
,
2216 "arm_extract_return_value: Floating point model not supported");
2220 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2221 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2222 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2223 || TYPE_CODE (type
) == TYPE_CODE_PTR
2224 || TYPE_CODE (type
) == TYPE_CODE_REF
2225 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2227 /* If the the type is a plain integer, then the access is
2228 straight-forward. Otherwise we have to play around a bit more. */
2229 int len
= TYPE_LENGTH (type
);
2230 int regno
= ARM_A1_REGNUM
;
2235 /* By using store_unsigned_integer we avoid having to do
2236 anything special for small big-endian values. */
2237 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2238 store_unsigned_integer (valbuf
,
2239 (len
> INT_REGISTER_RAW_SIZE
2240 ? INT_REGISTER_RAW_SIZE
: len
),
2242 len
-= INT_REGISTER_RAW_SIZE
;
2243 valbuf
+= INT_REGISTER_RAW_SIZE
;
2248 /* For a structure or union the behaviour is as if the value had
2249 been stored to word-aligned memory and then loaded into
2250 registers with 32-bit load instruction(s). */
2251 int len
= TYPE_LENGTH (type
);
2252 int regno
= ARM_A1_REGNUM
;
2253 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2257 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2258 memcpy (valbuf
, tmpbuf
,
2259 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2260 len
-= INT_REGISTER_RAW_SIZE
;
2261 valbuf
+= INT_REGISTER_RAW_SIZE
;
2266 /* Extract from an array REGBUF containing the (raw) register state
2267 the address in which a function should return its structure value. */
2270 arm_extract_struct_value_address (struct regcache
*regcache
)
2274 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2278 /* Will a function return an aggregate type in memory or in a
2279 register? Return 0 if an aggregate type can be returned in a
2280 register, 1 if it must be returned in memory. */
2283 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2286 register enum type_code code
;
2288 /* In the ARM ABI, "integer" like aggregate types are returned in
2289 registers. For an aggregate type to be integer like, its size
2290 must be less than or equal to DEPRECATED_REGISTER_SIZE and the
2291 offset of each addressable subfield must be zero. Note that bit
2292 fields are not addressable, and all addressable subfields of
2293 unions always start at offset zero.
2295 This function is based on the behaviour of GCC 2.95.1.
2296 See: gcc/arm.c: arm_return_in_memory() for details.
2298 Note: All versions of GCC before GCC 2.95.2 do not set up the
2299 parameters correctly for a function returning the following
2300 structure: struct { float f;}; This should be returned in memory,
2301 not a register. Richard Earnshaw sent me a patch, but I do not
2302 know of any way to detect if a function like the above has been
2303 compiled with the correct calling convention. */
2305 /* All aggregate types that won't fit in a register must be returned
2307 if (TYPE_LENGTH (type
) > DEPRECATED_REGISTER_SIZE
)
2312 /* The only aggregate types that can be returned in a register are
2313 structs and unions. Arrays must be returned in memory. */
2314 code
= TYPE_CODE (type
);
2315 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2320 /* Assume all other aggregate types can be returned in a register.
2321 Run a check for structures, unions and arrays. */
2324 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2327 /* Need to check if this struct/union is "integer" like. For
2328 this to be true, its size must be less than or equal to
2329 DEPRECATED_REGISTER_SIZE and the offset of each addressable
2330 subfield must be zero. Note that bit fields are not
2331 addressable, and unions always start at offset zero. If any
2332 of the subfields is a floating point type, the struct/union
2333 cannot be an integer type. */
2335 /* For each field in the object, check:
2336 1) Is it FP? --> yes, nRc = 1;
2337 2) Is it addressable (bitpos != 0) and
2338 not packed (bitsize == 0)?
2342 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2344 enum type_code field_type_code
;
2345 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2347 /* Is it a floating point type field? */
2348 if (field_type_code
== TYPE_CODE_FLT
)
2354 /* If bitpos != 0, then we have to care about it. */
2355 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2357 /* Bitfields are not addressable. If the field bitsize is
2358 zero, then the field is not packed. Hence it cannot be
2359 a bitfield or any other packed type. */
2360 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2372 /* Write into appropriate registers a function return value of type
2373 TYPE, given in virtual format. */
2376 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2379 const bfd_byte
*valbuf
= src
;
2381 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2383 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2385 switch (arm_get_fp_model (current_gdbarch
))
2389 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2390 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2393 case ARM_FLOAT_SOFT_FPA
:
2394 case ARM_FLOAT_SOFT_VFP
:
2395 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2396 if (TYPE_LENGTH (type
) > 4)
2397 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2398 valbuf
+ INT_REGISTER_RAW_SIZE
);
2403 (__FILE__
, __LINE__
,
2404 "arm_store_return_value: Floating point model not supported");
2408 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2409 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2410 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2411 || TYPE_CODE (type
) == TYPE_CODE_PTR
2412 || TYPE_CODE (type
) == TYPE_CODE_REF
2413 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2415 if (TYPE_LENGTH (type
) <= 4)
2417 /* Values of one word or less are zero/sign-extended and
2419 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2420 LONGEST val
= unpack_long (type
, valbuf
);
2422 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2423 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2427 /* Integral values greater than one word are stored in consecutive
2428 registers starting with r0. This will always be a multiple of
2429 the regiser size. */
2430 int len
= TYPE_LENGTH (type
);
2431 int regno
= ARM_A1_REGNUM
;
2435 regcache_cooked_write (regs
, regno
++, valbuf
);
2436 len
-= INT_REGISTER_RAW_SIZE
;
2437 valbuf
+= INT_REGISTER_RAW_SIZE
;
2443 /* For a structure or union the behaviour is as if the value had
2444 been stored to word-aligned memory and then loaded into
2445 registers with 32-bit load instruction(s). */
2446 int len
= TYPE_LENGTH (type
);
2447 int regno
= ARM_A1_REGNUM
;
2448 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2452 memcpy (tmpbuf
, valbuf
,
2453 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2454 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2455 len
-= INT_REGISTER_RAW_SIZE
;
2456 valbuf
+= INT_REGISTER_RAW_SIZE
;
2462 arm_get_longjmp_target (CORE_ADDR
*pc
)
2465 char buf
[INT_REGISTER_RAW_SIZE
];
2466 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2468 jb_addr
= read_register (ARM_A1_REGNUM
);
2470 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2471 INT_REGISTER_RAW_SIZE
))
2474 *pc
= extract_unsigned_integer (buf
, INT_REGISTER_RAW_SIZE
);
2478 /* Return non-zero if the PC is inside a thumb call thunk. */
2481 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2483 CORE_ADDR start_addr
;
2485 /* Find the starting address of the function containing the PC. If
2486 the caller didn't give us a name, look it up at the same time. */
2487 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2491 return strncmp (name
, "_call_via_r", 11) == 0;
2494 /* If PC is in a Thumb call or return stub, return the address of the
2495 target PC, which is in a register. The thunk functions are called
2496 _called_via_xx, where x is the register name. The possible names
2497 are r0-r9, sl, fp, ip, sp, and lr. */
2500 arm_skip_stub (CORE_ADDR pc
)
2503 CORE_ADDR start_addr
;
2505 /* Find the starting address and name of the function containing the PC. */
2506 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2509 /* Call thunks always start with "_call_via_". */
2510 if (strncmp (name
, "_call_via_", 10) == 0)
2512 /* Use the name suffix to determine which register contains the
2514 static char *table
[15] =
2515 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2516 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2520 for (regno
= 0; regno
<= 14; regno
++)
2521 if (strcmp (&name
[10], table
[regno
]) == 0)
2522 return read_register (regno
);
2525 return 0; /* not a stub */
2529 set_arm_command (char *args
, int from_tty
)
2531 printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
2532 help_list (setarmcmdlist
, "set arm ", all_commands
, gdb_stdout
);
2536 show_arm_command (char *args
, int from_tty
)
2538 cmd_show_list (showarmcmdlist
, from_tty
, "");
2541 enum arm_float_model
2542 arm_get_fp_model (struct gdbarch
*gdbarch
)
2544 if (arm_fp_model
== ARM_FLOAT_AUTO
)
2545 return gdbarch_tdep (gdbarch
)->fp_model
;
2547 return arm_fp_model
;
2551 arm_set_fp (struct gdbarch
*gdbarch
)
2553 enum arm_float_model fp_model
= arm_get_fp_model (gdbarch
);
2555 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
2556 && (fp_model
== ARM_FLOAT_SOFT_FPA
|| fp_model
== ARM_FLOAT_FPA
))
2558 set_gdbarch_double_format (gdbarch
,
2559 &floatformat_ieee_double_littlebyte_bigword
);
2560 set_gdbarch_long_double_format
2561 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
2565 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2566 set_gdbarch_long_double_format (gdbarch
,
2567 &floatformat_ieee_double_little
);
2572 set_fp_model_sfunc (char *args
, int from_tty
,
2573 struct cmd_list_element
*c
)
2575 enum arm_float_model fp_model
;
2577 for (fp_model
= ARM_FLOAT_AUTO
; fp_model
!= ARM_FLOAT_LAST
; fp_model
++)
2578 if (strcmp (current_fp_model
, fp_model_strings
[fp_model
]) == 0)
2580 arm_fp_model
= fp_model
;
2584 if (fp_model
== ARM_FLOAT_LAST
)
2585 internal_error (__FILE__
, __LINE__
, "Invalid fp model accepted: %s.",
2588 if (gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2589 arm_set_fp (current_gdbarch
);
2593 show_fp_model (char *args
, int from_tty
,
2594 struct cmd_list_element
*c
)
2596 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2598 if (arm_fp_model
== ARM_FLOAT_AUTO
2599 && gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2600 printf_filtered (" - the default for the current ABI is \"%s\".\n",
2601 fp_model_strings
[tdep
->fp_model
]);
2604 /* If the user changes the register disassembly style used for info
2605 register and other commands, we have to also switch the style used
2606 in opcodes for disassembly output. This function is run in the "set
2607 arm disassembly" command, and does that. */
2610 set_disassembly_style_sfunc (char *args
, int from_tty
,
2611 struct cmd_list_element
*c
)
2613 set_disassembly_style ();
2616 /* Return the ARM register name corresponding to register I. */
2618 arm_register_name (int i
)
2620 return arm_register_names
[i
];
2624 set_disassembly_style (void)
2626 const char *setname
, *setdesc
, **regnames
;
2629 /* Find the style that the user wants in the opcodes table. */
2631 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2632 while ((disassembly_style
!= setname
)
2633 && (current
< num_disassembly_options
))
2634 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2635 current_option
= current
;
2637 /* Fill our copy. */
2638 for (j
= 0; j
< numregs
; j
++)
2639 arm_register_names
[j
] = (char *) regnames
[j
];
2642 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2644 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2645 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2649 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2650 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2653 /* Synchronize the disassembler. */
2654 set_arm_regname_option (current
);
2657 /* arm_othernames implements the "othernames" command. This is deprecated
2658 by the "set arm disassembly" command. */
2661 arm_othernames (char *names
, int n
)
2663 /* Circle through the various flavors. */
2664 current_option
= (current_option
+ 1) % num_disassembly_options
;
2666 disassembly_style
= valid_disassembly_styles
[current_option
];
2667 set_disassembly_style ();
2670 /* Test whether the coff symbol specific value corresponds to a Thumb
2674 coff_sym_is_thumb (int val
)
2676 return (val
== C_THUMBEXT
||
2677 val
== C_THUMBSTAT
||
2678 val
== C_THUMBEXTFUNC
||
2679 val
== C_THUMBSTATFUNC
||
2680 val
== C_THUMBLABEL
);
2683 /* arm_coff_make_msymbol_special()
2684 arm_elf_make_msymbol_special()
2686 These functions test whether the COFF or ELF symbol corresponds to
2687 an address in thumb code, and set a "special" bit in a minimal
2688 symbol to indicate that it does. */
2691 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2693 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2695 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2697 MSYMBOL_SET_SPECIAL (msym
);
2701 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2703 if (coff_sym_is_thumb (val
))
2704 MSYMBOL_SET_SPECIAL (msym
);
2708 static enum gdb_osabi
2709 arm_elf_osabi_sniffer (bfd
*abfd
)
2711 unsigned int elfosabi
, eflags
;
2712 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2714 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2719 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2720 file are conforming to the base specification for that machine
2721 (there are no OS-specific extensions). In order to determine the
2722 real OS in use we must look for OS notes that have been added. */
2723 bfd_map_over_sections (abfd
,
2724 generic_elf_osabi_sniff_abi_tag_sections
,
2726 if (osabi
== GDB_OSABI_UNKNOWN
)
2728 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2729 field for more information. */
2730 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2733 case EF_ARM_EABI_VER1
:
2734 osabi
= GDB_OSABI_ARM_EABI_V1
;
2737 case EF_ARM_EABI_VER2
:
2738 osabi
= GDB_OSABI_ARM_EABI_V2
;
2741 case EF_ARM_EABI_UNKNOWN
:
2742 /* Assume GNU tools. */
2743 osabi
= GDB_OSABI_ARM_APCS
;
2747 internal_error (__FILE__
, __LINE__
,
2748 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2749 "version 0x%x", eflags
);
2755 /* GNU tools use this value. Check note sections in this case,
2757 bfd_map_over_sections (abfd
,
2758 generic_elf_osabi_sniff_abi_tag_sections
,
2760 if (osabi
== GDB_OSABI_UNKNOWN
)
2762 /* Assume APCS ABI. */
2763 osabi
= GDB_OSABI_ARM_APCS
;
2767 case ELFOSABI_FREEBSD
:
2768 osabi
= GDB_OSABI_FREEBSD_ELF
;
2771 case ELFOSABI_NETBSD
:
2772 osabi
= GDB_OSABI_NETBSD_ELF
;
2775 case ELFOSABI_LINUX
:
2776 osabi
= GDB_OSABI_LINUX
;
2784 /* Initialize the current architecture based on INFO. If possible,
2785 re-use an architecture from ARCHES, which is a list of
2786 architectures already created during this debugging session.
2788 Called e.g. at program startup, when reading a core file, and when
2789 reading a binary file. */
2791 static struct gdbarch
*
2792 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2794 struct gdbarch_tdep
*tdep
;
2795 struct gdbarch
*gdbarch
;
2797 /* Try to deterimine the ABI of the object we are loading. */
2799 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2801 switch (bfd_get_flavour (info
.abfd
))
2803 case bfd_target_aout_flavour
:
2804 /* Assume it's an old APCS-style ABI. */
2805 info
.osabi
= GDB_OSABI_ARM_APCS
;
2808 case bfd_target_coff_flavour
:
2809 /* Assume it's an old APCS-style ABI. */
2811 info
.osabi
= GDB_OSABI_ARM_APCS
;
2815 /* Leave it as "unknown". */
2820 /* If there is already a candidate, use it. */
2821 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2823 return arches
->gdbarch
;
2825 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2826 gdbarch
= gdbarch_alloc (&info
, tdep
);
2828 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2829 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2830 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2832 /* We used to default to FPA for generic ARM, but almost nobody uses that
2833 now, and we now provide a way for the user to force the model. So
2834 default to the most useful variant. */
2835 tdep
->fp_model
= ARM_FLOAT_SOFT_FPA
;
2838 switch (info
.byte_order
)
2840 case BFD_ENDIAN_BIG
:
2841 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2842 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2843 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2844 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2848 case BFD_ENDIAN_LITTLE
:
2849 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2850 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2851 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2852 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2857 internal_error (__FILE__
, __LINE__
,
2858 "arm_gdbarch_init: bad byte order for float format");
2861 /* On ARM targets char defaults to unsigned. */
2862 set_gdbarch_char_signed (gdbarch
, 0);
2864 /* This should be low enough for everything. */
2865 tdep
->lowest_pc
= 0x20;
2866 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2868 set_gdbarch_deprecated_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2869 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, 0);
2871 set_gdbarch_push_dummy_call (gdbarch
, arm_push_dummy_call
);
2873 /* Frame handling. */
2874 set_gdbarch_deprecated_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2875 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2876 set_gdbarch_deprecated_target_read_fp (gdbarch
, arm_read_fp
);
2877 set_gdbarch_deprecated_frame_chain (gdbarch
, arm_frame_chain
);
2878 set_gdbarch_frameless_function_invocation
2879 (gdbarch
, arm_frameless_function_invocation
);
2880 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2881 set_gdbarch_frame_args_skip (gdbarch
, 0);
2882 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2883 set_gdbarch_deprecated_pop_frame (gdbarch
, arm_pop_frame
);
2885 /* Address manipulation. */
2886 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2887 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2889 /* Offset from address of function to start of its code. */
2890 set_gdbarch_function_start_offset (gdbarch
, 0);
2892 /* Advance PC across function entry code. */
2893 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2895 /* Get the PC when a frame might not be available. */
2896 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2898 /* The stack grows downward. */
2899 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2901 /* Breakpoint manipulation. */
2902 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2903 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2905 /* Information about registers, etc. */
2906 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2907 set_gdbarch_deprecated_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2908 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2909 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2910 set_gdbarch_deprecated_register_byte (gdbarch
, arm_register_byte
);
2911 set_gdbarch_deprecated_register_bytes (gdbarch
,
2912 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2913 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2914 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2915 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2916 set_gdbarch_deprecated_register_raw_size (gdbarch
, arm_register_raw_size
);
2917 set_gdbarch_deprecated_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2918 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2919 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2920 set_gdbarch_deprecated_register_virtual_type (gdbarch
, arm_register_type
);
2922 /* Internal <-> external register number maps. */
2923 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2925 /* Integer registers are 4 bytes. */
2926 set_gdbarch_deprecated_register_size (gdbarch
, 4);
2927 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2929 /* Returning results. */
2930 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2931 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2932 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2933 set_gdbarch_extract_struct_value_address (gdbarch
,
2934 arm_extract_struct_value_address
);
2936 /* Single stepping. */
2937 /* XXX For an RDI target we should ask the target if it can single-step. */
2938 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
2941 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_arm
);
2943 /* Minsymbol frobbing. */
2944 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
2945 set_gdbarch_coff_make_msymbol_special (gdbarch
,
2946 arm_coff_make_msymbol_special
);
2948 /* Hook in the ABI-specific overrides, if they have been registered. */
2949 gdbarch_init_osabi (info
, gdbarch
);
2951 /* Now we have tuned the configuration, set a few final things,
2952 based on what the OS ABI has told us. */
2954 if (tdep
->jb_pc
>= 0)
2955 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
2957 /* Floating point sizes and format. */
2958 switch (info
.byte_order
)
2960 case BFD_ENDIAN_BIG
:
2961 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
2962 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
2963 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
2967 case BFD_ENDIAN_LITTLE
:
2968 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
2969 arm_set_fp (gdbarch
);
2973 internal_error (__FILE__
, __LINE__
,
2974 "arm_gdbarch_init: bad byte order for float format");
2981 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2983 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2988 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
2989 (unsigned long) tdep
->lowest_pc
);
2993 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
2994 struct gdbarch
*gdbarch
)
3000 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3001 struct gdbarch
*gdbarch
)
3007 arm_init_abi_apcs (struct gdbarch_info info
,
3008 struct gdbarch
*gdbarch
)
3013 extern initialize_file_ftype _initialize_arm_tdep
; /* -Wmissing-prototypes */
3016 _initialize_arm_tdep (void)
3018 struct ui_file
*stb
;
3020 struct cmd_list_element
*new_set
, *new_show
;
3021 const char *setname
;
3022 const char *setdesc
;
3023 const char **regnames
;
3025 static char *helptext
;
3028 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3030 /* Register an ELF OS ABI sniffer for ARM binaries. */
3031 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3032 bfd_target_elf_flavour
,
3033 arm_elf_osabi_sniffer
);
3035 /* Register some ABI variants for embedded systems. */
3036 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3037 arm_init_abi_eabi_v1
);
3038 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3039 arm_init_abi_eabi_v2
);
3040 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3043 /* Get the number of possible sets of register names defined in opcodes. */
3044 num_disassembly_options
= get_arm_regname_num_options ();
3046 /* Add root prefix command for all "set arm"/"show arm" commands. */
3047 add_prefix_cmd ("arm", no_class
, set_arm_command
,
3048 "Various ARM-specific commands.",
3049 &setarmcmdlist
, "set arm ", 0, &setlist
);
3051 add_prefix_cmd ("arm", no_class
, show_arm_command
,
3052 "Various ARM-specific commands.",
3053 &showarmcmdlist
, "show arm ", 0, &showlist
);
3055 /* Sync the opcode insn printer with our register viewer. */
3056 parse_arm_disassembler_option ("reg-names-std");
3058 /* Begin creating the help text. */
3059 stb
= mem_fileopen ();
3060 fprintf_unfiltered (stb
, "Set the disassembly style.\n"
3061 "The valid values are:\n");
3063 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3064 valid_disassembly_styles
3065 = xmalloc ((num_disassembly_options
+ 1) * sizeof (char *));
3066 for (i
= 0; i
< num_disassembly_options
; i
++)
3068 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3069 valid_disassembly_styles
[i
] = setname
;
3070 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3072 /* Copy the default names (if found) and synchronize disassembler. */
3073 if (!strcmp (setname
, "std"))
3075 disassembly_style
= setname
;
3077 for (j
= 0; j
< numregs
; j
++)
3078 arm_register_names
[j
] = (char *) regnames
[j
];
3079 set_arm_regname_option (i
);
3082 /* Mark the end of valid options. */
3083 valid_disassembly_styles
[num_disassembly_options
] = NULL
;
3085 /* Finish the creation of the help text. */
3086 fprintf_unfiltered (stb
, "The default is \"std\".");
3087 helptext
= ui_file_xstrdup (stb
, &length
);
3088 ui_file_delete (stb
);
3090 /* Add the deprecated disassembly-flavor command. */
3091 new_set
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3092 valid_disassembly_styles
,
3096 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3097 deprecate_cmd (new_set
, "set arm disassembly");
3098 deprecate_cmd (add_show_from_set (new_set
, &showlist
),
3099 "show arm disassembly");
3101 /* And now add the new interface. */
3102 new_set
= add_set_enum_cmd ("disassembler", no_class
,
3103 valid_disassembly_styles
, &disassembly_style
,
3104 helptext
, &setarmcmdlist
);
3106 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3107 add_show_from_set (new_set
, &showarmcmdlist
);
3109 add_setshow_cmd_full ("apcs32", no_class
,
3110 var_boolean
, (char *) &arm_apcs_32
,
3111 "Set usage of ARM 32-bit mode.",
3112 "Show usage of ARM 32-bit mode.",
3114 &setlist
, &showlist
, &new_set
, &new_show
);
3115 deprecate_cmd (new_set
, "set arm apcs32");
3116 deprecate_cmd (new_show
, "show arm apcs32");
3118 add_setshow_boolean_cmd ("apcs32", no_class
, &arm_apcs_32
,
3119 "Set usage of ARM 32-bit mode. "
3120 "When off, a 26-bit PC will be used.",
3121 "Show usage of ARM 32-bit mode. "
3122 "When off, a 26-bit PC will be used.",
3124 &setarmcmdlist
, &showarmcmdlist
);
3126 /* Add a command to allow the user to force the FPU model. */
3127 new_set
= add_set_enum_cmd
3128 ("fpu", no_class
, fp_model_strings
, ¤t_fp_model
,
3129 "Set the floating point type.\n"
3130 "auto - Determine the FP typefrom the OS-ABI.\n"
3131 "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
3132 "fpa - FPA co-processor (GCC compiled).\n"
3133 "softvfp - Software FP with pure-endian doubles.\n"
3134 "vfp - VFP co-processor.",
3136 set_cmd_sfunc (new_set
, set_fp_model_sfunc
);
3137 set_cmd_sfunc (add_show_from_set (new_set
, &showarmcmdlist
), show_fp_model
);
3139 /* Add the deprecated "othernames" command. */
3140 deprecate_cmd (add_com ("othernames", class_obscure
, arm_othernames
,
3141 "Switch to the next set of register names."),
3142 "set arm disassembly");
3144 /* Debugging flag. */
3145 add_setshow_boolean_cmd ("arm", class_maintenance
, &arm_debug
,
3146 "Set ARM debugging. "
3147 "When on, arm-specific debugging is enabled.",
3148 "Show ARM debugging. "
3149 "When on, arm-specific debugging is enabled.",
3151 &setdebuglist
, &showdebuglist
);