1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register styles. */
35 #include "arch-utils.h"
36 #include "solib-svr4.h"
40 #include "gdb/sim-arm.h"
43 #include "coff/internal.h"
46 #include "gdb_assert.h"
50 /* Each OS has a different mechanism for accessing the various
51 registers stored in the sigcontext structure.
53 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
54 function pointer) which may be used to determine the addresses
55 of the various saved registers in the sigcontext structure.
57 For the ARM target, there are three parameters to this function.
58 The first is the pc value of the frame under consideration, the
59 second the stack pointer of this frame, and the last is the
60 register number to fetch.
62 If the tm.h file does not define this macro, then it's assumed that
63 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
66 When it comes time to multi-arching this code, see the identically
67 named machinery in ia64-tdep.c for an example of how it could be
68 done. It should not be necessary to modify the code below where
69 this macro is used. */
71 #ifdef SIGCONTEXT_REGISTER_ADDRESS
72 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
73 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
76 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
77 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
80 /* Macros for setting and testing a bit in a minimal symbol that marks
81 it as Thumb function. The MSB of the minimal symbol's "info" field
82 is used for this purpose. This field is already being used to store
83 the symbol size, so the assumption is that the symbol size cannot
86 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
87 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
88 MSYMBOL_SIZE Returns the size of the minimal symbol,
89 i.e. the "info" field with the "special" bit
92 #define MSYMBOL_SET_SPECIAL(msym) \
93 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
96 #define MSYMBOL_IS_SPECIAL(msym) \
97 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
99 #define MSYMBOL_SIZE(msym) \
100 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
102 /* The list of available "set arm ..." and "show arm ..." commands. */
103 static struct cmd_list_element
*setarmcmdlist
= NULL
;
104 static struct cmd_list_element
*showarmcmdlist
= NULL
;
106 /* The type of floating-point to use. Keep this in sync with enum
107 arm_float_model, and the help string in _initialize_arm_tdep. */
108 static const char *fp_model_strings
[] =
117 /* A variable that can be configured by the user. */
118 static enum arm_float_model arm_fp_model
= ARM_FLOAT_AUTO
;
119 static const char *current_fp_model
= "auto";
121 /* Number of different reg name sets (options). */
122 static int num_disassembly_options
;
124 /* We have more registers than the disassembler as gdb can print the value
125 of special registers as well.
126 The general register names are overwritten by whatever is being used by
127 the disassembler at the moment. We also adjust the case of cpsr and fps. */
129 /* Initial value: Register names used in ARM's ISA documentation. */
130 static char * arm_register_name_strings
[] =
131 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
132 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
133 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
134 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
135 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
136 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
137 "fps", "cpsr" }; /* 24 25 */
138 static char **arm_register_names
= arm_register_name_strings
;
140 /* Valid register name styles. */
141 static const char **valid_disassembly_styles
;
143 /* Disassembly style to use. Default to "std" register names. */
144 static const char *disassembly_style
;
145 /* Index to that option in the opcodes table. */
146 static int current_option
;
148 /* This is used to keep the bfd arch_info in sync with the disassembly
150 static void set_disassembly_style_sfunc(char *, int,
151 struct cmd_list_element
*);
152 static void set_disassembly_style (void);
154 static void convert_from_extended (const struct floatformat
*, const void *,
156 static void convert_to_extended (const struct floatformat
*, void *,
159 /* Define other aspects of the stack frame. We keep the offsets of
160 all saved registers, 'cause we need 'em a lot! We also keep the
161 current size of the stack frame, and the offset of the frame
162 pointer from the stack pointer (for frameless functions, and when
163 we're still in the prologue of a function with a frame). */
165 struct frame_extra_info
172 /* Addresses for calling Thumb functions have the bit 0 set.
173 Here are some macros to test, set, or clear bit 0 of addresses. */
174 #define IS_THUMB_ADDR(addr) ((addr) & 1)
175 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
176 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
179 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
181 return (DEPRECATED_FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
184 /* Set to true if the 32-bit mode is in use. */
188 /* Flag set by arm_fix_call_dummy that tells whether the target
189 function is a Thumb function. This flag is checked by
190 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
191 its use in valops.c) to pass the function address as an additional
194 static int target_is_thumb
;
196 /* Flag set by arm_fix_call_dummy that tells whether the calling
197 function is a Thumb function. This flag is checked by
198 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
200 static int caller_is_thumb
;
202 /* Determine if the program counter specified in MEMADDR is in a Thumb
206 arm_pc_is_thumb (CORE_ADDR memaddr
)
208 struct minimal_symbol
*sym
;
210 /* If bit 0 of the address is set, assume this is a Thumb address. */
211 if (IS_THUMB_ADDR (memaddr
))
214 /* Thumb functions have a "special" bit set in minimal symbols. */
215 sym
= lookup_minimal_symbol_by_pc (memaddr
);
218 return (MSYMBOL_IS_SPECIAL (sym
));
226 /* Determine if the program counter specified in MEMADDR is in a call
227 dummy being called from a Thumb function. */
230 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
232 CORE_ADDR sp
= read_sp ();
234 /* FIXME: Until we switch for the new call dummy macros, this heuristic
235 is the best we can do. We are trying to determine if the pc is on
236 the stack, which (hopefully) will only happen in a call dummy.
237 We hope the current stack pointer is not so far alway from the dummy
238 frame location (true if we have not pushed large data structures or
239 gone too many levels deep) and that our 1024 is not enough to consider
240 code regions as part of the stack (true for most practical purposes). */
241 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
242 return caller_is_thumb
;
247 /* Remove useless bits from addresses in a running program. */
249 arm_addr_bits_remove (CORE_ADDR val
)
252 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
254 return (val
& 0x03fffffc);
257 /* When reading symbols, we need to zap the low bit of the address,
258 which may be set to 1 for Thumb functions. */
260 arm_smash_text_address (CORE_ADDR val
)
265 /* Immediately after a function call, return the saved pc. Can't
266 always go through the frames for this because on some machines the
267 new frame is not set up until the new function executes some
271 arm_saved_pc_after_call (struct frame_info
*frame
)
273 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
276 /* Determine whether the function invocation represented by FI has a
277 frame on the stack associated with it. If it does return zero,
278 otherwise return 1. */
281 arm_frameless_function_invocation (struct frame_info
*fi
)
283 CORE_ADDR func_start
, after_prologue
;
286 /* Sometimes we have functions that do a little setup (like saving the
287 vN registers with the stmdb instruction, but DO NOT set up a frame.
288 The symbol table will report this as a prologue. However, it is
289 important not to try to parse these partial frames as frames, or we
290 will get really confused.
292 So I will demand 3 instructions between the start & end of the
293 prologue before I call it a real prologue, i.e. at least
298 func_start
= (get_frame_func (fi
) + FUNCTION_START_OFFSET
);
299 after_prologue
= SKIP_PROLOGUE (func_start
);
301 /* There are some frameless functions whose first two instructions
302 follow the standard APCS form, in which case after_prologue will
303 be func_start + 8. */
305 frameless
= (after_prologue
< func_start
+ 12);
309 /* A typical Thumb prologue looks like this:
313 Sometimes the latter instruction may be replaced by:
321 or, on tpcs, like this:
328 There is always one instruction of three classes:
333 When we have found at least one of each class we are done with the prolog.
334 Note that the "sub sp, #NN" before the push does not count.
338 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
340 CORE_ADDR current_pc
;
342 bit 0 - push { rlist }
343 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
344 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
348 for (current_pc
= pc
;
349 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
352 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
354 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
356 findmask
|= 1; /* push found */
358 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
361 if ((findmask
& 1) == 0) /* before push ? */
364 findmask
|= 4; /* add/sub sp found */
366 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
368 findmask
|= 2; /* setting of r7 found */
370 else if (insn
== 0x466f) /* mov r7, sp */
372 findmask
|= 2; /* setting of r7 found */
374 else if (findmask
== (4+2+1))
376 /* We have found one of each type of prologue instruction */
380 /* Something in the prolog that we don't care about or some
381 instruction from outside the prolog scheduled here for
389 /* Advance the PC across any function entry prologue instructions to
390 reach some "real" code.
392 The APCS (ARM Procedure Call Standard) defines the following
396 [stmfd sp!, {a1,a2,a3,a4}]
397 stmfd sp!, {...,fp,ip,lr,pc}
398 [stfe f7, [sp, #-12]!]
399 [stfe f6, [sp, #-12]!]
400 [stfe f5, [sp, #-12]!]
401 [stfe f4, [sp, #-12]!]
402 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
405 arm_skip_prologue (CORE_ADDR pc
)
409 CORE_ADDR func_addr
, func_end
= 0;
411 struct symtab_and_line sal
;
413 /* If we're in a dummy frame, don't even try to skip the prologue. */
414 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
417 /* See what the symbol table says. */
419 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
423 /* Found a function. */
424 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
425 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
427 /* Don't use this trick for assembly source files. */
428 sal
= find_pc_line (func_addr
, 0);
429 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
434 /* Check if this is Thumb code. */
435 if (arm_pc_is_thumb (pc
))
436 return thumb_skip_prologue (pc
, func_end
);
438 /* Can't find the prologue end in the symbol table, try it the hard way
439 by disassembling the instructions. */
441 /* Like arm_scan_prologue, stop no later than pc + 64. */
442 if (func_end
== 0 || func_end
> pc
+ 64)
445 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
447 inst
= read_memory_integer (skip_pc
, 4);
449 /* "mov ip, sp" is no longer a required part of the prologue. */
450 if (inst
== 0xe1a0c00d) /* mov ip, sp */
453 /* Some prologues begin with "str lr, [sp, #-4]!". */
454 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
457 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
460 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
463 /* Any insns after this point may float into the code, if it makes
464 for better instruction scheduling, so we skip them only if we
465 find them, but still consider the function to be frame-ful. */
467 /* We may have either one sfmfd instruction here, or several stfe
468 insns, depending on the version of floating point code we
470 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
473 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
476 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
479 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
482 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
483 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
484 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
487 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
488 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
489 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
492 /* Un-recognized instruction; stop scanning. */
496 return skip_pc
; /* End of prologue */
500 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
501 This function decodes a Thumb function prologue to determine:
502 1) the size of the stack frame
503 2) which registers are saved on it
504 3) the offsets of saved regs
505 4) the offset from the stack pointer to the frame pointer
506 This information is stored in the "extra" fields of the frame_info.
508 A typical Thumb function prologue would create this stack frame
509 (offsets relative to FP)
510 old SP -> 24 stack parameters
513 R7 -> 0 local variables (16 bytes)
514 SP -> -12 additional stack space (12 bytes)
515 The frame size would thus be 36 bytes, and the frame offset would be
516 12 bytes. The frame register is R7.
518 The comments for thumb_skip_prolog() describe the algorithm we use
519 to detect the end of the prolog. */
523 thumb_scan_prologue (struct frame_info
*fi
)
525 CORE_ADDR prologue_start
;
526 CORE_ADDR prologue_end
;
527 CORE_ADDR current_pc
;
528 /* Which register has been copied to register n? */
531 bit 0 - push { rlist }
532 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
533 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
538 /* Don't try to scan dummy frames. */
540 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
543 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
545 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
547 if (sal
.line
== 0) /* no line info, use current PC */
548 prologue_end
= get_frame_pc (fi
);
549 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
550 prologue_end
= sal
.end
; /* (probably means no prologue) */
553 /* We're in the boondocks: allow for
554 16 pushes, an add, and "mv fp,sp". */
555 prologue_end
= prologue_start
+ 40;
557 prologue_end
= min (prologue_end
, get_frame_pc (fi
));
559 /* Initialize the saved register map. When register H is copied to
560 register L, we will put H in saved_reg[L]. */
561 for (i
= 0; i
< 16; i
++)
564 /* Search the prologue looking for instructions that set up the
565 frame pointer, adjust the stack pointer, and save registers.
566 Do this until all basic prolog instructions are found. */
568 get_frame_extra_info (fi
)->framesize
= 0;
569 for (current_pc
= prologue_start
;
570 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
577 insn
= read_memory_unsigned_integer (current_pc
, 2);
579 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
582 findmask
|= 1; /* push found */
583 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
584 whether to save LR (R14). */
585 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
587 /* Calculate offsets of saved R0-R7 and LR. */
588 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
589 if (mask
& (1 << regno
))
591 get_frame_extra_info (fi
)->framesize
+= 4;
592 get_frame_saved_regs (fi
)[saved_reg
[regno
]] =
593 -(get_frame_extra_info (fi
)->framesize
);
594 /* Reset saved register map. */
595 saved_reg
[regno
] = regno
;
598 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
601 if ((findmask
& 1) == 0) /* before push? */
604 findmask
|= 4; /* add/sub sp found */
606 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
607 if (insn
& 0x80) /* is it signed? (==subtracting) */
609 get_frame_extra_info (fi
)->frameoffset
+= offset
;
612 get_frame_extra_info (fi
)->framesize
-= offset
;
614 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
616 findmask
|= 2; /* setting of r7 found */
617 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
618 /* get scaled offset */
619 get_frame_extra_info (fi
)->frameoffset
= (insn
& 0xff) << 2;
621 else if (insn
== 0x466f) /* mov r7, sp */
623 findmask
|= 2; /* setting of r7 found */
624 get_frame_extra_info (fi
)->framereg
= THUMB_FP_REGNUM
;
625 get_frame_extra_info (fi
)->frameoffset
= 0;
626 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
628 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
630 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
631 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
632 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
635 /* Something in the prolog that we don't care about or some
636 instruction from outside the prolog scheduled here for
642 /* This function decodes an ARM function prologue to determine:
643 1) the size of the stack frame
644 2) which registers are saved on it
645 3) the offsets of saved regs
646 4) the offset from the stack pointer to the frame pointer
647 This information is stored in the "extra" fields of the frame_info.
649 There are two basic forms for the ARM prologue. The fixed argument
650 function call will look like:
653 stmfd sp!, {fp, ip, lr, pc}
657 Which would create this stack frame (offsets relative to FP):
658 IP -> 4 (caller's stack)
659 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
660 -4 LR (return address in caller)
661 -8 IP (copy of caller's SP)
663 SP -> -28 Local variables
665 The frame size would thus be 32 bytes, and the frame offset would be
666 28 bytes. The stmfd call can also save any of the vN registers it
667 plans to use, which increases the frame size accordingly.
669 Note: The stored PC is 8 off of the STMFD instruction that stored it
670 because the ARM Store instructions always store PC + 8 when you read
673 A variable argument function call will look like:
676 stmfd sp!, {a1, a2, a3, a4}
677 stmfd sp!, {fp, ip, lr, pc}
680 Which would create this stack frame (offsets relative to FP):
681 IP -> 20 (caller's stack)
686 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
687 -4 LR (return address in caller)
688 -8 IP (copy of caller's SP)
690 SP -> -28 Local variables
692 The frame size would thus be 48 bytes, and the frame offset would be
695 There is another potential complication, which is that the optimizer
696 will try to separate the store of fp in the "stmfd" instruction from
697 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
698 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
700 Also, note, the original version of the ARM toolchain claimed that there
703 instruction at the end of the prologue. I have never seen GCC produce
704 this, and the ARM docs don't mention it. We still test for it below in
710 arm_scan_prologue (struct frame_info
*fi
)
712 int regno
, sp_offset
, fp_offset
;
713 LONGEST return_value
;
714 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
716 /* Assume there is no frame until proven otherwise. */
717 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
718 get_frame_extra_info (fi
)->framesize
= 0;
719 get_frame_extra_info (fi
)->frameoffset
= 0;
721 /* Check for Thumb prologue. */
722 if (arm_pc_is_thumb (get_frame_pc (fi
)))
724 thumb_scan_prologue (fi
);
728 /* Find the function prologue. If we can't find the function in
729 the symbol table, peek in the stack frame to find the PC. */
730 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
732 /* One way to find the end of the prologue (which works well
733 for unoptimized code) is to do the following:
735 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
738 prologue_end = get_frame_pc (fi);
739 else if (sal.end < prologue_end)
740 prologue_end = sal.end;
742 This mechanism is very accurate so long as the optimizer
743 doesn't move any instructions from the function body into the
744 prologue. If this happens, sal.end will be the last
745 instruction in the first hunk of prologue code just before
746 the first instruction that the scheduler has moved from
747 the body to the prologue.
749 In order to make sure that we scan all of the prologue
750 instructions, we use a slightly less accurate mechanism which
751 may scan more than necessary. To help compensate for this
752 lack of accuracy, the prologue scanning loop below contains
753 several clauses which'll cause the loop to terminate early if
754 an implausible prologue instruction is encountered.
760 is a suitable endpoint since it accounts for the largest
761 possible prologue plus up to five instructions inserted by
764 if (prologue_end
> prologue_start
+ 64)
766 prologue_end
= prologue_start
+ 64; /* See above. */
771 /* Get address of the stmfd in the prologue of the callee;
772 the saved PC is the address of the stmfd + 8. */
773 if (!safe_read_memory_integer (get_frame_base (fi
), 4, &return_value
))
777 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
778 prologue_end
= prologue_start
+ 64; /* See above. */
782 /* Now search the prologue looking for instructions that set up the
783 frame pointer, adjust the stack pointer, and save registers.
785 Be careful, however, and if it doesn't look like a prologue,
786 don't try to scan it. If, for instance, a frameless function
787 begins with stmfd sp!, then we will tell ourselves there is
788 a frame, which will confuse stack traceback, as well as "finish"
789 and other operations that rely on a knowledge of the stack
792 In the APCS, the prologue should start with "mov ip, sp" so
793 if we don't see this as the first insn, we will stop.
795 [Note: This doesn't seem to be true any longer, so it's now an
796 optional part of the prologue. - Kevin Buettner, 2001-11-20]
798 [Note further: The "mov ip,sp" only seems to be missing in
799 frameless functions at optimization level "-O2" or above,
800 in which case it is often (but not always) replaced by
801 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
803 sp_offset
= fp_offset
= 0;
805 for (current_pc
= prologue_start
;
806 current_pc
< prologue_end
;
809 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
811 if (insn
== 0xe1a0c00d) /* mov ip, sp */
815 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
817 /* Function is frameless: extra_info defaults OK? */
820 else if ((insn
& 0xffff0000) == 0xe92d0000)
821 /* stmfd sp!, {..., fp, ip, lr, pc}
823 stmfd sp!, {a1, a2, a3, a4} */
825 int mask
= insn
& 0xffff;
827 /* Calculate offsets of saved registers. */
828 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
829 if (mask
& (1 << regno
))
832 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
835 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
836 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
837 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
839 /* No need to add this to saved_regs -- it's just an arg reg. */
842 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
843 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
844 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
846 /* No need to add this to saved_regs -- it's just an arg reg. */
849 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
851 unsigned imm
= insn
& 0xff; /* immediate value */
852 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
853 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
855 get_frame_extra_info (fi
)->framereg
= ARM_FP_REGNUM
;
857 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
859 unsigned imm
= insn
& 0xff; /* immediate value */
860 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
861 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
864 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
867 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
868 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
870 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
873 unsigned int fp_start_reg
, fp_bound_reg
;
875 if ((insn
& 0x800) == 0x800) /* N0 is set */
877 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
884 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
890 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
891 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
892 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
895 get_frame_saved_regs (fi
)[fp_start_reg
++] = sp_offset
;
898 else if ((insn
& 0xf0000000) != 0xe0000000)
899 break; /* Condition not true, exit early */
900 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
901 break; /* Don't scan past a block load */
903 /* The optimizer might shove anything into the prologue,
904 so we just skip what we don't recognize. */
908 /* The frame size is just the negative of the offset (from the
909 original SP) of the last thing thing we pushed on the stack.
910 The frame offset is [new FP] - [new SP]. */
911 get_frame_extra_info (fi
)->framesize
= -sp_offset
;
912 if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
)
913 get_frame_extra_info (fi
)->frameoffset
= fp_offset
- sp_offset
;
915 get_frame_extra_info (fi
)->frameoffset
= 0;
918 /* Find REGNUM on the stack. Otherwise, it's in an active register.
919 One thing we might want to do here is to check REGNUM against the
920 clobber mask, and somehow flag it as invalid if it isn't saved on
921 the stack somewhere. This would provide a graceful failure mode
922 when trying to get the value of caller-saves registers for an inner
926 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
928 /* NOTE: cagney/2002-05-03: This function really shouldn't be
929 needed. Instead the (still being written) register unwind
930 function could be called directly. */
931 for (; fi
; fi
= get_next_frame (fi
))
933 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
935 return deprecated_read_register_dummy (get_frame_pc (fi
),
936 get_frame_base (fi
), regnum
);
938 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
940 /* NOTE: cagney/2002-05-03: This would normally need to
941 handle ARM_SP_REGNUM as a special case as, according to
942 the frame.h comments, saved_regs[SP_REGNUM] contains the
943 SP value not its address. It appears that the ARM isn't
944 doing this though. */
945 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
946 REGISTER_RAW_SIZE (regnum
));
949 return read_register (regnum
);
951 /* Function: frame_chain Given a GDB frame, determine the address of
952 the calling function's frame. This will be used to create a new
953 GDB frame struct, and then DEPRECATED_INIT_EXTRA_FRAME_INFO and
954 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
955 ARM, we save the frame size when we initialize the frame_info. */
958 arm_frame_chain (struct frame_info
*fi
)
961 int framereg
= get_frame_extra_info (fi
)->framereg
;
963 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
964 /* A generic call dummy's frame is the same as caller's. */
965 return get_frame_base (fi
);
967 if (get_frame_pc (fi
) < LOWEST_PC
)
970 /* If the caller is the startup code, we're at the end of the chain. */
971 caller_pc
= DEPRECATED_FRAME_SAVED_PC (fi
);
973 /* If the caller is Thumb and the caller is ARM, or vice versa,
974 the frame register of the caller is different from ours.
975 So we must scan the prologue of the caller to determine its
976 frame register number. */
977 /* XXX Fixme, we should try to do this without creating a temporary
979 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
981 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
982 struct frame_info
*caller_fi
=
983 deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS
,
984 sizeof (struct frame_extra_info
));
986 /* Now, scan the prologue and obtain the frame register. */
987 deprecated_update_frame_pc_hack (caller_fi
, caller_pc
);
988 arm_scan_prologue (caller_fi
);
989 framereg
= get_frame_extra_info (caller_fi
)->framereg
;
991 /* Deallocate the storage associated with the temporary frame
993 do_cleanups (old_chain
);
996 /* If the caller used a frame register, return its value.
997 Otherwise, return the caller's stack pointer. */
998 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
999 return arm_find_callers_reg (fi
, framereg
);
1001 return get_frame_base (fi
) + get_frame_extra_info (fi
)->framesize
;
1004 /* This function actually figures out the frame address for a given pc
1005 and sp. This is tricky because we sometimes don't use an explicit
1006 frame pointer, and the previous stack pointer isn't necessarily
1007 recorded on the stack. The only reliable way to get this info is
1008 to examine the prologue. FROMLEAF is a little confusing, it means
1009 this is the next frame up the chain AFTER a frameless function. If
1010 this is true, then the frame value for this frame is still in the
1014 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1019 if (get_frame_saved_regs (fi
) == NULL
)
1020 frame_saved_regs_zalloc (fi
);
1022 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1024 get_frame_extra_info (fi
)->framesize
= 0;
1025 get_frame_extra_info (fi
)->frameoffset
= 0;
1026 get_frame_extra_info (fi
)->framereg
= 0;
1028 if (get_next_frame (fi
))
1029 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1031 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1033 /* Compute stack pointer for this frame. We use this value for both
1034 the sigtramp and call dummy cases. */
1035 if (!get_next_frame (fi
))
1037 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1038 /* For generic dummy frames, pull the value direct from the frame.
1039 Having an unwind function to do this would be nice. */
1040 sp
= deprecated_read_register_dummy (get_frame_pc (get_next_frame (fi
)),
1041 get_frame_base (get_next_frame (fi
)),
1044 sp
= (get_frame_base (get_next_frame (fi
))
1045 - get_frame_extra_info (get_next_frame (fi
))->frameoffset
1046 + get_frame_extra_info (get_next_frame (fi
))->framesize
);
1048 /* Determine whether or not we're in a sigtramp frame.
1049 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1050 == SIGTRAMP_FRAME) because this value is sometimes set after
1051 invoking DEPRECATED_INIT_EXTRA_FRAME_INFO. So we test *both*
1052 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1053 determine if we need to use the sigcontext addresses for the
1056 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1057 against the name of the function, the code below will have to be
1058 changed to first fetch the name of the function and then pass
1059 this name to PC_IN_SIGTRAMP. */
1061 /* FIXME: cagney/2002-11-18: This problem will go away once
1062 frame.c:get_prev_frame() is modified to set the frame's type
1063 before calling functions like this. */
1065 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1066 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1068 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1069 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1071 /* FIXME: What about thumb mode? */
1072 get_frame_extra_info (fi
)->framereg
= ARM_SP_REGNUM
;
1073 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[get_frame_extra_info (fi
)->framereg
], REGISTER_RAW_SIZE (get_frame_extra_info (fi
)->framereg
)));
1074 get_frame_extra_info (fi
)->framesize
= 0;
1075 get_frame_extra_info (fi
)->frameoffset
= 0;
1080 arm_scan_prologue (fi
);
1082 if (!get_next_frame (fi
))
1083 /* This is the innermost frame? */
1084 deprecated_update_frame_base_hack (fi
, read_register (get_frame_extra_info (fi
)->framereg
));
1085 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1086 /* Next inner most frame is a dummy, just grab its frame.
1087 Dummy frames always have the same FP as their caller. */
1088 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
1089 else if (get_frame_extra_info (fi
)->framereg
== ARM_FP_REGNUM
1090 || get_frame_extra_info (fi
)->framereg
== THUMB_FP_REGNUM
)
1092 /* not the innermost frame */
1093 /* If we have an FP, the callee saved it. */
1094 if (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
] != 0)
1095 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[get_frame_extra_info (fi
)->framereg
], 4));
1097 /* If we were called by a frameless fn. then our frame is
1098 still in the frame pointer register on the board... */
1099 deprecated_update_frame_base_hack (fi
, deprecated_read_fp ());
1102 /* Calculate actual addresses of saved registers using offsets
1103 determined by arm_scan_prologue. */
1104 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1105 if (get_frame_saved_regs (fi
)[reg
] != 0)
1106 get_frame_saved_regs (fi
)[reg
]
1107 += (get_frame_base (fi
)
1108 + get_frame_extra_info (fi
)->framesize
1109 - get_frame_extra_info (fi
)->frameoffset
);
1114 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1115 is saved in the stack anywhere, otherwise we get it from the
1118 The old definition of this function was a macro:
1119 #define FRAME_SAVED_PC(FRAME) \
1120 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1123 arm_frame_saved_pc (struct frame_info
*fi
)
1125 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1126 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1127 return deprecated_read_register_dummy (get_frame_pc (fi
),
1128 get_frame_base (fi
), ARM_PC_REGNUM
);
1130 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1131 (get_frame_base (fi
)
1132 - get_frame_extra_info (fi
)->frameoffset
),
1133 get_frame_base (fi
)))
1135 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1136 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1140 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1141 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1145 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1146 Examine the Program Status Register to decide which state we're in. */
1151 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1152 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1154 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1157 /* Store into a struct frame_saved_regs the addresses of the saved
1158 registers of frame described by FRAME_INFO. This includes special
1159 registers such as PC and FP saved in special ways in the stack
1160 frame. SP is even more special: the address we return for it IS
1161 the sp for the next frame. */
1164 arm_frame_init_saved_regs (struct frame_info
*fip
)
1167 if (get_frame_saved_regs (fip
))
1170 arm_init_extra_frame_info (0, fip
);
1173 /* Set the return address for a generic dummy frame. ARM uses the
1177 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1179 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1183 /* Push an empty stack frame, to record the current PC, etc. */
1186 arm_push_dummy_frame (void)
1188 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1189 CORE_ADDR sp
= old_sp
;
1190 CORE_ADDR fp
, prologue_start
;
1193 /* Push the two dummy prologue instructions in reverse order,
1194 so that they'll be in the correct low-to-high order in memory. */
1195 /* sub fp, ip, #4 */
1196 sp
= push_word (sp
, 0xe24cb004);
1197 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1198 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1200 /* Push a pointer to the dummy prologue + 12, because when stm
1201 instruction stores the PC, it stores the address of the stm
1202 instruction itself plus 12. */
1203 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1205 /* Push the processor status. */
1206 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1208 /* Push all 16 registers starting with r15. */
1209 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1210 sp
= push_word (sp
, read_register (regnum
));
1212 /* Update fp (for both Thumb and ARM) and sp. */
1213 write_register (ARM_FP_REGNUM
, fp
);
1214 write_register (THUMB_FP_REGNUM
, fp
);
1215 write_register (ARM_SP_REGNUM
, sp
);
1218 /* DEPRECATED_CALL_DUMMY_WORDS:
1219 This sequence of words is the instructions
1225 Note this is 12 bytes. */
1227 static LONGEST arm_call_dummy_words
[] =
1229 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1232 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1233 breakpoint to the proper address in the call dummy, so that
1234 `finish' after a stop in a call dummy works.
1236 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1237 optimal solution, but the call to arm_fix_call_dummy is immediately
1238 followed by a call to call_function_by_hand, which is the only
1239 function where call_dummy_breakpoint_offset is actually used. */
1243 arm_set_call_dummy_breakpoint_offset (void)
1245 if (caller_is_thumb
)
1246 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1248 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1251 /* Fix up the call dummy, based on whether the processor is currently
1252 in Thumb or ARM mode, and whether the target function is Thumb or
1253 ARM. There are three different situations requiring three
1256 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1257 been copied into the dummy parameter to this function.
1258 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1259 "mov pc,r4" instruction patched to be a "bx r4" instead.
1260 * Thumb calling anything: uses the Thumb dummy defined below, which
1261 works for calling both ARM and Thumb functions.
1263 All three call dummies expect to receive the target function
1264 address in R4, with the low bit set if it's a Thumb function. */
1267 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1268 struct value
**args
, struct type
*type
, int gcc_p
)
1270 static short thumb_dummy
[4] =
1272 0xf000, 0xf801, /* bl label */
1273 0xdf18, /* swi 24 */
1274 0x4720, /* label: bx r4 */
1276 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1278 /* Set flag indicating whether the current PC is in a Thumb function. */
1279 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1280 arm_set_call_dummy_breakpoint_offset ();
1282 /* If the target function is Thumb, set the low bit of the function
1283 address. And if the CPU is currently in ARM mode, patch the
1284 second instruction of call dummy to use a BX instruction to
1285 switch to Thumb mode. */
1286 target_is_thumb
= arm_pc_is_thumb (fun
);
1287 if (target_is_thumb
)
1290 if (!caller_is_thumb
)
1291 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1294 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1295 instead of the ARM one that's already been copied. This will
1296 work for both Thumb and ARM target functions. */
1297 if (caller_is_thumb
)
1301 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1303 for (i
= 0; i
< len
; i
++)
1305 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1306 p
+= sizeof (thumb_dummy
[0]);
1310 /* Put the target address in r4; the call dummy will copy this to
1312 write_register (4, fun
);
1315 /* Pop the current frame. So long as the frame info has been
1316 initialized properly (see arm_init_extra_frame_info), this code
1317 works for dummy frames as well as regular frames. I.e, there's no
1318 need to have a special case for dummy frames. */
1320 arm_pop_frame (void)
1323 struct frame_info
*frame
= get_current_frame ();
1324 CORE_ADDR old_SP
= (get_frame_base (frame
)
1325 - get_frame_extra_info (frame
)->frameoffset
1326 + get_frame_extra_info (frame
)->framesize
);
1328 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1329 get_frame_base (frame
),
1330 get_frame_base (frame
)))
1332 generic_pop_dummy_frame ();
1333 flush_cached_frames ();
1337 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1338 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1339 write_register (regnum
,
1340 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1341 REGISTER_RAW_SIZE (regnum
)));
1343 write_register (ARM_PC_REGNUM
, DEPRECATED_FRAME_SAVED_PC (frame
));
1344 write_register (ARM_SP_REGNUM
, old_SP
);
1346 flush_cached_frames ();
1349 /* When arguments must be pushed onto the stack, they go on in reverse
1350 order. The code below implements a FILO (stack) to do this. */
1355 struct stack_item
*prev
;
1359 static struct stack_item
*
1360 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1362 struct stack_item
*si
;
1363 si
= xmalloc (sizeof (struct stack_item
));
1364 si
->data
= xmalloc (len
);
1367 memcpy (si
->data
, contents
, len
);
1371 static struct stack_item
*
1372 pop_stack_item (struct stack_item
*si
)
1374 struct stack_item
*dead
= si
;
1381 /* We currently only support passing parameters in integer registers. This
1382 conforms with GCC's default model. Several other variants exist and
1383 we should probably support some of them based on the selected ABI. */
1386 arm_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1387 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1388 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1389 CORE_ADDR struct_addr
)
1394 struct stack_item
*si
= NULL
;
1396 /* Set the return address. For the ARM, the return breakpoint is
1397 always at BP_ADDR. */
1398 /* XXX Fix for Thumb. */
1399 regcache_cooked_write_unsigned (regcache
, ARM_LR_REGNUM
, bp_addr
);
1401 /* Walk through the list of args and determine how large a temporary
1402 stack is required. Need to take care here as structs may be
1403 passed on the stack, and we have to to push them. */
1406 argreg
= ARM_A1_REGNUM
;
1409 /* Some platforms require a double-word aligned stack. Make sure sp
1410 is correctly aligned before we start. We always do this even if
1411 it isn't really needed -- it can never hurt things. */
1412 sp
&= ~(CORE_ADDR
)(2 * DEPRECATED_REGISTER_SIZE
- 1);
1414 /* The struct_return pointer occupies the first parameter
1415 passing register. */
1419 fprintf_unfiltered (gdb_stdlog
, "struct return in %s = 0x%s\n",
1420 REGISTER_NAME (argreg
), paddr (struct_addr
));
1421 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
1425 for (argnum
= 0; argnum
< nargs
; argnum
++)
1428 struct type
*arg_type
;
1429 struct type
*target_type
;
1430 enum type_code typecode
;
1433 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1434 len
= TYPE_LENGTH (arg_type
);
1435 target_type
= TYPE_TARGET_TYPE (arg_type
);
1436 typecode
= TYPE_CODE (arg_type
);
1437 val
= VALUE_CONTENTS (args
[argnum
]);
1439 /* If the argument is a pointer to a function, and it is a
1440 Thumb function, create a LOCAL copy of the value and set
1441 the THUMB bit in it. */
1442 if (TYPE_CODE_PTR
== typecode
1443 && target_type
!= NULL
1444 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1446 CORE_ADDR regval
= extract_unsigned_integer (val
, len
);
1447 if (arm_pc_is_thumb (regval
))
1450 store_unsigned_integer (val
, len
, MAKE_THUMB_ADDR (regval
));
1454 /* Copy the argument to general registers or the stack in
1455 register-sized pieces. Large arguments are split between
1456 registers and stack. */
1459 int partial_len
= len
< DEPRECATED_REGISTER_SIZE
? len
: DEPRECATED_REGISTER_SIZE
;
1461 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1463 /* The argument is being passed in a general purpose
1465 CORE_ADDR regval
= extract_unsigned_integer (val
, partial_len
);
1467 fprintf_unfiltered (gdb_stdlog
, "arg %d in %s = 0x%s\n",
1468 argnum
, REGISTER_NAME (argreg
),
1469 phex (regval
, DEPRECATED_REGISTER_SIZE
));
1470 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1475 /* Push the arguments onto the stack. */
1477 fprintf_unfiltered (gdb_stdlog
, "arg %d @ sp + %d\n",
1479 si
= push_stack_item (si
, val
, DEPRECATED_REGISTER_SIZE
);
1480 nstack
+= DEPRECATED_REGISTER_SIZE
;
1487 /* If we have an odd number of words to push, then decrement the stack
1488 by one word now, so first stack argument will be dword aligned. */
1495 write_memory (sp
, si
->data
, si
->len
);
1496 si
= pop_stack_item (si
);
1499 /* Finally, update teh SP register. */
1500 regcache_cooked_write_unsigned (regcache
, ARM_SP_REGNUM
, sp
);
1506 print_fpu_flags (int flags
)
1508 if (flags
& (1 << 0))
1509 fputs ("IVO ", stdout
);
1510 if (flags
& (1 << 1))
1511 fputs ("DVZ ", stdout
);
1512 if (flags
& (1 << 2))
1513 fputs ("OFL ", stdout
);
1514 if (flags
& (1 << 3))
1515 fputs ("UFL ", stdout
);
1516 if (flags
& (1 << 4))
1517 fputs ("INX ", stdout
);
1521 /* Print interesting information about the floating point processor
1522 (if present) or emulator. */
1524 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1525 struct frame_info
*frame
, const char *args
)
1527 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1530 type
= (status
>> 24) & 127;
1531 printf ("%s FPU type %d\n",
1532 (status
& (1 << 31)) ? "Hardware" : "Software",
1534 fputs ("mask: ", stdout
);
1535 print_fpu_flags (status
>> 16);
1536 fputs ("flags: ", stdout
);
1537 print_fpu_flags (status
);
1540 /* Return the GDB type object for the "standard" data type of data in
1543 static struct type
*
1544 arm_register_type (int regnum
)
1546 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1548 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1549 return builtin_type_arm_ext_big
;
1551 return builtin_type_arm_ext_littlebyte_bigword
;
1554 return builtin_type_int32
;
1557 /* Index within `registers' of the first byte of the space for
1561 arm_register_byte (int regnum
)
1563 if (regnum
< ARM_F0_REGNUM
)
1564 return regnum
* INT_REGISTER_RAW_SIZE
;
1565 else if (regnum
< ARM_PS_REGNUM
)
1566 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1567 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1569 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1570 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1571 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1574 /* Number of bytes of storage in the actual machine representation for
1575 register N. All registers are 4 bytes, except fp0 - fp7, which are
1576 12 bytes in length. */
1579 arm_register_raw_size (int regnum
)
1581 if (regnum
< ARM_F0_REGNUM
)
1582 return INT_REGISTER_RAW_SIZE
;
1583 else if (regnum
< ARM_FPS_REGNUM
)
1584 return FP_REGISTER_RAW_SIZE
;
1586 return STATUS_REGISTER_SIZE
;
1589 /* Number of bytes of storage in a program's representation
1592 arm_register_virtual_size (int regnum
)
1594 if (regnum
< ARM_F0_REGNUM
)
1595 return INT_REGISTER_VIRTUAL_SIZE
;
1596 else if (regnum
< ARM_FPS_REGNUM
)
1597 return FP_REGISTER_VIRTUAL_SIZE
;
1599 return STATUS_REGISTER_SIZE
;
1602 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1604 arm_register_sim_regno (int regnum
)
1607 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1609 if (reg
< NUM_GREGS
)
1610 return SIM_ARM_R0_REGNUM
+ reg
;
1613 if (reg
< NUM_FREGS
)
1614 return SIM_ARM_FP0_REGNUM
+ reg
;
1617 if (reg
< NUM_SREGS
)
1618 return SIM_ARM_FPS_REGNUM
+ reg
;
1621 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1624 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1625 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1626 It is thought that this is is the floating-point register format on
1627 little-endian systems. */
1630 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1634 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1635 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1637 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1639 floatformat_from_doublest (fmt
, &d
, dbl
);
1643 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1646 floatformat_to_doublest (fmt
, ptr
, &d
);
1647 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1648 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1650 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1655 condition_true (unsigned long cond
, unsigned long status_reg
)
1657 if (cond
== INST_AL
|| cond
== INST_NV
)
1663 return ((status_reg
& FLAG_Z
) != 0);
1665 return ((status_reg
& FLAG_Z
) == 0);
1667 return ((status_reg
& FLAG_C
) != 0);
1669 return ((status_reg
& FLAG_C
) == 0);
1671 return ((status_reg
& FLAG_N
) != 0);
1673 return ((status_reg
& FLAG_N
) == 0);
1675 return ((status_reg
& FLAG_V
) != 0);
1677 return ((status_reg
& FLAG_V
) == 0);
1679 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1681 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1683 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1685 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1687 return (((status_reg
& FLAG_Z
) == 0) &&
1688 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1690 return (((status_reg
& FLAG_Z
) != 0) ||
1691 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1696 /* Support routines for single stepping. Calculate the next PC value. */
1697 #define submask(x) ((1L << ((x) + 1)) - 1)
1698 #define bit(obj,st) (((obj) >> (st)) & 1)
1699 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1700 #define sbits(obj,st,fn) \
1701 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1702 #define BranchDest(addr,instr) \
1703 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1706 static unsigned long
1707 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1708 unsigned long status_reg
)
1710 unsigned long res
, shift
;
1711 int rm
= bits (inst
, 0, 3);
1712 unsigned long shifttype
= bits (inst
, 5, 6);
1716 int rs
= bits (inst
, 8, 11);
1717 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1720 shift
= bits (inst
, 7, 11);
1723 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1724 + (bit (inst
, 4) ? 12 : 8))
1725 : read_register (rm
));
1730 res
= shift
>= 32 ? 0 : res
<< shift
;
1734 res
= shift
>= 32 ? 0 : res
>> shift
;
1740 res
= ((res
& 0x80000000L
)
1741 ? ~((~res
) >> shift
) : res
>> shift
);
1744 case 3: /* ROR/RRX */
1747 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1749 res
= (res
>> shift
) | (res
<< (32 - shift
));
1753 return res
& 0xffffffff;
1756 /* Return number of 1-bits in VAL. */
1759 bitcount (unsigned long val
)
1762 for (nbits
= 0; val
!= 0; nbits
++)
1763 val
&= val
- 1; /* delete rightmost 1-bit in val */
1768 thumb_get_next_pc (CORE_ADDR pc
)
1770 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1771 unsigned short inst1
= read_memory_integer (pc
, 2);
1772 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1773 unsigned long offset
;
1775 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1779 /* Fetch the saved PC from the stack. It's stored above
1780 all of the other registers. */
1781 offset
= bitcount (bits (inst1
, 0, 7)) * DEPRECATED_REGISTER_SIZE
;
1782 sp
= read_register (ARM_SP_REGNUM
);
1783 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1784 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1786 error ("Infinite loop detected");
1788 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1790 unsigned long status
= read_register (ARM_PS_REGNUM
);
1791 unsigned long cond
= bits (inst1
, 8, 11);
1792 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1793 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1795 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1797 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1799 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1801 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1802 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1803 nextpc
= pc_val
+ offset
;
1810 arm_get_next_pc (CORE_ADDR pc
)
1812 unsigned long pc_val
;
1813 unsigned long this_instr
;
1814 unsigned long status
;
1817 if (arm_pc_is_thumb (pc
))
1818 return thumb_get_next_pc (pc
);
1820 pc_val
= (unsigned long) pc
;
1821 this_instr
= read_memory_integer (pc
, 4);
1822 status
= read_register (ARM_PS_REGNUM
);
1823 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1825 if (condition_true (bits (this_instr
, 28, 31), status
))
1827 switch (bits (this_instr
, 24, 27))
1830 case 0x1: /* data processing */
1834 unsigned long operand1
, operand2
, result
= 0;
1838 if (bits (this_instr
, 12, 15) != 15)
1841 if (bits (this_instr
, 22, 25) == 0
1842 && bits (this_instr
, 4, 7) == 9) /* multiply */
1843 error ("Illegal update to pc in instruction");
1845 /* Multiply into PC */
1846 c
= (status
& FLAG_C
) ? 1 : 0;
1847 rn
= bits (this_instr
, 16, 19);
1848 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1850 if (bit (this_instr
, 25))
1852 unsigned long immval
= bits (this_instr
, 0, 7);
1853 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1854 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1857 else /* operand 2 is a shifted register */
1858 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1860 switch (bits (this_instr
, 21, 24))
1863 result
= operand1
& operand2
;
1867 result
= operand1
^ operand2
;
1871 result
= operand1
- operand2
;
1875 result
= operand2
- operand1
;
1879 result
= operand1
+ operand2
;
1883 result
= operand1
+ operand2
+ c
;
1887 result
= operand1
- operand2
+ c
;
1891 result
= operand2
- operand1
+ c
;
1897 case 0xb: /* tst, teq, cmp, cmn */
1898 result
= (unsigned long) nextpc
;
1902 result
= operand1
| operand2
;
1906 /* Always step into a function. */
1911 result
= operand1
& ~operand2
;
1918 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1921 error ("Infinite loop detected");
1926 case 0x5: /* data transfer */
1929 if (bit (this_instr
, 20))
1932 if (bits (this_instr
, 12, 15) == 15)
1938 if (bit (this_instr
, 22))
1939 error ("Illegal update to pc in instruction");
1941 /* byte write to PC */
1942 rn
= bits (this_instr
, 16, 19);
1943 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1944 if (bit (this_instr
, 24))
1947 int c
= (status
& FLAG_C
) ? 1 : 0;
1948 unsigned long offset
=
1949 (bit (this_instr
, 25)
1950 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1951 : bits (this_instr
, 0, 11));
1953 if (bit (this_instr
, 23))
1958 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1961 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1964 error ("Infinite loop detected");
1970 case 0x9: /* block transfer */
1971 if (bit (this_instr
, 20))
1974 if (bit (this_instr
, 15))
1979 if (bit (this_instr
, 23))
1982 unsigned long reglist
= bits (this_instr
, 0, 14);
1983 offset
= bitcount (reglist
) * 4;
1984 if (bit (this_instr
, 24)) /* pre */
1987 else if (bit (this_instr
, 24))
1991 unsigned long rn_val
=
1992 read_register (bits (this_instr
, 16, 19));
1994 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
1998 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2000 error ("Infinite loop detected");
2005 case 0xb: /* branch & link */
2006 case 0xa: /* branch */
2008 nextpc
= BranchDest (pc
, this_instr
);
2010 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2012 error ("Infinite loop detected");
2018 case 0xe: /* coproc ops */
2023 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2031 /* single_step() is called just before we want to resume the inferior,
2032 if we want to single-step it but there is no hardware or kernel
2033 single-step support. We find the target of the coming instruction
2036 single_step() is also called just after the inferior stops. If we
2037 had set up a simulated single-step, we undo our damage. */
2040 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2042 static int next_pc
; /* State between setting and unsetting. */
2043 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2047 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2048 target_insert_breakpoint (next_pc
, break_mem
);
2051 target_remove_breakpoint (next_pc
, break_mem
);
2054 #include "bfd-in2.h"
2055 #include "libcoff.h"
2058 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2060 if (arm_pc_is_thumb (memaddr
))
2062 static asymbol
*asym
;
2063 static combined_entry_type ce
;
2064 static struct coff_symbol_struct csym
;
2065 static struct bfd fake_bfd
;
2066 static bfd_target fake_target
;
2068 if (csym
.native
== NULL
)
2070 /* Create a fake symbol vector containing a Thumb symbol.
2071 This is solely so that the code in print_insn_little_arm()
2072 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2073 the presence of a Thumb symbol and switch to decoding
2074 Thumb instructions. */
2076 fake_target
.flavour
= bfd_target_coff_flavour
;
2077 fake_bfd
.xvec
= &fake_target
;
2078 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2080 csym
.symbol
.the_bfd
= &fake_bfd
;
2081 csym
.symbol
.name
= "fake";
2082 asym
= (asymbol
*) & csym
;
2085 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2086 info
->symbols
= &asym
;
2089 info
->symbols
= NULL
;
2091 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2092 return print_insn_big_arm (memaddr
, info
);
2094 return print_insn_little_arm (memaddr
, info
);
2097 /* The following define instruction sequences that will cause ARM
2098 cpu's to take an undefined instruction trap. These are used to
2099 signal a breakpoint to GDB.
2101 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2102 modes. A different instruction is required for each mode. The ARM
2103 cpu's can also be big or little endian. Thus four different
2104 instructions are needed to support all cases.
2106 Note: ARMv4 defines several new instructions that will take the
2107 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2108 not in fact add the new instructions. The new undefined
2109 instructions in ARMv4 are all instructions that had no defined
2110 behaviour in earlier chips. There is no guarantee that they will
2111 raise an exception, but may be treated as NOP's. In practice, it
2112 may only safe to rely on instructions matching:
2114 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2115 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2116 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2118 Even this may only true if the condition predicate is true. The
2119 following use a condition predicate of ALWAYS so it is always TRUE.
2121 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2122 and NetBSD all use a software interrupt rather than an undefined
2123 instruction to force a trap. This can be handled by by the
2124 abi-specific code during establishment of the gdbarch vector. */
2127 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2128 override these definitions. */
2129 #ifndef ARM_LE_BREAKPOINT
2130 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2132 #ifndef ARM_BE_BREAKPOINT
2133 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2135 #ifndef THUMB_LE_BREAKPOINT
2136 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2138 #ifndef THUMB_BE_BREAKPOINT
2139 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2142 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2143 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2144 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2145 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2147 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2148 the program counter value to determine whether a 16-bit or 32-bit
2149 breakpoint should be used. It returns a pointer to a string of
2150 bytes that encode a breakpoint instruction, stores the length of
2151 the string to *lenptr, and adjusts the program counter (if
2152 necessary) to point to the actual memory location where the
2153 breakpoint should be inserted. */
2155 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2156 breakpoints and storing their handles instread of what was in
2157 memory. It is nice that this is the same size as a handle -
2158 otherwise remote-rdp will have to change. */
2160 static const unsigned char *
2161 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2163 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2165 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2167 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2168 *lenptr
= tdep
->thumb_breakpoint_size
;
2169 return tdep
->thumb_breakpoint
;
2173 *lenptr
= tdep
->arm_breakpoint_size
;
2174 return tdep
->arm_breakpoint
;
2178 /* Extract from an array REGBUF containing the (raw) register state a
2179 function return value of type TYPE, and copy that, in virtual
2180 format, into VALBUF. */
2183 arm_extract_return_value (struct type
*type
,
2184 struct regcache
*regs
,
2187 bfd_byte
*valbuf
= dst
;
2189 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2191 switch (arm_get_fp_model (current_gdbarch
))
2195 /* The value is in register F0 in internal format. We need to
2196 extract the raw value and then convert it to the desired
2198 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2200 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2201 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2206 case ARM_FLOAT_SOFT_FPA
:
2207 case ARM_FLOAT_SOFT_VFP
:
2208 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2209 if (TYPE_LENGTH (type
) > 4)
2210 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2211 valbuf
+ INT_REGISTER_RAW_SIZE
);
2216 (__FILE__
, __LINE__
,
2217 "arm_extract_return_value: Floating point model not supported");
2221 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2222 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2223 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2224 || TYPE_CODE (type
) == TYPE_CODE_PTR
2225 || TYPE_CODE (type
) == TYPE_CODE_REF
2226 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2228 /* If the the type is a plain integer, then the access is
2229 straight-forward. Otherwise we have to play around a bit more. */
2230 int len
= TYPE_LENGTH (type
);
2231 int regno
= ARM_A1_REGNUM
;
2236 /* By using store_unsigned_integer we avoid having to do
2237 anything special for small big-endian values. */
2238 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2239 store_unsigned_integer (valbuf
,
2240 (len
> INT_REGISTER_RAW_SIZE
2241 ? INT_REGISTER_RAW_SIZE
: len
),
2243 len
-= INT_REGISTER_RAW_SIZE
;
2244 valbuf
+= INT_REGISTER_RAW_SIZE
;
2249 /* For a structure or union the behaviour is as if the value had
2250 been stored to word-aligned memory and then loaded into
2251 registers with 32-bit load instruction(s). */
2252 int len
= TYPE_LENGTH (type
);
2253 int regno
= ARM_A1_REGNUM
;
2254 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2258 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2259 memcpy (valbuf
, tmpbuf
,
2260 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2261 len
-= INT_REGISTER_RAW_SIZE
;
2262 valbuf
+= INT_REGISTER_RAW_SIZE
;
2267 /* Extract from an array REGBUF containing the (raw) register state
2268 the address in which a function should return its structure value. */
2271 arm_extract_struct_value_address (struct regcache
*regcache
)
2275 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2279 /* Will a function return an aggregate type in memory or in a
2280 register? Return 0 if an aggregate type can be returned in a
2281 register, 1 if it must be returned in memory. */
2284 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2287 register enum type_code code
;
2289 /* In the ARM ABI, "integer" like aggregate types are returned in
2290 registers. For an aggregate type to be integer like, its size
2291 must be less than or equal to DEPRECATED_REGISTER_SIZE and the
2292 offset of each addressable subfield must be zero. Note that bit
2293 fields are not addressable, and all addressable subfields of
2294 unions always start at offset zero.
2296 This function is based on the behaviour of GCC 2.95.1.
2297 See: gcc/arm.c: arm_return_in_memory() for details.
2299 Note: All versions of GCC before GCC 2.95.2 do not set up the
2300 parameters correctly for a function returning the following
2301 structure: struct { float f;}; This should be returned in memory,
2302 not a register. Richard Earnshaw sent me a patch, but I do not
2303 know of any way to detect if a function like the above has been
2304 compiled with the correct calling convention. */
2306 /* All aggregate types that won't fit in a register must be returned
2308 if (TYPE_LENGTH (type
) > DEPRECATED_REGISTER_SIZE
)
2313 /* The only aggregate types that can be returned in a register are
2314 structs and unions. Arrays must be returned in memory. */
2315 code
= TYPE_CODE (type
);
2316 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2321 /* Assume all other aggregate types can be returned in a register.
2322 Run a check for structures, unions and arrays. */
2325 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2328 /* Need to check if this struct/union is "integer" like. For
2329 this to be true, its size must be less than or equal to
2330 DEPRECATED_REGISTER_SIZE and the offset of each addressable
2331 subfield must be zero. Note that bit fields are not
2332 addressable, and unions always start at offset zero. If any
2333 of the subfields is a floating point type, the struct/union
2334 cannot be an integer type. */
2336 /* For each field in the object, check:
2337 1) Is it FP? --> yes, nRc = 1;
2338 2) Is it addressable (bitpos != 0) and
2339 not packed (bitsize == 0)?
2343 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2345 enum type_code field_type_code
;
2346 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2348 /* Is it a floating point type field? */
2349 if (field_type_code
== TYPE_CODE_FLT
)
2355 /* If bitpos != 0, then we have to care about it. */
2356 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2358 /* Bitfields are not addressable. If the field bitsize is
2359 zero, then the field is not packed. Hence it cannot be
2360 a bitfield or any other packed type. */
2361 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2373 /* Write into appropriate registers a function return value of type
2374 TYPE, given in virtual format. */
2377 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2380 const bfd_byte
*valbuf
= src
;
2382 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2384 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2386 switch (arm_get_fp_model (current_gdbarch
))
2390 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2391 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2394 case ARM_FLOAT_SOFT_FPA
:
2395 case ARM_FLOAT_SOFT_VFP
:
2396 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2397 if (TYPE_LENGTH (type
) > 4)
2398 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2399 valbuf
+ INT_REGISTER_RAW_SIZE
);
2404 (__FILE__
, __LINE__
,
2405 "arm_store_return_value: Floating point model not supported");
2409 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2410 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2411 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2412 || TYPE_CODE (type
) == TYPE_CODE_PTR
2413 || TYPE_CODE (type
) == TYPE_CODE_REF
2414 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2416 if (TYPE_LENGTH (type
) <= 4)
2418 /* Values of one word or less are zero/sign-extended and
2420 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2421 LONGEST val
= unpack_long (type
, valbuf
);
2423 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2424 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2428 /* Integral values greater than one word are stored in consecutive
2429 registers starting with r0. This will always be a multiple of
2430 the regiser size. */
2431 int len
= TYPE_LENGTH (type
);
2432 int regno
= ARM_A1_REGNUM
;
2436 regcache_cooked_write (regs
, regno
++, valbuf
);
2437 len
-= INT_REGISTER_RAW_SIZE
;
2438 valbuf
+= INT_REGISTER_RAW_SIZE
;
2444 /* For a structure or union the behaviour is as if the value had
2445 been stored to word-aligned memory and then loaded into
2446 registers with 32-bit load instruction(s). */
2447 int len
= TYPE_LENGTH (type
);
2448 int regno
= ARM_A1_REGNUM
;
2449 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2453 memcpy (tmpbuf
, valbuf
,
2454 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2455 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2456 len
-= INT_REGISTER_RAW_SIZE
;
2457 valbuf
+= INT_REGISTER_RAW_SIZE
;
2463 arm_get_longjmp_target (CORE_ADDR
*pc
)
2466 char buf
[INT_REGISTER_RAW_SIZE
];
2467 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2469 jb_addr
= read_register (ARM_A1_REGNUM
);
2471 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2472 INT_REGISTER_RAW_SIZE
))
2475 *pc
= extract_unsigned_integer (buf
, INT_REGISTER_RAW_SIZE
);
2479 /* Return non-zero if the PC is inside a thumb call thunk. */
2482 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2484 CORE_ADDR start_addr
;
2486 /* Find the starting address of the function containing the PC. If
2487 the caller didn't give us a name, look it up at the same time. */
2488 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2492 return strncmp (name
, "_call_via_r", 11) == 0;
2495 /* If PC is in a Thumb call or return stub, return the address of the
2496 target PC, which is in a register. The thunk functions are called
2497 _called_via_xx, where x is the register name. The possible names
2498 are r0-r9, sl, fp, ip, sp, and lr. */
2501 arm_skip_stub (CORE_ADDR pc
)
2504 CORE_ADDR start_addr
;
2506 /* Find the starting address and name of the function containing the PC. */
2507 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2510 /* Call thunks always start with "_call_via_". */
2511 if (strncmp (name
, "_call_via_", 10) == 0)
2513 /* Use the name suffix to determine which register contains the
2515 static char *table
[15] =
2516 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2517 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2521 for (regno
= 0; regno
<= 14; regno
++)
2522 if (strcmp (&name
[10], table
[regno
]) == 0)
2523 return read_register (regno
);
2526 return 0; /* not a stub */
2530 set_arm_command (char *args
, int from_tty
)
2532 printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
2533 help_list (setarmcmdlist
, "set arm ", all_commands
, gdb_stdout
);
2537 show_arm_command (char *args
, int from_tty
)
2539 cmd_show_list (showarmcmdlist
, from_tty
, "");
2542 enum arm_float_model
2543 arm_get_fp_model (struct gdbarch
*gdbarch
)
2545 if (arm_fp_model
== ARM_FLOAT_AUTO
)
2546 return gdbarch_tdep (gdbarch
)->fp_model
;
2548 return arm_fp_model
;
2552 arm_set_fp (struct gdbarch
*gdbarch
)
2554 enum arm_float_model fp_model
= arm_get_fp_model (gdbarch
);
2556 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
2557 && (fp_model
== ARM_FLOAT_SOFT_FPA
|| fp_model
== ARM_FLOAT_FPA
))
2559 set_gdbarch_double_format (gdbarch
,
2560 &floatformat_ieee_double_littlebyte_bigword
);
2561 set_gdbarch_long_double_format
2562 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
2566 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2567 set_gdbarch_long_double_format (gdbarch
,
2568 &floatformat_ieee_double_little
);
2573 set_fp_model_sfunc (char *args
, int from_tty
,
2574 struct cmd_list_element
*c
)
2576 enum arm_float_model fp_model
;
2578 for (fp_model
= ARM_FLOAT_AUTO
; fp_model
!= ARM_FLOAT_LAST
; fp_model
++)
2579 if (strcmp (current_fp_model
, fp_model_strings
[fp_model
]) == 0)
2581 arm_fp_model
= fp_model
;
2585 if (fp_model
== ARM_FLOAT_LAST
)
2586 internal_error (__FILE__
, __LINE__
, "Invalid fp model accepted: %s.",
2589 if (gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2590 arm_set_fp (current_gdbarch
);
2594 show_fp_model (char *args
, int from_tty
,
2595 struct cmd_list_element
*c
)
2597 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2599 if (arm_fp_model
== ARM_FLOAT_AUTO
2600 && gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2601 printf_filtered (" - the default for the current ABI is \"%s\".\n",
2602 fp_model_strings
[tdep
->fp_model
]);
2605 /* If the user changes the register disassembly style used for info
2606 register and other commands, we have to also switch the style used
2607 in opcodes for disassembly output. This function is run in the "set
2608 arm disassembly" command, and does that. */
2611 set_disassembly_style_sfunc (char *args
, int from_tty
,
2612 struct cmd_list_element
*c
)
2614 set_disassembly_style ();
2617 /* Return the ARM register name corresponding to register I. */
2619 arm_register_name (int i
)
2621 return arm_register_names
[i
];
2625 set_disassembly_style (void)
2627 const char *setname
, *setdesc
, **regnames
;
2630 /* Find the style that the user wants in the opcodes table. */
2632 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2633 while ((disassembly_style
!= setname
)
2634 && (current
< num_disassembly_options
))
2635 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2636 current_option
= current
;
2638 /* Fill our copy. */
2639 for (j
= 0; j
< numregs
; j
++)
2640 arm_register_names
[j
] = (char *) regnames
[j
];
2643 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2645 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2646 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2650 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2651 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2654 /* Synchronize the disassembler. */
2655 set_arm_regname_option (current
);
2658 /* arm_othernames implements the "othernames" command. This is deprecated
2659 by the "set arm disassembly" command. */
2662 arm_othernames (char *names
, int n
)
2664 /* Circle through the various flavors. */
2665 current_option
= (current_option
+ 1) % num_disassembly_options
;
2667 disassembly_style
= valid_disassembly_styles
[current_option
];
2668 set_disassembly_style ();
2671 /* Fetch, and possibly build, an appropriate link_map_offsets structure
2672 for ARM linux targets using the struct offsets defined in <link.h>.
2673 Note, however, that link.h is not actually referred to in this file.
2674 Instead, the relevant structs offsets were obtained from examining
2675 link.h. (We can't refer to link.h from this file because the host
2676 system won't necessarily have it, or if it does, the structs which
2677 it defines will refer to the host system, not the target). */
2679 struct link_map_offsets
*
2680 arm_linux_svr4_fetch_link_map_offsets (void)
2682 static struct link_map_offsets lmo
;
2683 static struct link_map_offsets
*lmp
= 0;
2689 lmo
.r_debug_size
= 8; /* Actual size is 20, but this is all we
2692 lmo
.r_map_offset
= 4;
2695 lmo
.link_map_size
= 20; /* Actual size is 552, but this is all we
2698 lmo
.l_addr_offset
= 0;
2699 lmo
.l_addr_size
= 4;
2701 lmo
.l_name_offset
= 4;
2702 lmo
.l_name_size
= 4;
2704 lmo
.l_next_offset
= 12;
2705 lmo
.l_next_size
= 4;
2707 lmo
.l_prev_offset
= 16;
2708 lmo
.l_prev_size
= 4;
2714 /* Test whether the coff symbol specific value corresponds to a Thumb
2718 coff_sym_is_thumb (int val
)
2720 return (val
== C_THUMBEXT
||
2721 val
== C_THUMBSTAT
||
2722 val
== C_THUMBEXTFUNC
||
2723 val
== C_THUMBSTATFUNC
||
2724 val
== C_THUMBLABEL
);
2727 /* arm_coff_make_msymbol_special()
2728 arm_elf_make_msymbol_special()
2730 These functions test whether the COFF or ELF symbol corresponds to
2731 an address in thumb code, and set a "special" bit in a minimal
2732 symbol to indicate that it does. */
2735 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2737 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2739 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2741 MSYMBOL_SET_SPECIAL (msym
);
2745 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2747 if (coff_sym_is_thumb (val
))
2748 MSYMBOL_SET_SPECIAL (msym
);
2752 static enum gdb_osabi
2753 arm_elf_osabi_sniffer (bfd
*abfd
)
2755 unsigned int elfosabi
, eflags
;
2756 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2758 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2763 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2764 file are conforming to the base specification for that machine
2765 (there are no OS-specific extensions). In order to determine the
2766 real OS in use we must look for OS notes that have been added. */
2767 bfd_map_over_sections (abfd
,
2768 generic_elf_osabi_sniff_abi_tag_sections
,
2770 if (osabi
== GDB_OSABI_UNKNOWN
)
2772 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2773 field for more information. */
2774 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2777 case EF_ARM_EABI_VER1
:
2778 osabi
= GDB_OSABI_ARM_EABI_V1
;
2781 case EF_ARM_EABI_VER2
:
2782 osabi
= GDB_OSABI_ARM_EABI_V2
;
2785 case EF_ARM_EABI_UNKNOWN
:
2786 /* Assume GNU tools. */
2787 osabi
= GDB_OSABI_ARM_APCS
;
2791 internal_error (__FILE__
, __LINE__
,
2792 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2793 "version 0x%x", eflags
);
2799 /* GNU tools use this value. Check note sections in this case,
2801 bfd_map_over_sections (abfd
,
2802 generic_elf_osabi_sniff_abi_tag_sections
,
2804 if (osabi
== GDB_OSABI_UNKNOWN
)
2806 /* Assume APCS ABI. */
2807 osabi
= GDB_OSABI_ARM_APCS
;
2811 case ELFOSABI_FREEBSD
:
2812 osabi
= GDB_OSABI_FREEBSD_ELF
;
2815 case ELFOSABI_NETBSD
:
2816 osabi
= GDB_OSABI_NETBSD_ELF
;
2819 case ELFOSABI_LINUX
:
2820 osabi
= GDB_OSABI_LINUX
;
2828 /* Initialize the current architecture based on INFO. If possible,
2829 re-use an architecture from ARCHES, which is a list of
2830 architectures already created during this debugging session.
2832 Called e.g. at program startup, when reading a core file, and when
2833 reading a binary file. */
2835 static struct gdbarch
*
2836 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2838 struct gdbarch_tdep
*tdep
;
2839 struct gdbarch
*gdbarch
;
2841 /* Try to deterimine the ABI of the object we are loading. */
2843 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2845 switch (bfd_get_flavour (info
.abfd
))
2847 case bfd_target_aout_flavour
:
2848 /* Assume it's an old APCS-style ABI. */
2849 info
.osabi
= GDB_OSABI_ARM_APCS
;
2852 case bfd_target_coff_flavour
:
2853 /* Assume it's an old APCS-style ABI. */
2855 info
.osabi
= GDB_OSABI_ARM_APCS
;
2859 /* Leave it as "unknown". */
2864 /* If there is already a candidate, use it. */
2865 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2867 return arches
->gdbarch
;
2869 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2870 gdbarch
= gdbarch_alloc (&info
, tdep
);
2872 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2873 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2874 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2876 /* We used to default to FPA for generic ARM, but almost nobody uses that
2877 now, and we now provide a way for the user to force the model. So
2878 default to the most useful variant. */
2879 tdep
->fp_model
= ARM_FLOAT_SOFT_FPA
;
2882 switch (info
.byte_order
)
2884 case BFD_ENDIAN_BIG
:
2885 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2886 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2887 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2888 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2892 case BFD_ENDIAN_LITTLE
:
2893 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2894 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2895 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2896 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2901 internal_error (__FILE__
, __LINE__
,
2902 "arm_gdbarch_init: bad byte order for float format");
2905 /* On ARM targets char defaults to unsigned. */
2906 set_gdbarch_char_signed (gdbarch
, 0);
2908 /* This should be low enough for everything. */
2909 tdep
->lowest_pc
= 0x20;
2910 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2912 set_gdbarch_deprecated_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2913 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, 0);
2915 set_gdbarch_push_dummy_call (gdbarch
, arm_push_dummy_call
);
2917 /* Frame handling. */
2918 set_gdbarch_deprecated_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2919 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2920 set_gdbarch_deprecated_target_read_fp (gdbarch
, arm_read_fp
);
2921 set_gdbarch_deprecated_frame_chain (gdbarch
, arm_frame_chain
);
2922 set_gdbarch_frameless_function_invocation
2923 (gdbarch
, arm_frameless_function_invocation
);
2924 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2925 set_gdbarch_frame_args_skip (gdbarch
, 0);
2926 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2927 set_gdbarch_deprecated_pop_frame (gdbarch
, arm_pop_frame
);
2929 /* Address manipulation. */
2930 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2931 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2933 /* Offset from address of function to start of its code. */
2934 set_gdbarch_function_start_offset (gdbarch
, 0);
2936 /* Advance PC across function entry code. */
2937 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2939 /* Get the PC when a frame might not be available. */
2940 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2942 /* The stack grows downward. */
2943 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2945 /* Breakpoint manipulation. */
2946 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2947 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2949 /* Information about registers, etc. */
2950 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2951 set_gdbarch_deprecated_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2952 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2953 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2954 set_gdbarch_register_byte (gdbarch
, arm_register_byte
);
2955 set_gdbarch_deprecated_register_bytes (gdbarch
,
2956 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2957 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2958 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2959 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2960 set_gdbarch_register_raw_size (gdbarch
, arm_register_raw_size
);
2961 set_gdbarch_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2962 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2963 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2964 set_gdbarch_register_virtual_type (gdbarch
, arm_register_type
);
2966 /* Internal <-> external register number maps. */
2967 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2969 /* Integer registers are 4 bytes. */
2970 set_gdbarch_deprecated_register_size (gdbarch
, 4);
2971 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2973 /* Returning results. */
2974 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2975 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2976 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2977 set_gdbarch_extract_struct_value_address (gdbarch
,
2978 arm_extract_struct_value_address
);
2980 /* Single stepping. */
2981 /* XXX For an RDI target we should ask the target if it can single-step. */
2982 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
2985 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_arm
);
2987 /* Minsymbol frobbing. */
2988 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
2989 set_gdbarch_coff_make_msymbol_special (gdbarch
,
2990 arm_coff_make_msymbol_special
);
2992 /* Hook in the ABI-specific overrides, if they have been registered. */
2993 gdbarch_init_osabi (info
, gdbarch
);
2995 /* Now we have tuned the configuration, set a few final things,
2996 based on what the OS ABI has told us. */
2998 if (tdep
->jb_pc
>= 0)
2999 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
3001 /* Floating point sizes and format. */
3002 switch (info
.byte_order
)
3004 case BFD_ENDIAN_BIG
:
3005 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
3006 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
3007 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
3011 case BFD_ENDIAN_LITTLE
:
3012 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
3013 arm_set_fp (gdbarch
);
3017 internal_error (__FILE__
, __LINE__
,
3018 "arm_gdbarch_init: bad byte order for float format");
3025 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3027 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3032 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
3033 (unsigned long) tdep
->lowest_pc
);
3037 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
3038 struct gdbarch
*gdbarch
)
3044 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3045 struct gdbarch
*gdbarch
)
3051 arm_init_abi_apcs (struct gdbarch_info info
,
3052 struct gdbarch
*gdbarch
)
3058 _initialize_arm_tdep (void)
3060 struct ui_file
*stb
;
3062 struct cmd_list_element
*new_set
, *new_show
;
3063 const char *setname
;
3064 const char *setdesc
;
3065 const char **regnames
;
3067 static char *helptext
;
3070 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3072 /* Register an ELF OS ABI sniffer for ARM binaries. */
3073 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3074 bfd_target_elf_flavour
,
3075 arm_elf_osabi_sniffer
);
3077 /* Register some ABI variants for embedded systems. */
3078 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3079 arm_init_abi_eabi_v1
);
3080 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3081 arm_init_abi_eabi_v2
);
3082 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3085 /* Get the number of possible sets of register names defined in opcodes. */
3086 num_disassembly_options
= get_arm_regname_num_options ();
3088 /* Add root prefix command for all "set arm"/"show arm" commands. */
3089 add_prefix_cmd ("arm", no_class
, set_arm_command
,
3090 "Various ARM-specific commands.",
3091 &setarmcmdlist
, "set arm ", 0, &setlist
);
3093 add_prefix_cmd ("arm", no_class
, show_arm_command
,
3094 "Various ARM-specific commands.",
3095 &showarmcmdlist
, "show arm ", 0, &showlist
);
3097 /* Sync the opcode insn printer with our register viewer. */
3098 parse_arm_disassembler_option ("reg-names-std");
3100 /* Begin creating the help text. */
3101 stb
= mem_fileopen ();
3102 fprintf_unfiltered (stb
, "Set the disassembly style.\n"
3103 "The valid values are:\n");
3105 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3106 valid_disassembly_styles
3107 = xmalloc ((num_disassembly_options
+ 1) * sizeof (char *));
3108 for (i
= 0; i
< num_disassembly_options
; i
++)
3110 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3111 valid_disassembly_styles
[i
] = setname
;
3112 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3114 /* Copy the default names (if found) and synchronize disassembler. */
3115 if (!strcmp (setname
, "std"))
3117 disassembly_style
= setname
;
3119 for (j
= 0; j
< numregs
; j
++)
3120 arm_register_names
[j
] = (char *) regnames
[j
];
3121 set_arm_regname_option (i
);
3124 /* Mark the end of valid options. */
3125 valid_disassembly_styles
[num_disassembly_options
] = NULL
;
3127 /* Finish the creation of the help text. */
3128 fprintf_unfiltered (stb
, "The default is \"std\".");
3129 helptext
= ui_file_xstrdup (stb
, &length
);
3130 ui_file_delete (stb
);
3132 /* Add the deprecated disassembly-flavor command. */
3133 new_set
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3134 valid_disassembly_styles
,
3138 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3139 deprecate_cmd (new_set
, "set arm disassembly");
3140 deprecate_cmd (add_show_from_set (new_set
, &showlist
),
3141 "show arm disassembly");
3143 /* And now add the new interface. */
3144 new_set
= add_set_enum_cmd ("disassembler", no_class
,
3145 valid_disassembly_styles
, &disassembly_style
,
3146 helptext
, &setarmcmdlist
);
3148 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3149 add_show_from_set (new_set
, &showarmcmdlist
);
3151 add_setshow_cmd_full ("apcs32", no_class
,
3152 var_boolean
, (char *) &arm_apcs_32
,
3153 "Set usage of ARM 32-bit mode.",
3154 "Show usage of ARM 32-bit mode.",
3156 &setlist
, &showlist
, &new_set
, &new_show
);
3157 deprecate_cmd (new_set
, "set arm apcs32");
3158 deprecate_cmd (new_show
, "show arm apcs32");
3160 add_setshow_boolean_cmd ("apcs32", no_class
, &arm_apcs_32
,
3161 "Set usage of ARM 32-bit mode. "
3162 "When off, a 26-bit PC will be used.",
3163 "Show usage of ARM 32-bit mode. "
3164 "When off, a 26-bit PC will be used.",
3166 &setarmcmdlist
, &showarmcmdlist
);
3168 /* Add a command to allow the user to force the FPU model. */
3169 new_set
= add_set_enum_cmd
3170 ("fpu", no_class
, fp_model_strings
, ¤t_fp_model
,
3171 "Set the floating point type.\n"
3172 "auto - Determine the FP typefrom the OS-ABI.\n"
3173 "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
3174 "fpa - FPA co-processor (GCC compiled).\n"
3175 "softvfp - Software FP with pure-endian doubles.\n"
3176 "vfp - VFP co-processor.",
3178 set_cmd_sfunc (new_set
, set_fp_model_sfunc
);
3179 set_cmd_sfunc (add_show_from_set (new_set
, &showarmcmdlist
), show_fp_model
);
3181 /* Add the deprecated "othernames" command. */
3182 deprecate_cmd (add_com ("othernames", class_obscure
, arm_othernames
,
3183 "Switch to the next set of register names."),
3184 "set arm disassembly");
3186 /* Debugging flag. */
3187 add_setshow_boolean_cmd ("arm", class_maintenance
, &arm_debug
,
3188 "Set ARM debugging. "
3189 "When on, arm-specific debugging is enabled.",
3190 "Show ARM debugging. "
3191 "When on, arm-specific debugging is enabled.",
3193 &setdebuglist
, &showdebuglist
);