1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register styles. */
35 #include "arch-utils.h"
39 #include "gdb/sim-arm.h"
42 #include "coff/internal.h"
45 #include "gdb_assert.h"
49 /* Each OS has a different mechanism for accessing the various
50 registers stored in the sigcontext structure.
52 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
53 function pointer) which may be used to determine the addresses
54 of the various saved registers in the sigcontext structure.
56 For the ARM target, there are three parameters to this function.
57 The first is the pc value of the frame under consideration, the
58 second the stack pointer of this frame, and the last is the
59 register number to fetch.
61 If the tm.h file does not define this macro, then it's assumed that
62 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
65 When it comes time to multi-arching this code, see the identically
66 named machinery in ia64-tdep.c for an example of how it could be
67 done. It should not be necessary to modify the code below where
68 this macro is used. */
70 #ifdef SIGCONTEXT_REGISTER_ADDRESS
71 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
72 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
75 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
76 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
79 /* Macros for setting and testing a bit in a minimal symbol that marks
80 it as Thumb function. The MSB of the minimal symbol's "info" field
81 is used for this purpose. This field is already being used to store
82 the symbol size, so the assumption is that the symbol size cannot
85 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
86 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
87 MSYMBOL_SIZE Returns the size of the minimal symbol,
88 i.e. the "info" field with the "special" bit
91 #define MSYMBOL_SET_SPECIAL(msym) \
92 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
95 #define MSYMBOL_IS_SPECIAL(msym) \
96 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
98 #define MSYMBOL_SIZE(msym) \
99 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
101 /* The list of available "set arm ..." and "show arm ..." commands. */
102 static struct cmd_list_element
*setarmcmdlist
= NULL
;
103 static struct cmd_list_element
*showarmcmdlist
= NULL
;
105 /* The type of floating-point to use. Keep this in sync with enum
106 arm_float_model, and the help string in _initialize_arm_tdep. */
107 static const char *fp_model_strings
[] =
116 /* A variable that can be configured by the user. */
117 static enum arm_float_model arm_fp_model
= ARM_FLOAT_AUTO
;
118 static const char *current_fp_model
= "auto";
120 /* Number of different reg name sets (options). */
121 static int num_disassembly_options
;
123 /* We have more registers than the disassembler as gdb can print the value
124 of special registers as well.
125 The general register names are overwritten by whatever is being used by
126 the disassembler at the moment. We also adjust the case of cpsr and fps. */
128 /* Initial value: Register names used in ARM's ISA documentation. */
129 static char * arm_register_name_strings
[] =
130 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
131 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
132 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
133 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
134 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
135 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
136 "fps", "cpsr" }; /* 24 25 */
137 static char **arm_register_names
= arm_register_name_strings
;
139 /* Valid register name styles. */
140 static const char **valid_disassembly_styles
;
142 /* Disassembly style to use. Default to "std" register names. */
143 static const char *disassembly_style
;
144 /* Index to that option in the opcodes table. */
145 static int current_option
;
147 /* This is used to keep the bfd arch_info in sync with the disassembly
149 static void set_disassembly_style_sfunc(char *, int,
150 struct cmd_list_element
*);
151 static void set_disassembly_style (void);
153 static void convert_from_extended (const struct floatformat
*, const void *,
155 static void convert_to_extended (const struct floatformat
*, void *,
158 /* Define other aspects of the stack frame. We keep the offsets of
159 all saved registers, 'cause we need 'em a lot! We also keep the
160 current size of the stack frame, and the offset of the frame
161 pointer from the stack pointer (for frameless functions, and when
162 we're still in the prologue of a function with a frame). */
164 #define arm_get_cache(fi) ((struct arm_prologue_cache *) get_frame_extra_info (fi))
166 struct arm_prologue_cache
168 CORE_ADDR unwound_sp
, unwound_pc
;
172 CORE_ADDR saved_regs
[1];
175 /* Addresses for calling Thumb functions have the bit 0 set.
176 Here are some macros to test, set, or clear bit 0 of addresses. */
177 #define IS_THUMB_ADDR(addr) ((addr) & 1)
178 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
179 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
182 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
184 return (DEPRECATED_FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
187 /* Set to true if the 32-bit mode is in use. */
191 /* Flag set by arm_fix_call_dummy that tells whether the target
192 function is a Thumb function. This flag is checked by
193 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
194 its use in valops.c) to pass the function address as an additional
197 static int target_is_thumb
;
199 /* Flag set by arm_fix_call_dummy that tells whether the calling
200 function is a Thumb function. This flag is checked by
201 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
203 static int caller_is_thumb
;
205 /* Determine if the program counter specified in MEMADDR is in a Thumb
209 arm_pc_is_thumb (CORE_ADDR memaddr
)
211 struct minimal_symbol
*sym
;
213 /* If bit 0 of the address is set, assume this is a Thumb address. */
214 if (IS_THUMB_ADDR (memaddr
))
217 /* Thumb functions have a "special" bit set in minimal symbols. */
218 sym
= lookup_minimal_symbol_by_pc (memaddr
);
221 return (MSYMBOL_IS_SPECIAL (sym
));
229 /* Determine if the program counter specified in MEMADDR is in a call
230 dummy being called from a Thumb function. */
233 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
235 CORE_ADDR sp
= read_sp ();
237 /* FIXME: Until we switch for the new call dummy macros, this heuristic
238 is the best we can do. We are trying to determine if the pc is on
239 the stack, which (hopefully) will only happen in a call dummy.
240 We hope the current stack pointer is not so far alway from the dummy
241 frame location (true if we have not pushed large data structures or
242 gone too many levels deep) and that our 1024 is not enough to consider
243 code regions as part of the stack (true for most practical purposes). */
244 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
245 return caller_is_thumb
;
250 /* Remove useless bits from addresses in a running program. */
252 arm_addr_bits_remove (CORE_ADDR val
)
255 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
257 return (val
& 0x03fffffc);
260 /* When reading symbols, we need to zap the low bit of the address,
261 which may be set to 1 for Thumb functions. */
263 arm_smash_text_address (CORE_ADDR val
)
268 /* Immediately after a function call, return the saved pc. Can't
269 always go through the frames for this because on some machines the
270 new frame is not set up until the new function executes some
274 arm_saved_pc_after_call (struct frame_info
*frame
)
276 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
279 /* Determine whether the function invocation represented by FI has a
280 frame on the stack associated with it. If it does return zero,
281 otherwise return 1. */
284 arm_frameless_function_invocation (struct frame_info
*fi
)
286 CORE_ADDR func_start
, after_prologue
;
289 /* Sometimes we have functions that do a little setup (like saving the
290 vN registers with the stmdb instruction, but DO NOT set up a frame.
291 The symbol table will report this as a prologue. However, it is
292 important not to try to parse these partial frames as frames, or we
293 will get really confused.
295 So I will demand 3 instructions between the start & end of the
296 prologue before I call it a real prologue, i.e. at least
301 func_start
= (get_frame_func (fi
) + FUNCTION_START_OFFSET
);
302 after_prologue
= SKIP_PROLOGUE (func_start
);
304 /* There are some frameless functions whose first two instructions
305 follow the standard APCS form, in which case after_prologue will
306 be func_start + 8. */
308 frameless
= (after_prologue
< func_start
+ 12);
312 /* A typical Thumb prologue looks like this:
316 Sometimes the latter instruction may be replaced by:
324 or, on tpcs, like this:
331 There is always one instruction of three classes:
336 When we have found at least one of each class we are done with the prolog.
337 Note that the "sub sp, #NN" before the push does not count.
341 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
343 CORE_ADDR current_pc
;
345 bit 0 - push { rlist }
346 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
347 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
351 for (current_pc
= pc
;
352 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
355 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
357 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
359 findmask
|= 1; /* push found */
361 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
364 if ((findmask
& 1) == 0) /* before push ? */
367 findmask
|= 4; /* add/sub sp found */
369 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
371 findmask
|= 2; /* setting of r7 found */
373 else if (insn
== 0x466f) /* mov r7, sp */
375 findmask
|= 2; /* setting of r7 found */
377 else if (findmask
== (4+2+1))
379 /* We have found one of each type of prologue instruction */
383 /* Something in the prolog that we don't care about or some
384 instruction from outside the prolog scheduled here for
392 /* Advance the PC across any function entry prologue instructions to
393 reach some "real" code.
395 The APCS (ARM Procedure Call Standard) defines the following
399 [stmfd sp!, {a1,a2,a3,a4}]
400 stmfd sp!, {...,fp,ip,lr,pc}
401 [stfe f7, [sp, #-12]!]
402 [stfe f6, [sp, #-12]!]
403 [stfe f5, [sp, #-12]!]
404 [stfe f4, [sp, #-12]!]
405 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
408 arm_skip_prologue (CORE_ADDR pc
)
412 CORE_ADDR func_addr
, func_end
= 0;
414 struct symtab_and_line sal
;
416 /* If we're in a dummy frame, don't even try to skip the prologue. */
417 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
420 /* See what the symbol table says. */
422 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
426 /* Found a function. */
427 sym
= lookup_symbol (func_name
, NULL
, VAR_DOMAIN
, NULL
, NULL
);
428 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
430 /* Don't use this trick for assembly source files. */
431 sal
= find_pc_line (func_addr
, 0);
432 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
437 /* Check if this is Thumb code. */
438 if (arm_pc_is_thumb (pc
))
439 return thumb_skip_prologue (pc
, func_end
);
441 /* Can't find the prologue end in the symbol table, try it the hard way
442 by disassembling the instructions. */
444 /* Like arm_scan_prologue, stop no later than pc + 64. */
445 if (func_end
== 0 || func_end
> pc
+ 64)
448 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
450 inst
= read_memory_integer (skip_pc
, 4);
452 /* "mov ip, sp" is no longer a required part of the prologue. */
453 if (inst
== 0xe1a0c00d) /* mov ip, sp */
456 /* Some prologues begin with "str lr, [sp, #-4]!". */
457 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
460 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
463 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
466 /* Any insns after this point may float into the code, if it makes
467 for better instruction scheduling, so we skip them only if we
468 find them, but still consider the function to be frame-ful. */
470 /* We may have either one sfmfd instruction here, or several stfe
471 insns, depending on the version of floating point code we
473 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
476 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
479 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
482 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
485 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
486 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
487 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
490 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
491 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
492 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
495 /* Un-recognized instruction; stop scanning. */
499 return skip_pc
; /* End of prologue */
503 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
504 This function decodes a Thumb function prologue to determine:
505 1) the size of the stack frame
506 2) which registers are saved on it
507 3) the offsets of saved regs
508 4) the offset from the stack pointer to the frame pointer
509 This information is stored in the "extra" fields of the frame_info.
511 A typical Thumb function prologue would create this stack frame
512 (offsets relative to FP)
513 old SP -> 24 stack parameters
516 R7 -> 0 local variables (16 bytes)
517 SP -> -12 additional stack space (12 bytes)
518 The frame size would thus be 36 bytes, and the frame offset would be
519 12 bytes. The frame register is R7.
521 The comments for thumb_skip_prolog() describe the algorithm we use
522 to detect the end of the prolog. */
526 thumb_scan_prologue (struct arm_prologue_cache
*cache
)
528 CORE_ADDR prologue_start
;
529 CORE_ADDR prologue_end
;
530 CORE_ADDR current_pc
;
531 /* Which register has been copied to register n? */
534 bit 0 - push { rlist }
535 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
536 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
541 /* Don't try to scan dummy frames. */
542 if (DEPRECATED_PC_IN_CALL_DUMMY (cache
->unwound_pc
, 0, 0))
545 if (find_pc_partial_function (cache
->unwound_pc
, NULL
, &prologue_start
, &prologue_end
))
547 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
549 if (sal
.line
== 0) /* no line info, use current PC */
550 prologue_end
= cache
->unwound_pc
;
551 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
552 prologue_end
= sal
.end
; /* (probably means no prologue) */
555 /* We're in the boondocks: allow for
556 16 pushes, an add, and "mv fp,sp". */
557 prologue_end
= prologue_start
+ 40;
559 prologue_end
= min (prologue_end
, cache
->unwound_pc
);
561 /* Initialize the saved register map. When register H is copied to
562 register L, we will put H in saved_reg[L]. */
563 for (i
= 0; i
< 16; i
++)
566 /* Search the prologue looking for instructions that set up the
567 frame pointer, adjust the stack pointer, and save registers.
568 Do this until all basic prolog instructions are found. */
570 cache
->framesize
= 0;
571 for (current_pc
= prologue_start
;
572 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
579 insn
= read_memory_unsigned_integer (current_pc
, 2);
581 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
584 findmask
|= 1; /* push found */
585 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
586 whether to save LR (R14). */
587 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
589 /* Calculate offsets of saved R0-R7 and LR. */
590 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
591 if (mask
& (1 << regno
))
593 cache
->framesize
+= 4;
594 cache
->saved_regs
[saved_reg
[regno
]] = -cache
->framesize
;
595 /* Reset saved register map. */
596 saved_reg
[regno
] = regno
;
599 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
602 if ((findmask
& 1) == 0) /* before push? */
605 findmask
|= 4; /* add/sub sp found */
607 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
608 if (insn
& 0x80) /* is it signed? (==subtracting) */
610 cache
->frameoffset
+= offset
;
613 cache
->framesize
-= offset
;
615 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
617 findmask
|= 2; /* setting of r7 found */
618 cache
->framereg
= THUMB_FP_REGNUM
;
619 /* get scaled offset */
620 cache
->frameoffset
= (insn
& 0xff) << 2;
622 else if (insn
== 0x466f) /* mov r7, sp */
624 findmask
|= 2; /* setting of r7 found */
625 cache
->framereg
= THUMB_FP_REGNUM
;
626 cache
->frameoffset
= 0;
627 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
629 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
631 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
632 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
633 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
636 /* Something in the prolog that we don't care about or some
637 instruction from outside the prolog scheduled here for
643 /* This function decodes an ARM function prologue to determine:
644 1) the size of the stack frame
645 2) which registers are saved on it
646 3) the offsets of saved regs
647 4) the offset from the stack pointer to the frame pointer
648 This information is stored in the "extra" fields of the frame_info.
650 There are two basic forms for the ARM prologue. The fixed argument
651 function call will look like:
654 stmfd sp!, {fp, ip, lr, pc}
658 Which would create this stack frame (offsets relative to FP):
659 IP -> 4 (caller's stack)
660 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
661 -4 LR (return address in caller)
662 -8 IP (copy of caller's SP)
664 SP -> -28 Local variables
666 The frame size would thus be 32 bytes, and the frame offset would be
667 28 bytes. The stmfd call can also save any of the vN registers it
668 plans to use, which increases the frame size accordingly.
670 Note: The stored PC is 8 off of the STMFD instruction that stored it
671 because the ARM Store instructions always store PC + 8 when you read
674 A variable argument function call will look like:
677 stmfd sp!, {a1, a2, a3, a4}
678 stmfd sp!, {fp, ip, lr, pc}
681 Which would create this stack frame (offsets relative to FP):
682 IP -> 20 (caller's stack)
687 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
688 -4 LR (return address in caller)
689 -8 IP (copy of caller's SP)
691 SP -> -28 Local variables
693 The frame size would thus be 48 bytes, and the frame offset would be
696 There is another potential complication, which is that the optimizer
697 will try to separate the store of fp in the "stmfd" instruction from
698 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
699 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
701 Also, note, the original version of the ARM toolchain claimed that there
704 instruction at the end of the prologue. I have never seen GCC produce
705 this, and the ARM docs don't mention it. We still test for it below in
711 arm_scan_prologue (struct arm_prologue_cache
*cache
)
713 int regno
, sp_offset
, fp_offset
;
714 LONGEST return_value
;
715 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
717 /* Assume there is no frame until proven otherwise. */
718 cache
->framereg
= ARM_SP_REGNUM
;
719 cache
->framesize
= 0;
720 cache
->frameoffset
= 0;
722 /* Check for Thumb prologue. */
723 if (arm_pc_is_thumb (cache
->unwound_pc
))
725 thumb_scan_prologue (cache
);
729 /* Find the function prologue. If we can't find the function in
730 the symbol table, peek in the stack frame to find the PC. */
731 if (find_pc_partial_function (cache
->unwound_pc
, NULL
, &prologue_start
, &prologue_end
))
733 /* One way to find the end of the prologue (which works well
734 for unoptimized code) is to do the following:
736 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
739 prologue_end = cache->unwound_pc;
740 else if (sal.end < prologue_end)
741 prologue_end = sal.end;
743 This mechanism is very accurate so long as the optimizer
744 doesn't move any instructions from the function body into the
745 prologue. If this happens, sal.end will be the last
746 instruction in the first hunk of prologue code just before
747 the first instruction that the scheduler has moved from
748 the body to the prologue.
750 In order to make sure that we scan all of the prologue
751 instructions, we use a slightly less accurate mechanism which
752 may scan more than necessary. To help compensate for this
753 lack of accuracy, the prologue scanning loop below contains
754 several clauses which'll cause the loop to terminate early if
755 an implausible prologue instruction is encountered.
761 is a suitable endpoint since it accounts for the largest
762 possible prologue plus up to five instructions inserted by
765 if (prologue_end
> prologue_start
+ 64)
767 prologue_end
= prologue_start
+ 64; /* See above. */
772 /* Get address of the stmfd in the prologue of the callee;
773 the saved PC is the address of the stmfd + 8. */
774 if (!safe_read_memory_integer (cache
->unwound_sp
, 4, &return_value
))
778 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
779 prologue_end
= prologue_start
+ 64; /* See above. */
783 /* Now search the prologue looking for instructions that set up the
784 frame pointer, adjust the stack pointer, and save registers.
786 Be careful, however, and if it doesn't look like a prologue,
787 don't try to scan it. If, for instance, a frameless function
788 begins with stmfd sp!, then we will tell ourselves there is
789 a frame, which will confuse stack traceback, as well as "finish"
790 and other operations that rely on a knowledge of the stack
793 In the APCS, the prologue should start with "mov ip, sp" so
794 if we don't see this as the first insn, we will stop.
796 [Note: This doesn't seem to be true any longer, so it's now an
797 optional part of the prologue. - Kevin Buettner, 2001-11-20]
799 [Note further: The "mov ip,sp" only seems to be missing in
800 frameless functions at optimization level "-O2" or above,
801 in which case it is often (but not always) replaced by
802 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
804 sp_offset
= fp_offset
= 0;
806 for (current_pc
= prologue_start
;
807 current_pc
< prologue_end
;
810 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
812 if (insn
== 0xe1a0c00d) /* mov ip, sp */
816 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
818 /* Function is frameless: extra_info defaults OK? */
821 else if ((insn
& 0xffff0000) == 0xe92d0000)
822 /* stmfd sp!, {..., fp, ip, lr, pc}
824 stmfd sp!, {a1, a2, a3, a4} */
826 int mask
= insn
& 0xffff;
828 /* Calculate offsets of saved registers. */
829 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
830 if (mask
& (1 << regno
))
833 cache
->saved_regs
[regno
] = sp_offset
;
836 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
837 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
838 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
840 /* No need to add this to saved_regs -- it's just an arg reg. */
843 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
844 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
845 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
847 /* No need to add this to saved_regs -- it's just an arg reg. */
850 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
852 unsigned imm
= insn
& 0xff; /* immediate value */
853 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
854 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
856 cache
->framereg
= ARM_FP_REGNUM
;
858 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
860 unsigned imm
= insn
& 0xff; /* immediate value */
861 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
862 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
865 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
868 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
869 cache
->saved_regs
[regno
] = sp_offset
;
871 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
874 unsigned int fp_start_reg
, fp_bound_reg
;
876 if ((insn
& 0x800) == 0x800) /* N0 is set */
878 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
885 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
891 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
892 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
893 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
896 cache
->saved_regs
[fp_start_reg
++] = sp_offset
;
899 else if ((insn
& 0xf0000000) != 0xe0000000)
900 break; /* Condition not true, exit early */
901 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
902 break; /* Don't scan past a block load */
904 /* The optimizer might shove anything into the prologue,
905 so we just skip what we don't recognize. */
909 /* The frame size is just the negative of the offset (from the
910 original SP) of the last thing thing we pushed on the stack.
911 The frame offset is [new FP] - [new SP]. */
912 cache
->framesize
= -sp_offset
;
913 if (cache
->framereg
== ARM_FP_REGNUM
)
914 cache
->frameoffset
= fp_offset
- sp_offset
;
916 cache
->frameoffset
= 0;
919 /* Find REGNUM on the stack. Otherwise, it's in an active register.
920 One thing we might want to do here is to check REGNUM against the
921 clobber mask, and somehow flag it as invalid if it isn't saved on
922 the stack somewhere. This would provide a graceful failure mode
923 when trying to get the value of caller-saves registers for an inner
927 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
929 /* NOTE: cagney/2002-05-03: This function really shouldn't be
930 needed. Instead the (still being written) register unwind
931 function could be called directly. */
932 for (; fi
; fi
= get_next_frame (fi
))
934 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
936 return deprecated_read_register_dummy (get_frame_pc (fi
),
937 get_frame_base (fi
), regnum
);
939 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
941 /* NOTE: cagney/2002-05-03: This would normally need to
942 handle ARM_SP_REGNUM as a special case as, according to
943 the frame.h comments, saved_regs[SP_REGNUM] contains the
944 SP value not its address. It appears that the ARM isn't
945 doing this though. */
946 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
947 REGISTER_RAW_SIZE (regnum
));
950 return read_register (regnum
);
952 /* Function: frame_chain Given a GDB frame, determine the address of
953 the calling function's frame. This will be used to create a new
954 GDB frame struct, and then DEPRECATED_INIT_EXTRA_FRAME_INFO and
955 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
956 ARM, we save the frame size when we initialize the frame_info. */
959 arm_frame_chain (struct frame_info
*fi
)
962 int framereg
= arm_get_cache (fi
)->framereg
;
964 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
965 /* A generic call dummy's frame is the same as caller's. */
966 return get_frame_base (fi
);
968 if (get_frame_pc (fi
) < LOWEST_PC
)
971 /* If the caller is the startup code, we're at the end of the chain. */
972 caller_pc
= DEPRECATED_FRAME_SAVED_PC (fi
);
974 /* If the caller is Thumb and the caller is ARM, or vice versa,
975 the frame register of the caller is different from ours.
976 So we must scan the prologue of the caller to determine its
977 frame register number. */
978 /* XXX Fixme, we should try to do this without creating a temporary
980 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
982 struct arm_prologue_cache
*cache
983 = xcalloc (1, sizeof (struct arm_prologue_cache
)
984 + (NUM_REGS
+ NUM_PSEUDO_REGS
- 1) * sizeof (CORE_ADDR
));
985 struct cleanup
*old_chain
= make_cleanup (xfree
, cache
);
987 /* Now, scan the prologue and obtain the frame register. */
988 cache
->unwound_pc
= caller_pc
;
989 arm_scan_prologue (cache
);
990 framereg
= cache
->framereg
;
992 /* Deallocate the storage associated with the temporary frame
994 do_cleanups (old_chain
);
997 /* If the caller used a frame register, return its value.
998 Otherwise, return the caller's stack pointer. */
999 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
1000 return arm_find_callers_reg (fi
, framereg
);
1002 return get_frame_base (fi
) + arm_get_cache (fi
)->framesize
;
1005 /* This function actually figures out the frame address for a given pc
1006 and sp. This is tricky because we sometimes don't use an explicit
1007 frame pointer, and the previous stack pointer isn't necessarily
1008 recorded on the stack. The only reliable way to get this info is
1009 to examine the prologue. FROMLEAF is a little confusing, it means
1010 this is the next frame up the chain AFTER a frameless function. If
1011 this is true, then the frame value for this frame is still in the
1015 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1020 if (get_frame_saved_regs (fi
) == NULL
)
1021 frame_saved_regs_zalloc (fi
);
1023 frame_extra_info_zalloc (fi
, (sizeof (struct arm_prologue_cache
)
1024 + ((NUM_REGS
+ NUM_PSEUDO_REGS
- 1)
1025 * sizeof (CORE_ADDR
))));
1027 if (get_next_frame (fi
))
1028 deprecated_update_frame_pc_hack (fi
, DEPRECATED_FRAME_SAVED_PC (get_next_frame (fi
)));
1030 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1032 /* Compute stack pointer for this frame. We use this value for both
1033 the sigtramp and call dummy cases. */
1034 if (!get_next_frame (fi
))
1036 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1037 /* For generic dummy frames, pull the value direct from the frame.
1038 Having an unwind function to do this would be nice. */
1039 sp
= deprecated_read_register_dummy (get_frame_pc (get_next_frame (fi
)),
1040 get_frame_base (get_next_frame (fi
)),
1043 sp
= (get_frame_base (get_next_frame (fi
))
1044 - arm_get_cache (get_next_frame (fi
))->frameoffset
1045 + arm_get_cache (get_next_frame (fi
))->framesize
);
1047 /* Determine whether or not we're in a sigtramp frame.
1048 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1049 == SIGTRAMP_FRAME) because this value is sometimes set after
1050 invoking DEPRECATED_INIT_EXTRA_FRAME_INFO. So we test *both*
1051 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1052 determine if we need to use the sigcontext addresses for the
1055 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1056 against the name of the function, the code below will have to be
1057 changed to first fetch the name of the function and then pass
1058 this name to PC_IN_SIGTRAMP. */
1060 /* FIXME: cagney/2002-11-18: This problem will go away once
1061 frame.c:get_prev_frame() is modified to set the frame's type
1062 before calling functions like this. */
1064 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1065 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1067 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1068 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1070 /* FIXME: What about thumb mode? */
1071 arm_get_cache (fi
)->framereg
= ARM_SP_REGNUM
;
1072 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[arm_get_cache (fi
)->framereg
], REGISTER_RAW_SIZE (arm_get_cache (fi
)->framereg
)));
1073 arm_get_cache (fi
)->framesize
= 0;
1074 arm_get_cache (fi
)->frameoffset
= 0;
1079 arm_get_cache (fi
)->unwound_pc
= get_frame_pc (fi
);
1080 arm_get_cache (fi
)->unwound_sp
= get_frame_base (fi
);
1082 arm_scan_prologue (arm_get_cache (fi
));
1084 if (!get_next_frame (fi
))
1085 /* This is the innermost frame? */
1086 deprecated_update_frame_base_hack (fi
, read_register (arm_get_cache (fi
)->framereg
));
1087 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (get_next_frame (fi
)), 0, 0))
1088 /* Next inner most frame is a dummy, just grab its frame.
1089 Dummy frames always have the same FP as their caller. */
1090 deprecated_update_frame_base_hack (fi
, get_frame_base (get_next_frame (fi
)));
1091 else if (arm_get_cache (fi
)->framereg
== ARM_FP_REGNUM
1092 || arm_get_cache (fi
)->framereg
== THUMB_FP_REGNUM
)
1094 /* not the innermost frame */
1095 /* If we have an FP, the callee saved it. */
1096 if (get_frame_saved_regs (get_next_frame (fi
))[arm_get_cache (fi
)->framereg
] != 0)
1097 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[arm_get_cache (fi
)->framereg
], 4));
1099 /* If we were called by a frameless fn. then our frame is
1100 still in the frame pointer register on the board... */
1101 deprecated_update_frame_base_hack (fi
, deprecated_read_fp ());
1104 /* Calculate actual addresses of saved registers using offsets
1105 determined by arm_scan_prologue. */
1106 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1107 if (arm_get_cache (fi
)->saved_regs
[reg
] != 0)
1108 get_frame_saved_regs (fi
)[reg
] = (arm_get_cache (fi
)->saved_regs
[reg
]
1109 + get_frame_base (fi
)
1110 + arm_get_cache (fi
)->framesize
1111 - arm_get_cache (fi
)->frameoffset
);
1116 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1117 is saved in the stack anywhere, otherwise we get it from the
1120 The old definition of this function was a macro:
1121 #define FRAME_SAVED_PC(FRAME) \
1122 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1125 arm_frame_saved_pc (struct frame_info
*fi
)
1127 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1128 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1129 return deprecated_read_register_dummy (get_frame_pc (fi
),
1130 get_frame_base (fi
), ARM_PC_REGNUM
);
1132 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
),
1133 (get_frame_base (fi
)
1134 - arm_get_cache (fi
)->frameoffset
),
1135 get_frame_base (fi
)))
1137 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1138 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1142 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1143 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1147 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1148 Examine the Program Status Register to decide which state we're in. */
1153 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1154 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1156 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1159 /* Store into a struct frame_saved_regs the addresses of the saved
1160 registers of frame described by FRAME_INFO. This includes special
1161 registers such as PC and FP saved in special ways in the stack
1162 frame. SP is even more special: the address we return for it IS
1163 the sp for the next frame. */
1166 arm_frame_init_saved_regs (struct frame_info
*fip
)
1169 if (get_frame_saved_regs (fip
))
1172 arm_init_extra_frame_info (0, fip
);
1175 /* Set the return address for a generic dummy frame. ARM uses the
1179 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1181 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1185 /* Push an empty stack frame, to record the current PC, etc. */
1188 arm_push_dummy_frame (void)
1190 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1191 CORE_ADDR sp
= old_sp
;
1192 CORE_ADDR fp
, prologue_start
;
1195 /* Push the two dummy prologue instructions in reverse order,
1196 so that they'll be in the correct low-to-high order in memory. */
1197 /* sub fp, ip, #4 */
1198 sp
= push_word (sp
, 0xe24cb004);
1199 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1200 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1202 /* Push a pointer to the dummy prologue + 12, because when stm
1203 instruction stores the PC, it stores the address of the stm
1204 instruction itself plus 12. */
1205 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1207 /* Push the processor status. */
1208 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1210 /* Push all 16 registers starting with r15. */
1211 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1212 sp
= push_word (sp
, read_register (regnum
));
1214 /* Update fp (for both Thumb and ARM) and sp. */
1215 write_register (ARM_FP_REGNUM
, fp
);
1216 write_register (THUMB_FP_REGNUM
, fp
);
1217 write_register (ARM_SP_REGNUM
, sp
);
1220 /* DEPRECATED_CALL_DUMMY_WORDS:
1221 This sequence of words is the instructions
1227 Note this is 12 bytes. */
1229 static LONGEST arm_call_dummy_words
[] =
1231 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1234 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1235 breakpoint to the proper address in the call dummy, so that
1236 `finish' after a stop in a call dummy works.
1238 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1239 optimal solution, but the call to arm_fix_call_dummy is immediately
1240 followed by a call to call_function_by_hand, which is the only
1241 function where call_dummy_breakpoint_offset is actually used. */
1245 arm_set_call_dummy_breakpoint_offset (void)
1247 if (caller_is_thumb
)
1248 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1250 set_gdbarch_deprecated_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1253 /* Fix up the call dummy, based on whether the processor is currently
1254 in Thumb or ARM mode, and whether the target function is Thumb or
1255 ARM. There are three different situations requiring three
1258 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1259 been copied into the dummy parameter to this function.
1260 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1261 "mov pc,r4" instruction patched to be a "bx r4" instead.
1262 * Thumb calling anything: uses the Thumb dummy defined below, which
1263 works for calling both ARM and Thumb functions.
1265 All three call dummies expect to receive the target function
1266 address in R4, with the low bit set if it's a Thumb function. */
1269 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1270 struct value
**args
, struct type
*type
, int gcc_p
)
1272 static short thumb_dummy
[4] =
1274 0xf000, 0xf801, /* bl label */
1275 0xdf18, /* swi 24 */
1276 0x4720, /* label: bx r4 */
1278 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1280 /* Set flag indicating whether the current PC is in a Thumb function. */
1281 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1282 arm_set_call_dummy_breakpoint_offset ();
1284 /* If the target function is Thumb, set the low bit of the function
1285 address. And if the CPU is currently in ARM mode, patch the
1286 second instruction of call dummy to use a BX instruction to
1287 switch to Thumb mode. */
1288 target_is_thumb
= arm_pc_is_thumb (fun
);
1289 if (target_is_thumb
)
1292 if (!caller_is_thumb
)
1293 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1296 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1297 instead of the ARM one that's already been copied. This will
1298 work for both Thumb and ARM target functions. */
1299 if (caller_is_thumb
)
1303 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1305 for (i
= 0; i
< len
; i
++)
1307 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1308 p
+= sizeof (thumb_dummy
[0]);
1312 /* Put the target address in r4; the call dummy will copy this to
1314 write_register (4, fun
);
1317 /* Pop the current frame. So long as the frame info has been
1318 initialized properly (see arm_init_extra_frame_info), this code
1319 works for dummy frames as well as regular frames. I.e, there's no
1320 need to have a special case for dummy frames. */
1322 arm_pop_frame (void)
1325 struct frame_info
*frame
= get_current_frame ();
1326 CORE_ADDR old_SP
= (get_frame_base (frame
)
1327 - arm_get_cache (frame
)->frameoffset
1328 + arm_get_cache (frame
)->framesize
);
1330 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
),
1331 get_frame_base (frame
),
1332 get_frame_base (frame
)))
1334 generic_pop_dummy_frame ();
1335 flush_cached_frames ();
1339 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1340 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1341 write_register (regnum
,
1342 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1343 REGISTER_RAW_SIZE (regnum
)));
1345 write_register (ARM_PC_REGNUM
, DEPRECATED_FRAME_SAVED_PC (frame
));
1346 write_register (ARM_SP_REGNUM
, old_SP
);
1348 flush_cached_frames ();
1351 /* When arguments must be pushed onto the stack, they go on in reverse
1352 order. The code below implements a FILO (stack) to do this. */
1357 struct stack_item
*prev
;
1361 static struct stack_item
*
1362 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1364 struct stack_item
*si
;
1365 si
= xmalloc (sizeof (struct stack_item
));
1366 si
->data
= xmalloc (len
);
1369 memcpy (si
->data
, contents
, len
);
1373 static struct stack_item
*
1374 pop_stack_item (struct stack_item
*si
)
1376 struct stack_item
*dead
= si
;
1383 /* We currently only support passing parameters in integer registers. This
1384 conforms with GCC's default model. Several other variants exist and
1385 we should probably support some of them based on the selected ABI. */
1388 arm_push_dummy_call (struct gdbarch
*gdbarch
, CORE_ADDR func_addr
,
1389 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
1390 struct value
**args
, CORE_ADDR sp
, int struct_return
,
1391 CORE_ADDR struct_addr
)
1396 struct stack_item
*si
= NULL
;
1398 /* Set the return address. For the ARM, the return breakpoint is
1399 always at BP_ADDR. */
1400 /* XXX Fix for Thumb. */
1401 regcache_cooked_write_unsigned (regcache
, ARM_LR_REGNUM
, bp_addr
);
1403 /* Walk through the list of args and determine how large a temporary
1404 stack is required. Need to take care here as structs may be
1405 passed on the stack, and we have to to push them. */
1408 argreg
= ARM_A1_REGNUM
;
1411 /* Some platforms require a double-word aligned stack. Make sure sp
1412 is correctly aligned before we start. We always do this even if
1413 it isn't really needed -- it can never hurt things. */
1414 sp
&= ~(CORE_ADDR
)(2 * DEPRECATED_REGISTER_SIZE
- 1);
1416 /* The struct_return pointer occupies the first parameter
1417 passing register. */
1421 fprintf_unfiltered (gdb_stdlog
, "struct return in %s = 0x%s\n",
1422 REGISTER_NAME (argreg
), paddr (struct_addr
));
1423 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
1427 for (argnum
= 0; argnum
< nargs
; argnum
++)
1430 struct type
*arg_type
;
1431 struct type
*target_type
;
1432 enum type_code typecode
;
1435 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1436 len
= TYPE_LENGTH (arg_type
);
1437 target_type
= TYPE_TARGET_TYPE (arg_type
);
1438 typecode
= TYPE_CODE (arg_type
);
1439 val
= VALUE_CONTENTS (args
[argnum
]);
1441 /* If the argument is a pointer to a function, and it is a
1442 Thumb function, create a LOCAL copy of the value and set
1443 the THUMB bit in it. */
1444 if (TYPE_CODE_PTR
== typecode
1445 && target_type
!= NULL
1446 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1448 CORE_ADDR regval
= extract_unsigned_integer (val
, len
);
1449 if (arm_pc_is_thumb (regval
))
1452 store_unsigned_integer (val
, len
, MAKE_THUMB_ADDR (regval
));
1456 /* Copy the argument to general registers or the stack in
1457 register-sized pieces. Large arguments are split between
1458 registers and stack. */
1461 int partial_len
= len
< DEPRECATED_REGISTER_SIZE
? len
: DEPRECATED_REGISTER_SIZE
;
1463 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1465 /* The argument is being passed in a general purpose
1467 CORE_ADDR regval
= extract_unsigned_integer (val
, partial_len
);
1469 fprintf_unfiltered (gdb_stdlog
, "arg %d in %s = 0x%s\n",
1470 argnum
, REGISTER_NAME (argreg
),
1471 phex (regval
, DEPRECATED_REGISTER_SIZE
));
1472 regcache_cooked_write_unsigned (regcache
, argreg
, regval
);
1477 /* Push the arguments onto the stack. */
1479 fprintf_unfiltered (gdb_stdlog
, "arg %d @ sp + %d\n",
1481 si
= push_stack_item (si
, val
, DEPRECATED_REGISTER_SIZE
);
1482 nstack
+= DEPRECATED_REGISTER_SIZE
;
1489 /* If we have an odd number of words to push, then decrement the stack
1490 by one word now, so first stack argument will be dword aligned. */
1497 write_memory (sp
, si
->data
, si
->len
);
1498 si
= pop_stack_item (si
);
1501 /* Finally, update teh SP register. */
1502 regcache_cooked_write_unsigned (regcache
, ARM_SP_REGNUM
, sp
);
1508 print_fpu_flags (int flags
)
1510 if (flags
& (1 << 0))
1511 fputs ("IVO ", stdout
);
1512 if (flags
& (1 << 1))
1513 fputs ("DVZ ", stdout
);
1514 if (flags
& (1 << 2))
1515 fputs ("OFL ", stdout
);
1516 if (flags
& (1 << 3))
1517 fputs ("UFL ", stdout
);
1518 if (flags
& (1 << 4))
1519 fputs ("INX ", stdout
);
1523 /* Print interesting information about the floating point processor
1524 (if present) or emulator. */
1526 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1527 struct frame_info
*frame
, const char *args
)
1529 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1532 type
= (status
>> 24) & 127;
1533 printf ("%s FPU type %d\n",
1534 (status
& (1 << 31)) ? "Hardware" : "Software",
1536 fputs ("mask: ", stdout
);
1537 print_fpu_flags (status
>> 16);
1538 fputs ("flags: ", stdout
);
1539 print_fpu_flags (status
);
1542 /* Return the GDB type object for the "standard" data type of data in
1545 static struct type
*
1546 arm_register_type (int regnum
)
1548 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1550 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1551 return builtin_type_arm_ext_big
;
1553 return builtin_type_arm_ext_littlebyte_bigword
;
1556 return builtin_type_int32
;
1559 /* Index within `registers' of the first byte of the space for
1563 arm_register_byte (int regnum
)
1565 if (regnum
< ARM_F0_REGNUM
)
1566 return regnum
* INT_REGISTER_RAW_SIZE
;
1567 else if (regnum
< ARM_PS_REGNUM
)
1568 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1569 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1571 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1572 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1573 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1576 /* Number of bytes of storage in the actual machine representation for
1577 register N. All registers are 4 bytes, except fp0 - fp7, which are
1578 12 bytes in length. */
1581 arm_register_raw_size (int regnum
)
1583 if (regnum
< ARM_F0_REGNUM
)
1584 return INT_REGISTER_RAW_SIZE
;
1585 else if (regnum
< ARM_FPS_REGNUM
)
1586 return FP_REGISTER_RAW_SIZE
;
1588 return STATUS_REGISTER_SIZE
;
1591 /* Number of bytes of storage in a program's representation
1594 arm_register_virtual_size (int regnum
)
1596 if (regnum
< ARM_F0_REGNUM
)
1597 return INT_REGISTER_VIRTUAL_SIZE
;
1598 else if (regnum
< ARM_FPS_REGNUM
)
1599 return FP_REGISTER_VIRTUAL_SIZE
;
1601 return STATUS_REGISTER_SIZE
;
1604 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1606 arm_register_sim_regno (int regnum
)
1609 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1611 if (reg
< NUM_GREGS
)
1612 return SIM_ARM_R0_REGNUM
+ reg
;
1615 if (reg
< NUM_FREGS
)
1616 return SIM_ARM_FP0_REGNUM
+ reg
;
1619 if (reg
< NUM_SREGS
)
1620 return SIM_ARM_FPS_REGNUM
+ reg
;
1623 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1626 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1627 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1628 It is thought that this is is the floating-point register format on
1629 little-endian systems. */
1632 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1636 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1637 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1639 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1641 floatformat_from_doublest (fmt
, &d
, dbl
);
1645 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1648 floatformat_to_doublest (fmt
, ptr
, &d
);
1649 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1650 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1652 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1657 condition_true (unsigned long cond
, unsigned long status_reg
)
1659 if (cond
== INST_AL
|| cond
== INST_NV
)
1665 return ((status_reg
& FLAG_Z
) != 0);
1667 return ((status_reg
& FLAG_Z
) == 0);
1669 return ((status_reg
& FLAG_C
) != 0);
1671 return ((status_reg
& FLAG_C
) == 0);
1673 return ((status_reg
& FLAG_N
) != 0);
1675 return ((status_reg
& FLAG_N
) == 0);
1677 return ((status_reg
& FLAG_V
) != 0);
1679 return ((status_reg
& FLAG_V
) == 0);
1681 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1683 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1685 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1687 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1689 return (((status_reg
& FLAG_Z
) == 0) &&
1690 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1692 return (((status_reg
& FLAG_Z
) != 0) ||
1693 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1698 /* Support routines for single stepping. Calculate the next PC value. */
1699 #define submask(x) ((1L << ((x) + 1)) - 1)
1700 #define bit(obj,st) (((obj) >> (st)) & 1)
1701 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1702 #define sbits(obj,st,fn) \
1703 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1704 #define BranchDest(addr,instr) \
1705 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1708 static unsigned long
1709 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1710 unsigned long status_reg
)
1712 unsigned long res
, shift
;
1713 int rm
= bits (inst
, 0, 3);
1714 unsigned long shifttype
= bits (inst
, 5, 6);
1718 int rs
= bits (inst
, 8, 11);
1719 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1722 shift
= bits (inst
, 7, 11);
1725 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1726 + (bit (inst
, 4) ? 12 : 8))
1727 : read_register (rm
));
1732 res
= shift
>= 32 ? 0 : res
<< shift
;
1736 res
= shift
>= 32 ? 0 : res
>> shift
;
1742 res
= ((res
& 0x80000000L
)
1743 ? ~((~res
) >> shift
) : res
>> shift
);
1746 case 3: /* ROR/RRX */
1749 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1751 res
= (res
>> shift
) | (res
<< (32 - shift
));
1755 return res
& 0xffffffff;
1758 /* Return number of 1-bits in VAL. */
1761 bitcount (unsigned long val
)
1764 for (nbits
= 0; val
!= 0; nbits
++)
1765 val
&= val
- 1; /* delete rightmost 1-bit in val */
1770 thumb_get_next_pc (CORE_ADDR pc
)
1772 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1773 unsigned short inst1
= read_memory_integer (pc
, 2);
1774 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1775 unsigned long offset
;
1777 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1781 /* Fetch the saved PC from the stack. It's stored above
1782 all of the other registers. */
1783 offset
= bitcount (bits (inst1
, 0, 7)) * DEPRECATED_REGISTER_SIZE
;
1784 sp
= read_register (ARM_SP_REGNUM
);
1785 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1786 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1788 error ("Infinite loop detected");
1790 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1792 unsigned long status
= read_register (ARM_PS_REGNUM
);
1793 unsigned long cond
= bits (inst1
, 8, 11);
1794 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1795 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1797 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1799 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1801 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1803 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1804 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1805 nextpc
= pc_val
+ offset
;
1812 arm_get_next_pc (CORE_ADDR pc
)
1814 unsigned long pc_val
;
1815 unsigned long this_instr
;
1816 unsigned long status
;
1819 if (arm_pc_is_thumb (pc
))
1820 return thumb_get_next_pc (pc
);
1822 pc_val
= (unsigned long) pc
;
1823 this_instr
= read_memory_integer (pc
, 4);
1824 status
= read_register (ARM_PS_REGNUM
);
1825 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1827 if (condition_true (bits (this_instr
, 28, 31), status
))
1829 switch (bits (this_instr
, 24, 27))
1832 case 0x1: /* data processing */
1836 unsigned long operand1
, operand2
, result
= 0;
1840 if (bits (this_instr
, 12, 15) != 15)
1843 if (bits (this_instr
, 22, 25) == 0
1844 && bits (this_instr
, 4, 7) == 9) /* multiply */
1845 error ("Illegal update to pc in instruction");
1847 /* Multiply into PC */
1848 c
= (status
& FLAG_C
) ? 1 : 0;
1849 rn
= bits (this_instr
, 16, 19);
1850 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1852 if (bit (this_instr
, 25))
1854 unsigned long immval
= bits (this_instr
, 0, 7);
1855 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1856 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1859 else /* operand 2 is a shifted register */
1860 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1862 switch (bits (this_instr
, 21, 24))
1865 result
= operand1
& operand2
;
1869 result
= operand1
^ operand2
;
1873 result
= operand1
- operand2
;
1877 result
= operand2
- operand1
;
1881 result
= operand1
+ operand2
;
1885 result
= operand1
+ operand2
+ c
;
1889 result
= operand1
- operand2
+ c
;
1893 result
= operand2
- operand1
+ c
;
1899 case 0xb: /* tst, teq, cmp, cmn */
1900 result
= (unsigned long) nextpc
;
1904 result
= operand1
| operand2
;
1908 /* Always step into a function. */
1913 result
= operand1
& ~operand2
;
1920 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1923 error ("Infinite loop detected");
1928 case 0x5: /* data transfer */
1931 if (bit (this_instr
, 20))
1934 if (bits (this_instr
, 12, 15) == 15)
1940 if (bit (this_instr
, 22))
1941 error ("Illegal update to pc in instruction");
1943 /* byte write to PC */
1944 rn
= bits (this_instr
, 16, 19);
1945 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1946 if (bit (this_instr
, 24))
1949 int c
= (status
& FLAG_C
) ? 1 : 0;
1950 unsigned long offset
=
1951 (bit (this_instr
, 25)
1952 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1953 : bits (this_instr
, 0, 11));
1955 if (bit (this_instr
, 23))
1960 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1963 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1966 error ("Infinite loop detected");
1972 case 0x9: /* block transfer */
1973 if (bit (this_instr
, 20))
1976 if (bit (this_instr
, 15))
1981 if (bit (this_instr
, 23))
1984 unsigned long reglist
= bits (this_instr
, 0, 14);
1985 offset
= bitcount (reglist
) * 4;
1986 if (bit (this_instr
, 24)) /* pre */
1989 else if (bit (this_instr
, 24))
1993 unsigned long rn_val
=
1994 read_register (bits (this_instr
, 16, 19));
1996 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
2000 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2002 error ("Infinite loop detected");
2007 case 0xb: /* branch & link */
2008 case 0xa: /* branch */
2010 nextpc
= BranchDest (pc
, this_instr
);
2012 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2014 error ("Infinite loop detected");
2020 case 0xe: /* coproc ops */
2025 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2033 /* single_step() is called just before we want to resume the inferior,
2034 if we want to single-step it but there is no hardware or kernel
2035 single-step support. We find the target of the coming instruction
2038 single_step() is also called just after the inferior stops. If we
2039 had set up a simulated single-step, we undo our damage. */
2042 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2044 static int next_pc
; /* State between setting and unsetting. */
2045 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2049 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2050 target_insert_breakpoint (next_pc
, break_mem
);
2053 target_remove_breakpoint (next_pc
, break_mem
);
2056 #include "bfd-in2.h"
2057 #include "libcoff.h"
2060 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2062 if (arm_pc_is_thumb (memaddr
))
2064 static asymbol
*asym
;
2065 static combined_entry_type ce
;
2066 static struct coff_symbol_struct csym
;
2067 static struct bfd fake_bfd
;
2068 static bfd_target fake_target
;
2070 if (csym
.native
== NULL
)
2072 /* Create a fake symbol vector containing a Thumb symbol.
2073 This is solely so that the code in print_insn_little_arm()
2074 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2075 the presence of a Thumb symbol and switch to decoding
2076 Thumb instructions. */
2078 fake_target
.flavour
= bfd_target_coff_flavour
;
2079 fake_bfd
.xvec
= &fake_target
;
2080 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2082 csym
.symbol
.the_bfd
= &fake_bfd
;
2083 csym
.symbol
.name
= "fake";
2084 asym
= (asymbol
*) & csym
;
2087 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2088 info
->symbols
= &asym
;
2091 info
->symbols
= NULL
;
2093 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2094 return print_insn_big_arm (memaddr
, info
);
2096 return print_insn_little_arm (memaddr
, info
);
2099 /* The following define instruction sequences that will cause ARM
2100 cpu's to take an undefined instruction trap. These are used to
2101 signal a breakpoint to GDB.
2103 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2104 modes. A different instruction is required for each mode. The ARM
2105 cpu's can also be big or little endian. Thus four different
2106 instructions are needed to support all cases.
2108 Note: ARMv4 defines several new instructions that will take the
2109 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2110 not in fact add the new instructions. The new undefined
2111 instructions in ARMv4 are all instructions that had no defined
2112 behaviour in earlier chips. There is no guarantee that they will
2113 raise an exception, but may be treated as NOP's. In practice, it
2114 may only safe to rely on instructions matching:
2116 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2117 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2118 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2120 Even this may only true if the condition predicate is true. The
2121 following use a condition predicate of ALWAYS so it is always TRUE.
2123 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2124 and NetBSD all use a software interrupt rather than an undefined
2125 instruction to force a trap. This can be handled by by the
2126 abi-specific code during establishment of the gdbarch vector. */
2129 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2130 override these definitions. */
2131 #ifndef ARM_LE_BREAKPOINT
2132 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2134 #ifndef ARM_BE_BREAKPOINT
2135 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2137 #ifndef THUMB_LE_BREAKPOINT
2138 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2140 #ifndef THUMB_BE_BREAKPOINT
2141 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2144 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2145 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2146 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2147 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2149 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2150 the program counter value to determine whether a 16-bit or 32-bit
2151 breakpoint should be used. It returns a pointer to a string of
2152 bytes that encode a breakpoint instruction, stores the length of
2153 the string to *lenptr, and adjusts the program counter (if
2154 necessary) to point to the actual memory location where the
2155 breakpoint should be inserted. */
2157 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2158 breakpoints and storing their handles instread of what was in
2159 memory. It is nice that this is the same size as a handle -
2160 otherwise remote-rdp will have to change. */
2162 static const unsigned char *
2163 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2165 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2167 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2169 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2170 *lenptr
= tdep
->thumb_breakpoint_size
;
2171 return tdep
->thumb_breakpoint
;
2175 *lenptr
= tdep
->arm_breakpoint_size
;
2176 return tdep
->arm_breakpoint
;
2180 /* Extract from an array REGBUF containing the (raw) register state a
2181 function return value of type TYPE, and copy that, in virtual
2182 format, into VALBUF. */
2185 arm_extract_return_value (struct type
*type
,
2186 struct regcache
*regs
,
2189 bfd_byte
*valbuf
= dst
;
2191 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2193 switch (arm_get_fp_model (current_gdbarch
))
2197 /* The value is in register F0 in internal format. We need to
2198 extract the raw value and then convert it to the desired
2200 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2202 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2203 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2208 case ARM_FLOAT_SOFT_FPA
:
2209 case ARM_FLOAT_SOFT_VFP
:
2210 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2211 if (TYPE_LENGTH (type
) > 4)
2212 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2213 valbuf
+ INT_REGISTER_RAW_SIZE
);
2218 (__FILE__
, __LINE__
,
2219 "arm_extract_return_value: Floating point model not supported");
2223 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2224 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2225 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2226 || TYPE_CODE (type
) == TYPE_CODE_PTR
2227 || TYPE_CODE (type
) == TYPE_CODE_REF
2228 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2230 /* If the the type is a plain integer, then the access is
2231 straight-forward. Otherwise we have to play around a bit more. */
2232 int len
= TYPE_LENGTH (type
);
2233 int regno
= ARM_A1_REGNUM
;
2238 /* By using store_unsigned_integer we avoid having to do
2239 anything special for small big-endian values. */
2240 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2241 store_unsigned_integer (valbuf
,
2242 (len
> INT_REGISTER_RAW_SIZE
2243 ? INT_REGISTER_RAW_SIZE
: len
),
2245 len
-= INT_REGISTER_RAW_SIZE
;
2246 valbuf
+= INT_REGISTER_RAW_SIZE
;
2251 /* For a structure or union the behaviour is as if the value had
2252 been stored to word-aligned memory and then loaded into
2253 registers with 32-bit load instruction(s). */
2254 int len
= TYPE_LENGTH (type
);
2255 int regno
= ARM_A1_REGNUM
;
2256 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2260 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2261 memcpy (valbuf
, tmpbuf
,
2262 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2263 len
-= INT_REGISTER_RAW_SIZE
;
2264 valbuf
+= INT_REGISTER_RAW_SIZE
;
2269 /* Extract from an array REGBUF containing the (raw) register state
2270 the address in which a function should return its structure value. */
2273 arm_extract_struct_value_address (struct regcache
*regcache
)
2277 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2281 /* Will a function return an aggregate type in memory or in a
2282 register? Return 0 if an aggregate type can be returned in a
2283 register, 1 if it must be returned in memory. */
2286 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2289 register enum type_code code
;
2291 /* In the ARM ABI, "integer" like aggregate types are returned in
2292 registers. For an aggregate type to be integer like, its size
2293 must be less than or equal to DEPRECATED_REGISTER_SIZE and the
2294 offset of each addressable subfield must be zero. Note that bit
2295 fields are not addressable, and all addressable subfields of
2296 unions always start at offset zero.
2298 This function is based on the behaviour of GCC 2.95.1.
2299 See: gcc/arm.c: arm_return_in_memory() for details.
2301 Note: All versions of GCC before GCC 2.95.2 do not set up the
2302 parameters correctly for a function returning the following
2303 structure: struct { float f;}; This should be returned in memory,
2304 not a register. Richard Earnshaw sent me a patch, but I do not
2305 know of any way to detect if a function like the above has been
2306 compiled with the correct calling convention. */
2308 /* All aggregate types that won't fit in a register must be returned
2310 if (TYPE_LENGTH (type
) > DEPRECATED_REGISTER_SIZE
)
2315 /* The only aggregate types that can be returned in a register are
2316 structs and unions. Arrays must be returned in memory. */
2317 code
= TYPE_CODE (type
);
2318 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2323 /* Assume all other aggregate types can be returned in a register.
2324 Run a check for structures, unions and arrays. */
2327 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2330 /* Need to check if this struct/union is "integer" like. For
2331 this to be true, its size must be less than or equal to
2332 DEPRECATED_REGISTER_SIZE and the offset of each addressable
2333 subfield must be zero. Note that bit fields are not
2334 addressable, and unions always start at offset zero. If any
2335 of the subfields is a floating point type, the struct/union
2336 cannot be an integer type. */
2338 /* For each field in the object, check:
2339 1) Is it FP? --> yes, nRc = 1;
2340 2) Is it addressable (bitpos != 0) and
2341 not packed (bitsize == 0)?
2345 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2347 enum type_code field_type_code
;
2348 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2350 /* Is it a floating point type field? */
2351 if (field_type_code
== TYPE_CODE_FLT
)
2357 /* If bitpos != 0, then we have to care about it. */
2358 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2360 /* Bitfields are not addressable. If the field bitsize is
2361 zero, then the field is not packed. Hence it cannot be
2362 a bitfield or any other packed type. */
2363 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2375 /* Write into appropriate registers a function return value of type
2376 TYPE, given in virtual format. */
2379 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2382 const bfd_byte
*valbuf
= src
;
2384 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2386 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2388 switch (arm_get_fp_model (current_gdbarch
))
2392 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2393 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2396 case ARM_FLOAT_SOFT_FPA
:
2397 case ARM_FLOAT_SOFT_VFP
:
2398 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2399 if (TYPE_LENGTH (type
) > 4)
2400 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2401 valbuf
+ INT_REGISTER_RAW_SIZE
);
2406 (__FILE__
, __LINE__
,
2407 "arm_store_return_value: Floating point model not supported");
2411 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2412 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2413 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2414 || TYPE_CODE (type
) == TYPE_CODE_PTR
2415 || TYPE_CODE (type
) == TYPE_CODE_REF
2416 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2418 if (TYPE_LENGTH (type
) <= 4)
2420 /* Values of one word or less are zero/sign-extended and
2422 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2423 LONGEST val
= unpack_long (type
, valbuf
);
2425 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2426 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2430 /* Integral values greater than one word are stored in consecutive
2431 registers starting with r0. This will always be a multiple of
2432 the regiser size. */
2433 int len
= TYPE_LENGTH (type
);
2434 int regno
= ARM_A1_REGNUM
;
2438 regcache_cooked_write (regs
, regno
++, valbuf
);
2439 len
-= INT_REGISTER_RAW_SIZE
;
2440 valbuf
+= INT_REGISTER_RAW_SIZE
;
2446 /* For a structure or union the behaviour is as if the value had
2447 been stored to word-aligned memory and then loaded into
2448 registers with 32-bit load instruction(s). */
2449 int len
= TYPE_LENGTH (type
);
2450 int regno
= ARM_A1_REGNUM
;
2451 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2455 memcpy (tmpbuf
, valbuf
,
2456 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2457 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2458 len
-= INT_REGISTER_RAW_SIZE
;
2459 valbuf
+= INT_REGISTER_RAW_SIZE
;
2465 arm_get_longjmp_target (CORE_ADDR
*pc
)
2468 char buf
[INT_REGISTER_RAW_SIZE
];
2469 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2471 jb_addr
= read_register (ARM_A1_REGNUM
);
2473 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2474 INT_REGISTER_RAW_SIZE
))
2477 *pc
= extract_unsigned_integer (buf
, INT_REGISTER_RAW_SIZE
);
2481 /* Return non-zero if the PC is inside a thumb call thunk. */
2484 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2486 CORE_ADDR start_addr
;
2488 /* Find the starting address of the function containing the PC. If
2489 the caller didn't give us a name, look it up at the same time. */
2490 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2494 return strncmp (name
, "_call_via_r", 11) == 0;
2497 /* If PC is in a Thumb call or return stub, return the address of the
2498 target PC, which is in a register. The thunk functions are called
2499 _called_via_xx, where x is the register name. The possible names
2500 are r0-r9, sl, fp, ip, sp, and lr. */
2503 arm_skip_stub (CORE_ADDR pc
)
2506 CORE_ADDR start_addr
;
2508 /* Find the starting address and name of the function containing the PC. */
2509 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2512 /* Call thunks always start with "_call_via_". */
2513 if (strncmp (name
, "_call_via_", 10) == 0)
2515 /* Use the name suffix to determine which register contains the
2517 static char *table
[15] =
2518 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2519 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2523 for (regno
= 0; regno
<= 14; regno
++)
2524 if (strcmp (&name
[10], table
[regno
]) == 0)
2525 return read_register (regno
);
2528 return 0; /* not a stub */
2532 set_arm_command (char *args
, int from_tty
)
2534 printf_unfiltered ("\"set arm\" must be followed by an apporpriate subcommand.\n");
2535 help_list (setarmcmdlist
, "set arm ", all_commands
, gdb_stdout
);
2539 show_arm_command (char *args
, int from_tty
)
2541 cmd_show_list (showarmcmdlist
, from_tty
, "");
2544 enum arm_float_model
2545 arm_get_fp_model (struct gdbarch
*gdbarch
)
2547 if (arm_fp_model
== ARM_FLOAT_AUTO
)
2548 return gdbarch_tdep (gdbarch
)->fp_model
;
2550 return arm_fp_model
;
2554 arm_set_fp (struct gdbarch
*gdbarch
)
2556 enum arm_float_model fp_model
= arm_get_fp_model (gdbarch
);
2558 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_LITTLE
2559 && (fp_model
== ARM_FLOAT_SOFT_FPA
|| fp_model
== ARM_FLOAT_FPA
))
2561 set_gdbarch_double_format (gdbarch
,
2562 &floatformat_ieee_double_littlebyte_bigword
);
2563 set_gdbarch_long_double_format
2564 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
2568 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2569 set_gdbarch_long_double_format (gdbarch
,
2570 &floatformat_ieee_double_little
);
2575 set_fp_model_sfunc (char *args
, int from_tty
,
2576 struct cmd_list_element
*c
)
2578 enum arm_float_model fp_model
;
2580 for (fp_model
= ARM_FLOAT_AUTO
; fp_model
!= ARM_FLOAT_LAST
; fp_model
++)
2581 if (strcmp (current_fp_model
, fp_model_strings
[fp_model
]) == 0)
2583 arm_fp_model
= fp_model
;
2587 if (fp_model
== ARM_FLOAT_LAST
)
2588 internal_error (__FILE__
, __LINE__
, "Invalid fp model accepted: %s.",
2591 if (gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2592 arm_set_fp (current_gdbarch
);
2596 show_fp_model (char *args
, int from_tty
,
2597 struct cmd_list_element
*c
)
2599 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2601 if (arm_fp_model
== ARM_FLOAT_AUTO
2602 && gdbarch_bfd_arch_info (current_gdbarch
)->arch
== bfd_arch_arm
)
2603 printf_filtered (" - the default for the current ABI is \"%s\".\n",
2604 fp_model_strings
[tdep
->fp_model
]);
2607 /* If the user changes the register disassembly style used for info
2608 register and other commands, we have to also switch the style used
2609 in opcodes for disassembly output. This function is run in the "set
2610 arm disassembly" command, and does that. */
2613 set_disassembly_style_sfunc (char *args
, int from_tty
,
2614 struct cmd_list_element
*c
)
2616 set_disassembly_style ();
2619 /* Return the ARM register name corresponding to register I. */
2621 arm_register_name (int i
)
2623 return arm_register_names
[i
];
2627 set_disassembly_style (void)
2629 const char *setname
, *setdesc
, **regnames
;
2632 /* Find the style that the user wants in the opcodes table. */
2634 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2635 while ((disassembly_style
!= setname
)
2636 && (current
< num_disassembly_options
))
2637 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2638 current_option
= current
;
2640 /* Fill our copy. */
2641 for (j
= 0; j
< numregs
; j
++)
2642 arm_register_names
[j
] = (char *) regnames
[j
];
2645 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2647 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2648 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2652 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2653 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2656 /* Synchronize the disassembler. */
2657 set_arm_regname_option (current
);
2660 /* arm_othernames implements the "othernames" command. This is deprecated
2661 by the "set arm disassembly" command. */
2664 arm_othernames (char *names
, int n
)
2666 /* Circle through the various flavors. */
2667 current_option
= (current_option
+ 1) % num_disassembly_options
;
2669 disassembly_style
= valid_disassembly_styles
[current_option
];
2670 set_disassembly_style ();
2673 /* Test whether the coff symbol specific value corresponds to a Thumb
2677 coff_sym_is_thumb (int val
)
2679 return (val
== C_THUMBEXT
||
2680 val
== C_THUMBSTAT
||
2681 val
== C_THUMBEXTFUNC
||
2682 val
== C_THUMBSTATFUNC
||
2683 val
== C_THUMBLABEL
);
2686 /* arm_coff_make_msymbol_special()
2687 arm_elf_make_msymbol_special()
2689 These functions test whether the COFF or ELF symbol corresponds to
2690 an address in thumb code, and set a "special" bit in a minimal
2691 symbol to indicate that it does. */
2694 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2696 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2698 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2700 MSYMBOL_SET_SPECIAL (msym
);
2704 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2706 if (coff_sym_is_thumb (val
))
2707 MSYMBOL_SET_SPECIAL (msym
);
2711 static enum gdb_osabi
2712 arm_elf_osabi_sniffer (bfd
*abfd
)
2714 unsigned int elfosabi
, eflags
;
2715 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2717 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2722 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2723 file are conforming to the base specification for that machine
2724 (there are no OS-specific extensions). In order to determine the
2725 real OS in use we must look for OS notes that have been added. */
2726 bfd_map_over_sections (abfd
,
2727 generic_elf_osabi_sniff_abi_tag_sections
,
2729 if (osabi
== GDB_OSABI_UNKNOWN
)
2731 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2732 field for more information. */
2733 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2736 case EF_ARM_EABI_VER1
:
2737 osabi
= GDB_OSABI_ARM_EABI_V1
;
2740 case EF_ARM_EABI_VER2
:
2741 osabi
= GDB_OSABI_ARM_EABI_V2
;
2744 case EF_ARM_EABI_UNKNOWN
:
2745 /* Assume GNU tools. */
2746 osabi
= GDB_OSABI_ARM_APCS
;
2750 internal_error (__FILE__
, __LINE__
,
2751 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2752 "version 0x%x", eflags
);
2758 /* GNU tools use this value. Check note sections in this case,
2760 bfd_map_over_sections (abfd
,
2761 generic_elf_osabi_sniff_abi_tag_sections
,
2763 if (osabi
== GDB_OSABI_UNKNOWN
)
2765 /* Assume APCS ABI. */
2766 osabi
= GDB_OSABI_ARM_APCS
;
2770 case ELFOSABI_FREEBSD
:
2771 osabi
= GDB_OSABI_FREEBSD_ELF
;
2774 case ELFOSABI_NETBSD
:
2775 osabi
= GDB_OSABI_NETBSD_ELF
;
2778 case ELFOSABI_LINUX
:
2779 osabi
= GDB_OSABI_LINUX
;
2787 /* Initialize the current architecture based on INFO. If possible,
2788 re-use an architecture from ARCHES, which is a list of
2789 architectures already created during this debugging session.
2791 Called e.g. at program startup, when reading a core file, and when
2792 reading a binary file. */
2794 static struct gdbarch
*
2795 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2797 struct gdbarch_tdep
*tdep
;
2798 struct gdbarch
*gdbarch
;
2800 /* Try to deterimine the ABI of the object we are loading. */
2802 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2804 switch (bfd_get_flavour (info
.abfd
))
2806 case bfd_target_aout_flavour
:
2807 /* Assume it's an old APCS-style ABI. */
2808 info
.osabi
= GDB_OSABI_ARM_APCS
;
2811 case bfd_target_coff_flavour
:
2812 /* Assume it's an old APCS-style ABI. */
2814 info
.osabi
= GDB_OSABI_ARM_APCS
;
2818 /* Leave it as "unknown". */
2823 /* If there is already a candidate, use it. */
2824 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2826 return arches
->gdbarch
;
2828 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2829 gdbarch
= gdbarch_alloc (&info
, tdep
);
2831 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2832 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2833 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2835 /* We used to default to FPA for generic ARM, but almost nobody uses that
2836 now, and we now provide a way for the user to force the model. So
2837 default to the most useful variant. */
2838 tdep
->fp_model
= ARM_FLOAT_SOFT_FPA
;
2841 switch (info
.byte_order
)
2843 case BFD_ENDIAN_BIG
:
2844 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2845 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2846 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2847 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2851 case BFD_ENDIAN_LITTLE
:
2852 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2853 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2854 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2855 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2860 internal_error (__FILE__
, __LINE__
,
2861 "arm_gdbarch_init: bad byte order for float format");
2864 /* On ARM targets char defaults to unsigned. */
2865 set_gdbarch_char_signed (gdbarch
, 0);
2867 /* This should be low enough for everything. */
2868 tdep
->lowest_pc
= 0x20;
2869 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2871 set_gdbarch_deprecated_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2872 set_gdbarch_deprecated_sizeof_call_dummy_words (gdbarch
, 0);
2874 set_gdbarch_push_dummy_call (gdbarch
, arm_push_dummy_call
);
2876 /* Frame handling. */
2877 set_gdbarch_deprecated_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2878 set_gdbarch_deprecated_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2879 set_gdbarch_deprecated_target_read_fp (gdbarch
, arm_read_fp
);
2880 set_gdbarch_deprecated_frame_chain (gdbarch
, arm_frame_chain
);
2881 set_gdbarch_frameless_function_invocation
2882 (gdbarch
, arm_frameless_function_invocation
);
2883 set_gdbarch_deprecated_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2884 set_gdbarch_frame_args_skip (gdbarch
, 0);
2885 set_gdbarch_deprecated_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2886 set_gdbarch_deprecated_pop_frame (gdbarch
, arm_pop_frame
);
2888 /* Address manipulation. */
2889 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2890 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2892 /* Offset from address of function to start of its code. */
2893 set_gdbarch_function_start_offset (gdbarch
, 0);
2895 /* Advance PC across function entry code. */
2896 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2898 /* Get the PC when a frame might not be available. */
2899 set_gdbarch_deprecated_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2901 /* The stack grows downward. */
2902 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2904 /* Breakpoint manipulation. */
2905 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2906 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2908 /* Information about registers, etc. */
2909 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2910 set_gdbarch_deprecated_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2911 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2912 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2913 set_gdbarch_deprecated_register_byte (gdbarch
, arm_register_byte
);
2914 set_gdbarch_deprecated_register_bytes (gdbarch
,
2915 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2916 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2917 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2918 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2919 set_gdbarch_deprecated_register_raw_size (gdbarch
, arm_register_raw_size
);
2920 set_gdbarch_deprecated_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2921 set_gdbarch_deprecated_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2922 set_gdbarch_deprecated_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2923 set_gdbarch_deprecated_register_virtual_type (gdbarch
, arm_register_type
);
2925 /* Internal <-> external register number maps. */
2926 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2928 /* Integer registers are 4 bytes. */
2929 set_gdbarch_deprecated_register_size (gdbarch
, 4);
2930 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2932 /* Returning results. */
2933 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2934 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2935 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2936 set_gdbarch_extract_struct_value_address (gdbarch
,
2937 arm_extract_struct_value_address
);
2939 /* Single stepping. */
2940 /* XXX For an RDI target we should ask the target if it can single-step. */
2941 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
2944 set_gdbarch_print_insn (gdbarch
, gdb_print_insn_arm
);
2946 /* Minsymbol frobbing. */
2947 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
2948 set_gdbarch_coff_make_msymbol_special (gdbarch
,
2949 arm_coff_make_msymbol_special
);
2951 /* Hook in the ABI-specific overrides, if they have been registered. */
2952 gdbarch_init_osabi (info
, gdbarch
);
2954 /* Now we have tuned the configuration, set a few final things,
2955 based on what the OS ABI has told us. */
2957 if (tdep
->jb_pc
>= 0)
2958 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
2960 /* Floating point sizes and format. */
2961 switch (info
.byte_order
)
2963 case BFD_ENDIAN_BIG
:
2964 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
2965 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
2966 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
2970 case BFD_ENDIAN_LITTLE
:
2971 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
2972 arm_set_fp (gdbarch
);
2976 internal_error (__FILE__
, __LINE__
,
2977 "arm_gdbarch_init: bad byte order for float format");
2984 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
2986 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2991 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
2992 (unsigned long) tdep
->lowest_pc
);
2996 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
2997 struct gdbarch
*gdbarch
)
3003 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3004 struct gdbarch
*gdbarch
)
3010 arm_init_abi_apcs (struct gdbarch_info info
,
3011 struct gdbarch
*gdbarch
)
3016 extern initialize_file_ftype _initialize_arm_tdep
; /* -Wmissing-prototypes */
3019 _initialize_arm_tdep (void)
3021 struct ui_file
*stb
;
3023 struct cmd_list_element
*new_set
, *new_show
;
3024 const char *setname
;
3025 const char *setdesc
;
3026 const char **regnames
;
3028 static char *helptext
;
3030 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3032 /* Register an ELF OS ABI sniffer for ARM binaries. */
3033 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3034 bfd_target_elf_flavour
,
3035 arm_elf_osabi_sniffer
);
3037 /* Register some ABI variants for embedded systems. */
3038 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3039 arm_init_abi_eabi_v1
);
3040 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3041 arm_init_abi_eabi_v2
);
3042 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3045 /* Get the number of possible sets of register names defined in opcodes. */
3046 num_disassembly_options
= get_arm_regname_num_options ();
3048 /* Add root prefix command for all "set arm"/"show arm" commands. */
3049 add_prefix_cmd ("arm", no_class
, set_arm_command
,
3050 "Various ARM-specific commands.",
3051 &setarmcmdlist
, "set arm ", 0, &setlist
);
3053 add_prefix_cmd ("arm", no_class
, show_arm_command
,
3054 "Various ARM-specific commands.",
3055 &showarmcmdlist
, "show arm ", 0, &showlist
);
3057 /* Sync the opcode insn printer with our register viewer. */
3058 parse_arm_disassembler_option ("reg-names-std");
3060 /* Begin creating the help text. */
3061 stb
= mem_fileopen ();
3062 fprintf_unfiltered (stb
, "Set the disassembly style.\n"
3063 "The valid values are:\n");
3065 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3066 valid_disassembly_styles
3067 = xmalloc ((num_disassembly_options
+ 1) * sizeof (char *));
3068 for (i
= 0; i
< num_disassembly_options
; i
++)
3070 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3071 valid_disassembly_styles
[i
] = setname
;
3072 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3074 /* Copy the default names (if found) and synchronize disassembler. */
3075 if (!strcmp (setname
, "std"))
3077 disassembly_style
= setname
;
3079 for (j
= 0; j
< numregs
; j
++)
3080 arm_register_names
[j
] = (char *) regnames
[j
];
3081 set_arm_regname_option (i
);
3084 /* Mark the end of valid options. */
3085 valid_disassembly_styles
[num_disassembly_options
] = NULL
;
3087 /* Finish the creation of the help text. */
3088 fprintf_unfiltered (stb
, "The default is \"std\".");
3089 helptext
= ui_file_xstrdup (stb
, &length
);
3090 ui_file_delete (stb
);
3092 /* Add the deprecated disassembly-flavor command. */
3093 new_set
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3094 valid_disassembly_styles
,
3098 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3099 deprecate_cmd (new_set
, "set arm disassembly");
3100 deprecate_cmd (add_show_from_set (new_set
, &showlist
),
3101 "show arm disassembly");
3103 /* And now add the new interface. */
3104 new_set
= add_set_enum_cmd ("disassembler", no_class
,
3105 valid_disassembly_styles
, &disassembly_style
,
3106 helptext
, &setarmcmdlist
);
3108 set_cmd_sfunc (new_set
, set_disassembly_style_sfunc
);
3109 add_show_from_set (new_set
, &showarmcmdlist
);
3111 add_setshow_cmd_full ("apcs32", no_class
,
3112 var_boolean
, (char *) &arm_apcs_32
,
3113 "Set usage of ARM 32-bit mode.",
3114 "Show usage of ARM 32-bit mode.",
3116 &setlist
, &showlist
, &new_set
, &new_show
);
3117 deprecate_cmd (new_set
, "set arm apcs32");
3118 deprecate_cmd (new_show
, "show arm apcs32");
3120 add_setshow_boolean_cmd ("apcs32", no_class
, &arm_apcs_32
,
3121 "Set usage of ARM 32-bit mode. "
3122 "When off, a 26-bit PC will be used.",
3123 "Show usage of ARM 32-bit mode. "
3124 "When off, a 26-bit PC will be used.",
3126 &setarmcmdlist
, &showarmcmdlist
);
3128 /* Add a command to allow the user to force the FPU model. */
3129 new_set
= add_set_enum_cmd
3130 ("fpu", no_class
, fp_model_strings
, ¤t_fp_model
,
3131 "Set the floating point type.\n"
3132 "auto - Determine the FP typefrom the OS-ABI.\n"
3133 "softfpa - Software FP, mixed-endian doubles on little-endian ARMs.\n"
3134 "fpa - FPA co-processor (GCC compiled).\n"
3135 "softvfp - Software FP with pure-endian doubles.\n"
3136 "vfp - VFP co-processor.",
3138 set_cmd_sfunc (new_set
, set_fp_model_sfunc
);
3139 set_cmd_sfunc (add_show_from_set (new_set
, &showarmcmdlist
), show_fp_model
);
3141 /* Add the deprecated "othernames" command. */
3142 deprecate_cmd (add_com ("othernames", class_obscure
, arm_othernames
,
3143 "Switch to the next set of register names."),
3144 "set arm disassembly");
3146 /* Debugging flag. */
3147 add_setshow_boolean_cmd ("arm", class_maintenance
, &arm_debug
,
3148 "Set ARM debugging. "
3149 "When on, arm-specific debugging is enabled.",
3150 "Show ARM debugging. "
3151 "When on, arm-specific debugging is enabled.",
3153 &setdebuglist
, &showdebuglist
);