1 /* Common target dependent code for GDB on ARM systems.
2 Copyright 1988, 1989, 1991, 1992, 1993, 1995, 1996, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 #include <ctype.h> /* XXX for isupper () */
30 #include "gdb_string.h"
31 #include "dis-asm.h" /* For register flavors. */
35 #include "arch-utils.h"
36 #include "solib-svr4.h"
40 #include "gdb/sim-arm.h"
43 #include "coff/internal.h"
46 #include "gdb_assert.h"
50 /* Each OS has a different mechanism for accessing the various
51 registers stored in the sigcontext structure.
53 SIGCONTEXT_REGISTER_ADDRESS should be defined to the name (or
54 function pointer) which may be used to determine the addresses
55 of the various saved registers in the sigcontext structure.
57 For the ARM target, there are three parameters to this function.
58 The first is the pc value of the frame under consideration, the
59 second the stack pointer of this frame, and the last is the
60 register number to fetch.
62 If the tm.h file does not define this macro, then it's assumed that
63 no mechanism is needed and we define SIGCONTEXT_REGISTER_ADDRESS to
66 When it comes time to multi-arching this code, see the identically
67 named machinery in ia64-tdep.c for an example of how it could be
68 done. It should not be necessary to modify the code below where
69 this macro is used. */
71 #ifdef SIGCONTEXT_REGISTER_ADDRESS
72 #ifndef SIGCONTEXT_REGISTER_ADDRESS_P
73 #define SIGCONTEXT_REGISTER_ADDRESS_P() 1
76 #define SIGCONTEXT_REGISTER_ADDRESS(SP,PC,REG) 0
77 #define SIGCONTEXT_REGISTER_ADDRESS_P() 0
80 /* Macros for setting and testing a bit in a minimal symbol that marks
81 it as Thumb function. The MSB of the minimal symbol's "info" field
82 is used for this purpose. This field is already being used to store
83 the symbol size, so the assumption is that the symbol size cannot
86 MSYMBOL_SET_SPECIAL Actually sets the "special" bit.
87 MSYMBOL_IS_SPECIAL Tests the "special" bit in a minimal symbol.
88 MSYMBOL_SIZE Returns the size of the minimal symbol,
89 i.e. the "info" field with the "special" bit
92 #define MSYMBOL_SET_SPECIAL(msym) \
93 MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) \
96 #define MSYMBOL_IS_SPECIAL(msym) \
97 (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
99 #define MSYMBOL_SIZE(msym) \
100 ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
102 /* Number of different reg name sets (options). */
103 static int num_flavor_options
;
105 /* We have more registers than the disassembler as gdb can print the value
106 of special registers as well.
107 The general register names are overwritten by whatever is being used by
108 the disassembler at the moment. We also adjust the case of cpsr and fps. */
110 /* Initial value: Register names used in ARM's ISA documentation. */
111 static char * arm_register_name_strings
[] =
112 {"r0", "r1", "r2", "r3", /* 0 1 2 3 */
113 "r4", "r5", "r6", "r7", /* 4 5 6 7 */
114 "r8", "r9", "r10", "r11", /* 8 9 10 11 */
115 "r12", "sp", "lr", "pc", /* 12 13 14 15 */
116 "f0", "f1", "f2", "f3", /* 16 17 18 19 */
117 "f4", "f5", "f6", "f7", /* 20 21 22 23 */
118 "fps", "cpsr" }; /* 24 25 */
119 static char **arm_register_names
= arm_register_name_strings
;
121 /* Valid register name flavors. */
122 static const char **valid_flavors
;
124 /* Disassembly flavor to use. Default to "std" register names. */
125 static const char *disassembly_flavor
;
126 /* Index to that option in the opcodes table. */
127 static int current_option
;
129 /* This is used to keep the bfd arch_info in sync with the disassembly
131 static void set_disassembly_flavor_sfunc(char *, int,
132 struct cmd_list_element
*);
133 static void set_disassembly_flavor (void);
135 static void convert_from_extended (const struct floatformat
*, const void *,
137 static void convert_to_extended (const struct floatformat
*, void *,
140 /* Define other aspects of the stack frame. We keep the offsets of
141 all saved registers, 'cause we need 'em a lot! We also keep the
142 current size of the stack frame, and the offset of the frame
143 pointer from the stack pointer (for frameless functions, and when
144 we're still in the prologue of a function with a frame). */
146 struct frame_extra_info
153 /* Addresses for calling Thumb functions have the bit 0 set.
154 Here are some macros to test, set, or clear bit 0 of addresses. */
155 #define IS_THUMB_ADDR(addr) ((addr) & 1)
156 #define MAKE_THUMB_ADDR(addr) ((addr) | 1)
157 #define UNMAKE_THUMB_ADDR(addr) ((addr) & ~1)
160 arm_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*thisframe
)
162 return (FRAME_SAVED_PC (thisframe
) >= LOWEST_PC
);
165 /* Set to true if the 32-bit mode is in use. */
169 /* Flag set by arm_fix_call_dummy that tells whether the target
170 function is a Thumb function. This flag is checked by
171 arm_push_arguments. FIXME: Change the PUSH_ARGUMENTS macro (and
172 its use in valops.c) to pass the function address as an additional
175 static int target_is_thumb
;
177 /* Flag set by arm_fix_call_dummy that tells whether the calling
178 function is a Thumb function. This flag is checked by
179 arm_pc_is_thumb and arm_call_dummy_breakpoint_offset. */
181 static int caller_is_thumb
;
183 /* Determine if the program counter specified in MEMADDR is in a Thumb
187 arm_pc_is_thumb (CORE_ADDR memaddr
)
189 struct minimal_symbol
*sym
;
191 /* If bit 0 of the address is set, assume this is a Thumb address. */
192 if (IS_THUMB_ADDR (memaddr
))
195 /* Thumb functions have a "special" bit set in minimal symbols. */
196 sym
= lookup_minimal_symbol_by_pc (memaddr
);
199 return (MSYMBOL_IS_SPECIAL (sym
));
207 /* Determine if the program counter specified in MEMADDR is in a call
208 dummy being called from a Thumb function. */
211 arm_pc_is_thumb_dummy (CORE_ADDR memaddr
)
213 CORE_ADDR sp
= read_sp ();
215 /* FIXME: Until we switch for the new call dummy macros, this heuristic
216 is the best we can do. We are trying to determine if the pc is on
217 the stack, which (hopefully) will only happen in a call dummy.
218 We hope the current stack pointer is not so far alway from the dummy
219 frame location (true if we have not pushed large data structures or
220 gone too many levels deep) and that our 1024 is not enough to consider
221 code regions as part of the stack (true for most practical purposes). */
222 if (DEPRECATED_PC_IN_CALL_DUMMY (memaddr
, sp
, sp
+ 1024))
223 return caller_is_thumb
;
228 /* Remove useless bits from addresses in a running program. */
230 arm_addr_bits_remove (CORE_ADDR val
)
233 return (val
& (arm_pc_is_thumb (val
) ? 0xfffffffe : 0xfffffffc));
235 return (val
& 0x03fffffc);
238 /* When reading symbols, we need to zap the low bit of the address,
239 which may be set to 1 for Thumb functions. */
241 arm_smash_text_address (CORE_ADDR val
)
246 /* Immediately after a function call, return the saved pc. Can't
247 always go through the frames for this because on some machines the
248 new frame is not set up until the new function executes some
252 arm_saved_pc_after_call (struct frame_info
*frame
)
254 return ADDR_BITS_REMOVE (read_register (ARM_LR_REGNUM
));
257 /* Determine whether the function invocation represented by FI has a
258 frame on the stack associated with it. If it does return zero,
259 otherwise return 1. */
262 arm_frameless_function_invocation (struct frame_info
*fi
)
264 CORE_ADDR func_start
, after_prologue
;
267 /* Sometimes we have functions that do a little setup (like saving the
268 vN registers with the stmdb instruction, but DO NOT set up a frame.
269 The symbol table will report this as a prologue. However, it is
270 important not to try to parse these partial frames as frames, or we
271 will get really confused.
273 So I will demand 3 instructions between the start & end of the
274 prologue before I call it a real prologue, i.e. at least
279 func_start
= (get_pc_function_start (get_frame_pc (fi
)) + FUNCTION_START_OFFSET
);
280 after_prologue
= SKIP_PROLOGUE (func_start
);
282 /* There are some frameless functions whose first two instructions
283 follow the standard APCS form, in which case after_prologue will
284 be func_start + 8. */
286 frameless
= (after_prologue
< func_start
+ 12);
290 /* The address of the arguments in the frame. */
292 arm_frame_args_address (struct frame_info
*fi
)
297 /* The address of the local variables in the frame. */
299 arm_frame_locals_address (struct frame_info
*fi
)
304 /* The number of arguments being passed in the frame. */
306 arm_frame_num_args (struct frame_info
*fi
)
308 /* We have no way of knowing. */
312 /* A typical Thumb prologue looks like this:
316 Sometimes the latter instruction may be replaced by:
324 or, on tpcs, like this:
331 There is always one instruction of three classes:
336 When we have found at least one of each class we are done with the prolog.
337 Note that the "sub sp, #NN" before the push does not count.
341 thumb_skip_prologue (CORE_ADDR pc
, CORE_ADDR func_end
)
343 CORE_ADDR current_pc
;
345 bit 0 - push { rlist }
346 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
347 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
351 for (current_pc
= pc
;
352 current_pc
+ 2 < func_end
&& current_pc
< pc
+ 40;
355 unsigned short insn
= read_memory_unsigned_integer (current_pc
, 2);
357 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
359 findmask
|= 1; /* push found */
361 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
364 if ((findmask
& 1) == 0) /* before push ? */
367 findmask
|= 4; /* add/sub sp found */
369 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
371 findmask
|= 2; /* setting of r7 found */
373 else if (insn
== 0x466f) /* mov r7, sp */
375 findmask
|= 2; /* setting of r7 found */
377 else if (findmask
== (4+2+1))
379 /* We have found one of each type of prologue instruction */
383 /* Something in the prolog that we don't care about or some
384 instruction from outside the prolog scheduled here for
392 /* Advance the PC across any function entry prologue instructions to
393 reach some "real" code.
395 The APCS (ARM Procedure Call Standard) defines the following
399 [stmfd sp!, {a1,a2,a3,a4}]
400 stmfd sp!, {...,fp,ip,lr,pc}
401 [stfe f7, [sp, #-12]!]
402 [stfe f6, [sp, #-12]!]
403 [stfe f5, [sp, #-12]!]
404 [stfe f4, [sp, #-12]!]
405 sub fp, ip, #nn @@ nn == 20 or 4 depending on second insn */
408 arm_skip_prologue (CORE_ADDR pc
)
412 CORE_ADDR func_addr
, func_end
= 0;
414 struct symtab_and_line sal
;
416 /* If we're in a dummy frame, don't even try to skip the prologue. */
417 if (DEPRECATED_PC_IN_CALL_DUMMY (pc
, 0, 0))
420 /* See what the symbol table says. */
422 if (find_pc_partial_function (pc
, &func_name
, &func_addr
, &func_end
))
426 /* Found a function. */
427 sym
= lookup_symbol (func_name
, NULL
, VAR_NAMESPACE
, NULL
, NULL
);
428 if (sym
&& SYMBOL_LANGUAGE (sym
) != language_asm
)
430 /* Don't use this trick for assembly source files. */
431 sal
= find_pc_line (func_addr
, 0);
432 if ((sal
.line
!= 0) && (sal
.end
< func_end
))
437 /* Check if this is Thumb code. */
438 if (arm_pc_is_thumb (pc
))
439 return thumb_skip_prologue (pc
, func_end
);
441 /* Can't find the prologue end in the symbol table, try it the hard way
442 by disassembling the instructions. */
444 /* Like arm_scan_prologue, stop no later than pc + 64. */
445 if (func_end
== 0 || func_end
> pc
+ 64)
448 for (skip_pc
= pc
; skip_pc
< func_end
; skip_pc
+= 4)
450 inst
= read_memory_integer (skip_pc
, 4);
452 /* "mov ip, sp" is no longer a required part of the prologue. */
453 if (inst
== 0xe1a0c00d) /* mov ip, sp */
456 /* Some prologues begin with "str lr, [sp, #-4]!". */
457 if (inst
== 0xe52de004) /* str lr, [sp, #-4]! */
460 if ((inst
& 0xfffffff0) == 0xe92d0000) /* stmfd sp!,{a1,a2,a3,a4} */
463 if ((inst
& 0xfffff800) == 0xe92dd800) /* stmfd sp!,{fp,ip,lr,pc} */
466 /* Any insns after this point may float into the code, if it makes
467 for better instruction scheduling, so we skip them only if we
468 find them, but still consider the function to be frame-ful. */
470 /* We may have either one sfmfd instruction here, or several stfe
471 insns, depending on the version of floating point code we
473 if ((inst
& 0xffbf0fff) == 0xec2d0200) /* sfmfd fn, <cnt>, [sp]! */
476 if ((inst
& 0xffff8fff) == 0xed6d0103) /* stfe fn, [sp, #-12]! */
479 if ((inst
& 0xfffff000) == 0xe24cb000) /* sub fp, ip, #nn */
482 if ((inst
& 0xfffff000) == 0xe24dd000) /* sub sp, sp, #nn */
485 if ((inst
& 0xffffc000) == 0xe54b0000 || /* strb r(0123),[r11,#-nn] */
486 (inst
& 0xffffc0f0) == 0xe14b00b0 || /* strh r(0123),[r11,#-nn] */
487 (inst
& 0xffffc000) == 0xe50b0000) /* str r(0123),[r11,#-nn] */
490 if ((inst
& 0xffffc000) == 0xe5cd0000 || /* strb r(0123),[sp,#nn] */
491 (inst
& 0xffffc0f0) == 0xe1cd00b0 || /* strh r(0123),[sp,#nn] */
492 (inst
& 0xffffc000) == 0xe58d0000) /* str r(0123),[sp,#nn] */
495 /* Un-recognized instruction; stop scanning. */
499 return skip_pc
; /* End of prologue */
503 /* Function: thumb_scan_prologue (helper function for arm_scan_prologue)
504 This function decodes a Thumb function prologue to determine:
505 1) the size of the stack frame
506 2) which registers are saved on it
507 3) the offsets of saved regs
508 4) the offset from the stack pointer to the frame pointer
509 This information is stored in the "extra" fields of the frame_info.
511 A typical Thumb function prologue would create this stack frame
512 (offsets relative to FP)
513 old SP -> 24 stack parameters
516 R7 -> 0 local variables (16 bytes)
517 SP -> -12 additional stack space (12 bytes)
518 The frame size would thus be 36 bytes, and the frame offset would be
519 12 bytes. The frame register is R7.
521 The comments for thumb_skip_prolog() describe the algorithm we use
522 to detect the end of the prolog. */
526 thumb_scan_prologue (struct frame_info
*fi
)
528 CORE_ADDR prologue_start
;
529 CORE_ADDR prologue_end
;
530 CORE_ADDR current_pc
;
531 /* Which register has been copied to register n? */
534 bit 0 - push { rlist }
535 bit 1 - mov r7, sp OR add r7, sp, #imm (setting of r7)
536 bit 2 - sub sp, #simm OR add sp, #simm (adjusting of sp)
541 /* Don't try to scan dummy frames. */
543 && DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
546 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
548 struct symtab_and_line sal
= find_pc_line (prologue_start
, 0);
550 if (sal
.line
== 0) /* no line info, use current PC */
551 prologue_end
= get_frame_pc (fi
);
552 else if (sal
.end
< prologue_end
) /* next line begins after fn end */
553 prologue_end
= sal
.end
; /* (probably means no prologue) */
556 /* We're in the boondocks: allow for
557 16 pushes, an add, and "mv fp,sp". */
558 prologue_end
= prologue_start
+ 40;
560 prologue_end
= min (prologue_end
, get_frame_pc (fi
));
562 /* Initialize the saved register map. When register H is copied to
563 register L, we will put H in saved_reg[L]. */
564 for (i
= 0; i
< 16; i
++)
567 /* Search the prologue looking for instructions that set up the
568 frame pointer, adjust the stack pointer, and save registers.
569 Do this until all basic prolog instructions are found. */
571 fi
->extra_info
->framesize
= 0;
572 for (current_pc
= prologue_start
;
573 (current_pc
< prologue_end
) && ((findmask
& 7) != 7);
580 insn
= read_memory_unsigned_integer (current_pc
, 2);
582 if ((insn
& 0xfe00) == 0xb400) /* push { rlist } */
585 findmask
|= 1; /* push found */
586 /* Bits 0-7 contain a mask for registers R0-R7. Bit 8 says
587 whether to save LR (R14). */
588 mask
= (insn
& 0xff) | ((insn
& 0x100) << 6);
590 /* Calculate offsets of saved R0-R7 and LR. */
591 for (regno
= ARM_LR_REGNUM
; regno
>= 0; regno
--)
592 if (mask
& (1 << regno
))
594 fi
->extra_info
->framesize
+= 4;
595 get_frame_saved_regs (fi
)[saved_reg
[regno
]] =
596 -(fi
->extra_info
->framesize
);
597 /* Reset saved register map. */
598 saved_reg
[regno
] = regno
;
601 else if ((insn
& 0xff00) == 0xb000) /* add sp, #simm OR
604 if ((findmask
& 1) == 0) /* before push? */
607 findmask
|= 4; /* add/sub sp found */
609 offset
= (insn
& 0x7f) << 2; /* get scaled offset */
610 if (insn
& 0x80) /* is it signed? (==subtracting) */
612 fi
->extra_info
->frameoffset
+= offset
;
615 fi
->extra_info
->framesize
-= offset
;
617 else if ((insn
& 0xff00) == 0xaf00) /* add r7, sp, #imm */
619 findmask
|= 2; /* setting of r7 found */
620 fi
->extra_info
->framereg
= THUMB_FP_REGNUM
;
621 /* get scaled offset */
622 fi
->extra_info
->frameoffset
= (insn
& 0xff) << 2;
624 else if (insn
== 0x466f) /* mov r7, sp */
626 findmask
|= 2; /* setting of r7 found */
627 fi
->extra_info
->framereg
= THUMB_FP_REGNUM
;
628 fi
->extra_info
->frameoffset
= 0;
629 saved_reg
[THUMB_FP_REGNUM
] = ARM_SP_REGNUM
;
631 else if ((insn
& 0xffc0) == 0x4640) /* mov r0-r7, r8-r15 */
633 int lo_reg
= insn
& 7; /* dest. register (r0-r7) */
634 int hi_reg
= ((insn
>> 3) & 7) + 8; /* source register (r8-15) */
635 saved_reg
[lo_reg
] = hi_reg
; /* remember hi reg was saved */
638 /* Something in the prolog that we don't care about or some
639 instruction from outside the prolog scheduled here for
645 /* Check if prologue for this frame's PC has already been scanned. If
646 it has, copy the relevant information about that prologue and
647 return non-zero. Otherwise do not copy anything and return zero.
649 The information saved in the cache includes:
650 * the frame register number;
651 * the size of the stack frame;
652 * the offsets of saved regs (relative to the old SP); and
653 * the offset from the stack pointer to the frame pointer
655 The cache contains only one entry, since this is adequate for the
656 typical sequence of prologue scan requests we get. When performing
657 a backtrace, GDB will usually ask to scan the same function twice
658 in a row (once to get the frame chain, and once to fill in the
659 extra frame information). */
661 static struct frame_info
*prologue_cache
;
664 check_prologue_cache (struct frame_info
*fi
)
668 if (get_frame_pc (fi
) == get_frame_pc (prologue_cache
))
670 fi
->extra_info
->framereg
= prologue_cache
->extra_info
->framereg
;
671 fi
->extra_info
->framesize
= prologue_cache
->extra_info
->framesize
;
672 fi
->extra_info
->frameoffset
= prologue_cache
->extra_info
->frameoffset
;
673 for (i
= 0; i
< NUM_REGS
+ NUM_PSEUDO_REGS
; i
++)
674 get_frame_saved_regs (fi
)[i
] = get_frame_saved_regs (prologue_cache
)[i
];
682 /* Copy the prologue information from fi to the prologue cache. */
685 save_prologue_cache (struct frame_info
*fi
)
689 deprecated_update_frame_pc_hack (prologue_cache
, get_frame_pc (fi
));
690 prologue_cache
->extra_info
->framereg
= fi
->extra_info
->framereg
;
691 prologue_cache
->extra_info
->framesize
= fi
->extra_info
->framesize
;
692 prologue_cache
->extra_info
->frameoffset
= fi
->extra_info
->frameoffset
;
694 for (i
= 0; i
< NUM_REGS
+ NUM_PSEUDO_REGS
; i
++)
695 get_frame_saved_regs (prologue_cache
)[i
] = get_frame_saved_regs (fi
)[i
];
699 /* This function decodes an ARM function prologue to determine:
700 1) the size of the stack frame
701 2) which registers are saved on it
702 3) the offsets of saved regs
703 4) the offset from the stack pointer to the frame pointer
704 This information is stored in the "extra" fields of the frame_info.
706 There are two basic forms for the ARM prologue. The fixed argument
707 function call will look like:
710 stmfd sp!, {fp, ip, lr, pc}
714 Which would create this stack frame (offsets relative to FP):
715 IP -> 4 (caller's stack)
716 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
717 -4 LR (return address in caller)
718 -8 IP (copy of caller's SP)
720 SP -> -28 Local variables
722 The frame size would thus be 32 bytes, and the frame offset would be
723 28 bytes. The stmfd call can also save any of the vN registers it
724 plans to use, which increases the frame size accordingly.
726 Note: The stored PC is 8 off of the STMFD instruction that stored it
727 because the ARM Store instructions always store PC + 8 when you read
730 A variable argument function call will look like:
733 stmfd sp!, {a1, a2, a3, a4}
734 stmfd sp!, {fp, ip, lr, pc}
737 Which would create this stack frame (offsets relative to FP):
738 IP -> 20 (caller's stack)
743 FP -> 0 PC (points to address of stmfd instruction + 8 in callee)
744 -4 LR (return address in caller)
745 -8 IP (copy of caller's SP)
747 SP -> -28 Local variables
749 The frame size would thus be 48 bytes, and the frame offset would be
752 There is another potential complication, which is that the optimizer
753 will try to separate the store of fp in the "stmfd" instruction from
754 the "sub fp, ip, #NN" instruction. Almost anything can be there, so
755 we just key on the stmfd, and then scan for the "sub fp, ip, #NN"...
757 Also, note, the original version of the ARM toolchain claimed that there
760 instruction at the end of the prologue. I have never seen GCC produce
761 this, and the ARM docs don't mention it. We still test for it below in
767 arm_scan_prologue (struct frame_info
*fi
)
769 int regno
, sp_offset
, fp_offset
;
770 LONGEST return_value
;
771 CORE_ADDR prologue_start
, prologue_end
, current_pc
;
773 /* Check if this function is already in the cache of frame information. */
774 if (check_prologue_cache (fi
))
777 /* Assume there is no frame until proven otherwise. */
778 fi
->extra_info
->framereg
= ARM_SP_REGNUM
;
779 fi
->extra_info
->framesize
= 0;
780 fi
->extra_info
->frameoffset
= 0;
782 /* Check for Thumb prologue. */
783 if (arm_pc_is_thumb (get_frame_pc (fi
)))
785 thumb_scan_prologue (fi
);
786 save_prologue_cache (fi
);
790 /* Find the function prologue. If we can't find the function in
791 the symbol table, peek in the stack frame to find the PC. */
792 if (find_pc_partial_function (get_frame_pc (fi
), NULL
, &prologue_start
, &prologue_end
))
794 /* One way to find the end of the prologue (which works well
795 for unoptimized code) is to do the following:
797 struct symtab_and_line sal = find_pc_line (prologue_start, 0);
800 prologue_end = get_frame_pc (fi);
801 else if (sal.end < prologue_end)
802 prologue_end = sal.end;
804 This mechanism is very accurate so long as the optimizer
805 doesn't move any instructions from the function body into the
806 prologue. If this happens, sal.end will be the last
807 instruction in the first hunk of prologue code just before
808 the first instruction that the scheduler has moved from
809 the body to the prologue.
811 In order to make sure that we scan all of the prologue
812 instructions, we use a slightly less accurate mechanism which
813 may scan more than necessary. To help compensate for this
814 lack of accuracy, the prologue scanning loop below contains
815 several clauses which'll cause the loop to terminate early if
816 an implausible prologue instruction is encountered.
822 is a suitable endpoint since it accounts for the largest
823 possible prologue plus up to five instructions inserted by
826 if (prologue_end
> prologue_start
+ 64)
828 prologue_end
= prologue_start
+ 64; /* See above. */
833 /* Get address of the stmfd in the prologue of the callee;
834 the saved PC is the address of the stmfd + 8. */
835 if (!safe_read_memory_integer (fi
->frame
, 4, &return_value
))
839 prologue_start
= ADDR_BITS_REMOVE (return_value
) - 8;
840 prologue_end
= prologue_start
+ 64; /* See above. */
844 /* Now search the prologue looking for instructions that set up the
845 frame pointer, adjust the stack pointer, and save registers.
847 Be careful, however, and if it doesn't look like a prologue,
848 don't try to scan it. If, for instance, a frameless function
849 begins with stmfd sp!, then we will tell ourselves there is
850 a frame, which will confuse stack traceback, as well as "finish"
851 and other operations that rely on a knowledge of the stack
854 In the APCS, the prologue should start with "mov ip, sp" so
855 if we don't see this as the first insn, we will stop.
857 [Note: This doesn't seem to be true any longer, so it's now an
858 optional part of the prologue. - Kevin Buettner, 2001-11-20]
860 [Note further: The "mov ip,sp" only seems to be missing in
861 frameless functions at optimization level "-O2" or above,
862 in which case it is often (but not always) replaced by
863 "str lr, [sp, #-4]!". - Michael Snyder, 2002-04-23] */
865 sp_offset
= fp_offset
= 0;
867 for (current_pc
= prologue_start
;
868 current_pc
< prologue_end
;
871 unsigned int insn
= read_memory_unsigned_integer (current_pc
, 4);
873 if (insn
== 0xe1a0c00d) /* mov ip, sp */
877 else if (insn
== 0xe52de004) /* str lr, [sp, #-4]! */
879 /* Function is frameless: extra_info defaults OK? */
882 else if ((insn
& 0xffff0000) == 0xe92d0000)
883 /* stmfd sp!, {..., fp, ip, lr, pc}
885 stmfd sp!, {a1, a2, a3, a4} */
887 int mask
= insn
& 0xffff;
889 /* Calculate offsets of saved registers. */
890 for (regno
= ARM_PC_REGNUM
; regno
>= 0; regno
--)
891 if (mask
& (1 << regno
))
894 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
897 else if ((insn
& 0xffffc000) == 0xe54b0000 || /* strb rx,[r11,#-n] */
898 (insn
& 0xffffc0f0) == 0xe14b00b0 || /* strh rx,[r11,#-n] */
899 (insn
& 0xffffc000) == 0xe50b0000) /* str rx,[r11,#-n] */
901 /* No need to add this to saved_regs -- it's just an arg reg. */
904 else if ((insn
& 0xffffc000) == 0xe5cd0000 || /* strb rx,[sp,#n] */
905 (insn
& 0xffffc0f0) == 0xe1cd00b0 || /* strh rx,[sp,#n] */
906 (insn
& 0xffffc000) == 0xe58d0000) /* str rx,[sp,#n] */
908 /* No need to add this to saved_regs -- it's just an arg reg. */
911 else if ((insn
& 0xfffff000) == 0xe24cb000) /* sub fp, ip #n */
913 unsigned imm
= insn
& 0xff; /* immediate value */
914 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
915 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
917 fi
->extra_info
->framereg
= ARM_FP_REGNUM
;
919 else if ((insn
& 0xfffff000) == 0xe24dd000) /* sub sp, sp #n */
921 unsigned imm
= insn
& 0xff; /* immediate value */
922 unsigned rot
= (insn
& 0xf00) >> 7; /* rotate amount */
923 imm
= (imm
>> rot
) | (imm
<< (32 - rot
));
926 else if ((insn
& 0xffff7fff) == 0xed6d0103) /* stfe f?, [sp, -#c]! */
929 regno
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x07);
930 get_frame_saved_regs (fi
)[regno
] = sp_offset
;
932 else if ((insn
& 0xffbf0fff) == 0xec2d0200) /* sfmfd f0, 4, [sp!] */
935 unsigned int fp_start_reg
, fp_bound_reg
;
937 if ((insn
& 0x800) == 0x800) /* N0 is set */
939 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
946 if ((insn
& 0x40000) == 0x40000) /* N1 is set */
952 fp_start_reg
= ARM_F0_REGNUM
+ ((insn
>> 12) & 0x7);
953 fp_bound_reg
= fp_start_reg
+ n_saved_fp_regs
;
954 for (; fp_start_reg
< fp_bound_reg
; fp_start_reg
++)
957 get_frame_saved_regs (fi
)[fp_start_reg
++] = sp_offset
;
960 else if ((insn
& 0xf0000000) != 0xe0000000)
961 break; /* Condition not true, exit early */
962 else if ((insn
& 0xfe200000) == 0xe8200000) /* ldm? */
963 break; /* Don't scan past a block load */
965 /* The optimizer might shove anything into the prologue,
966 so we just skip what we don't recognize. */
970 /* The frame size is just the negative of the offset (from the
971 original SP) of the last thing thing we pushed on the stack.
972 The frame offset is [new FP] - [new SP]. */
973 fi
->extra_info
->framesize
= -sp_offset
;
974 if (fi
->extra_info
->framereg
== ARM_FP_REGNUM
)
975 fi
->extra_info
->frameoffset
= fp_offset
- sp_offset
;
977 fi
->extra_info
->frameoffset
= 0;
979 save_prologue_cache (fi
);
982 /* Find REGNUM on the stack. Otherwise, it's in an active register.
983 One thing we might want to do here is to check REGNUM against the
984 clobber mask, and somehow flag it as invalid if it isn't saved on
985 the stack somewhere. This would provide a graceful failure mode
986 when trying to get the value of caller-saves registers for an inner
990 arm_find_callers_reg (struct frame_info
*fi
, int regnum
)
992 /* NOTE: cagney/2002-05-03: This function really shouldn't be
993 needed. Instead the (still being written) register unwind
994 function could be called directly. */
995 for (; fi
; fi
= fi
->next
)
997 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
999 return deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, regnum
);
1001 else if (get_frame_saved_regs (fi
)[regnum
] != 0)
1003 /* NOTE: cagney/2002-05-03: This would normally need to
1004 handle ARM_SP_REGNUM as a special case as, according to
1005 the frame.h comments, saved_regs[SP_REGNUM] contains the
1006 SP value not its address. It appears that the ARM isn't
1007 doing this though. */
1008 return read_memory_integer (get_frame_saved_regs (fi
)[regnum
],
1009 REGISTER_RAW_SIZE (regnum
));
1012 return read_register (regnum
);
1014 /* Function: frame_chain Given a GDB frame, determine the address of
1015 the calling function's frame. This will be used to create a new
1016 GDB frame struct, and then INIT_EXTRA_FRAME_INFO and
1017 DEPRECATED_INIT_FRAME_PC will be called for the new frame. For
1018 ARM, we save the frame size when we initialize the frame_info. */
1021 arm_frame_chain (struct frame_info
*fi
)
1023 CORE_ADDR caller_pc
;
1024 int framereg
= fi
->extra_info
->framereg
;
1026 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1027 /* A generic call dummy's frame is the same as caller's. */
1030 if (get_frame_pc (fi
) < LOWEST_PC
)
1033 /* If the caller is the startup code, we're at the end of the chain. */
1034 caller_pc
= FRAME_SAVED_PC (fi
);
1036 /* If the caller is Thumb and the caller is ARM, or vice versa,
1037 the frame register of the caller is different from ours.
1038 So we must scan the prologue of the caller to determine its
1039 frame register number. */
1040 /* XXX Fixme, we should try to do this without creating a temporary
1042 if (arm_pc_is_thumb (caller_pc
) != arm_pc_is_thumb (get_frame_pc (fi
)))
1044 struct cleanup
*old_chain
= make_cleanup (null_cleanup
, NULL
);
1045 struct frame_info
*caller_fi
=
1046 deprecated_frame_xmalloc_with_cleanup (SIZEOF_FRAME_SAVED_REGS
,
1047 sizeof (struct frame_extra_info
));
1049 /* Now, scan the prologue and obtain the frame register. */
1050 deprecated_update_frame_pc_hack (caller_fi
, caller_pc
);
1051 arm_scan_prologue (caller_fi
);
1052 framereg
= caller_fi
->extra_info
->framereg
;
1054 /* Deallocate the storage associated with the temporary frame
1056 do_cleanups (old_chain
);
1059 /* If the caller used a frame register, return its value.
1060 Otherwise, return the caller's stack pointer. */
1061 if (framereg
== ARM_FP_REGNUM
|| framereg
== THUMB_FP_REGNUM
)
1062 return arm_find_callers_reg (fi
, framereg
);
1064 return fi
->frame
+ fi
->extra_info
->framesize
;
1067 /* This function actually figures out the frame address for a given pc
1068 and sp. This is tricky because we sometimes don't use an explicit
1069 frame pointer, and the previous stack pointer isn't necessarily
1070 recorded on the stack. The only reliable way to get this info is
1071 to examine the prologue. FROMLEAF is a little confusing, it means
1072 this is the next frame up the chain AFTER a frameless function. If
1073 this is true, then the frame value for this frame is still in the
1077 arm_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1082 if (get_frame_saved_regs (fi
) == NULL
)
1083 frame_saved_regs_zalloc (fi
);
1085 frame_extra_info_zalloc (fi
, sizeof (struct frame_extra_info
));
1087 fi
->extra_info
->framesize
= 0;
1088 fi
->extra_info
->frameoffset
= 0;
1089 fi
->extra_info
->framereg
= 0;
1092 deprecated_update_frame_pc_hack (fi
, FRAME_SAVED_PC (fi
->next
));
1094 memset (get_frame_saved_regs (fi
), '\000', sizeof get_frame_saved_regs (fi
));
1096 /* Compute stack pointer for this frame. We use this value for both
1097 the sigtramp and call dummy cases. */
1100 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
->next
), 0, 0))
1101 /* For generic dummy frames, pull the value direct from the frame.
1102 Having an unwind function to do this would be nice. */
1103 sp
= deprecated_read_register_dummy (get_frame_pc (fi
->next
), fi
->next
->frame
,
1106 sp
= (fi
->next
->frame
- fi
->next
->extra_info
->frameoffset
1107 + fi
->next
->extra_info
->framesize
);
1109 /* Determine whether or not we're in a sigtramp frame.
1110 Unfortunately, it isn't sufficient to test (get_frame_type (fi)
1111 == SIGTRAMP_FRAME) because this value is sometimes set after
1112 invoking INIT_EXTRA_FRAME_INFO. So we test *both*
1113 (get_frame_type (fi) == SIGTRAMP_FRAME) and PC_IN_SIGTRAMP to
1114 determine if we need to use the sigcontext addresses for the
1117 Note: If an ARM PC_IN_SIGTRAMP method ever needs to compare
1118 against the name of the function, the code below will have to be
1119 changed to first fetch the name of the function and then pass
1120 this name to PC_IN_SIGTRAMP. */
1122 /* FIXME: cagney/2002-11-18: This problem will go away once
1123 frame.c:get_prev_frame() is modified to set the frame's type
1124 before calling functions like this. */
1126 if (SIGCONTEXT_REGISTER_ADDRESS_P ()
1127 && ((get_frame_type (fi
) == SIGTRAMP_FRAME
) || PC_IN_SIGTRAMP (get_frame_pc (fi
), (char *)0)))
1129 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1130 get_frame_saved_regs (fi
)[reg
] = SIGCONTEXT_REGISTER_ADDRESS (sp
, get_frame_pc (fi
), reg
);
1132 /* FIXME: What about thumb mode? */
1133 fi
->extra_info
->framereg
= ARM_SP_REGNUM
;
1134 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (fi
)[fi
->extra_info
->framereg
], REGISTER_RAW_SIZE (fi
->extra_info
->framereg
)));
1135 fi
->extra_info
->framesize
= 0;
1136 fi
->extra_info
->frameoffset
= 0;
1141 arm_scan_prologue (fi
);
1144 /* This is the innermost frame? */
1145 deprecated_update_frame_base_hack (fi
, read_register (fi
->extra_info
->framereg
));
1146 else if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
->next
), 0, 0))
1147 /* Next inner most frame is a dummy, just grab its frame.
1148 Dummy frames always have the same FP as their caller. */
1149 deprecated_update_frame_base_hack (fi
, fi
->next
->frame
);
1150 else if (fi
->extra_info
->framereg
== ARM_FP_REGNUM
1151 || fi
->extra_info
->framereg
== THUMB_FP_REGNUM
)
1153 /* not the innermost frame */
1154 /* If we have an FP, the callee saved it. */
1155 if (get_frame_saved_regs (get_next_frame (fi
))[fi
->extra_info
->framereg
] != 0)
1156 deprecated_update_frame_base_hack (fi
, read_memory_integer (get_frame_saved_regs (get_next_frame (fi
))[fi
->extra_info
->framereg
], 4));
1158 /* If we were called by a frameless fn. then our frame is
1159 still in the frame pointer register on the board... */
1160 deprecated_update_frame_base_hack (fi
, read_fp ());
1163 /* Calculate actual addresses of saved registers using offsets
1164 determined by arm_scan_prologue. */
1165 for (reg
= 0; reg
< NUM_REGS
; reg
++)
1166 if (get_frame_saved_regs (fi
)[reg
] != 0)
1167 get_frame_saved_regs (fi
)[reg
] += (fi
->frame
+ fi
->extra_info
->framesize
1168 - fi
->extra_info
->frameoffset
);
1173 /* Find the caller of this frame. We do this by seeing if ARM_LR_REGNUM
1174 is saved in the stack anywhere, otherwise we get it from the
1177 The old definition of this function was a macro:
1178 #define FRAME_SAVED_PC(FRAME) \
1179 ADDR_BITS_REMOVE (read_memory_integer ((FRAME)->frame - 4, 4)) */
1182 arm_frame_saved_pc (struct frame_info
*fi
)
1184 /* If a dummy frame, pull the PC out of the frame's register buffer. */
1185 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), 0, 0))
1186 return deprecated_read_register_dummy (get_frame_pc (fi
), fi
->frame
, ARM_PC_REGNUM
);
1188 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (fi
), fi
->frame
- fi
->extra_info
->frameoffset
,
1191 return read_memory_integer (get_frame_saved_regs (fi
)[ARM_PC_REGNUM
],
1192 REGISTER_RAW_SIZE (ARM_PC_REGNUM
));
1196 CORE_ADDR pc
= arm_find_callers_reg (fi
, ARM_LR_REGNUM
);
1197 return IS_THUMB_ADDR (pc
) ? UNMAKE_THUMB_ADDR (pc
) : pc
;
1201 /* Return the frame address. On ARM, it is R11; on Thumb it is R7.
1202 Examine the Program Status Register to decide which state we're in. */
1207 if (read_register (ARM_PS_REGNUM
) & 0x20) /* Bit 5 is Thumb state bit */
1208 return read_register (THUMB_FP_REGNUM
); /* R7 if Thumb */
1210 return read_register (ARM_FP_REGNUM
); /* R11 if ARM */
1213 /* Store into a struct frame_saved_regs the addresses of the saved
1214 registers of frame described by FRAME_INFO. This includes special
1215 registers such as PC and FP saved in special ways in the stack
1216 frame. SP is even more special: the address we return for it IS
1217 the sp for the next frame. */
1220 arm_frame_init_saved_regs (struct frame_info
*fip
)
1223 if (get_frame_saved_regs (fip
))
1226 arm_init_extra_frame_info (0, fip
);
1229 /* Set the return address for a generic dummy frame. ARM uses the
1233 arm_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1235 write_register (ARM_LR_REGNUM
, CALL_DUMMY_ADDRESS ());
1239 /* Push an empty stack frame, to record the current PC, etc. */
1242 arm_push_dummy_frame (void)
1244 CORE_ADDR old_sp
= read_register (ARM_SP_REGNUM
);
1245 CORE_ADDR sp
= old_sp
;
1246 CORE_ADDR fp
, prologue_start
;
1249 /* Push the two dummy prologue instructions in reverse order,
1250 so that they'll be in the correct low-to-high order in memory. */
1251 /* sub fp, ip, #4 */
1252 sp
= push_word (sp
, 0xe24cb004);
1253 /* stmdb sp!, {r0-r10, fp, ip, lr, pc} */
1254 prologue_start
= sp
= push_word (sp
, 0xe92ddfff);
1256 /* Push a pointer to the dummy prologue + 12, because when stm
1257 instruction stores the PC, it stores the address of the stm
1258 instruction itself plus 12. */
1259 fp
= sp
= push_word (sp
, prologue_start
+ 12);
1261 /* Push the processor status. */
1262 sp
= push_word (sp
, read_register (ARM_PS_REGNUM
));
1264 /* Push all 16 registers starting with r15. */
1265 for (regnum
= ARM_PC_REGNUM
; regnum
>= 0; regnum
--)
1266 sp
= push_word (sp
, read_register (regnum
));
1268 /* Update fp (for both Thumb and ARM) and sp. */
1269 write_register (ARM_FP_REGNUM
, fp
);
1270 write_register (THUMB_FP_REGNUM
, fp
);
1271 write_register (ARM_SP_REGNUM
, sp
);
1274 /* CALL_DUMMY_WORDS:
1275 This sequence of words is the instructions
1281 Note this is 12 bytes. */
1283 static LONGEST arm_call_dummy_words
[] =
1285 0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe
1288 /* Adjust the call_dummy_breakpoint_offset for the bp_call_dummy
1289 breakpoint to the proper address in the call dummy, so that
1290 `finish' after a stop in a call dummy works.
1292 FIXME rearnsha 2002-02018: Tweeking current_gdbarch is not an
1293 optimal solution, but the call to arm_fix_call_dummy is immediately
1294 followed by a call to run_stack_dummy, which is the only function
1295 where call_dummy_breakpoint_offset is actually used. */
1299 arm_set_call_dummy_breakpoint_offset (void)
1301 if (caller_is_thumb
)
1302 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 4);
1304 set_gdbarch_call_dummy_breakpoint_offset (current_gdbarch
, 8);
1307 /* Fix up the call dummy, based on whether the processor is currently
1308 in Thumb or ARM mode, and whether the target function is Thumb or
1309 ARM. There are three different situations requiring three
1312 * ARM calling ARM: uses the call dummy in tm-arm.h, which has already
1313 been copied into the dummy parameter to this function.
1314 * ARM calling Thumb: uses the call dummy in tm-arm.h, but with the
1315 "mov pc,r4" instruction patched to be a "bx r4" instead.
1316 * Thumb calling anything: uses the Thumb dummy defined below, which
1317 works for calling both ARM and Thumb functions.
1319 All three call dummies expect to receive the target function
1320 address in R4, with the low bit set if it's a Thumb function. */
1323 arm_fix_call_dummy (char *dummy
, CORE_ADDR pc
, CORE_ADDR fun
, int nargs
,
1324 struct value
**args
, struct type
*type
, int gcc_p
)
1326 static short thumb_dummy
[4] =
1328 0xf000, 0xf801, /* bl label */
1329 0xdf18, /* swi 24 */
1330 0x4720, /* label: bx r4 */
1332 static unsigned long arm_bx_r4
= 0xe12fff14; /* bx r4 instruction */
1334 /* Set flag indicating whether the current PC is in a Thumb function. */
1335 caller_is_thumb
= arm_pc_is_thumb (read_pc ());
1336 arm_set_call_dummy_breakpoint_offset ();
1338 /* If the target function is Thumb, set the low bit of the function
1339 address. And if the CPU is currently in ARM mode, patch the
1340 second instruction of call dummy to use a BX instruction to
1341 switch to Thumb mode. */
1342 target_is_thumb
= arm_pc_is_thumb (fun
);
1343 if (target_is_thumb
)
1346 if (!caller_is_thumb
)
1347 store_unsigned_integer (dummy
+ 4, sizeof (arm_bx_r4
), arm_bx_r4
);
1350 /* If the CPU is currently in Thumb mode, use the Thumb call dummy
1351 instead of the ARM one that's already been copied. This will
1352 work for both Thumb and ARM target functions. */
1353 if (caller_is_thumb
)
1357 int len
= sizeof (thumb_dummy
) / sizeof (thumb_dummy
[0]);
1359 for (i
= 0; i
< len
; i
++)
1361 store_unsigned_integer (p
, sizeof (thumb_dummy
[0]), thumb_dummy
[i
]);
1362 p
+= sizeof (thumb_dummy
[0]);
1366 /* Put the target address in r4; the call dummy will copy this to
1368 write_register (4, fun
);
1373 This function does not support passing parameters using the FPA
1374 variant of the APCS. It passes any floating point arguments in the
1375 general registers and/or on the stack. */
1378 arm_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1379 int struct_return
, CORE_ADDR struct_addr
)
1387 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
1389 /* Walk through the list of args and determine how large a temporary
1390 stack is required. Need to take care here as structs may be
1391 passed on the stack, and we have to to push them. On the second
1392 pass, do the store. */
1395 for (second_pass
= 0; second_pass
< 2; second_pass
++)
1397 /* Compute the FP using the information computed during the
1403 argreg
= ARM_A1_REGNUM
;
1406 /* The struct_return pointer occupies the first parameter
1407 passing register. */
1413 fprintf_unfiltered (gdb_stdlog
,
1414 "struct return in %s = 0x%s\n",
1415 REGISTER_NAME (argreg
),
1416 paddr (struct_addr
));
1417 write_register (argreg
, struct_addr
);
1422 for (argnum
= 0; argnum
< nargs
; argnum
++)
1425 struct type
*arg_type
;
1426 struct type
*target_type
;
1427 enum type_code typecode
;
1430 arg_type
= check_typedef (VALUE_TYPE (args
[argnum
]));
1431 len
= TYPE_LENGTH (arg_type
);
1432 target_type
= TYPE_TARGET_TYPE (arg_type
);
1433 typecode
= TYPE_CODE (arg_type
);
1434 val
= VALUE_CONTENTS (args
[argnum
]);
1436 /* If the argument is a pointer to a function, and it is a
1437 Thumb function, create a LOCAL copy of the value and set
1438 the THUMB bit in it. */
1440 && TYPE_CODE_PTR
== typecode
1441 && target_type
!= NULL
1442 && TYPE_CODE_FUNC
== TYPE_CODE (target_type
))
1444 CORE_ADDR regval
= extract_address (val
, len
);
1445 if (arm_pc_is_thumb (regval
))
1448 store_address (val
, len
, MAKE_THUMB_ADDR (regval
));
1452 /* Copy the argument to general registers or the stack in
1453 register-sized pieces. Large arguments are split between
1454 registers and stack. */
1457 int partial_len
= len
< REGISTER_SIZE
? len
: REGISTER_SIZE
;
1459 if (argreg
<= ARM_LAST_ARG_REGNUM
)
1461 /* The argument is being passed in a general purpose
1465 CORE_ADDR regval
= extract_address (val
,
1468 fprintf_unfiltered (gdb_stdlog
,
1469 "arg %d in %s = 0x%s\n",
1471 REGISTER_NAME (argreg
),
1472 phex (regval
, REGISTER_SIZE
));
1473 write_register (argreg
, regval
);
1481 /* Push the arguments onto the stack. */
1483 fprintf_unfiltered (gdb_stdlog
,
1484 "arg %d @ 0x%s + %d\n",
1485 argnum
, paddr (fp
), nstack
);
1486 write_memory (fp
+ nstack
, val
, REGISTER_SIZE
);
1488 nstack
+= REGISTER_SIZE
;
1498 /* Return the botom of the argument list (pointed to by fp). */
1502 /* Pop the current frame. So long as the frame info has been
1503 initialized properly (see arm_init_extra_frame_info), this code
1504 works for dummy frames as well as regular frames. I.e, there's no
1505 need to have a special case for dummy frames. */
1507 arm_pop_frame (void)
1510 struct frame_info
*frame
= get_current_frame ();
1511 CORE_ADDR old_SP
= (frame
->frame
- frame
->extra_info
->frameoffset
1512 + frame
->extra_info
->framesize
);
1514 if (DEPRECATED_PC_IN_CALL_DUMMY (get_frame_pc (frame
), frame
->frame
, frame
->frame
))
1516 generic_pop_dummy_frame ();
1517 flush_cached_frames ();
1521 for (regnum
= 0; regnum
< NUM_REGS
; regnum
++)
1522 if (get_frame_saved_regs (frame
)[regnum
] != 0)
1523 write_register (regnum
,
1524 read_memory_integer (get_frame_saved_regs (frame
)[regnum
],
1525 REGISTER_RAW_SIZE (regnum
)));
1527 write_register (ARM_PC_REGNUM
, FRAME_SAVED_PC (frame
));
1528 write_register (ARM_SP_REGNUM
, old_SP
);
1530 flush_cached_frames ();
1534 print_fpu_flags (int flags
)
1536 if (flags
& (1 << 0))
1537 fputs ("IVO ", stdout
);
1538 if (flags
& (1 << 1))
1539 fputs ("DVZ ", stdout
);
1540 if (flags
& (1 << 2))
1541 fputs ("OFL ", stdout
);
1542 if (flags
& (1 << 3))
1543 fputs ("UFL ", stdout
);
1544 if (flags
& (1 << 4))
1545 fputs ("INX ", stdout
);
1549 /* Print interesting information about the floating point processor
1550 (if present) or emulator. */
1552 arm_print_float_info (struct gdbarch
*gdbarch
, struct ui_file
*file
,
1553 struct frame_info
*frame
, const char *args
)
1555 register unsigned long status
= read_register (ARM_FPS_REGNUM
);
1558 type
= (status
>> 24) & 127;
1559 printf ("%s FPU type %d\n",
1560 (status
& (1 << 31)) ? "Hardware" : "Software",
1562 fputs ("mask: ", stdout
);
1563 print_fpu_flags (status
>> 16);
1564 fputs ("flags: ", stdout
);
1565 print_fpu_flags (status
);
1568 /* Return the GDB type object for the "standard" data type of data in
1571 static struct type
*
1572 arm_register_type (int regnum
)
1574 if (regnum
>= ARM_F0_REGNUM
&& regnum
< ARM_F0_REGNUM
+ NUM_FREGS
)
1576 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1577 return builtin_type_arm_ext_big
;
1579 return builtin_type_arm_ext_littlebyte_bigword
;
1582 return builtin_type_int32
;
1585 /* Index within `registers' of the first byte of the space for
1589 arm_register_byte (int regnum
)
1591 if (regnum
< ARM_F0_REGNUM
)
1592 return regnum
* INT_REGISTER_RAW_SIZE
;
1593 else if (regnum
< ARM_PS_REGNUM
)
1594 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1595 + (regnum
- ARM_F0_REGNUM
) * FP_REGISTER_RAW_SIZE
);
1597 return (NUM_GREGS
* INT_REGISTER_RAW_SIZE
1598 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
1599 + (regnum
- ARM_FPS_REGNUM
) * STATUS_REGISTER_SIZE
);
1602 /* Number of bytes of storage in the actual machine representation for
1603 register N. All registers are 4 bytes, except fp0 - fp7, which are
1604 12 bytes in length. */
1607 arm_register_raw_size (int regnum
)
1609 if (regnum
< ARM_F0_REGNUM
)
1610 return INT_REGISTER_RAW_SIZE
;
1611 else if (regnum
< ARM_FPS_REGNUM
)
1612 return FP_REGISTER_RAW_SIZE
;
1614 return STATUS_REGISTER_SIZE
;
1617 /* Number of bytes of storage in a program's representation
1620 arm_register_virtual_size (int regnum
)
1622 if (regnum
< ARM_F0_REGNUM
)
1623 return INT_REGISTER_VIRTUAL_SIZE
;
1624 else if (regnum
< ARM_FPS_REGNUM
)
1625 return FP_REGISTER_VIRTUAL_SIZE
;
1627 return STATUS_REGISTER_SIZE
;
1630 /* Map GDB internal REGNUM onto the Arm simulator register numbers. */
1632 arm_register_sim_regno (int regnum
)
1635 gdb_assert (reg
>= 0 && reg
< NUM_REGS
);
1637 if (reg
< NUM_GREGS
)
1638 return SIM_ARM_R0_REGNUM
+ reg
;
1641 if (reg
< NUM_FREGS
)
1642 return SIM_ARM_FP0_REGNUM
+ reg
;
1645 if (reg
< NUM_SREGS
)
1646 return SIM_ARM_FPS_REGNUM
+ reg
;
1649 internal_error (__FILE__
, __LINE__
, "Bad REGNUM %d", regnum
);
1652 /* NOTE: cagney/2001-08-20: Both convert_from_extended() and
1653 convert_to_extended() use floatformat_arm_ext_littlebyte_bigword.
1654 It is thought that this is is the floating-point register format on
1655 little-endian systems. */
1658 convert_from_extended (const struct floatformat
*fmt
, const void *ptr
,
1662 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1663 floatformat_to_doublest (&floatformat_arm_ext_big
, ptr
, &d
);
1665 floatformat_to_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1667 floatformat_from_doublest (fmt
, &d
, dbl
);
1671 convert_to_extended (const struct floatformat
*fmt
, void *dbl
, const void *ptr
)
1674 floatformat_to_doublest (fmt
, ptr
, &d
);
1675 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1676 floatformat_from_doublest (&floatformat_arm_ext_big
, &d
, dbl
);
1678 floatformat_from_doublest (&floatformat_arm_ext_littlebyte_bigword
,
1683 condition_true (unsigned long cond
, unsigned long status_reg
)
1685 if (cond
== INST_AL
|| cond
== INST_NV
)
1691 return ((status_reg
& FLAG_Z
) != 0);
1693 return ((status_reg
& FLAG_Z
) == 0);
1695 return ((status_reg
& FLAG_C
) != 0);
1697 return ((status_reg
& FLAG_C
) == 0);
1699 return ((status_reg
& FLAG_N
) != 0);
1701 return ((status_reg
& FLAG_N
) == 0);
1703 return ((status_reg
& FLAG_V
) != 0);
1705 return ((status_reg
& FLAG_V
) == 0);
1707 return ((status_reg
& (FLAG_C
| FLAG_Z
)) == FLAG_C
);
1709 return ((status_reg
& (FLAG_C
| FLAG_Z
)) != FLAG_C
);
1711 return (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0));
1713 return (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0));
1715 return (((status_reg
& FLAG_Z
) == 0) &&
1716 (((status_reg
& FLAG_N
) == 0) == ((status_reg
& FLAG_V
) == 0)));
1718 return (((status_reg
& FLAG_Z
) != 0) ||
1719 (((status_reg
& FLAG_N
) == 0) != ((status_reg
& FLAG_V
) == 0)));
1724 /* Support routines for single stepping. Calculate the next PC value. */
1725 #define submask(x) ((1L << ((x) + 1)) - 1)
1726 #define bit(obj,st) (((obj) >> (st)) & 1)
1727 #define bits(obj,st,fn) (((obj) >> (st)) & submask ((fn) - (st)))
1728 #define sbits(obj,st,fn) \
1729 ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st))))
1730 #define BranchDest(addr,instr) \
1731 ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2)))
1734 static unsigned long
1735 shifted_reg_val (unsigned long inst
, int carry
, unsigned long pc_val
,
1736 unsigned long status_reg
)
1738 unsigned long res
, shift
;
1739 int rm
= bits (inst
, 0, 3);
1740 unsigned long shifttype
= bits (inst
, 5, 6);
1744 int rs
= bits (inst
, 8, 11);
1745 shift
= (rs
== 15 ? pc_val
+ 8 : read_register (rs
)) & 0xFF;
1748 shift
= bits (inst
, 7, 11);
1751 ? ((pc_val
| (ARM_PC_32
? 0 : status_reg
))
1752 + (bit (inst
, 4) ? 12 : 8))
1753 : read_register (rm
));
1758 res
= shift
>= 32 ? 0 : res
<< shift
;
1762 res
= shift
>= 32 ? 0 : res
>> shift
;
1768 res
= ((res
& 0x80000000L
)
1769 ? ~((~res
) >> shift
) : res
>> shift
);
1772 case 3: /* ROR/RRX */
1775 res
= (res
>> 1) | (carry
? 0x80000000L
: 0);
1777 res
= (res
>> shift
) | (res
<< (32 - shift
));
1781 return res
& 0xffffffff;
1784 /* Return number of 1-bits in VAL. */
1787 bitcount (unsigned long val
)
1790 for (nbits
= 0; val
!= 0; nbits
++)
1791 val
&= val
- 1; /* delete rightmost 1-bit in val */
1796 thumb_get_next_pc (CORE_ADDR pc
)
1798 unsigned long pc_val
= ((unsigned long) pc
) + 4; /* PC after prefetch */
1799 unsigned short inst1
= read_memory_integer (pc
, 2);
1800 CORE_ADDR nextpc
= pc
+ 2; /* default is next instruction */
1801 unsigned long offset
;
1803 if ((inst1
& 0xff00) == 0xbd00) /* pop {rlist, pc} */
1807 /* Fetch the saved PC from the stack. It's stored above
1808 all of the other registers. */
1809 offset
= bitcount (bits (inst1
, 0, 7)) * REGISTER_SIZE
;
1810 sp
= read_register (ARM_SP_REGNUM
);
1811 nextpc
= (CORE_ADDR
) read_memory_integer (sp
+ offset
, 4);
1812 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1814 error ("Infinite loop detected");
1816 else if ((inst1
& 0xf000) == 0xd000) /* conditional branch */
1818 unsigned long status
= read_register (ARM_PS_REGNUM
);
1819 unsigned long cond
= bits (inst1
, 8, 11);
1820 if (cond
!= 0x0f && condition_true (cond
, status
)) /* 0x0f = SWI */
1821 nextpc
= pc_val
+ (sbits (inst1
, 0, 7) << 1);
1823 else if ((inst1
& 0xf800) == 0xe000) /* unconditional branch */
1825 nextpc
= pc_val
+ (sbits (inst1
, 0, 10) << 1);
1827 else if ((inst1
& 0xf800) == 0xf000) /* long branch with link */
1829 unsigned short inst2
= read_memory_integer (pc
+ 2, 2);
1830 offset
= (sbits (inst1
, 0, 10) << 12) + (bits (inst2
, 0, 10) << 1);
1831 nextpc
= pc_val
+ offset
;
1838 arm_get_next_pc (CORE_ADDR pc
)
1840 unsigned long pc_val
;
1841 unsigned long this_instr
;
1842 unsigned long status
;
1845 if (arm_pc_is_thumb (pc
))
1846 return thumb_get_next_pc (pc
);
1848 pc_val
= (unsigned long) pc
;
1849 this_instr
= read_memory_integer (pc
, 4);
1850 status
= read_register (ARM_PS_REGNUM
);
1851 nextpc
= (CORE_ADDR
) (pc_val
+ 4); /* Default case */
1853 if (condition_true (bits (this_instr
, 28, 31), status
))
1855 switch (bits (this_instr
, 24, 27))
1858 case 0x1: /* data processing */
1862 unsigned long operand1
, operand2
, result
= 0;
1866 if (bits (this_instr
, 12, 15) != 15)
1869 if (bits (this_instr
, 22, 25) == 0
1870 && bits (this_instr
, 4, 7) == 9) /* multiply */
1871 error ("Illegal update to pc in instruction");
1873 /* Multiply into PC */
1874 c
= (status
& FLAG_C
) ? 1 : 0;
1875 rn
= bits (this_instr
, 16, 19);
1876 operand1
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1878 if (bit (this_instr
, 25))
1880 unsigned long immval
= bits (this_instr
, 0, 7);
1881 unsigned long rotate
= 2 * bits (this_instr
, 8, 11);
1882 operand2
= ((immval
>> rotate
) | (immval
<< (32 - rotate
)))
1885 else /* operand 2 is a shifted register */
1886 operand2
= shifted_reg_val (this_instr
, c
, pc_val
, status
);
1888 switch (bits (this_instr
, 21, 24))
1891 result
= operand1
& operand2
;
1895 result
= operand1
^ operand2
;
1899 result
= operand1
- operand2
;
1903 result
= operand2
- operand1
;
1907 result
= operand1
+ operand2
;
1911 result
= operand1
+ operand2
+ c
;
1915 result
= operand1
- operand2
+ c
;
1919 result
= operand2
- operand1
+ c
;
1925 case 0xb: /* tst, teq, cmp, cmn */
1926 result
= (unsigned long) nextpc
;
1930 result
= operand1
| operand2
;
1934 /* Always step into a function. */
1939 result
= operand1
& ~operand2
;
1946 nextpc
= (CORE_ADDR
) ADDR_BITS_REMOVE (result
);
1949 error ("Infinite loop detected");
1954 case 0x5: /* data transfer */
1957 if (bit (this_instr
, 20))
1960 if (bits (this_instr
, 12, 15) == 15)
1966 if (bit (this_instr
, 22))
1967 error ("Illegal update to pc in instruction");
1969 /* byte write to PC */
1970 rn
= bits (this_instr
, 16, 19);
1971 base
= (rn
== 15) ? pc_val
+ 8 : read_register (rn
);
1972 if (bit (this_instr
, 24))
1975 int c
= (status
& FLAG_C
) ? 1 : 0;
1976 unsigned long offset
=
1977 (bit (this_instr
, 25)
1978 ? shifted_reg_val (this_instr
, c
, pc_val
, status
)
1979 : bits (this_instr
, 0, 11));
1981 if (bit (this_instr
, 23))
1986 nextpc
= (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) base
,
1989 nextpc
= ADDR_BITS_REMOVE (nextpc
);
1992 error ("Infinite loop detected");
1998 case 0x9: /* block transfer */
1999 if (bit (this_instr
, 20))
2002 if (bit (this_instr
, 15))
2007 if (bit (this_instr
, 23))
2010 unsigned long reglist
= bits (this_instr
, 0, 14);
2011 offset
= bitcount (reglist
) * 4;
2012 if (bit (this_instr
, 24)) /* pre */
2015 else if (bit (this_instr
, 24))
2019 unsigned long rn_val
=
2020 read_register (bits (this_instr
, 16, 19));
2022 (CORE_ADDR
) read_memory_integer ((CORE_ADDR
) (rn_val
2026 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2028 error ("Infinite loop detected");
2033 case 0xb: /* branch & link */
2034 case 0xa: /* branch */
2036 nextpc
= BranchDest (pc
, this_instr
);
2038 nextpc
= ADDR_BITS_REMOVE (nextpc
);
2040 error ("Infinite loop detected");
2046 case 0xe: /* coproc ops */
2051 fprintf_filtered (gdb_stderr
, "Bad bit-field extraction\n");
2059 /* single_step() is called just before we want to resume the inferior,
2060 if we want to single-step it but there is no hardware or kernel
2061 single-step support. We find the target of the coming instruction
2064 single_step() is also called just after the inferior stops. If we
2065 had set up a simulated single-step, we undo our damage. */
2068 arm_software_single_step (enum target_signal sig
, int insert_bpt
)
2070 static int next_pc
; /* State between setting and unsetting. */
2071 static char break_mem
[BREAKPOINT_MAX
]; /* Temporary storage for mem@bpt */
2075 next_pc
= arm_get_next_pc (read_register (ARM_PC_REGNUM
));
2076 target_insert_breakpoint (next_pc
, break_mem
);
2079 target_remove_breakpoint (next_pc
, break_mem
);
2082 #include "bfd-in2.h"
2083 #include "libcoff.h"
2086 gdb_print_insn_arm (bfd_vma memaddr
, disassemble_info
*info
)
2088 if (arm_pc_is_thumb (memaddr
))
2090 static asymbol
*asym
;
2091 static combined_entry_type ce
;
2092 static struct coff_symbol_struct csym
;
2093 static struct _bfd fake_bfd
;
2094 static bfd_target fake_target
;
2096 if (csym
.native
== NULL
)
2098 /* Create a fake symbol vector containing a Thumb symbol.
2099 This is solely so that the code in print_insn_little_arm()
2100 and print_insn_big_arm() in opcodes/arm-dis.c will detect
2101 the presence of a Thumb symbol and switch to decoding
2102 Thumb instructions. */
2104 fake_target
.flavour
= bfd_target_coff_flavour
;
2105 fake_bfd
.xvec
= &fake_target
;
2106 ce
.u
.syment
.n_sclass
= C_THUMBEXTFUNC
;
2108 csym
.symbol
.the_bfd
= &fake_bfd
;
2109 csym
.symbol
.name
= "fake";
2110 asym
= (asymbol
*) & csym
;
2113 memaddr
= UNMAKE_THUMB_ADDR (memaddr
);
2114 info
->symbols
= &asym
;
2117 info
->symbols
= NULL
;
2119 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
2120 return print_insn_big_arm (memaddr
, info
);
2122 return print_insn_little_arm (memaddr
, info
);
2125 /* The following define instruction sequences that will cause ARM
2126 cpu's to take an undefined instruction trap. These are used to
2127 signal a breakpoint to GDB.
2129 The newer ARMv4T cpu's are capable of operating in ARM or Thumb
2130 modes. A different instruction is required for each mode. The ARM
2131 cpu's can also be big or little endian. Thus four different
2132 instructions are needed to support all cases.
2134 Note: ARMv4 defines several new instructions that will take the
2135 undefined instruction trap. ARM7TDMI is nominally ARMv4T, but does
2136 not in fact add the new instructions. The new undefined
2137 instructions in ARMv4 are all instructions that had no defined
2138 behaviour in earlier chips. There is no guarantee that they will
2139 raise an exception, but may be treated as NOP's. In practice, it
2140 may only safe to rely on instructions matching:
2142 3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
2143 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
2144 C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
2146 Even this may only true if the condition predicate is true. The
2147 following use a condition predicate of ALWAYS so it is always TRUE.
2149 There are other ways of forcing a breakpoint. GNU/Linux, RISC iX,
2150 and NetBSD all use a software interrupt rather than an undefined
2151 instruction to force a trap. This can be handled by by the
2152 abi-specific code during establishment of the gdbarch vector. */
2155 /* NOTE rearnsha 2002-02-18: for now we allow a non-multi-arch gdb to
2156 override these definitions. */
2157 #ifndef ARM_LE_BREAKPOINT
2158 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
2160 #ifndef ARM_BE_BREAKPOINT
2161 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
2163 #ifndef THUMB_LE_BREAKPOINT
2164 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
2166 #ifndef THUMB_BE_BREAKPOINT
2167 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
2170 static const char arm_default_arm_le_breakpoint
[] = ARM_LE_BREAKPOINT
;
2171 static const char arm_default_arm_be_breakpoint
[] = ARM_BE_BREAKPOINT
;
2172 static const char arm_default_thumb_le_breakpoint
[] = THUMB_LE_BREAKPOINT
;
2173 static const char arm_default_thumb_be_breakpoint
[] = THUMB_BE_BREAKPOINT
;
2175 /* Determine the type and size of breakpoint to insert at PCPTR. Uses
2176 the program counter value to determine whether a 16-bit or 32-bit
2177 breakpoint should be used. It returns a pointer to a string of
2178 bytes that encode a breakpoint instruction, stores the length of
2179 the string to *lenptr, and adjusts the program counter (if
2180 necessary) to point to the actual memory location where the
2181 breakpoint should be inserted. */
2183 /* XXX ??? from old tm-arm.h: if we're using RDP, then we're inserting
2184 breakpoints and storing their handles instread of what was in
2185 memory. It is nice that this is the same size as a handle -
2186 otherwise remote-rdp will have to change. */
2188 static const unsigned char *
2189 arm_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
2191 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2193 if (arm_pc_is_thumb (*pcptr
) || arm_pc_is_thumb_dummy (*pcptr
))
2195 *pcptr
= UNMAKE_THUMB_ADDR (*pcptr
);
2196 *lenptr
= tdep
->thumb_breakpoint_size
;
2197 return tdep
->thumb_breakpoint
;
2201 *lenptr
= tdep
->arm_breakpoint_size
;
2202 return tdep
->arm_breakpoint
;
2206 /* Extract from an array REGBUF containing the (raw) register state a
2207 function return value of type TYPE, and copy that, in virtual
2208 format, into VALBUF. */
2211 arm_extract_return_value (struct type
*type
,
2212 struct regcache
*regs
,
2215 bfd_byte
*valbuf
= dst
;
2217 if (TYPE_CODE_FLT
== TYPE_CODE (type
))
2219 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2221 switch (tdep
->fp_model
)
2225 /* The value is in register F0 in internal format. We need to
2226 extract the raw value and then convert it to the desired
2228 bfd_byte tmpbuf
[FP_REGISTER_RAW_SIZE
];
2230 regcache_cooked_read (regs
, ARM_F0_REGNUM
, tmpbuf
);
2231 convert_from_extended (floatformat_from_type (type
), tmpbuf
,
2236 case ARM_FLOAT_SOFT
:
2237 case ARM_FLOAT_SOFT_VFP
:
2238 regcache_cooked_read (regs
, ARM_A1_REGNUM
, valbuf
);
2239 if (TYPE_LENGTH (type
) > 4)
2240 regcache_cooked_read (regs
, ARM_A1_REGNUM
+ 1,
2241 valbuf
+ INT_REGISTER_RAW_SIZE
);
2246 (__FILE__
, __LINE__
,
2247 "arm_extract_return_value: Floating point model not supported");
2251 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2252 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2253 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2254 || TYPE_CODE (type
) == TYPE_CODE_PTR
2255 || TYPE_CODE (type
) == TYPE_CODE_REF
2256 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2258 /* If the the type is a plain integer, then the access is
2259 straight-forward. Otherwise we have to play around a bit more. */
2260 int len
= TYPE_LENGTH (type
);
2261 int regno
= ARM_A1_REGNUM
;
2266 /* By using store_unsigned_integer we avoid having to do
2267 anything special for small big-endian values. */
2268 regcache_cooked_read_unsigned (regs
, regno
++, &tmp
);
2269 store_unsigned_integer (valbuf
,
2270 (len
> INT_REGISTER_RAW_SIZE
2271 ? INT_REGISTER_RAW_SIZE
: len
),
2273 len
-= INT_REGISTER_RAW_SIZE
;
2274 valbuf
+= INT_REGISTER_RAW_SIZE
;
2279 /* For a structure or union the behaviour is as if the value had
2280 been stored to word-aligned memory and then loaded into
2281 registers with 32-bit load instruction(s). */
2282 int len
= TYPE_LENGTH (type
);
2283 int regno
= ARM_A1_REGNUM
;
2284 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2288 regcache_cooked_read (regs
, regno
++, tmpbuf
);
2289 memcpy (valbuf
, tmpbuf
,
2290 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2291 len
-= INT_REGISTER_RAW_SIZE
;
2292 valbuf
+= INT_REGISTER_RAW_SIZE
;
2297 /* Extract from an array REGBUF containing the (raw) register state
2298 the address in which a function should return its structure value. */
2301 arm_extract_struct_value_address (struct regcache
*regcache
)
2305 regcache_cooked_read_unsigned (regcache
, ARM_A1_REGNUM
, &ret
);
2309 /* Will a function return an aggregate type in memory or in a
2310 register? Return 0 if an aggregate type can be returned in a
2311 register, 1 if it must be returned in memory. */
2314 arm_use_struct_convention (int gcc_p
, struct type
*type
)
2317 register enum type_code code
;
2319 /* In the ARM ABI, "integer" like aggregate types are returned in
2320 registers. For an aggregate type to be integer like, its size
2321 must be less than or equal to REGISTER_SIZE and the offset of
2322 each addressable subfield must be zero. Note that bit fields are
2323 not addressable, and all addressable subfields of unions always
2324 start at offset zero.
2326 This function is based on the behaviour of GCC 2.95.1.
2327 See: gcc/arm.c: arm_return_in_memory() for details.
2329 Note: All versions of GCC before GCC 2.95.2 do not set up the
2330 parameters correctly for a function returning the following
2331 structure: struct { float f;}; This should be returned in memory,
2332 not a register. Richard Earnshaw sent me a patch, but I do not
2333 know of any way to detect if a function like the above has been
2334 compiled with the correct calling convention. */
2336 /* All aggregate types that won't fit in a register must be returned
2338 if (TYPE_LENGTH (type
) > REGISTER_SIZE
)
2343 /* The only aggregate types that can be returned in a register are
2344 structs and unions. Arrays must be returned in memory. */
2345 code
= TYPE_CODE (type
);
2346 if ((TYPE_CODE_STRUCT
!= code
) && (TYPE_CODE_UNION
!= code
))
2351 /* Assume all other aggregate types can be returned in a register.
2352 Run a check for structures, unions and arrays. */
2355 if ((TYPE_CODE_STRUCT
== code
) || (TYPE_CODE_UNION
== code
))
2358 /* Need to check if this struct/union is "integer" like. For
2359 this to be true, its size must be less than or equal to
2360 REGISTER_SIZE and the offset of each addressable subfield
2361 must be zero. Note that bit fields are not addressable, and
2362 unions always start at offset zero. If any of the subfields
2363 is a floating point type, the struct/union cannot be an
2366 /* For each field in the object, check:
2367 1) Is it FP? --> yes, nRc = 1;
2368 2) Is it addressable (bitpos != 0) and
2369 not packed (bitsize == 0)?
2373 for (i
= 0; i
< TYPE_NFIELDS (type
); i
++)
2375 enum type_code field_type_code
;
2376 field_type_code
= TYPE_CODE (TYPE_FIELD_TYPE (type
, i
));
2378 /* Is it a floating point type field? */
2379 if (field_type_code
== TYPE_CODE_FLT
)
2385 /* If bitpos != 0, then we have to care about it. */
2386 if (TYPE_FIELD_BITPOS (type
, i
) != 0)
2388 /* Bitfields are not addressable. If the field bitsize is
2389 zero, then the field is not packed. Hence it cannot be
2390 a bitfield or any other packed type. */
2391 if (TYPE_FIELD_BITSIZE (type
, i
) == 0)
2403 /* Write into appropriate registers a function return value of type
2404 TYPE, given in virtual format. */
2407 arm_store_return_value (struct type
*type
, struct regcache
*regs
,
2410 const bfd_byte
*valbuf
= src
;
2412 if (TYPE_CODE (type
) == TYPE_CODE_FLT
)
2414 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2415 char buf
[ARM_MAX_REGISTER_RAW_SIZE
];
2417 switch (tdep
->fp_model
)
2421 convert_to_extended (floatformat_from_type (type
), buf
, valbuf
);
2422 regcache_cooked_write (regs
, ARM_F0_REGNUM
, buf
);
2425 case ARM_FLOAT_SOFT
:
2426 case ARM_FLOAT_SOFT_VFP
:
2427 regcache_cooked_write (regs
, ARM_A1_REGNUM
, valbuf
);
2428 if (TYPE_LENGTH (type
) > 4)
2429 regcache_cooked_write (regs
, ARM_A1_REGNUM
+ 1,
2430 valbuf
+ INT_REGISTER_RAW_SIZE
);
2435 (__FILE__
, __LINE__
,
2436 "arm_store_return_value: Floating point model not supported");
2440 else if (TYPE_CODE (type
) == TYPE_CODE_INT
2441 || TYPE_CODE (type
) == TYPE_CODE_CHAR
2442 || TYPE_CODE (type
) == TYPE_CODE_BOOL
2443 || TYPE_CODE (type
) == TYPE_CODE_PTR
2444 || TYPE_CODE (type
) == TYPE_CODE_REF
2445 || TYPE_CODE (type
) == TYPE_CODE_ENUM
)
2447 if (TYPE_LENGTH (type
) <= 4)
2449 /* Values of one word or less are zero/sign-extended and
2451 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2452 LONGEST val
= unpack_long (type
, valbuf
);
2454 store_signed_integer (tmpbuf
, INT_REGISTER_RAW_SIZE
, val
);
2455 regcache_cooked_write (regs
, ARM_A1_REGNUM
, tmpbuf
);
2459 /* Integral values greater than one word are stored in consecutive
2460 registers starting with r0. This will always be a multiple of
2461 the regiser size. */
2462 int len
= TYPE_LENGTH (type
);
2463 int regno
= ARM_A1_REGNUM
;
2467 regcache_cooked_write (regs
, regno
++, valbuf
);
2468 len
-= INT_REGISTER_RAW_SIZE
;
2469 valbuf
+= INT_REGISTER_RAW_SIZE
;
2475 /* For a structure or union the behaviour is as if the value had
2476 been stored to word-aligned memory and then loaded into
2477 registers with 32-bit load instruction(s). */
2478 int len
= TYPE_LENGTH (type
);
2479 int regno
= ARM_A1_REGNUM
;
2480 bfd_byte tmpbuf
[INT_REGISTER_RAW_SIZE
];
2484 memcpy (tmpbuf
, valbuf
,
2485 len
> INT_REGISTER_RAW_SIZE
? INT_REGISTER_RAW_SIZE
: len
);
2486 regcache_cooked_write (regs
, regno
++, tmpbuf
);
2487 len
-= INT_REGISTER_RAW_SIZE
;
2488 valbuf
+= INT_REGISTER_RAW_SIZE
;
2493 /* Store the address of the place in which to copy the structure the
2494 subroutine will return. This is called from call_function. */
2497 arm_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
2499 write_register (ARM_A1_REGNUM
, addr
);
2503 arm_get_longjmp_target (CORE_ADDR
*pc
)
2506 char buf
[INT_REGISTER_RAW_SIZE
];
2507 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
2509 jb_addr
= read_register (ARM_A1_REGNUM
);
2511 if (target_read_memory (jb_addr
+ tdep
->jb_pc
* tdep
->jb_elt_size
, buf
,
2512 INT_REGISTER_RAW_SIZE
))
2515 *pc
= extract_address (buf
, INT_REGISTER_RAW_SIZE
);
2519 /* Return non-zero if the PC is inside a thumb call thunk. */
2522 arm_in_call_stub (CORE_ADDR pc
, char *name
)
2524 CORE_ADDR start_addr
;
2526 /* Find the starting address of the function containing the PC. If
2527 the caller didn't give us a name, look it up at the same time. */
2528 if (0 == find_pc_partial_function (pc
, name
? NULL
: &name
,
2532 return strncmp (name
, "_call_via_r", 11) == 0;
2535 /* If PC is in a Thumb call or return stub, return the address of the
2536 target PC, which is in a register. The thunk functions are called
2537 _called_via_xx, where x is the register name. The possible names
2538 are r0-r9, sl, fp, ip, sp, and lr. */
2541 arm_skip_stub (CORE_ADDR pc
)
2544 CORE_ADDR start_addr
;
2546 /* Find the starting address and name of the function containing the PC. */
2547 if (find_pc_partial_function (pc
, &name
, &start_addr
, NULL
) == 0)
2550 /* Call thunks always start with "_call_via_". */
2551 if (strncmp (name
, "_call_via_", 10) == 0)
2553 /* Use the name suffix to determine which register contains the
2555 static char *table
[15] =
2556 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
2557 "r8", "r9", "sl", "fp", "ip", "sp", "lr"
2561 for (regno
= 0; regno
<= 14; regno
++)
2562 if (strcmp (&name
[10], table
[regno
]) == 0)
2563 return read_register (regno
);
2566 return 0; /* not a stub */
2569 /* If the user changes the register disassembly flavor used for info
2570 register and other commands, we have to also switch the flavor used
2571 in opcodes for disassembly output. This function is run in the set
2572 disassembly_flavor command, and does that. */
2575 set_disassembly_flavor_sfunc (char *args
, int from_tty
,
2576 struct cmd_list_element
*c
)
2578 set_disassembly_flavor ();
2581 /* Return the ARM register name corresponding to register I. */
2583 arm_register_name (int i
)
2585 return arm_register_names
[i
];
2589 set_disassembly_flavor (void)
2591 const char *setname
, *setdesc
, **regnames
;
2594 /* Find the flavor that the user wants in the opcodes table. */
2596 numregs
= get_arm_regnames (current
, &setname
, &setdesc
, ®names
);
2597 while ((disassembly_flavor
!= setname
)
2598 && (current
< num_flavor_options
))
2599 get_arm_regnames (++current
, &setname
, &setdesc
, ®names
);
2600 current_option
= current
;
2602 /* Fill our copy. */
2603 for (j
= 0; j
< numregs
; j
++)
2604 arm_register_names
[j
] = (char *) regnames
[j
];
2607 if (isupper (*regnames
[ARM_PC_REGNUM
]))
2609 arm_register_names
[ARM_FPS_REGNUM
] = "FPS";
2610 arm_register_names
[ARM_PS_REGNUM
] = "CPSR";
2614 arm_register_names
[ARM_FPS_REGNUM
] = "fps";
2615 arm_register_names
[ARM_PS_REGNUM
] = "cpsr";
2618 /* Synchronize the disassembler. */
2619 set_arm_regname_option (current
);
2622 /* arm_othernames implements the "othernames" command. This is kind
2623 of hacky, and I prefer the set-show disassembly-flavor which is
2624 also used for the x86 gdb. I will keep this around, however, in
2625 case anyone is actually using it. */
2628 arm_othernames (char *names
, int n
)
2630 /* Circle through the various flavors. */
2631 current_option
= (current_option
+ 1) % num_flavor_options
;
2633 disassembly_flavor
= valid_flavors
[current_option
];
2634 set_disassembly_flavor ();
2637 /* Fetch, and possibly build, an appropriate link_map_offsets structure
2638 for ARM linux targets using the struct offsets defined in <link.h>.
2639 Note, however, that link.h is not actually referred to in this file.
2640 Instead, the relevant structs offsets were obtained from examining
2641 link.h. (We can't refer to link.h from this file because the host
2642 system won't necessarily have it, or if it does, the structs which
2643 it defines will refer to the host system, not the target). */
2645 struct link_map_offsets
*
2646 arm_linux_svr4_fetch_link_map_offsets (void)
2648 static struct link_map_offsets lmo
;
2649 static struct link_map_offsets
*lmp
= 0;
2655 lmo
.r_debug_size
= 8; /* Actual size is 20, but this is all we
2658 lmo
.r_map_offset
= 4;
2661 lmo
.link_map_size
= 20; /* Actual size is 552, but this is all we
2664 lmo
.l_addr_offset
= 0;
2665 lmo
.l_addr_size
= 4;
2667 lmo
.l_name_offset
= 4;
2668 lmo
.l_name_size
= 4;
2670 lmo
.l_next_offset
= 12;
2671 lmo
.l_next_size
= 4;
2673 lmo
.l_prev_offset
= 16;
2674 lmo
.l_prev_size
= 4;
2680 /* Test whether the coff symbol specific value corresponds to a Thumb
2684 coff_sym_is_thumb (int val
)
2686 return (val
== C_THUMBEXT
||
2687 val
== C_THUMBSTAT
||
2688 val
== C_THUMBEXTFUNC
||
2689 val
== C_THUMBSTATFUNC
||
2690 val
== C_THUMBLABEL
);
2693 /* arm_coff_make_msymbol_special()
2694 arm_elf_make_msymbol_special()
2696 These functions test whether the COFF or ELF symbol corresponds to
2697 an address in thumb code, and set a "special" bit in a minimal
2698 symbol to indicate that it does. */
2701 arm_elf_make_msymbol_special(asymbol
*sym
, struct minimal_symbol
*msym
)
2703 /* Thumb symbols are of type STT_LOPROC, (synonymous with
2705 if (ELF_ST_TYPE (((elf_symbol_type
*)sym
)->internal_elf_sym
.st_info
)
2707 MSYMBOL_SET_SPECIAL (msym
);
2711 arm_coff_make_msymbol_special(int val
, struct minimal_symbol
*msym
)
2713 if (coff_sym_is_thumb (val
))
2714 MSYMBOL_SET_SPECIAL (msym
);
2718 static enum gdb_osabi
2719 arm_elf_osabi_sniffer (bfd
*abfd
)
2721 unsigned int elfosabi
, eflags
;
2722 enum gdb_osabi osabi
= GDB_OSABI_UNKNOWN
;
2724 elfosabi
= elf_elfheader (abfd
)->e_ident
[EI_OSABI
];
2729 /* When elfosabi is ELFOSABI_NONE (0), then the ELF structures in the
2730 file are conforming to the base specification for that machine
2731 (there are no OS-specific extensions). In order to determine the
2732 real OS in use we must look for OS notes that have been added. */
2733 bfd_map_over_sections (abfd
,
2734 generic_elf_osabi_sniff_abi_tag_sections
,
2736 if (osabi
== GDB_OSABI_UNKNOWN
)
2738 /* Existing ARM tools don't set this field, so look at the EI_FLAGS
2739 field for more information. */
2740 eflags
= EF_ARM_EABI_VERSION(elf_elfheader(abfd
)->e_flags
);
2743 case EF_ARM_EABI_VER1
:
2744 osabi
= GDB_OSABI_ARM_EABI_V1
;
2747 case EF_ARM_EABI_VER2
:
2748 osabi
= GDB_OSABI_ARM_EABI_V2
;
2751 case EF_ARM_EABI_UNKNOWN
:
2752 /* Assume GNU tools. */
2753 osabi
= GDB_OSABI_ARM_APCS
;
2757 internal_error (__FILE__
, __LINE__
,
2758 "arm_elf_osabi_sniffer: Unknown ARM EABI "
2759 "version 0x%x", eflags
);
2765 /* GNU tools use this value. Check note sections in this case,
2767 bfd_map_over_sections (abfd
,
2768 generic_elf_osabi_sniff_abi_tag_sections
,
2770 if (osabi
== GDB_OSABI_UNKNOWN
)
2772 /* Assume APCS ABI. */
2773 osabi
= GDB_OSABI_ARM_APCS
;
2777 case ELFOSABI_FREEBSD
:
2778 osabi
= GDB_OSABI_FREEBSD_ELF
;
2781 case ELFOSABI_NETBSD
:
2782 osabi
= GDB_OSABI_NETBSD_ELF
;
2785 case ELFOSABI_LINUX
:
2786 osabi
= GDB_OSABI_LINUX
;
2794 /* Initialize the current architecture based on INFO. If possible,
2795 re-use an architecture from ARCHES, which is a list of
2796 architectures already created during this debugging session.
2798 Called e.g. at program startup, when reading a core file, and when
2799 reading a binary file. */
2801 static struct gdbarch
*
2802 arm_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
2804 struct gdbarch_tdep
*tdep
;
2805 struct gdbarch
*gdbarch
;
2807 /* Try to deterimine the ABI of the object we are loading. */
2809 if (info
.abfd
!= NULL
&& info
.osabi
== GDB_OSABI_UNKNOWN
)
2811 switch (bfd_get_flavour (info
.abfd
))
2813 case bfd_target_aout_flavour
:
2814 /* Assume it's an old APCS-style ABI. */
2815 info
.osabi
= GDB_OSABI_ARM_APCS
;
2818 case bfd_target_coff_flavour
:
2819 /* Assume it's an old APCS-style ABI. */
2821 info
.osabi
= GDB_OSABI_ARM_APCS
;
2825 /* Leave it as "unknown". */
2829 /* If there is already a candidate, use it. */
2830 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
2832 return arches
->gdbarch
;
2834 tdep
= xmalloc (sizeof (struct gdbarch_tdep
));
2835 gdbarch
= gdbarch_alloc (&info
, tdep
);
2837 /* NOTE: cagney/2002-12-06: This can be deleted when this arch is
2838 ready to unwind the PC first (see frame.c:get_prev_frame()). */
2839 set_gdbarch_deprecated_init_frame_pc (gdbarch
, init_frame_pc_default
);
2841 /* This is the way it has always defaulted. */
2842 tdep
->fp_model
= ARM_FLOAT_FPA
;
2845 switch (info
.byte_order
)
2847 case BFD_ENDIAN_BIG
:
2848 tdep
->arm_breakpoint
= arm_default_arm_be_breakpoint
;
2849 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_be_breakpoint
);
2850 tdep
->thumb_breakpoint
= arm_default_thumb_be_breakpoint
;
2851 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_be_breakpoint
);
2855 case BFD_ENDIAN_LITTLE
:
2856 tdep
->arm_breakpoint
= arm_default_arm_le_breakpoint
;
2857 tdep
->arm_breakpoint_size
= sizeof (arm_default_arm_le_breakpoint
);
2858 tdep
->thumb_breakpoint
= arm_default_thumb_le_breakpoint
;
2859 tdep
->thumb_breakpoint_size
= sizeof (arm_default_thumb_le_breakpoint
);
2864 internal_error (__FILE__
, __LINE__
,
2865 "arm_gdbarch_init: bad byte order for float format");
2868 /* On ARM targets char defaults to unsigned. */
2869 set_gdbarch_char_signed (gdbarch
, 0);
2871 /* This should be low enough for everything. */
2872 tdep
->lowest_pc
= 0x20;
2873 tdep
->jb_pc
= -1; /* Longjump support not enabled by default. */
2875 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
2876 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
2878 set_gdbarch_call_dummy_p (gdbarch
, 1);
2879 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
2881 set_gdbarch_call_dummy_words (gdbarch
, arm_call_dummy_words
);
2882 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
2883 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
2884 set_gdbarch_call_dummy_length (gdbarch
, 0);
2886 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
2888 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
2889 set_gdbarch_push_return_address (gdbarch
, arm_push_return_address
);
2891 set_gdbarch_push_arguments (gdbarch
, arm_push_arguments
);
2893 /* Frame handling. */
2894 set_gdbarch_frame_chain_valid (gdbarch
, arm_frame_chain_valid
);
2895 set_gdbarch_init_extra_frame_info (gdbarch
, arm_init_extra_frame_info
);
2896 set_gdbarch_read_fp (gdbarch
, arm_read_fp
);
2897 set_gdbarch_frame_chain (gdbarch
, arm_frame_chain
);
2898 set_gdbarch_frameless_function_invocation
2899 (gdbarch
, arm_frameless_function_invocation
);
2900 set_gdbarch_frame_saved_pc (gdbarch
, arm_frame_saved_pc
);
2901 set_gdbarch_frame_args_address (gdbarch
, arm_frame_args_address
);
2902 set_gdbarch_frame_locals_address (gdbarch
, arm_frame_locals_address
);
2903 set_gdbarch_frame_num_args (gdbarch
, arm_frame_num_args
);
2904 set_gdbarch_frame_args_skip (gdbarch
, 0);
2905 set_gdbarch_frame_init_saved_regs (gdbarch
, arm_frame_init_saved_regs
);
2906 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
2907 set_gdbarch_pop_frame (gdbarch
, arm_pop_frame
);
2909 /* Address manipulation. */
2910 set_gdbarch_smash_text_address (gdbarch
, arm_smash_text_address
);
2911 set_gdbarch_addr_bits_remove (gdbarch
, arm_addr_bits_remove
);
2913 /* Offset from address of function to start of its code. */
2914 set_gdbarch_function_start_offset (gdbarch
, 0);
2916 /* Advance PC across function entry code. */
2917 set_gdbarch_skip_prologue (gdbarch
, arm_skip_prologue
);
2919 /* Get the PC when a frame might not be available. */
2920 set_gdbarch_saved_pc_after_call (gdbarch
, arm_saved_pc_after_call
);
2922 /* The stack grows downward. */
2923 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
2925 /* Breakpoint manipulation. */
2926 set_gdbarch_breakpoint_from_pc (gdbarch
, arm_breakpoint_from_pc
);
2927 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
2929 /* Information about registers, etc. */
2930 set_gdbarch_print_float_info (gdbarch
, arm_print_float_info
);
2931 set_gdbarch_fp_regnum (gdbarch
, ARM_FP_REGNUM
); /* ??? */
2932 set_gdbarch_sp_regnum (gdbarch
, ARM_SP_REGNUM
);
2933 set_gdbarch_pc_regnum (gdbarch
, ARM_PC_REGNUM
);
2934 set_gdbarch_register_byte (gdbarch
, arm_register_byte
);
2935 set_gdbarch_register_bytes (gdbarch
,
2936 (NUM_GREGS
* INT_REGISTER_RAW_SIZE
2937 + NUM_FREGS
* FP_REGISTER_RAW_SIZE
2938 + NUM_SREGS
* STATUS_REGISTER_SIZE
));
2939 set_gdbarch_num_regs (gdbarch
, NUM_GREGS
+ NUM_FREGS
+ NUM_SREGS
);
2940 set_gdbarch_register_raw_size (gdbarch
, arm_register_raw_size
);
2941 set_gdbarch_register_virtual_size (gdbarch
, arm_register_virtual_size
);
2942 set_gdbarch_max_register_raw_size (gdbarch
, FP_REGISTER_RAW_SIZE
);
2943 set_gdbarch_max_register_virtual_size (gdbarch
, FP_REGISTER_VIRTUAL_SIZE
);
2944 set_gdbarch_register_virtual_type (gdbarch
, arm_register_type
);
2946 /* Internal <-> external register number maps. */
2947 set_gdbarch_register_sim_regno (gdbarch
, arm_register_sim_regno
);
2949 /* Integer registers are 4 bytes. */
2950 set_gdbarch_register_size (gdbarch
, 4);
2951 set_gdbarch_register_name (gdbarch
, arm_register_name
);
2953 /* Returning results. */
2954 set_gdbarch_extract_return_value (gdbarch
, arm_extract_return_value
);
2955 set_gdbarch_store_return_value (gdbarch
, arm_store_return_value
);
2956 set_gdbarch_store_struct_return (gdbarch
, arm_store_struct_return
);
2957 set_gdbarch_use_struct_convention (gdbarch
, arm_use_struct_convention
);
2958 set_gdbarch_extract_struct_value_address (gdbarch
,
2959 arm_extract_struct_value_address
);
2961 /* Single stepping. */
2962 /* XXX For an RDI target we should ask the target if it can single-step. */
2963 set_gdbarch_software_single_step (gdbarch
, arm_software_single_step
);
2965 /* Minsymbol frobbing. */
2966 set_gdbarch_elf_make_msymbol_special (gdbarch
, arm_elf_make_msymbol_special
);
2967 set_gdbarch_coff_make_msymbol_special (gdbarch
,
2968 arm_coff_make_msymbol_special
);
2970 /* Hook in the ABI-specific overrides, if they have been registered. */
2971 gdbarch_init_osabi (info
, gdbarch
);
2973 /* Now we have tuned the configuration, set a few final things,
2974 based on what the OS ABI has told us. */
2976 if (tdep
->jb_pc
>= 0)
2977 set_gdbarch_get_longjmp_target (gdbarch
, arm_get_longjmp_target
);
2979 /* Floating point sizes and format. */
2980 switch (info
.byte_order
)
2982 case BFD_ENDIAN_BIG
:
2983 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
2984 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_big
);
2985 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
2989 case BFD_ENDIAN_LITTLE
:
2990 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
2991 if (tdep
->fp_model
== ARM_FLOAT_VFP
2992 || tdep
->fp_model
== ARM_FLOAT_SOFT_VFP
)
2994 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_double_little
);
2995 set_gdbarch_long_double_format (gdbarch
,
2996 &floatformat_ieee_double_little
);
3000 set_gdbarch_double_format
3001 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
3002 set_gdbarch_long_double_format
3003 (gdbarch
, &floatformat_ieee_double_littlebyte_bigword
);
3008 internal_error (__FILE__
, __LINE__
,
3009 "arm_gdbarch_init: bad byte order for float format");
3012 /* We can't use SIZEOF_FRAME_SAVED_REGS here, since that still
3013 references the old architecture vector, not the one we are
3015 if (get_frame_saved_regs (prologue_cache
) != NULL
)
3016 xfree (get_frame_saved_regs (prologue_cache
));
3018 /* We can't use NUM_REGS nor NUM_PSEUDO_REGS here, since that still
3019 references the old architecture vector, not the one we are
3021 prologue_cache
->saved_regs
= (CORE_ADDR
*)
3022 xcalloc (1, (sizeof (CORE_ADDR
)
3023 * (gdbarch_num_regs (gdbarch
)
3024 + gdbarch_num_pseudo_regs (gdbarch
))));
3030 arm_dump_tdep (struct gdbarch
*current_gdbarch
, struct ui_file
*file
)
3032 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3037 fprintf_unfiltered (file
, "arm_dump_tdep: Lowest pc = 0x%lx",
3038 (unsigned long) tdep
->lowest_pc
);
3042 arm_init_abi_eabi_v1 (struct gdbarch_info info
,
3043 struct gdbarch
*gdbarch
)
3049 arm_init_abi_eabi_v2 (struct gdbarch_info info
,
3050 struct gdbarch
*gdbarch
)
3056 arm_init_abi_apcs (struct gdbarch_info info
,
3057 struct gdbarch
*gdbarch
)
3063 _initialize_arm_tdep (void)
3065 struct ui_file
*stb
;
3067 struct cmd_list_element
*new_cmd
;
3068 const char *setname
;
3069 const char *setdesc
;
3070 const char **regnames
;
3072 static char *helptext
;
3075 gdbarch_register (bfd_arch_arm
, arm_gdbarch_init
, arm_dump_tdep
);
3077 /* Register an ELF OS ABI sniffer for ARM binaries. */
3078 gdbarch_register_osabi_sniffer (bfd_arch_arm
,
3079 bfd_target_elf_flavour
,
3080 arm_elf_osabi_sniffer
);
3082 /* Register some ABI variants for embedded systems. */
3083 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V1
,
3084 arm_init_abi_eabi_v1
);
3085 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_EABI_V2
,
3086 arm_init_abi_eabi_v2
);
3087 gdbarch_register_osabi (bfd_arch_arm
, 0, GDB_OSABI_ARM_APCS
,
3090 tm_print_insn
= gdb_print_insn_arm
;
3092 /* Get the number of possible sets of register names defined in opcodes. */
3093 num_flavor_options
= get_arm_regname_num_options ();
3095 /* Sync the opcode insn printer with our register viewer. */
3096 parse_arm_disassembler_option ("reg-names-std");
3098 /* Begin creating the help text. */
3099 stb
= mem_fileopen ();
3100 fprintf_unfiltered (stb
, "Set the disassembly flavor.\n\
3101 The valid values are:\n");
3103 /* Initialize the array that will be passed to add_set_enum_cmd(). */
3104 valid_flavors
= xmalloc ((num_flavor_options
+ 1) * sizeof (char *));
3105 for (i
= 0; i
< num_flavor_options
; i
++)
3107 numregs
= get_arm_regnames (i
, &setname
, &setdesc
, ®names
);
3108 valid_flavors
[i
] = setname
;
3109 fprintf_unfiltered (stb
, "%s - %s\n", setname
,
3111 /* Copy the default names (if found) and synchronize disassembler. */
3112 if (!strcmp (setname
, "std"))
3114 disassembly_flavor
= setname
;
3116 for (j
= 0; j
< numregs
; j
++)
3117 arm_register_names
[j
] = (char *) regnames
[j
];
3118 set_arm_regname_option (i
);
3121 /* Mark the end of valid options. */
3122 valid_flavors
[num_flavor_options
] = NULL
;
3124 /* Finish the creation of the help text. */
3125 fprintf_unfiltered (stb
, "The default is \"std\".");
3126 helptext
= ui_file_xstrdup (stb
, &length
);
3127 ui_file_delete (stb
);
3129 /* Add the disassembly-flavor command. */
3130 new_cmd
= add_set_enum_cmd ("disassembly-flavor", no_class
,
3132 &disassembly_flavor
,
3135 set_cmd_sfunc (new_cmd
, set_disassembly_flavor_sfunc
);
3136 add_show_from_set (new_cmd
, &showlist
);
3138 /* ??? Maybe this should be a boolean. */
3139 add_show_from_set (add_set_cmd ("apcs32", no_class
,
3140 var_zinteger
, (char *) &arm_apcs_32
,
3141 "Set usage of ARM 32-bit mode.\n", &setlist
),
3144 /* Add the deprecated "othernames" command. */
3146 add_com ("othernames", class_obscure
, arm_othernames
,
3147 "Switch to the next set of register names.");
3149 /* Allocate the prologue_cache. */
3150 prologue_cache
= deprecated_frame_xmalloc ();
3151 deprecated_set_frame_extra_info_hack (prologue_cache
, xcalloc (1, sizeof (struct frame_extra_info
)));
3153 /* Debugging flag. */
3154 add_show_from_set (add_set_cmd ("arm", class_maintenance
, var_zinteger
,
3155 &arm_debug
, "Set arm debugging.\n\
3156 When non-zero, arm specific debugging is enabled.", &setdebuglist
),