gdb/config/arm/tm-arm.h

   1 /* Definitions to target GDB to ARM targets.
   2    Copyright 1986, 1987, 1988, 1989, 1991, 1993, 1994, 1995, 1996, 1997,
   3    1998, 1999, 2000 Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #ifndef TM_ARM_H
  23 #define TM_ARM_H
  24
  25 /* Forward declarations for prototypes.  */
  26 struct type;
  27 struct value;
  28
  29 /* Target byte order on ARM defaults to selectable, and defaults to
  30    little endian.  */
  31 #define TARGET_BYTE_ORDER_SELECTABLE_P  1
  32 #define TARGET_BYTE_ORDER_DEFAULT       LITTLE_ENDIAN
  33
  34 /* IEEE format floating point.  */
  35 #define IEEE_FLOAT (1)
  36 #define TARGET_DOUBLE_FORMAT  (target_byte_order == BIG_ENDIAN \
  37                                ? &floatformat_ieee_double_big    \
  38                                : &floatformat_ieee_double_littlebyte_bigword)
  39
  40 /* When reading symbols, we need to zap the low bit of the address,
  41    which may be set to 1 for Thumb functions.  */
  42
  43 #define SMASH_TEXT_ADDRESS(addr) ((addr) &= ~0x1)
  44
  45 /* Remove useless bits from addresses in a running program.  */
  46
  47 CORE_ADDR arm_addr_bits_remove (CORE_ADDR);
  48
  49 #define ADDR_BITS_REMOVE(val)   (arm_addr_bits_remove (val))
  50
  51 /* Offset from address of function to start of its code.  Zero on most
  52    machines.  */
  53
  54 #define FUNCTION_START_OFFSET   0
  55
  56 /* Advance PC across any function entry prologue instructions to reach
  57    some "real" code.  */
  58
  59 extern CORE_ADDR arm_skip_prologue (CORE_ADDR pc);
  60
  61 #define SKIP_PROLOGUE(pc)  (arm_skip_prologue (pc))
  62
  63 /* Immediately after a function call, return the saved pc.  Can't
  64    always go through the frames for this because on some machines the
  65    new frame is not set up until the new function executes some
  66    instructions.  */
  67
  68 #define SAVED_PC_AFTER_CALL(frame)  arm_saved_pc_after_call (frame)
  69 struct frame_info;
  70 extern CORE_ADDR arm_saved_pc_after_call (struct frame_info *);
  71
  72 /* The following define instruction sequences that will cause ARM
  73    cpu's to take an undefined instruction trap.  These are used to
  74    signal a breakpoint to GDB.
  75
  76    The newer ARMv4T cpu's are capable of operating in ARM or Thumb
  77    modes.  A different instruction is required for each mode.  The ARM
  78    cpu's can also be big or little endian.  Thus four different
  79    instructions are needed to support all cases.
  80
  81    Note: ARMv4 defines several new instructions that will take the
  82    undefined instruction trap.  ARM7TDMI is nominally ARMv4T, but does
  83    not in fact add the new instructions.  The new undefined
  84    instructions in ARMv4 are all instructions that had no defined
  85    behaviour in earlier chips.  There is no guarantee that they will
  86    raise an exception, but may be treated as NOP's.  In practice, it
  87    may only safe to rely on instructions matching:
  88
  89    3 3 2 2 2 2 2 2 2 2 2 2 1 1 1 1 1 1 1 1 1 1
  90    1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0 9 8 7 6 5 4 3 2 1 0
  91    C C C C 0 1 1 x x x x x x x x x x x x x x x x x x x x 1 x x x x
  92
  93    Even this may only true if the condition predicate is true. The
  94    following use a condition predicate of ALWAYS so it is always TRUE.
  95
  96    There are other ways of forcing a breakpoint.  ARM Linux, RisciX,
  97    and I suspect NetBSD will all use a software interrupt rather than
  98    an undefined instruction to force a trap.  This can be handled by
  99    redefining some or all of the following in a target dependent
 100    fashion.  */
 101
 102 #define ARM_LE_BREAKPOINT {0xFE,0xDE,0xFF,0xE7}
 103 #define ARM_BE_BREAKPOINT {0xE7,0xFF,0xDE,0xFE}
 104 #define THUMB_LE_BREAKPOINT {0xfe,0xdf}
 105 #define THUMB_BE_BREAKPOINT {0xdf,0xfe}
 106
 107 /* Stack grows downward.  */
 108
 109 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
 110
 111 /* !!!! if we're using RDP, then we're inserting breakpoints and
 112    storing their handles instread of what was in memory.  It is nice
 113    that this is the same size as a handle - otherwise remote-rdp will
 114    have to change. */
 115
 116 /* BREAKPOINT_FROM_PC uses the program counter value to determine
 117    whether a 16- or 32-bit breakpoint should be used.  It returns a
 118    pointer to a string of bytes that encode a breakpoint instruction,
 119    stores the length of the string to *lenptr, and adjusts the pc (if
 120    necessary) to point to the actual memory location where the
 121    breakpoint should be inserted.  */
 122
 123 extern breakpoint_from_pc_fn arm_breakpoint_from_pc;
 124 #define BREAKPOINT_FROM_PC(pcptr, lenptr) arm_breakpoint_from_pc (pcptr, lenptr)
 125
 126 /* Amount PC must be decremented by after a breakpoint.  This is often
 127    the number of bytes in BREAKPOINT but not always.  */
 128
 129 #define DECR_PC_AFTER_BREAK 0
 130
 131 /* Code to execute to print interesting information about the floating
 132    point processor (if any) or emulator.  No need to define if there
 133    is nothing to do. */
 134 extern void arm_float_info (void);
 135
 136 #define FLOAT_INFO      { arm_float_info (); }
 137
 138 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 139    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 140    real way to know how big a register is.  */
 141
 142 #define REGISTER_SIZE   4
 143
 144 /* Say how long FP registers are.  Used for documentation purposes and
 145    code readability in this header.  IEEE extended doubles are 80
 146    bits.  DWORD aligned they use 96 bits.  */
 147 #define FP_REGISTER_RAW_SIZE    12
 148
 149 /* GCC doesn't support long doubles (extended IEEE values).  The FP
 150    register virtual size is therefore 64 bits.  Used for documentation
 151    purposes and code readability in this header.  */
 152 #define FP_REGISTER_VIRTUAL_SIZE        8
 153
 154 /* Status registers are the same size as general purpose registers.
 155    Used for documentation purposes and code readability in this
 156    header.  */
 157 #define STATUS_REGISTER_SIZE    REGISTER_SIZE
 158
 159 /* Number of machine registers.  The only define actually required
 160    is NUM_REGS.  The other definitions are used for documentation
 161    purposes and code readability.  */
 162 /* For 26 bit ARM code, a fake copy of the PC is placed in register 25 (PS)
 163    (and called PS for processor status) so the status bits can be cleared
 164    from the PC (register 15).  For 32 bit ARM code, a copy of CPSR is placed
 165    in PS.  */
 166 #define NUM_FREGS       8       /* Number of floating point registers.  */
 167 #define NUM_SREGS       2       /* Number of status registers.  */
 168 #define NUM_GREGS       16      /* Number of general purpose registers.  */
 169 #define NUM_REGS        (NUM_GREGS + NUM_FREGS + NUM_SREGS)
 170
 171 /* An array of names of registers. */
 172 extern char **arm_register_names;
 173
 174 #define REGISTER_NAME(i) arm_register_names[i]
 175
 176 /* Register numbers of various important registers.  Note that some of
 177    these values are "real" register numbers, and correspond to the
 178    general registers of the machine, and some are "phony" register
 179    numbers which are too large to be actual register numbers as far as
 180    the user is concerned but do serve to get the desired values when
 181    passed to read_register.  */
 182
 183 #define A1_REGNUM 0             /* first integer-like argument */
 184 #define A4_REGNUM 3             /* last integer-like argument */
 185 #define AP_REGNUM 11
 186 #define FP_REGNUM 11            /* Contains address of executing stack frame */
 187 #define SP_REGNUM 13            /* Contains address of top of stack */
 188 #define LR_REGNUM 14            /* address to return to from a function call */
 189 #define PC_REGNUM 15            /* Contains program counter */
 190 #define F0_REGNUM 16            /* first floating point register */
 191 #define F3_REGNUM 19            /* last floating point argument register */
 192 #define F7_REGNUM 23            /* last floating point register */
 193 #define FPS_REGNUM 24           /* floating point status register */
 194 #define PS_REGNUM 25            /* Contains processor status */
 195
 196 #define THUMB_FP_REGNUM 7       /* R7 is frame register on Thumb */
 197
 198 #define ARM_NUM_ARG_REGS        4
 199 #define ARM_LAST_ARG_REGNUM     A4_REGNUM
 200 #define ARM_NUM_FP_ARG_REGS     4
 201 #define ARM_LAST_FP_ARG_REGNUM  F3_REGNUM
 202
 203 /* Instruction condition field values.  */
 204 #define INST_EQ         0x0
 205 #define INST_NE         0x1
 206 #define INST_CS         0x2
 207 #define INST_CC         0x3
 208 #define INST_MI         0x4
 209 #define INST_PL         0x5
 210 #define INST_VS         0x6
 211 #define INST_VC         0x7
 212 #define INST_HI         0x8
 213 #define INST_LS         0x9
 214 #define INST_GE         0xa
 215 #define INST_LT         0xb
 216 #define INST_GT         0xc
 217 #define INST_LE         0xd
 218 #define INST_AL         0xe
 219 #define INST_NV         0xf
 220
 221 #define FLAG_N          0x80000000
 222 #define FLAG_Z          0x40000000
 223 #define FLAG_C          0x20000000
 224 #define FLAG_V          0x10000000
 225
 226
 227
 228 /* Total amount of space needed to store our copies of the machine's
 229    register state, the array `registers'.  */
 230
 231 #define REGISTER_BYTES ((NUM_GREGS * REGISTER_SIZE) + \
 232                         (NUM_FREGS * FP_REGISTER_RAW_SIZE) + \
 233                         (NUM_SREGS * STATUS_REGISTER_SIZE))
 234
 235 /* Index within `registers' of the first byte of the space for
 236    register N.  */
 237
 238 #define REGISTER_BYTE(N) \
 239      ((N) < F0_REGNUM \
 240       ? (N) * REGISTER_SIZE \
 241       : ((N) < PS_REGNUM \
 242          ? (NUM_GREGS * REGISTER_SIZE + \
 243             ((N) - F0_REGNUM) * FP_REGISTER_RAW_SIZE) \
 244          : (NUM_GREGS * REGISTER_SIZE + \
 245             NUM_FREGS * FP_REGISTER_RAW_SIZE + \
 246             ((N) - FPS_REGNUM) * STATUS_REGISTER_SIZE)))
 247
 248 /* Number of bytes of storage in the actual machine representation for
 249    register N.  All registers are 4 bytes, except fp0 - fp7, which are
 250    12 bytes in length.  */
 251 #define REGISTER_RAW_SIZE(N) \
 252      ((N) < F0_REGNUM ? REGISTER_SIZE : \
 253       (N) < FPS_REGNUM ? FP_REGISTER_RAW_SIZE : STATUS_REGISTER_SIZE)
 254
 255 /* Number of bytes of storage in a program's representation
 256    for register N.  */
 257 #define REGISTER_VIRTUAL_SIZE(N) \
 258         ((N) < F0_REGNUM ? REGISTER_SIZE : \
 259          (N) < FPS_REGNUM ? FP_REGISTER_VIRTUAL_SIZE : STATUS_REGISTER_SIZE)
 260
 261 /* Largest value REGISTER_RAW_SIZE can have.  */
 262
 263 #define MAX_REGISTER_RAW_SIZE FP_REGISTER_RAW_SIZE
 264
 265 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 266 #define MAX_REGISTER_VIRTUAL_SIZE FP_REGISTER_VIRTUAL_SIZE
 267
 268 /* Nonzero if register N requires conversion from raw format to
 269    virtual format. */
 270 extern int arm_register_convertible (unsigned int);
 271 #define REGISTER_CONVERTIBLE(REGNUM) (arm_register_convertible (REGNUM))
 272
 273 /* Convert data from raw format for register REGNUM in buffer FROM to
 274    virtual format with type TYPE in buffer TO. */
 275
 276 extern void arm_register_convert_to_virtual (unsigned int regnum,
 277                                              struct type *type,
 278                                              void *from, void *to);
 279 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
 280      arm_register_convert_to_virtual (REGNUM, TYPE, FROM, TO)
 281
 282 /* Convert data from virtual format with type TYPE in buffer FROM to
 283    raw format for register REGNUM in buffer TO.  */
 284
 285 extern void arm_register_convert_to_raw (unsigned int regnum,
 286                                          struct type *type,
 287                                          void *from, void *to);
 288 #define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO) \
 289      arm_register_convert_to_raw (REGNUM, TYPE, FROM, TO)
 290
 291 /* Return the GDB type object for the "standard" data type of data in
 292    register N.  */
 293
 294 #define REGISTER_VIRTUAL_TYPE(N) \
 295      (((unsigned)(N) - F0_REGNUM) < NUM_FREGS \
 296       ? builtin_type_double : builtin_type_int)
 297
 298 /* The system C compiler uses a similar structure return convention to gcc */
 299 extern use_struct_convention_fn arm_use_struct_convention;
 300 #define USE_STRUCT_CONVENTION(gcc_p, type) \
 301      arm_use_struct_convention (gcc_p, type)
 302
 303 /* Store the address of the place in which to copy the structure the
 304    subroutine will return.  This is called from call_function. */
 305
 306 #define STORE_STRUCT_RETURN(ADDR, SP) \
 307      write_register (A1_REGNUM, (ADDR))
 308
 309 /* Extract from an array REGBUF containing the (raw) register state a
 310    function return value of type TYPE, and copy that, in virtual
 311    format, into VALBUF.  */
 312
 313 extern void arm_extract_return_value (struct type *, char[], char *);
 314 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 315      arm_extract_return_value ((TYPE), (REGBUF), (VALBUF))
 316
 317 /* Write into appropriate registers a function return value of type
 318    TYPE, given in virtual format.  */
 319
 320 extern void convert_to_extended (void *dbl, void *ptr);
 321 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 322   if (TYPE_CODE (TYPE) == TYPE_CODE_FLT) {                              \
 323     char _buf[MAX_REGISTER_RAW_SIZE];                                   \
 324     convert_to_extended (VALBUF, _buf);                                         \
 325     write_register_bytes (REGISTER_BYTE (F0_REGNUM), _buf, MAX_REGISTER_RAW_SIZE); \
 326   } else                                                                \
 327     write_register_bytes (0, VALBUF, TYPE_LENGTH (TYPE))
 328
 329 /* Extract from an array REGBUF containing the (raw) register state
 330    the address in which a function should return its structure value,
 331    as a CORE_ADDR (or an expression that can be used as one).  */
 332
 333 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 334   (extract_address ((PTR)(REGBUF), REGISTER_RAW_SIZE(0)))
 335
 336 /* Specify that for the native compiler variables for a particular
 337    lexical context are listed after the beginning LBRAC instead of
 338    before in the executables list of symbols.  */
 339 #define VARIABLES_INSIDE_BLOCK(desc, gcc_p) (!(gcc_p))
 340 \f
 341
 342 /* Define other aspects of the stack frame.  We keep the offsets of
 343    all saved registers, 'cause we need 'em a lot!  We also keep the
 344    current size of the stack frame, and the offset of the frame
 345    pointer from the stack pointer (for frameless functions, and when
 346    we're still in the prologue of a function with a frame) */
 347
 348 #define EXTRA_FRAME_INFO        \
 349   struct frame_saved_regs fsr;  \
 350   int framesize;                \
 351   int frameoffset;              \
 352   int framereg;
 353
 354 extern void arm_init_extra_frame_info (int fromleaf, struct frame_info * fi);
 355 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
 356         arm_init_extra_frame_info ((fromleaf), (fi))
 357
 358 /* Return the frame address.  On ARM, it is R11; on Thumb it is R7.  */
 359 CORE_ADDR arm_target_read_fp (void);
 360 #define TARGET_READ_FP() arm_target_read_fp ()
 361
 362 /* Describe the pointer in each stack frame to the previous stack
 363    frame (its caller).  */
 364
 365 /* FRAME_CHAIN takes a frame's nominal address and produces the
 366    frame's chain-pointer.
 367
 368    However, if FRAME_CHAIN_VALID returns zero,
 369    it means the given frame is the outermost one and has no caller.  */
 370
 371 #define FRAME_CHAIN(thisframe) arm_frame_chain (thisframe)
 372 extern CORE_ADDR arm_frame_chain (struct frame_info *);
 373
 374 extern int arm_frame_chain_valid (CORE_ADDR, struct frame_info *);
 375 #define FRAME_CHAIN_VALID(chain, thisframe) \
 376      arm_frame_chain_valid (chain, thisframe)
 377
 378 /* Define other aspects of the stack frame.  */
 379
 380 /* A macro that tells us whether the function invocation represented
 381    by FI does not have a frame on the stack associated with it.  If it
 382    does not, FRAMELESS is set to 1, else 0.
 383
 384    Sometimes we have functions that do a little setup (like saving the
 385    vN registers with the stmdb instruction, but DO NOT set up a frame.
 386    The symbol table will report this as a prologue.  However, it is
 387    important not to try to parse these partial frames as frames, or we
 388    will get really confused.
 389
 390    So I will demand 3 instructions between the start & end of the
 391    prologue before I call it a real prologue, i.e. at least
 392          mov ip, sp,
 393          stmdb sp!, {}
 394          sub sp, ip, #4. */
 395
 396 extern int arm_frameless_function_invocation (struct frame_info *fi);
 397 #define FRAMELESS_FUNCTION_INVOCATION(FI) \
 398 (arm_frameless_function_invocation (FI))
 399
 400 /* Saved Pc.  */
 401
 402 #define FRAME_SAVED_PC(FRAME)   arm_frame_saved_pc (FRAME)
 403 extern CORE_ADDR arm_frame_saved_pc (struct frame_info *);
 404
 405 #define FRAME_ARGS_ADDRESS(fi) (fi->frame)
 406
 407 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
 408
 409 /* Return number of args passed to a frame.
 410    Can return -1, meaning no way to tell.  */
 411
 412 #define FRAME_NUM_ARGS(fi) (-1)
 413
 414 /* Return number of bytes at start of arglist that are not really args. */
 415
 416 #define FRAME_ARGS_SKIP 0
 417
 418 /* Put here the code to store, into a struct frame_saved_regs, the
 419    addresses of the saved registers of frame described by FRAME_INFO.
 420    This includes special registers such as pc and fp saved in special
 421    ways in the stack frame.  sp is even more special: the address we
 422    return for it IS the sp for the next frame.  */
 423
 424 struct frame_saved_regs;
 425 struct frame_info;
 426 void arm_frame_find_saved_regs (struct frame_info * fi,
 427                                 struct frame_saved_regs * fsr);
 428
 429 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
 430         arm_frame_find_saved_regs (frame_info, &(frame_saved_regs));
 431
 432 /* Things needed for making the inferior call functions.  */
 433
 434 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
 435      sp = arm_push_arguments ((nargs), (args), (sp), (struct_return), (struct_addr))
 436 extern CORE_ADDR arm_push_arguments (int, struct value **, CORE_ADDR, int,
 437                                      CORE_ADDR);
 438
 439 /* Push an empty stack frame, to record the current PC, etc.  */
 440
 441 void arm_push_dummy_frame (void);
 442
 443 #define PUSH_DUMMY_FRAME arm_push_dummy_frame ()
 444
 445 /* Discard from the stack the innermost frame, restoring all registers.  */
 446
 447 void arm_pop_frame (void);
 448
 449 #define POP_FRAME arm_pop_frame ()
 450
 451 /* This sequence of words is the instructions
 452
 453    mov  lr,pc
 454    mov  pc,r4
 455    illegal
 456
 457    Note this is 12 bytes.  */
 458
 459 #define CALL_DUMMY {0xe1a0e00f, 0xe1a0f004, 0xe7ffdefe}
 460 #define CALL_DUMMY_START_OFFSET  0      /* Start execution at beginning of dummy */
 461
 462 #define CALL_DUMMY_BREAKPOINT_OFFSET arm_call_dummy_breakpoint_offset()
 463 extern int arm_call_dummy_breakpoint_offset (void);
 464
 465 /* Insert the specified number of args and function address into a
 466    call sequence of the above form stored at DUMMYNAME.  */
 467
 468 #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
 469    arm_fix_call_dummy ((dummyname), (pc), (fun), (nargs), (args), (type), (gcc_p))
 470
 471 void arm_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
 472                          int nargs, struct value ** args,
 473                          struct type * type, int gcc_p);
 474
 475 CORE_ADDR arm_get_next_pc (CORE_ADDR pc);
 476
 477 /* Macros for setting and testing a bit in a minimal symbol that marks
 478    it as Thumb function.  The MSB of the minimal symbol's "info" field
 479    is used for this purpose. This field is already being used to store
 480    the symbol size, so the assumption is that the symbol size cannot
 481    exceed 2^31.
 482
 483    COFF_MAKE_MSYMBOL_SPECIAL
 484    ELF_MAKE_MSYMBOL_SPECIAL
 485
 486    These macros test whether the COFF or ELF symbol corresponds to a
 487    thumb function, and set a "special" bit in a minimal symbol to
 488    indicate that it does.
 489
 490    MSYMBOL_SET_SPECIAL  Actually sets the "special" bit.
 491    MSYMBOL_IS_SPECIAL   Tests the "special" bit in a minimal symbol.
 492    MSYMBOL_SIZE         Returns the size of the minimal symbol,
 493                         i.e. the "info" field with the "special" bit
 494                         masked out
 495    */
 496
 497 extern int coff_sym_is_thumb (int val);
 498
 499 #define MSYMBOL_SET_SPECIAL(msym) \
 500         MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000)
 501 #define MSYMBOL_IS_SPECIAL(msym) \
 502   (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
 503 #define MSYMBOL_SIZE(msym) \
 504   ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
 505
 506 /* Thumb symbols are of type STT_LOPROC, (synonymous with STT_ARM_TFUNC) */
 507 #define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
 508         { if(ELF_ST_TYPE(((elf_symbol_type *)(sym))->internal_elf_sym.st_info) == STT_LOPROC) \
 509                 MSYMBOL_SET_SPECIAL(msym); }
 510
 511 #define COFF_MAKE_MSYMBOL_SPECIAL(val,msym) \
 512  { if(coff_sym_is_thumb(val)) MSYMBOL_SET_SPECIAL(msym); }
 513
 514 /* The first 0x20 bytes are the trap vectors.  */
 515 #define LOWEST_PC       0x20
 516
 517 /* Function to determine whether MEMADDR is in a Thumb function.  */
 518 extern int arm_pc_is_thumb (bfd_vma memaddr);
 519
 520 /* Function to determine whether MEMADDR is in a call dummy called from
 521    a Thumb function.  */
 522 extern int arm_pc_is_thumb_dummy (bfd_vma memaddr);
 523
 524 #endif /* TM_ARM_H */