gdb/config/m88k/tm-m88k.h

   1 /* Target machine description for generic Motorola 88000, for GDB.
   2    Copyright 1986, 1987, 1988, 1989, 1990, 1991, 1993
   3    Free Software Foundation, Inc.
   4
   5 This file is part of GDB.
   6
   7 This program is free software; you can redistribute it and/or modify
   8 it under the terms of the GNU General Public License as published by
   9 the Free Software Foundation; either version 2 of the License, or
  10 (at your option) any later version.
  11
  12 This program is distributed in the hope that it will be useful,
  13 but WITHOUT ANY WARRANTY; without even the implied warranty of
  14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15 GNU General Public License for more details.
  16
  17 You should have received a copy of the GNU General Public License
  18 along with this program; if not, write to the Free Software
  19 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
  20
  21 /* g++ support is not yet included.  */
  22
  23 /* Define the bit, byte, and word ordering of the machine.  */
  24 #define TARGET_BYTE_ORDER BIG_ENDIAN
  25
  26 /* We cache information about saved registers in the frame structure,
  27    to save us from having to re-scan function prologues every time
  28    a register in a non-current frame is accessed.  */
  29
  30 #define EXTRA_FRAME_INFO        \
  31         struct frame_saved_regs *fsr;   \
  32         CORE_ADDR locals_pointer;       \
  33         CORE_ADDR args_pointer;
  34
  35 /* Zero the frame_saved_regs pointer when the frame is initialized,
  36    so that FRAME_FIND_SAVED_REGS () will know to allocate and
  37    initialize a frame_saved_regs struct the first time it is called.
  38    Set the arg_pointer to -1, which is not valid; 0 and other values
  39    indicate real, cached values.  */
  40
  41 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) \
  42         init_extra_frame_info (fromleaf, fi)
  43 extern void init_extra_frame_info ();
  44
  45 #define IEEE_FLOAT
  46
  47 /* Offset from address of function to start of its code.
  48    Zero on most machines.  */
  49
  50 #define FUNCTION_START_OFFSET 0
  51
  52 /* Advance PC across any function entry prologue instructions
  53    to reach some "real" code.  */
  54
  55 extern CORE_ADDR m88k_skip_prologue PARAMS ((CORE_ADDR));
  56 #define SKIP_PROLOGUE(frompc) (m88k_skip_prologue (frompc))
  57
  58 /* The m88k kernel aligns all instructions on 4-byte boundaries.  The
  59    kernel also uses the least significant two bits for its own hocus
  60    pocus.  When gdb receives an address from the kernel, it needs to
  61    preserve those right-most two bits, but gdb also needs to be careful
  62    to realize that those two bits are not really a part of the address
  63    of an instruction.  Shrug.  */
  64
  65 extern CORE_ADDR m88k_addr_bits_remove PARAMS ((CORE_ADDR));
  66 #define ADDR_BITS_REMOVE(addr) m88k_addr_bits_remove (addr)
  67
  68 /* Immediately after a function call, return the saved pc.
  69    Can't always go through the frames for this because on some machines
  70    the new frame is not set up until the new function executes
  71    some instructions.  */
  72
  73 #define SAVED_PC_AFTER_CALL(frame) \
  74   (ADDR_BITS_REMOVE (read_register (SRP_REGNUM)))
  75
  76 /* Stack grows downward.  */
  77
  78 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
  79
  80 /* Sequence of bytes for breakpoint instruction.  */
  81
  82 /* instruction 0xF000D1FF is 'tb0 0,r0,511'
  83    If Bit bit 0 of r0 is clear (always true),
  84    initiate exception processing (trap).
  85  */
  86 #define BREAKPOINT {0xF0, 0x00, 0xD1, 0xFF}
  87
  88 /* Amount PC must be decremented by after a breakpoint.
  89    This is often the number of bytes in BREAKPOINT
  90    but not always.  */
  91
  92 #define DECR_PC_AFTER_BREAK 0
  93
  94 /* Say how long (ordinary) registers are.  This is a piece of bogosity
  95    used in push_word and a few other places; REGISTER_RAW_SIZE is the
  96    real way to know how big a register is.  */
  97
  98 #define REGISTER_SIZE 4
  99
 100 /* Number of machine registers */
 101
 102 #define GP_REGS (38)
 103 #define FP_REGS (32)
 104 #define NUM_REGS (GP_REGS + FP_REGS)
 105
 106 /* Initializer for an array of names of registers.
 107    There should be NUM_REGS strings in this initializer.  */
 108
 109 #define REGISTER_NAMES {\
 110                           "r0",\
 111                           "r1",\
 112                           "r2",\
 113                           "r3",\
 114                           "r4",\
 115                           "r5",\
 116                           "r6",\
 117                           "r7",\
 118                           "r8",\
 119                           "r9",\
 120                           "r10",\
 121                           "r11",\
 122                           "r12",\
 123                           "r13",\
 124                           "r14",\
 125                           "r15",\
 126                           "r16",\
 127                           "r17",\
 128                           "r18",\
 129                           "r19",\
 130                           "r20",\
 131                           "r21",\
 132                           "r22",\
 133                           "r23",\
 134                           "r24",\
 135                           "r25",\
 136                           "r26",\
 137                           "r27",\
 138                           "r28",\
 139                           "r29",\
 140                           "r30",\
 141                           "r31",\
 142                           "psr",\
 143                           "fpsr",\
 144                           "fpcr",\
 145                           "sxip",\
 146                           "snip",\
 147                           "sfip",\
 148                           "x0",\
 149                           "x1",\
 150                           "x2",\
 151                           "x3",\
 152                           "x4",\
 153                           "x5",\
 154                           "x6",\
 155                           "x7",\
 156                           "x8",\
 157                           "x9",\
 158                           "x10",\
 159                           "x11",\
 160                           "x12",\
 161                           "x13",\
 162                           "x14",\
 163                           "x15",\
 164                           "x16",\
 165                           "x17",\
 166                           "x18",\
 167                           "x19",\
 168                           "x20",\
 169                           "x21",\
 170                           "x22",\
 171                           "x23",\
 172                           "x24",\
 173                           "x25",\
 174                           "x26",\
 175                           "x27",\
 176                           "x28",\
 177                           "x29",\
 178                           "x30",\
 179                           "x31",\
 180                           "vbr",\
 181                           "dmt0",\
 182                           "dmd0",\
 183                           "dma0",\
 184                           "dmt1",\
 185                           "dmd1",\
 186                           "dma1",\
 187                           "dmt2",\
 188                           "dmd2",\
 189                           "dma2",\
 190                           "sr0",\
 191                           "sr1",\
 192                           "sr2",\
 193                           "sr3",\
 194                           "fpecr",\
 195                           "fphs1",\
 196                           "fpls1",\
 197                           "fphs2",\
 198                           "fpls2",\
 199                           "fppt",\
 200                           "fprh",\
 201                           "fprl",\
 202                           "fpit",\
 203                           "fpsr",\
 204                           "fpcr",\
 205                       }
 206
 207
 208 /* Register numbers of various important registers.
 209    Note that some of these values are "real" register numbers,
 210    and correspond to the general registers of the machine,
 211    and some are "phony" register numbers which are too large
 212    to be actual register numbers as far as the user is concerned
 213    but do serve to get the desired values when passed to read_register.  */
 214
 215 #define R0_REGNUM 0             /* Contains the constant zero */
 216 #define SRP_REGNUM 1            /* Contains subroutine return pointer */
 217 #define RV_REGNUM 2             /* Contains simple return values */
 218 #define SRA_REGNUM 12           /* Contains address of struct return values */
 219 #define SP_REGNUM 31            /* Contains address of top of stack */
 220
 221 /* Instruction pointer notes...
 222
 223    On the m88100:
 224
 225    * cr04 = sxip.  On exception, contains the excepting pc (probably).
 226    On rte, is ignored.
 227
 228    * cr05 = snip.  On exception, contains the NPC (next pc).  On rte,
 229    pc is loaded from here.
 230
 231    * cr06 = sfip.  On exception, contains the NNPC (next next pc).  On
 232    rte, the NPC is loaded from here.
 233
 234    * lower two bits of each are flag bits.  Bit 1 is V means address
 235    is valid.  If address is not valid, bit 0 is ignored.  Otherwise,
 236    bit 0 is E and asks for an exception to be taken if this
 237    instruction is executed.
 238
 239    On the m88110:
 240
 241    * cr04 = exip.  On exception, contains the address of the excepting
 242    pc (always).  On rte, pc is loaded from here.  Bit 0, aka the D
 243    bit, is a flag saying that the offending instruction was in a
 244    branch delay slot.  If set, then cr05 contains the NPC.
 245
 246    * cr05 = enip.  On exception, if the instruction pointed to by cr04
 247    was in a delay slot as indicated by the bit 0 of cr04, aka the D
 248    bit, the cr05 contains the NPC.  Otherwise ignored.
 249
 250    * cr06 is invalid  */
 251
 252 /* Note that the Harris Unix kernels emulate the m88100's behavior on
 253    the m88110.  */
 254
 255 #define SXIP_REGNUM 35          /* On m88100, Contains Shadow Execute
 256                                    Instruction Pointer.  */
 257 #define SNIP_REGNUM 36          /* On m88100, Contains Shadow Next
 258                                    Instruction Pointer.  */
 259 #define SFIP_REGNUM 37          /* On m88100, Contains Shadow Fetched
 260                                    Intruction pointer.  */
 261
 262 #define EXIP_REGNUM 35          /* On m88110, Contains Exception
 263                                    Executing Instruction Pointer.  */
 264 #define ENIP_REGNUM 36          /* On m88110, Contains the Exception
 265                                    Next Instruction Pointer.  */
 266
 267 #define PC_REGNUM SXIP_REGNUM   /* Program Counter */
 268 #define NPC_REGNUM SNIP_REGNUM  /* Next Program Counter */
 269 #define NNPC_REGNUM SFIP_REGNUM /* Next Next Program Counter */
 270
 271 #define PSR_REGNUM 32           /* Processor Status Register */
 272 #define FPSR_REGNUM 33          /* Floating Point Status Register */
 273 #define FPCR_REGNUM 34          /* Floating Point Control Register */
 274 #define XFP_REGNUM 38           /* First Extended Float Register */
 275 #define X0_REGNUM XFP_REGNUM    /* Which also contains the constant zero */
 276
 277 /* This is rather a confusing lie.  Our m88k port using a stack pointer value
 278    for the frame address.  Hence, the frame address and the frame pointer are
 279    only indirectly related.  The value of this macro is the register number
 280    fetched by the machine "independent" portions of gdb when they want to know
 281    about a frame address.  Thus, we lie here and claim that FP_REGNUM is
 282    SP_REGNUM.  */
 283 #define FP_REGNUM SP_REGNUM     /* Reg fetched to locate frame when pgm stops */
 284 #define ACTUAL_FP_REGNUM 30
 285
 286 /* PSR status bit definitions.  */
 287
 288 #define PSR_MODE                0x80000000
 289 #define PSR_BYTE_ORDER          0x40000000
 290 #define PSR_SERIAL_MODE         0x20000000
 291 #define PSR_CARRY               0x10000000
 292 #define PSR_SFU_DISABLE         0x000003f0
 293 #define PSR_SFU1_DISABLE        0x00000008
 294 #define PSR_MXM                 0x00000004
 295 #define PSR_IND                 0x00000002
 296 #define PSR_SFRZ                0x00000001
 297
 298
 299
 300 /* The following two comments come from the days prior to the m88110
 301    port.  The m88110 handles the instruction pointers differently.  I
 302    do not know what any m88110 kernels do as the m88110 port I'm
 303    working with is for an embedded system.  rich@cygnus.com
 304    13-sept-93.  */
 305
 306 /* BCS requires that the SXIP_REGNUM (or PC_REGNUM) contain the
 307    address of the next instr to be executed when a breakpoint occurs.
 308    Because the kernel gets the next instr (SNIP_REGNUM), the instr in
 309    SNIP needs to be put back into SFIP, and the instr in SXIP should
 310    be shifted to SNIP */
 311
 312 /* Are you sitting down?  It turns out that the 88K BCS (binary
 313    compatibility standard) folks originally felt that the debugger
 314    should be responsible for backing up the IPs, not the kernel (as is
 315    usually done).  Well, they have reversed their decision, and in
 316    future releases our kernel will be handling the backing up of the
 317    IPs.  So, eventually, we won't need to do the SHIFT_INST_REGS
 318    stuff.  But, for now, since there are 88K systems out there that do
 319    need the debugger to do the IP shifting, and since there will be
 320    systems where the kernel does the shifting, the code is a little
 321    more complex than perhaps it needs to be (we still go inside
 322    SHIFT_INST_REGS, and if the shifting hasn't occurred then gdb goes
 323    ahead and shifts).  */
 324
 325 extern int target_is_m88110;
 326 #define SHIFT_INST_REGS() \
 327 if (!target_is_m88110) \
 328 { \
 329     CORE_ADDR pc = read_register (PC_REGNUM); \
 330     CORE_ADDR npc = read_register (NPC_REGNUM); \
 331     if (pc != npc) \
 332     { \
 333         write_register (NNPC_REGNUM, npc); \
 334         write_register (NPC_REGNUM, pc); \
 335     } \
 336 }
 337
 338     /* Storing the following registers is a no-op. */
 339 #define CANNOT_STORE_REGISTER(regno)    (((regno) == R0_REGNUM) \
 340                                          || ((regno) == X0_REGNUM))
 341
 342   /* Number of bytes of storage in the actual machine representation
 343      for register N.  On the m88k,  the general purpose registers are 4
 344      bytes and the 88110 extended registers are 10 bytes. */
 345
 346 #define REGISTER_RAW_SIZE(N) ((N) < XFP_REGNUM ? 4 : 10)
 347
 348   /* Total amount of space needed to store our copies of the machine's
 349      register state, the array `registers'.  */
 350
 351 #define REGISTER_BYTES ((GP_REGS * REGISTER_RAW_SIZE(0)) \
 352                         + (FP_REGS * REGISTER_RAW_SIZE(XFP_REGNUM)))
 353
 354   /* Index within `registers' of the first byte of the space for
 355      register N.  */
 356
 357 #define REGISTER_BYTE(N) (((N) * REGISTER_RAW_SIZE(0)) \
 358                           + ((N) >= XFP_REGNUM \
 359                              ? (((N) - XFP_REGNUM) \
 360                                 * REGISTER_RAW_SIZE(XFP_REGNUM)) \
 361                              : 0))
 362
 363   /* Number of bytes of storage in the program's representation for
 364      register N.  On the m88k, all registers are 4 bytes excepting the
 365      m88110 extended registers which are 8 byte doubles. */
 366
 367 #define REGISTER_VIRTUAL_SIZE(N) ((N) < XFP_REGNUM ? 4 : 8)
 368
 369   /* Largest value REGISTER_RAW_SIZE can have.  */
 370
 371 #define MAX_REGISTER_RAW_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 372
 373   /* Largest value REGISTER_VIRTUAL_SIZE can have.
 374      Are FPS1, FPS2, FPR "virtual" regisers? */
 375
 376 #define MAX_REGISTER_VIRTUAL_SIZE (REGISTER_RAW_SIZE(XFP_REGNUM))
 377
 378   /* Nonzero if register N requires conversion
 379      from raw format to virtual format.  */
 380
 381 #define REGISTER_CONVERTIBLE(N) ((N) >= XFP_REGNUM)
 382
 383 #include "floatformat.h"
 384
 385 /* Convert data from raw format for register REGNUM in buffer FROM
 386    to virtual format with type TYPE in buffer TO.  */
 387
 388 #define REGISTER_CONVERT_TO_VIRTUAL(REGNUM,TYPE,FROM,TO) \
 389 { \
 390   double val; \
 391   floatformat_to_double (&floatformat_m88110_ext, (FROM), &val); \
 392   store_floating ((TO), TYPE_LENGTH (TYPE), val); \
 393 }
 394
 395 /* Convert data from virtual format with type TYPE in buffer FROM
 396    to raw format for register REGNUM in buffer TO.  */
 397
 398 #define REGISTER_CONVERT_TO_RAW(TYPE,REGNUM,FROM,TO)    \
 399 { \
 400   double val = extract_floating ((FROM), TYPE_LENGTH (TYPE)); \
 401   floatformat_from_double (&floatformat_m88110_ext, &val, (TO)); \
 402 }
 403
 404 /* Return the GDB type object for the "standard" data type
 405    of data in register N.  */
 406
 407 #define REGISTER_VIRTUAL_TYPE(N) \
 408 ((N) >= XFP_REGNUM \
 409  ? builtin_type_double \
 410  : ((N) == PC_REGNUM || (N) == FP_REGNUM || (N) == SP_REGNUM \
 411     ? lookup_pointer_type (builtin_type_void) : builtin_type_int))
 412
 413 /* The 88k call/return conventions call for "small" values to be returned
 414    into consecutive registers starting from r2.  */
 415
 416 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 417   memcpy ((VALBUF), &(((char *)REGBUF)[REGISTER_BYTE(RV_REGNUM)]), TYPE_LENGTH (TYPE))
 418
 419 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) (*(int *)(REGBUF))
 420
 421 /* Write into appropriate registers a function return value
 422    of type TYPE, given in virtual format.  */
 423
 424 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 425   write_register_bytes (2*REGISTER_RAW_SIZE(0), (VALBUF), TYPE_LENGTH (TYPE))
 426
 427 /* In COFF, if PCC says a parameter is a short or a char, do not
 428    change it to int (it seems the convention is to change it). */
 429
 430 #define BELIEVE_PCC_PROMOTION 1
 431
 432 /* Describe the pointer in each stack frame to the previous stack frame
 433    (its caller).  */
 434
 435 /* FRAME_CHAIN takes a frame's nominal address
 436    and produces the frame's chain-pointer.
 437
 438    However, if FRAME_CHAIN_VALID returns zero,
 439    it means the given frame is the outermost one and has no caller.  */
 440
 441 extern CORE_ADDR frame_chain ();
 442 extern int frame_chain_valid ();
 443 extern int frameless_function_invocation ();
 444
 445 #define FRAME_CHAIN(thisframe) \
 446         frame_chain (thisframe)
 447
 448 #define FRAMELESS_FUNCTION_INVOCATION(frame)    \
 449         (frameless_function_invocation (frame))
 450
 451 /* Define other aspects of the stack frame.  */
 452
 453 #define FRAME_SAVED_PC(FRAME)   \
 454         frame_saved_pc (FRAME)
 455 extern CORE_ADDR frame_saved_pc ();
 456
 457 #define FRAME_ARGS_ADDRESS(fi)  \
 458         frame_args_address (fi)
 459 extern CORE_ADDR frame_args_address ();
 460
 461 #define FRAME_LOCALS_ADDRESS(fi) \
 462         frame_locals_address (fi)
 463 extern CORE_ADDR frame_locals_address ();
 464
 465 /* Return number of args passed to a frame.
 466    Can return -1, meaning no way to tell.  */
 467
 468 #define FRAME_NUM_ARGS(fi)  (-1)
 469
 470 /* Return number of bytes at start of arglist that are not really args.  */
 471
 472 #define FRAME_ARGS_SKIP 0
 473
 474 /* Put here the code to store, into a struct frame_saved_regs,
 475    the addresses of the saved registers of frame described by FRAME_INFO.
 476    This includes special registers such as pc and fp saved in special
 477    ways in the stack frame.  sp is even more special:
 478    the address we return for it IS the sp for the next frame.  */
 479
 480 /* On the 88k, parameter registers get stored into the so called "homing"
 481    area.  This *always* happens when you compiled with GCC and use -g.
 482    Also, (with GCC and -g) the saving of the parameter register values
 483    always happens right within the function prologue code, so these register
 484    values can generally be relied upon to be already copied into their
 485    respective homing slots by the time you will normally try to look at
 486    them (we hope).
 487
 488    Note that homing area stack slots are always at *positive* offsets from
 489    the frame pointer.  Thus, the homing area stack slots for the parameter
 490    registers (passed values) for a given function are actually part of the
 491    frame area of the caller.  This is unusual, but it should not present
 492    any special problems for GDB.
 493
 494    Note also that on the 88k, we are only interested in finding the
 495    registers that might have been saved in memory.  This is a subset of
 496    the whole set of registers because the standard calling sequence allows
 497    the called routine to clobber many registers.
 498
 499    We could manage to locate values for all of the so called "preserved"
 500    registers (some of which may get saved within any particular frame) but
 501    that would require decoding all of the tdesc information.  That would be
 502    nice information for GDB to have, but it is not strictly manditory if we
 503    can live without the ability to look at values within (or backup to)
 504    previous frames.
 505 */
 506
 507 struct frame_saved_regs;
 508 struct frame_info;
 509
 510 void frame_find_saved_regs PARAMS((struct frame_info *fi,
 511                                    struct frame_saved_regs *fsr));
 512
 513 #define FRAME_FIND_SAVED_REGS(frame_info, frame_saved_regs) \
 514         frame_find_saved_regs (frame_info, &frame_saved_regs)
 515
 516 \f
 517 #define POP_FRAME pop_frame ()
 518 extern void pop_frame ();
 519
 520 /* Call function stuff contributed by Kevin Buettner of Motorola.  */
 521
 522 #define CALL_DUMMY_LOCATION AFTER_TEXT_END
 523
 524 extern void m88k_push_dummy_frame();
 525 #define PUSH_DUMMY_FRAME        m88k_push_dummy_frame()
 526
 527 #define CALL_DUMMY {                            \
 528 0x67ff00c0,     /*   0:   subu  #sp,#sp,0xc0 */ \
 529 0x243f0004,     /*   4:   st    #r1,#sp,0x4 */ \
 530 0x245f0008,     /*   8:   st    #r2,#sp,0x8 */ \
 531 0x247f000c,     /*   c:   st    #r3,#sp,0xc */ \
 532 0x249f0010,     /*  10:   st    #r4,#sp,0x10 */ \
 533 0x24bf0014,     /*  14:   st    #r5,#sp,0x14 */ \
 534 0x24df0018,     /*  18:   st    #r6,#sp,0x18 */ \
 535 0x24ff001c,     /*  1c:   st    #r7,#sp,0x1c */ \
 536 0x251f0020,     /*  20:   st    #r8,#sp,0x20 */ \
 537 0x253f0024,     /*  24:   st    #r9,#sp,0x24 */ \
 538 0x255f0028,     /*  28:   st    #r10,#sp,0x28 */ \
 539 0x257f002c,     /*  2c:   st    #r11,#sp,0x2c */ \
 540 0x259f0030,     /*  30:   st    #r12,#sp,0x30 */ \
 541 0x25bf0034,     /*  34:   st    #r13,#sp,0x34 */ \
 542 0x25df0038,     /*  38:   st    #r14,#sp,0x38 */ \
 543 0x25ff003c,     /*  3c:   st    #r15,#sp,0x3c */ \
 544 0x261f0040,     /*  40:   st    #r16,#sp,0x40 */ \
 545 0x263f0044,     /*  44:   st    #r17,#sp,0x44 */ \
 546 0x265f0048,     /*  48:   st    #r18,#sp,0x48 */ \
 547 0x267f004c,     /*  4c:   st    #r19,#sp,0x4c */ \
 548 0x269f0050,     /*  50:   st    #r20,#sp,0x50 */ \
 549 0x26bf0054,     /*  54:   st    #r21,#sp,0x54 */ \
 550 0x26df0058,     /*  58:   st    #r22,#sp,0x58 */ \
 551 0x26ff005c,     /*  5c:   st    #r23,#sp,0x5c */ \
 552 0x271f0060,     /*  60:   st    #r24,#sp,0x60 */ \
 553 0x273f0064,     /*  64:   st    #r25,#sp,0x64 */ \
 554 0x275f0068,     /*  68:   st    #r26,#sp,0x68 */ \
 555 0x277f006c,     /*  6c:   st    #r27,#sp,0x6c */ \
 556 0x279f0070,     /*  70:   st    #r28,#sp,0x70 */ \
 557 0x27bf0074,     /*  74:   st    #r29,#sp,0x74 */ \
 558 0x27df0078,     /*  78:   st    #r30,#sp,0x78 */ \
 559 0x63df0000,     /*  7c:   addu  #r30,#sp,0x0 */ \
 560 0x145f0000,     /*  80:   ld    #r2,#sp,0x0 */ \
 561 0x147f0004,     /*  84:   ld    #r3,#sp,0x4 */ \
 562 0x149f0008,     /*  88:   ld    #r4,#sp,0x8 */ \
 563 0x14bf000c,     /*  8c:   ld    #r5,#sp,0xc */ \
 564 0x14df0010,     /*  90:   ld    #r6,#sp,0x10 */ \
 565 0x14ff0014,     /*  94:   ld    #r7,#sp,0x14 */ \
 566 0x151f0018,     /*  98:   ld    #r8,#sp,0x18 */ \
 567 0x153f001c,     /*  9c:   ld    #r9,#sp,0x1c */ \
 568 0x5c200000,     /*  a0:   or.u  #r1,#r0,0x0 */ \
 569 0x58210000,     /*  a4:   or    #r1,#r1,0x0 */ \
 570 0xf400c801,     /*  a8:   jsr   #r1 */ \
 571 0xf000d1ff      /*  ac:   tb0   0x0,#r0,0x1ff */ \
 572 }
 573
 574 #define CALL_DUMMY_START_OFFSET 0x80
 575 #define CALL_DUMMY_LENGTH 0xb0
 576
 577 /* FIXME: byteswapping.  */
 578 #define FIX_CALL_DUMMY(dummy, pc, fun, nargs, args, type, gcc_p)        \
 579 {                                                                       \
 580   *(unsigned long *)((char *) (dummy) + 0xa0) |=                        \
 581         (((unsigned long) (fun)) >> 16);                                \
 582   *(unsigned long *)((char *) (dummy) + 0xa4) |=                        \
 583         (((unsigned long) (fun)) & 0xffff);                             \
 584   pc = text_end;                                                        \
 585 }
 586
 587 /* Stack must be aligned on 64-bit boundaries when synthesizing
 588    function calls. */
 589
 590 #define STACK_ALIGN(addr) (((addr) + 7) & -8)
 591
 592 #define STORE_STRUCT_RETURN(addr, sp) \
 593     write_register (SRA_REGNUM, (addr))
 594
 595 #define NEED_TEXT_START_END 1
 596
 597 /* According to the MC88100 RISC Microprocessor User's Manual, section
 598    6.4.3.1.2:
 599
 600         ... can be made to return to a particular instruction by placing a
 601         valid instruction address in the SNIP and the next sequential
 602         instruction address in the SFIP (with V bits set and E bits clear).
 603         The rte resumes execution at the instruction pointed to by the
 604         SNIP, then the SFIP.
 605
 606    The E bit is the least significant bit (bit 0).  The V (valid) bit is
 607    bit 1.  This is why we logical or 2 into the values we are writing
 608    below.  It turns out that SXIP plays no role when returning from an
 609    exception so nothing special has to be done with it.  We could even
 610    (presumably) give it a totally bogus value.
 611
 612    -- Kevin Buettner
 613 */
 614
 615 #define TARGET_WRITE_PC(val, pid) { \
 616   write_register_pid(SXIP_REGNUM, (long) val, pid); \
 617   write_register_pid(SNIP_REGNUM, (long) val | 2, pid); \
 618   write_register_pid(SFIP_REGNUM, ((long) val | 2) + 4, pid); \
 619 }