gdb/config/mips/tm-irix6.h

   1 /* Target machine description for SGI Iris under Irix 6.x, for GDB.
   2    Copyright 2001
   3    Free Software Foundation, Inc.
   4
   5    This file is part of GDB.
   6
   7    This program is free software; you can redistribute it and/or modify
   8    it under the terms of the GNU General Public License as published by
   9    the Free Software Foundation; either version 2 of the License, or
  10    (at your option) any later version.
  11
  12    This program is distributed in the hope that it will be useful,
  13    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15    GNU General Public License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with this program; if not, write to the Free Software
  19    Foundation, Inc., 59 Temple Place - Suite 330,
  20    Boston, MA 02111-1307, USA.  */
  21
  22 #include "mips/tm-bigmips.h"
  23
  24 /* SGI's assembler doesn't grok dollar signs in identifiers.
  25    So we use dots instead.  This item must be coordinated with G++. */
  26 #undef CPLUS_MARKER
  27 #define CPLUS_MARKER '.'
  28
  29 /* Redefine register numbers for SGI. */
  30
  31 #undef NUM_REGS
  32 #undef MIPS_REGISTER_NAMES
  33 #undef FP0_REGNUM
  34 #undef PC_REGNUM
  35 #undef HI_REGNUM
  36 #undef LO_REGNUM
  37 #undef CAUSE_REGNUM
  38 #undef BADVADDR_REGNUM
  39 #undef FCRCS_REGNUM
  40 #undef FCRIR_REGNUM
  41 #undef FP_REGNUM
  42
  43 /* Number of machine registers */
  44
  45 #define NUM_REGS 71
  46
  47 /* Initializer for an array of names of registers.
  48    There should be NUM_REGS strings in this initializer.  */
  49
  50 #define MIPS_REGISTER_NAMES     \
  51     {   "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3", \
  52         "a4",   "a5",   "a6",   "a7",   "t0",   "t1",   "t2",   "t3", \
  53         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7", \
  54         "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra", \
  55         "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
  56         "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
  57         "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
  58         "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
  59         "pc",   "cause", "bad", "hi",   "lo",   "fsr",  "fir" \
  60     }
  61
  62 /* Register numbers of various important registers.
  63    Note that some of these values are "real" register numbers,
  64    and correspond to the general registers of the machine,
  65    and some are "phony" register numbers which are too large
  66    to be actual register numbers as far as the user is concerned
  67    but do serve to get the desired values when passed to read_register.  */
  68
  69 #define FP0_REGNUM 32           /* Floating point register 0 (single float) */
  70 #define PC_REGNUM 64            /* Contains program counter */
  71 #define CAUSE_REGNUM 65         /* describes last exception */
  72 #define BADVADDR_REGNUM 66      /* bad vaddr for addressing exception */
  73 #define HI_REGNUM 67            /* Multiple/divide temp */
  74 #define LO_REGNUM 68            /* ... */
  75 #define FCRCS_REGNUM 69         /* FP control/status */
  76 #define FCRIR_REGNUM 70         /* FP implementation/revision */
  77 #define FP_REGNUM 30            /* S8 register is the Frame Pointer */
  78
  79
  80 #undef  REGISTER_BYTES
  81 #define REGISTER_BYTES (MIPS_NUMREGS * 8 + (NUM_REGS - MIPS_NUMREGS) * MIPS_REGSIZE)
  82
  83 #undef  REGISTER_BYTE
  84 #define REGISTER_BYTE(N) \
  85      (((N) < FP0_REGNUM) ? (N) * MIPS_REGSIZE : \
  86       ((N) < FP0_REGNUM + 32) ?     \
  87       FP0_REGNUM * MIPS_REGSIZE + \
  88       ((N) - FP0_REGNUM) * sizeof(double) : \
  89       32 * sizeof(double) + ((N) - 32) * MIPS_REGSIZE)
  90
  91 #undef  REGISTER_VIRTUAL_TYPE
  92 #define REGISTER_VIRTUAL_TYPE(N) \
  93         (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_double \
  94          : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
  95          : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
  96          : builtin_type_int)
  97
  98 #undef  MIPS_LAST_ARG_REGNUM
  99 #define MIPS_LAST_ARG_REGNUM 11 /* N32 uses R4 through R11 for args */
 100
 101 /* MIPS_STACK_ARGSIZE -- how many bytes does a pushed function arg take
 102    up on the stack? For the n32 ABI, eight bytes are reserved for each
 103    register. Like MIPS_SAVED_REGSIZE but different. */
 104 #define MIPS_DEFAULT_STACK_ARGSIZE 8
 105
 106 /* N32 does not reserve home space for registers used to carry
 107    parameters. */
 108 #define MIPS_REGS_HAVE_HOME_P 0
 109
 110 /* Force N32 ABI as the default. */
 111 #define MIPS_DEFAULT_ABI MIPS_ABI_N32
 112
 113
 114 /* The signal handler trampoline is called _sigtramp.  */
 115 #undef IN_SIGTRAMP
 116 #define IN_SIGTRAMP(pc, name) ((name) && STREQ ("_sigtramp", name))
 117
 118 /* Offsets for register values in _sigtramp frame.
 119    sigcontext is immediately above the _sigtramp frame on Irix.  */
 120 #undef SIGFRAME_BASE
 121 #define SIGFRAME_BASE           0
 122
 123 /* Irix 5 saves a full 64 bits for each register.  We skip 2 * 4 to
 124    get to the saved PC (the register mask and status register are both
 125    32 bits) and then another 4 to get to the lower 32 bits.  We skip
 126    the same 4 bytes, plus the 8 bytes for the PC to get to the
 127    registers, and add another 4 to get to the lower 32 bits.  We skip
 128    8 bytes per register.  */
 129 #undef SIGFRAME_PC_OFF
 130 #define SIGFRAME_PC_OFF         (SIGFRAME_BASE + 2 * 4 + 4)
 131 #undef SIGFRAME_REGSAVE_OFF
 132 #define SIGFRAME_REGSAVE_OFF    (SIGFRAME_BASE + 2 * 4 + 8 + 4)
 133 #undef SIGFRAME_FPREGSAVE_OFF
 134 #define SIGFRAME_FPREGSAVE_OFF  (SIGFRAME_BASE + 2 * 4 + 8 + 32 * 8 + 4)
 135 #define SIGFRAME_REG_SIZE       8
 136
 137 /* Select the disassembler */
 138 #undef TM_PRINT_INSN_MACH
 139 #define TM_PRINT_INSN_MACH bfd_mach_mips8000