gdb/config/mips/tm-mips.h

   1 /* Definitions to make GDB run on a mips box under 4.3bsd.
   2    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995
   3    Free Software Foundation, Inc.
   4    Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
   5    and by Alessandro Forin (af@cs.cmu.edu) at CMU..
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 2 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program; if not, write to the Free Software
  21    Foundation, Inc., 59 Temple Place - Suite 330,
  22    Boston, MA 02111-1307, USA.  */
  23
  24 #ifndef TM_MIPS_H
  25 #define TM_MIPS_H 1
  26
  27 #define GDB_MULTI_ARCH 1
  28
  29 struct frame_info;
  30 struct symbol;
  31 struct type;
  32 struct value;
  33
  34 #include <bfd.h>
  35 #include "coff/sym.h"           /* Needed for PDR below.  */
  36 #include "coff/symconst.h"
  37
  38 #if !defined (MIPS_EABI)
  39 #define MIPS_EABI 0
  40 #endif
  41
  42 /* PC should be masked to remove possible MIPS16 flag */
  43 #if !defined (GDB_TARGET_MASK_DISAS_PC)
  44 #define GDB_TARGET_MASK_DISAS_PC(addr) UNMAKE_MIPS16_ADDR(addr)
  45 #endif
  46 #if !defined (GDB_TARGET_UNMASK_DISAS_PC)
  47 #define GDB_TARGET_UNMASK_DISAS_PC(addr) MAKE_MIPS16_ADDR(addr)
  48 #endif
  49
  50 /* The name of the usual type of MIPS processor that is in the target
  51    system.  */
  52
  53 #define DEFAULT_MIPS_TYPE "generic"
  54
  55 /* Remove useless bits from an instruction address.  */
  56
  57 #define ADDR_BITS_REMOVE(addr) mips_addr_bits_remove(addr)
  58 CORE_ADDR mips_addr_bits_remove (CORE_ADDR addr);
  59
  60 /* Remove useless bits from the stack pointer.  */
  61
  62 #define TARGET_READ_SP() ADDR_BITS_REMOVE (read_register (SP_REGNUM))
  63
  64 /* Offset from address of function to start of its code.
  65    Zero on most machines.  */
  66
  67 #define FUNCTION_START_OFFSET 0
  68
  69 /* Return non-zero if PC points to an instruction which will cause a step
  70    to execute both the instruction at PC and an instruction at PC+4.  */
  71 extern int mips_step_skips_delay (CORE_ADDR);
  72 #define STEP_SKIPS_DELAY_P (1)
  73 #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
  74
  75 /* Are we currently handling a signal */
  76
  77 extern int in_sigtramp (CORE_ADDR, char *);
  78 #define IN_SIGTRAMP(pc, name)   in_sigtramp(pc, name)
  79
  80 /* Say how long (ordinary) registers are.  This is a piece of bogosity
  81    used in push_word and a few other places; REGISTER_RAW_SIZE is the
  82    real way to know how big a register is.  */
  83
  84 #define REGISTER_SIZE 4
  85
  86 /* The size of a register.  This is predefined in tm-mips64.h.  We
  87    can't use REGISTER_SIZE because that is used for various other
  88    things.  */
  89
  90 #ifndef MIPS_REGSIZE
  91 #define MIPS_REGSIZE 4
  92 #endif
  93
  94 /* Number of machine registers */
  95
  96 #ifndef NUM_REGS
  97 #define NUM_REGS 90
  98 #endif
  99
 100 /* Given the register index, return the name of the corresponding
 101    register. */
 102 extern char *mips_register_name (int regnr);
 103 #define REGISTER_NAME(i) mips_register_name (i)
 104
 105 /* Initializer for an array of names of registers.
 106    There should be NUM_REGS strings in this initializer.  */
 107
 108 #ifndef MIPS_REGISTER_NAMES
 109 #define MIPS_REGISTER_NAMES     \
 110     {   "zero", "at",   "v0",   "v1",   "a0",   "a1",   "a2",   "a3", \
 111         "t0",   "t1",   "t2",   "t3",   "t4",   "t5",   "t6",   "t7", \
 112         "s0",   "s1",   "s2",   "s3",   "s4",   "s5",   "s6",   "s7", \
 113         "t8",   "t9",   "k0",   "k1",   "gp",   "sp",   "s8",   "ra", \
 114         "sr",   "lo",   "hi",   "bad",  "cause","pc",    \
 115         "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
 116         "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
 117         "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
 118         "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
 119         "fsr",  "fir",  "fp",   "", \
 120         "",     "",     "",     "",     "",     "",     "",     "", \
 121         "",     "",     "",     "",     "",     "",     "",     "", \
 122     }
 123 #endif
 124
 125 /* Register numbers of various important registers.
 126    Note that some of these values are "real" register numbers,
 127    and correspond to the general registers of the machine,
 128    and some are "phony" register numbers which are too large
 129    to be actual register numbers as far as the user is concerned
 130    but do serve to get the desired values when passed to read_register.  */
 131
 132 #define ZERO_REGNUM 0           /* read-only register, always 0 */
 133 #define V0_REGNUM 2             /* Function integer return value */
 134 #define A0_REGNUM 4             /* Loc of first arg during a subr call */
 135 #if MIPS_EABI
 136 #define MIPS_LAST_ARG_REGNUM 11 /* EABI uses R4 through R11 for args */
 137 #else
 138 #define MIPS_LAST_ARG_REGNUM 7  /* old ABI uses R4 through R7 for args */
 139 #endif
 140 #define T9_REGNUM 25            /* Contains address of callee in PIC */
 141 #define SP_REGNUM 29            /* Contains address of top of stack */
 142 #define RA_REGNUM 31            /* Contains return address value */
 143 #define PS_REGNUM 32            /* Contains processor status */
 144 #define HI_REGNUM 34            /* Multiple/divide temp */
 145 #define LO_REGNUM 33            /* ... */
 146 #define BADVADDR_REGNUM 35      /* bad vaddr for addressing exception */
 147 #define CAUSE_REGNUM 36         /* describes last exception */
 148 #define PC_REGNUM 37            /* Contains program counter */
 149 #define FP0_REGNUM 38           /* Floating point register 0 (single float) */
 150 #define FPA0_REGNUM (FP0_REGNUM+12)     /* First float argument register */
 151 #if MIPS_EABI                   /* EABI uses F12 through F19 for args */
 152 #define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+19)
 153 #else /* old ABI uses F12 through F15 for args */
 154 #define MIPS_LAST_FP_ARG_REGNUM (FP0_REGNUM+15)
 155 #endif
 156 #define FCRCS_REGNUM 70         /* FP control/status */
 157 #define FCRIR_REGNUM 71         /* FP implementation/revision */
 158 #define FP_REGNUM 72            /* Pseudo register that contains true address of executing stack frame */
 159 #define UNUSED_REGNUM 73        /* Never used, FIXME */
 160 #define FIRST_EMBED_REGNUM 74   /* First CP0 register for embedded use */
 161 #define PRID_REGNUM 89          /* Processor ID */
 162 #define LAST_EMBED_REGNUM 89    /* Last one */
 163
 164 /* Define DO_REGISTERS_INFO() to do machine-specific formatting
 165    of register dumps. */
 166
 167 #define DO_REGISTERS_INFO(_regnum, fp) mips_do_registers_info(_regnum, fp)
 168 extern void mips_do_registers_info (int, int);
 169
 170 /* Total amount of space needed to store our copies of the machine's
 171    register state, the array `registers'.  */
 172
 173 #define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
 174
 175 /* Index within `registers' of the first byte of the space for
 176    register N.  */
 177
 178 #define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
 179
 180 /* Number of bytes of storage in the actual machine representation for
 181    register N.  NOTE: This indirectly defines the register size
 182    transfered by the GDB protocol. */
 183
 184 extern int mips_register_raw_size (int reg_nr);
 185 #define REGISTER_RAW_SIZE(N) (mips_register_raw_size ((N)))
 186
 187
 188 /* Covert between the RAW and VIRTUAL registers.
 189
 190    Some MIPS (SR, FSR, FIR) have a `raw' size of MIPS_REGSIZE but are
 191    really 32 bit registers.  This is a legacy of the 64 bit MIPS GDB
 192    protocol which transfers 64 bits for 32 bit registers. */
 193
 194 extern int mips_register_convertible (int reg_nr);
 195 #define REGISTER_CONVERTIBLE(N) (mips_register_convertible ((N)))
 196
 197
 198 void mips_register_convert_to_virtual (int reg_nr, struct type *virtual_type,
 199                                        char *raw_buf, char *virt_buf);
 200 #define REGISTER_CONVERT_TO_VIRTUAL(N,VIRTUAL_TYPE,RAW_BUF,VIRT_BUF) \
 201   mips_register_convert_to_virtual (N,VIRTUAL_TYPE,RAW_BUF,VIRT_BUF)
 202
 203 void mips_register_convert_to_raw (struct type *virtual_type, int reg_nr,
 204                                    char *virt_buf, char *raw_buf);
 205 #define REGISTER_CONVERT_TO_RAW(VIRTUAL_TYPE,N,VIRT_BUF,RAW_BUF) \
 206   mips_register_convert_to_raw (VIRTUAL_TYPE,N,VIRT_BUF,RAW_BUF)
 207
 208 /* Number of bytes of storage in the program's representation
 209    for register N. */
 210
 211 #define REGISTER_VIRTUAL_SIZE(N) TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (N))
 212
 213 /* Largest value REGISTER_RAW_SIZE can have.  */
 214
 215 #define MAX_REGISTER_RAW_SIZE 8
 216
 217 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 218
 219 #define MAX_REGISTER_VIRTUAL_SIZE 8
 220
 221 /* Return the GDB type object for the "standard" data type of data in
 222    register N.  */
 223
 224 #ifndef REGISTER_VIRTUAL_TYPE
 225 #define REGISTER_VIRTUAL_TYPE(N) \
 226         (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
 227          : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
 228          : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
 229          : builtin_type_int)
 230 #endif
 231
 232 /* All mips targets store doubles in a register pair with the least
 233    significant register in the lower numbered register.
 234    If the target is big endian, double register values need conversion
 235    between memory and register formats.  */
 236
 237 #define REGISTER_CONVERT_TO_TYPE(n, type, buffer)                       \
 238   do {if (TARGET_BYTE_ORDER == BIG_ENDIAN                               \
 239           && REGISTER_RAW_SIZE (n) == 4                                 \
 240           && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32                 \
 241           && TYPE_CODE(type) == TYPE_CODE_FLT                           \
 242           && TYPE_LENGTH(type) == 8) {                                  \
 243         char __temp[4];                                                 \
 244         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 245         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 246         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 247
 248 #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer)                     \
 249   do {if (TARGET_BYTE_ORDER == BIG_ENDIAN                               \
 250           && REGISTER_RAW_SIZE (n) == 4                                 \
 251           && (n) >= FP0_REGNUM && (n) < FP0_REGNUM + 32                 \
 252           && TYPE_CODE(type) == TYPE_CODE_FLT                           \
 253           && TYPE_LENGTH(type) == 8) {                                  \
 254         char __temp[4];                                                 \
 255         memcpy (__temp, ((char *)(buffer))+4, 4);                       \
 256         memcpy (((char *)(buffer))+4, (buffer), 4);                     \
 257         memcpy (((char *)(buffer)), __temp, 4); }} while (0)
 258
 259 /* Store the address of the place in which to copy the structure the
 260    subroutine will return.  Handled by mips_push_arguments.  */
 261
 262 #define STORE_STRUCT_RETURN(addr, sp)
 263 /**/
 264
 265 /* Extract from an array REGBUF containing the (raw) register state
 266    a function return value of type TYPE, and copy that, in virtual format,
 267    into VALBUF.  XXX floats */
 268
 269 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 270   mips_extract_return_value(TYPE, REGBUF, VALBUF)
 271 extern void mips_extract_return_value (struct type *, char[], char *);
 272
 273 /* Write into appropriate registers a function return value
 274    of type TYPE, given in virtual format.  */
 275
 276 #define STORE_RETURN_VALUE(TYPE,VALBUF) \
 277   mips_store_return_value(TYPE, VALBUF)
 278 extern void mips_store_return_value (struct type *, char *);
 279
 280 /* Extract from an array REGBUF containing the (raw) register state
 281    the address in which a function should return its structure value,
 282    as a CORE_ADDR (or an expression that can be used as one).  */
 283 /* The address is passed in a0 upon entry to the function, but when
 284    the function exits, the compiler has copied the value to v0.  This
 285    convention is specified by the System V ABI, so I think we can rely
 286    on it.  */
 287
 288 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 289   (extract_address (REGBUF + REGISTER_BYTE (V0_REGNUM), \
 290                     REGISTER_RAW_SIZE (V0_REGNUM)))
 291
 292 extern use_struct_convention_fn mips_use_struct_convention;
 293 #define USE_STRUCT_CONVENTION(gcc_p, type) mips_use_struct_convention (gcc_p, type)
 294 \f
 295 /* Describe the pointer in each stack frame to the previous stack frame
 296    (its caller).  */
 297
 298 /* FRAME_CHAIN takes a frame's nominal address
 299    and produces the frame's chain-pointer. */
 300
 301 #define FRAME_CHAIN(thisframe) (CORE_ADDR) mips_frame_chain (thisframe)
 302 extern CORE_ADDR mips_frame_chain (struct frame_info *);
 303
 304 /* Define other aspects of the stack frame.  */
 305
 306
 307 /* A macro that tells us whether the function invocation represented
 308    by FI does not have a frame on the stack associated with it.  If it
 309    does not, FRAMELESS is set to 1, else 0.  */
 310 /* We handle this differently for mips, and maybe we should not */
 311
 312 #define FRAMELESS_FUNCTION_INVOCATION(FI)  (0)
 313
 314 /* Saved Pc.  */
 315
 316 #define FRAME_SAVED_PC(FRAME)   (mips_frame_saved_pc(FRAME))
 317 extern CORE_ADDR mips_frame_saved_pc (struct frame_info *);
 318
 319 #define FRAME_ARGS_ADDRESS(fi)  (fi)->frame
 320
 321 #define FRAME_LOCALS_ADDRESS(fi) (fi)->frame
 322
 323 /* Return number of args passed to a frame.
 324    Can return -1, meaning no way to tell.  */
 325
 326 #define FRAME_NUM_ARGS(fi)      (mips_frame_num_args(fi))
 327 extern int mips_frame_num_args (struct frame_info *);
 328
 329 /* Return number of bytes at start of arglist that are not really args.  */
 330
 331 #define FRAME_ARGS_SKIP 0
 332
 333 /* Put here the code to store, into a struct frame_saved_regs,
 334    the addresses of the saved registers of frame described by FRAME_INFO.
 335    This includes special registers such as pc and fp saved in special
 336    ways in the stack frame.  sp is even more special:
 337    the address we return for it IS the sp for the next frame.  */
 338
 339 #define FRAME_INIT_SAVED_REGS(frame_info) \
 340   do { \
 341     if ((frame_info)->saved_regs == NULL) \
 342       mips_find_saved_regs (frame_info); \
 343     (frame_info)->saved_regs[SP_REGNUM] = (frame_info)->frame; \
 344   } while (0)
 345 extern void mips_find_saved_regs (struct frame_info *);
 346 \f
 347
 348 /* Things needed for making the inferior call functions.  */
 349
 350 /* Stack must be aligned on 32-bit boundaries when synthesizing
 351    function calls.  We don't need STACK_ALIGN, PUSH_ARGUMENTS will
 352    handle it. */
 353
 354 extern CORE_ADDR mips_push_arguments (int, struct value **, CORE_ADDR, int,
 355                                       CORE_ADDR);
 356 #define PUSH_ARGUMENTS(nargs, args, sp, struct_return, struct_addr) \
 357   (mips_push_arguments((nargs), (args), (sp), (struct_return), (struct_addr)))
 358
 359 extern CORE_ADDR mips_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
 360 #define PUSH_RETURN_ADDRESS(PC, SP) (mips_push_return_address ((PC), (SP)))
 361
 362 /* Push an empty stack frame, to record the current PC, etc.  */
 363
 364 #define PUSH_DUMMY_FRAME        mips_push_dummy_frame()
 365 extern void mips_push_dummy_frame (void);
 366
 367 /* Discard from the stack the innermost frame, restoring all registers.  */
 368
 369 #define POP_FRAME               mips_pop_frame()
 370 extern void mips_pop_frame (void);
 371
 372 #define CALL_DUMMY_START_OFFSET (0)
 373
 374 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
 375
 376 /* When calling functions on Irix 5 (or any MIPS SVR4 ABI compliant
 377    platform), $t9 ($25) (Dest_Reg) contains the address of the callee
 378    (used for PIC).  It doesn't hurt to do this on other systems; $t9
 379    will be ignored.  */
 380 #define FIX_CALL_DUMMY(dummyname, start_sp, fun, nargs, args, rettype, gcc_p) \
 381     write_register(T9_REGNUM, fun)
 382
 383 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
 384
 385 #define CALL_DUMMY_ADDRESS() (mips_call_dummy_address ())
 386 extern CORE_ADDR mips_call_dummy_address (void);
 387
 388 /* There's a mess in stack frame creation.  See comments in blockframe.c
 389    near reference to INIT_FRAME_PC_FIRST.  */
 390
 391 #define INIT_FRAME_PC(fromleaf, prev)   /* nada */
 392
 393 #define INIT_FRAME_PC_FIRST(fromleaf, prev) \
 394    mips_init_frame_pc_first(fromleaf, prev)
 395 extern void mips_init_frame_pc_first (int, struct frame_info *);
 396
 397 /* Special symbol found in blocks associated with routines.  We can hang
 398    mips_extra_func_info_t's off of this.  */
 399
 400 #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
 401 extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
 402
 403 /* Specific information about a procedure.
 404    This overlays the MIPS's PDR records,
 405    mipsread.c (ab)uses this to save memory */
 406
 407 typedef struct mips_extra_func_info
 408   {
 409     long numargs;               /* number of args to procedure (was iopt) */
 410     bfd_vma high_addr;          /* upper address bound */
 411     long frame_adjust;          /* offset of FP from SP (used on MIPS16) */
 412     PDR pdr;                    /* Procedure descriptor record */
 413   }
 414  *mips_extra_func_info_t;
 415
 416 extern void mips_init_extra_frame_info (int fromleaf, struct frame_info *);
 417 #define INIT_EXTRA_FRAME_INFO(fromleaf, fci) \
 418   mips_init_extra_frame_info(fromleaf, fci)
 419
 420 extern void mips_print_extra_frame_info (struct frame_info *frame);
 421 #define PRINT_EXTRA_FRAME_INFO(fi) \
 422   mips_print_extra_frame_info (fi)
 423
 424 /* It takes two values to specify a frame on the MIPS.
 425
 426    In fact, the *PC* is the primary value that sets up a frame.  The
 427    PC is looked up to see what function it's in; symbol information
 428    from that function tells us which register is the frame pointer
 429    base, and what offset from there is the "virtual frame pointer".
 430    (This is usually an offset from SP.)  On most non-MIPS machines,
 431    the primary value is the SP, and the PC, if needed, disambiguates
 432    multiple functions with the same SP.  But on the MIPS we can't do
 433    that since the PC is not stored in the same part of the frame every
 434    time.  This does not seem to be a very clever way to set up frames,
 435    but there is nothing we can do about that.  */
 436
 437 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
 438 extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
 439
 440 /* Convert a dbx stab register number (from `r' declaration) to a gdb REGNUM */
 441
 442 #define STAB_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-38)
 443
 444 /* Convert a ecoff register number to a gdb REGNUM */
 445
 446 #define ECOFF_REG_TO_REGNUM(num) ((num) < 32 ? (num) : (num)+FP0_REGNUM-32)
 447
 448 /* Select the default mips disassembler */
 449
 450 #define TM_PRINT_INSN_MACH 0
 451
 452
 453 /* These are defined in mdebugread.c and are used in mips-tdep.c  */
 454 extern CORE_ADDR sigtramp_address, sigtramp_end;
 455 extern void fixup_sigtramp (void);
 456
 457 /* Defined in mips-tdep.c and used in remote-mips.c */
 458 extern char *mips_read_processor_type (void);
 459
 460 /* Functions for dealing with MIPS16 call and return stubs.  */
 461 #define IN_SOLIB_CALL_TRAMPOLINE(pc, name)      mips_in_call_stub (pc, name)
 462 #define IN_SOLIB_RETURN_TRAMPOLINE(pc, name)    mips_in_return_stub (pc, name)
 463 #define SKIP_TRAMPOLINE_CODE(pc)                mips_skip_stub (pc)
 464 #define IGNORE_HELPER_CALL(pc)                  mips_ignore_helper (pc)
 465 extern int mips_in_call_stub (CORE_ADDR pc, char *name);
 466 extern int mips_in_return_stub (CORE_ADDR pc, char *name);
 467 extern CORE_ADDR mips_skip_stub (CORE_ADDR pc);
 468 extern int mips_ignore_helper (CORE_ADDR pc);
 469
 470 #ifndef TARGET_MIPS
 471 #define TARGET_MIPS
 472 #endif
 473
 474 /* Definitions and declarations used by mips-tdep.c and remote-mips.c  */
 475 #define MIPS_INSTLEN 4          /* Length of an instruction */
 476 #define MIPS16_INSTLEN 2        /* Length of an instruction on MIPS16 */
 477 #define MIPS_NUMREGS 32         /* Number of integer or float registers */
 478 typedef unsigned long t_inst;   /* Integer big enough to hold an instruction */
 479
 480 /* MIPS16 function addresses are odd (bit 0 is set).  Here are some
 481    macros to test, set, or clear bit 0 of addresses.  */
 482 #define IS_MIPS16_ADDR(addr)     ((addr) & 1)
 483 #define MAKE_MIPS16_ADDR(addr)   ((addr) | 1)
 484 #define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
 485
 486 #endif /* TM_MIPS_H */
 487
 488 /* Macros for setting and testing a bit in a minimal symbol that
 489    marks it as 16-bit function.  The MSB of the minimal symbol's
 490    "info" field is used for this purpose. This field is already
 491    being used to store the symbol size, so the assumption is
 492    that the symbol size cannot exceed 2^31.
 493
 494    ELF_MAKE_MSYMBOL_SPECIAL
 495    tests whether an ELF symbol is "special", i.e. refers
 496    to a 16-bit function, and sets a "special" bit in a
 497    minimal symbol to mark it as a 16-bit function
 498    MSYMBOL_IS_SPECIAL   tests the "special" bit in a minimal symbol
 499    MSYMBOL_SIZE         returns the size of the minimal symbol, i.e.
 500    the "info" field with the "special" bit masked out
 501  */
 502
 503 #define ELF_MAKE_MSYMBOL_SPECIAL(sym,msym) \
 504  { \
 505   if (((elf_symbol_type *)(sym))->internal_elf_sym.st_other == STO_MIPS16) { \
 506     MSYMBOL_INFO (msym) = (char *) (((long) MSYMBOL_INFO (msym)) | 0x80000000); \
 507     SYMBOL_VALUE_ADDRESS (msym) |= 1; \
 508   } \
 509  }
 510
 511 #define MSYMBOL_IS_SPECIAL(msym) \
 512   (((long) MSYMBOL_INFO (msym) & 0x80000000) != 0)
 513 #define MSYMBOL_SIZE(msym) \
 514   ((long) MSYMBOL_INFO (msym) & 0x7fffffff)
 515
 516
 517 /* Command to set the processor type. */
 518 extern void mips_set_processor_type_command (char *, int);
 519
 520
 521 /* MIPS sign extends addresses */
 522 #define POINTER_TO_ADDRESS(TYPE,BUF) (signed_pointer_to_address (TYPE, BUF))
 523 #define ADDRESS_TO_POINTER(TYPE,BUF,ADDR) (address_to_signed_pointer (TYPE, BUF, ADDR))