gdb/config/mips/tm-mips.h

   1 /* Definitions to make GDB run on a mips box under 4.3bsd.
   2
   3    Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
   4    1997, 1998, 1999, 2000, 2002 Free Software Foundation, Inc.
   5
   6    Contributed by Per Bothner (bothner@cs.wisc.edu) at U.Wisconsin
   7    and by Alessandro Forin (af@cs.cmu.edu) at CMU..
   8
   9    This file is part of GDB.
  10
  11    This program is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 2 of the License, or
  14    (at your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful,
  17    but WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19    GNU General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330,
  24    Boston, MA 02111-1307, USA.  */
  25
  26 #ifndef TM_MIPS_H
  27 #define TM_MIPS_H 1
  28
  29 #define GDB_MULTI_ARCH 1
  30
  31 #include "regcache.h"
  32
  33 struct frame_info;
  34 struct symbol;
  35 struct type;
  36 struct value;
  37
  38 #include <bfd.h>
  39 #include "coff/sym.h"           /* Needed for PDR below.  */
  40 #include "coff/symconst.h"
  41
  42 /* Return non-zero if PC points to an instruction which will cause a step
  43    to execute both the instruction at PC and an instruction at PC+4.  */
  44 extern int mips_step_skips_delay (CORE_ADDR);
  45 #define STEP_SKIPS_DELAY_P (1)
  46 #define STEP_SKIPS_DELAY(pc) (mips_step_skips_delay (pc))
  47
  48 /* Say how long (ordinary) registers are.  This is a piece of bogosity
  49    used in push_word and a few other places; REGISTER_RAW_SIZE is the
  50    real way to know how big a register is.  */
  51
  52 #define DEPRECATED_REGISTER_SIZE 4
  53
  54 /* The size of a register.  This is predefined in tm-mips64.h.  We
  55    can't use DEPRECATED_REGISTER_SIZE because that is used for various other
  56    things.  */
  57
  58 #ifndef MIPS_REGSIZE
  59 #define MIPS_REGSIZE 4
  60 #endif
  61
  62 /* Initializer for an array of names for registers 32 and above.
  63    There should be NUM_REGS-32 strings in this initializer.  */
  64
  65 #ifndef MIPS_REGISTER_NAMES
  66 #define MIPS_REGISTER_NAMES     \
  67     {   "sr",   "lo",   "hi",   "bad",  "cause","pc",    \
  68         "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7", \
  69         "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15", \
  70         "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",\
  71         "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",\
  72         "fsr",  "fir",  ""/*"fp"*/,     "", \
  73         "",     "",     "",     "",     "",     "",     "",     "", \
  74         "",     "",     "",     "",     "",     "",     "",     "", \
  75     }
  76 #endif
  77
  78 /* Register numbers of various important registers.
  79    Note that some of these values are "real" register numbers,
  80    and correspond to the general registers of the machine,
  81    and some are "phony" register numbers which are too large
  82    to be actual register numbers as far as the user is concerned
  83    but do serve to get the desired values when passed to read_register.  */
  84
  85 #define ZERO_REGNUM 0           /* read-only register, always 0 */
  86 #define V0_REGNUM 2             /* Function integer return value */
  87 #define A0_REGNUM 4             /* Loc of first arg during a subr call */
  88 #define T9_REGNUM 25            /* Contains address of callee in PIC */
  89 #define SP_REGNUM 29            /* Contains address of top of stack */
  90 #define RA_REGNUM 31            /* Contains return address value */
  91 #define PS_REGNUM 32            /* Contains processor status */
  92 #define HI_REGNUM 34            /* Multiple/divide temp */
  93 #define LO_REGNUM 33            /* ... */
  94 #define BADVADDR_REGNUM 35      /* bad vaddr for addressing exception */
  95 #define CAUSE_REGNUM 36         /* describes last exception */
  96 #define PC_REGNUM 37            /* Contains program counter */
  97 #define FP0_REGNUM 38           /* Floating point register 0 (single float) */
  98 #define FPA0_REGNUM (FP0_REGNUM+12)     /* First float argument register */
  99 #define FCRCS_REGNUM 70         /* FP control/status */
 100 #define FCRIR_REGNUM 71         /* FP implementation/revision */
 101 #define UNUSED_REGNUM 73        /* Never used, FIXME */
 102 #define FIRST_EMBED_REGNUM 74   /* First CP0 register for embedded use */
 103 #define PRID_REGNUM 89          /* Processor ID */
 104 #define LAST_EMBED_REGNUM 89    /* Last one */
 105
 106 /* Total amount of space needed to store our copies of the machine's
 107    register state, the array `registers'.  */
 108
 109 #define REGISTER_BYTES (NUM_REGS*MIPS_REGSIZE)
 110
 111 /* Index within `registers' of the first byte of the space for
 112    register N.  */
 113
 114 #define REGISTER_BYTE(N) ((N) * MIPS_REGSIZE)
 115
 116 /* Return the GDB type object for the "standard" data type of data in
 117    register N.  */
 118
 119 #ifndef REGISTER_VIRTUAL_TYPE
 120 #define REGISTER_VIRTUAL_TYPE(N) \
 121         (((N) >= FP0_REGNUM && (N) < FP0_REGNUM+32) ? builtin_type_float \
 122          : ((N) == 32 /*SR*/) ? builtin_type_uint32 \
 123          : ((N) >= 70 && (N) <= 89) ? builtin_type_uint32 \
 124          : builtin_type_int)
 125 #endif
 126
 127 /* All mips targets store doubles in a register pair with the least
 128    significant register in the lower numbered register.
 129    If the target is big endian, double register values need conversion
 130    between memory and register formats.  */
 131
 132 extern void mips_register_convert_to_type (int regnum,
 133                                            struct type *type,
 134                                            char *buffer);
 135 extern void mips_register_convert_from_type (int regnum,
 136                                              struct type *type,
 137                                              char *buffer);
 138
 139 #define REGISTER_CONVERT_TO_TYPE(n, type, buffer)       \
 140   mips_register_convert_to_type ((n), (type), (buffer))
 141
 142 #define REGISTER_CONVERT_FROM_TYPE(n, type, buffer)     \
 143   mips_register_convert_from_type ((n), (type), (buffer))
 144
 145 \f
 146 /* Special symbol found in blocks associated with routines.  We can hang
 147    mips_extra_func_info_t's off of this.  */
 148
 149 #define MIPS_EFI_SYMBOL_NAME "__GDB_EFI_INFO__"
 150 extern void ecoff_relocate_efi (struct symbol *, CORE_ADDR);
 151
 152 /* Specific information about a procedure.
 153    This overlays the MIPS's PDR records,
 154    mipsread.c (ab)uses this to save memory */
 155
 156 typedef struct mips_extra_func_info
 157   {
 158     long numargs;               /* number of args to procedure (was iopt) */
 159     bfd_vma high_addr;          /* upper address bound */
 160     long frame_adjust;          /* offset of FP from SP (used on MIPS16) */
 161     PDR pdr;                    /* Procedure descriptor record */
 162   }
 163  *mips_extra_func_info_t;
 164
 165 extern void mips_print_extra_frame_info (struct frame_info *frame);
 166 #define PRINT_EXTRA_FRAME_INFO(fi) \
 167   mips_print_extra_frame_info (fi)
 168
 169 /* It takes two values to specify a frame on the MIPS.
 170
 171    In fact, the *PC* is the primary value that sets up a frame.  The
 172    PC is looked up to see what function it's in; symbol information
 173    from that function tells us which register is the frame pointer
 174    base, and what offset from there is the "virtual frame pointer".
 175    (This is usually an offset from SP.)  On most non-MIPS machines,
 176    the primary value is the SP, and the PC, if needed, disambiguates
 177    multiple functions with the same SP.  But on the MIPS we can't do
 178    that since the PC is not stored in the same part of the frame every
 179    time.  This does not seem to be a very clever way to set up frames,
 180    but there is nothing we can do about that.  */
 181
 182 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
 183 extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
 184
 185 /* Select the default mips disassembler */
 186
 187 #define TM_PRINT_INSN_MACH 0
 188
 189 /* These are defined in mdebugread.c and are used in mips-tdep.c  */
 190 extern CORE_ADDR sigtramp_address, sigtramp_end;
 191 extern void fixup_sigtramp (void);
 192
 193 /* Defined in mips-tdep.c and used in remote-mips.c */
 194 extern char *mips_read_processor_type (void);
 195
 196 /* Functions for dealing with MIPS16 call and return stubs.  */
 197 #define IGNORE_HELPER_CALL(pc)                  mips_ignore_helper (pc)
 198 extern int mips_ignore_helper (CORE_ADDR pc);
 199
 200 #ifndef TARGET_MIPS
 201 #define TARGET_MIPS
 202 #endif
 203
 204 /* Definitions and declarations used by mips-tdep.c and remote-mips.c  */
 205 #define MIPS_INSTLEN 4          /* Length of an instruction */
 206 #define MIPS16_INSTLEN 2        /* Length of an instruction on MIPS16 */
 207 #define MIPS_NUMREGS 32         /* Number of integer or float registers */
 208 typedef unsigned long t_inst;   /* Integer big enough to hold an instruction */
 209
 210 /* MIPS16 function addresses are odd (bit 0 is set).  Here are some
 211    macros to test, set, or clear bit 0 of addresses.  */
 212 #define IS_MIPS16_ADDR(addr)     ((addr) & 1)
 213 #define MAKE_MIPS16_ADDR(addr)   ((addr) | 1)
 214 #define UNMAKE_MIPS16_ADDR(addr) ((addr) & ~1)
 215
 216 #endif /* TM_MIPS_H */
 217
 218 /* Command to set the processor type. */
 219 extern void mips_set_processor_type_command (char *, int);
 220
 221 /* Single step based on where the current instruction will take us.  */
 222 extern void mips_software_single_step (enum target_signal, int);