gdb/config/mn10200/tm-mn10200.h

   1 /* Parameters for execution on a Matsushita mn10200 processor.
   2    Copyright 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
   3
   4    Contributed by Geoffrey Noer <noer@cygnus.com>
   5
   6    This file is part of GDB.
   7
   8    This program is free software; you can redistribute it and/or modify
   9    it under the terms of the GNU General Public License as published by
  10    the Free Software Foundation; either version 2 of the License, or
  11    (at your option) any later version.
  12
  13    This program is distributed in the hope that it will be useful,
  14    but WITHOUT ANY WARRANTY; without even the implied warranty of
  15    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16    GNU General Public License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with this program; if not, write to the Free Software
  20    Foundation, Inc., 59 Temple Place - Suite 330,
  21    Boston, MA 02111-1307, USA.  */
  22
  23 /* FIXME: cagney/2001-03-01: The below macros refer to functions
  24    declared in "regcache.h".  The ``correct fix'' is to convert those
  25    macros into functions.  */
  26 #include "regcache.h"
  27
  28 /* The mn10200 is little endian.  */
  29 #define TARGET_BYTE_ORDER BFD_ENDIAN_LITTLE
  30
  31 /* ints are only 16bits on the mn10200.  */
  32 #undef TARGET_INT_BIT
  33 #define TARGET_INT_BIT 16
  34
  35 /* The mn10200 doesn't support long long types.  */
  36 #undef TARGET_LONG_LONG_BIT
  37 #define TARGET_LONG_LONG_BIT 32
  38
  39 /* The mn10200 doesn't support double or long double either.  */
  40 #undef TARGET_DOUBLE_BIT
  41 #undef TARGET_LONG_DOUBLE_BIT
  42 #define TARGET_DOUBLE_BIT 32
  43 #define TARGET_LONG_DOUBLE_BIT 32
  44
  45 /* Not strictly correct, but the machine independent code is not
  46    ready to handle any of the basic sizes not being a power of two.  */
  47 #undef TARGET_PTR_BIT
  48 #define TARGET_PTR_BIT 32
  49
  50 /* The mn10200 really has 24 bit registers but the simulator reads/writes
  51    them as 32bit values, so we claim they're 32bits each.  This may have
  52    to be tweaked if the Matsushita emulator/board really deals with them
  53    as 24bits each.  */
  54 #define REGISTER_SIZE 4
  55
  56 #define MAX_REGISTER_RAW_SIZE REGISTER_SIZE
  57 #define NUM_REGS 11
  58
  59 #define REGISTER_BYTES (NUM_REGS * REGISTER_SIZE)
  60
  61 #define REGISTER_NAMES \
  62 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "sp", \
  63   "pc", "mdr", "psw"}
  64
  65 #define FP_REGNUM 6
  66 #define SP_REGNUM 7
  67 #define PC_REGNUM 8
  68 #define MDR_REGNUM 9
  69 #define PSW_REGNUM 10
  70
  71 /* Treat the registers as 32bit values.  */
  72 #define REGISTER_VIRTUAL_TYPE(REG) builtin_type_long
  73
  74 #define REGISTER_BYTE(REG) ((REG) * REGISTER_SIZE)
  75 #define REGISTER_VIRTUAL_SIZE(REG) REGISTER_SIZE
  76 #define REGISTER_RAW_SIZE(REG) REGISTER_SIZE
  77
  78 #define MAX_REGISTER_VIRTUAL_SIZE REGISTER_SIZE
  79
  80 /* The breakpoint instruction must be the same size as te smallest
  81    instruction in the instruction set.
  82
  83    The Matsushita mn10x00 processors have single byte instructions
  84    so we need a single byte breakpoint.  Matsushita hasn't defined
  85    one, so we defined it ourselves.
  86
  87    0xff is the only available single byte insn left on the mn10200.  */
  88 #define BREAKPOINT {0xff}
  89
  90 #define FUNCTION_START_OFFSET 0
  91
  92 #define DECR_PC_AFTER_BREAK 0
  93
  94 /* Stacks grow the normal way.  */
  95 #define INNER_THAN(lhs,rhs) ((lhs) < (rhs))
  96
  97 #define SAVED_PC_AFTER_CALL(frame) \
  98   (read_memory_integer (read_register (SP_REGNUM), REGISTER_SIZE) & 0xffffff)
  99
 100 struct frame_info;
 101 struct frame_saved_regs;
 102 struct type;
 103 struct value;
 104
 105 #define EXTRA_FRAME_INFO struct frame_saved_regs fsr; int status; int stack_size;
 106
 107 extern void mn10200_init_extra_frame_info (struct frame_info *);
 108 #define INIT_EXTRA_FRAME_INFO(fromleaf, fi) mn10200_init_extra_frame_info (fi)
 109 #define INIT_FRAME_PC(x,y)
 110
 111 extern void mn10200_frame_find_saved_regs (struct frame_info *,
 112                                            struct frame_saved_regs *);
 113 #define FRAME_FIND_SAVED_REGS(fi, regaddr) regaddr = fi->fsr
 114
 115 extern CORE_ADDR mn10200_frame_chain (struct frame_info *);
 116 #define FRAME_CHAIN(fi) mn10200_frame_chain (fi)
 117 #define FRAME_CHAIN_VALID(FP, FI)       generic_file_frame_chain_valid (FP, FI)
 118
 119 extern CORE_ADDR mn10200_find_callers_reg (struct frame_info *, int);
 120 extern CORE_ADDR mn10200_frame_saved_pc (struct frame_info *);
 121 #define FRAME_SAVED_PC(FI) (mn10200_frame_saved_pc (FI))
 122
 123 /* Extract from an array REGBUF containing the (raw) register state
 124    a function return value of type TYPE, and copy that, in virtual format,
 125    into VALBUF.  */
 126
 127 #define EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
 128   { \
 129     if (TYPE_LENGTH (TYPE) > 8) \
 130       internal_error (__FILE__, __LINE__, "failed internal consistency check"); \
 131     else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
 132       { \
 133         memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), 2); \
 134         memcpy (VALBUF + 2, REGBUF + REGISTER_BYTE (1), 2); \
 135       } \
 136     else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
 137       { \
 138         memcpy (VALBUF, REGBUF + REGISTER_BYTE (4), TYPE_LENGTH (TYPE)); \
 139       } \
 140     else \
 141       { \
 142         memcpy (VALBUF, REGBUF + REGISTER_BYTE (0), TYPE_LENGTH (TYPE)); \
 143       } \
 144   }
 145
 146 #define EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
 147   extract_address (REGBUF + REGISTER_BYTE (4), \
 148                    REGISTER_RAW_SIZE (4))
 149
 150 #define STORE_RETURN_VALUE(TYPE, VALBUF) \
 151   { \
 152     if (TYPE_LENGTH (TYPE) > 8) \
 153       internal_error (__FILE__, __LINE__, "failed internal consistency check"); \
 154     else if (TYPE_LENGTH (TYPE) > 2 && TYPE_CODE (TYPE) != TYPE_CODE_PTR) \
 155       { \
 156         write_register_bytes (REGISTER_BYTE (0), VALBUF, 2); \
 157         write_register_bytes (REGISTER_BYTE (1), VALBUF + 2, 2); \
 158       } \
 159     else if (TYPE_CODE (TYPE) == TYPE_CODE_PTR)\
 160       { \
 161         write_register_bytes (REGISTER_BYTE (4), VALBUF, TYPE_LENGTH (TYPE)); \
 162       } \
 163     else \
 164       { \
 165         write_register_bytes (REGISTER_BYTE (0), VALBUF, TYPE_LENGTH (TYPE)); \
 166       } \
 167   }
 168
 169
 170 extern CORE_ADDR mn10200_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
 171 #define STORE_STRUCT_RETURN(STRUCT_ADDR, SP) \
 172   (SP) = mn10200_store_struct_return (STRUCT_ADDR, SP)
 173
 174 extern CORE_ADDR mn10200_skip_prologue (CORE_ADDR);
 175 #define SKIP_PROLOGUE(pc) (mn10200_skip_prologue (pc))
 176
 177 #define FRAME_ARGS_SKIP 0
 178
 179 #define FRAME_ARGS_ADDRESS(fi) ((fi)->frame)
 180 #define FRAME_LOCALS_ADDRESS(fi) ((fi)->frame)
 181 #define FRAME_NUM_ARGS(fi) (-1)
 182
 183 extern void mn10200_pop_frame (struct frame_info *);
 184 #define POP_FRAME mn10200_pop_frame (get_current_frame ())
 185
 186 #define USE_GENERIC_DUMMY_FRAMES 1
 187 #define CALL_DUMMY                   {0}
 188 #define CALL_DUMMY_START_OFFSET      (0)
 189 #define CALL_DUMMY_BREAKPOINT_OFFSET (0)
 190 #define CALL_DUMMY_LOCATION          AT_ENTRY_POINT
 191 #define FIX_CALL_DUMMY(DUMMY, START, FUNADDR, NARGS, ARGS, TYPE, GCCP)
 192 #define CALL_DUMMY_ADDRESS()         entry_point_address ()
 193
 194 extern CORE_ADDR mn10200_push_return_address (CORE_ADDR, CORE_ADDR);
 195 #define PUSH_RETURN_ADDRESS(PC, SP)  mn10200_push_return_address (PC, SP)
 196
 197 #define PUSH_DUMMY_FRAME        generic_push_dummy_frame ()
 198
 199 extern CORE_ADDR
 200 mn10200_push_arguments (int, struct value **, CORE_ADDR,
 201                         unsigned char, CORE_ADDR);
 202 #define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
 203   (mn10200_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR))
 204
 205 #define PC_IN_CALL_DUMMY(PC, SP, FP) generic_pc_in_call_dummy (PC, SP, FP)
 206
 207 #define REG_STRUCT_HAS_ADDR(gcc_p,TYPE) \
 208         (TYPE_LENGTH (TYPE) > 8)
 209
 210 extern use_struct_convention_fn mn10200_use_struct_convention;
 211 #define USE_STRUCT_CONVENTION(GCC_P, TYPE) mn10200_use_struct_convention (GCC_P, TYPE)
 212
 213 /* Override the default get_saved_register function with
 214    one that takes account of generic CALL_DUMMY frames.  */
 215 #define GET_SAVED_REGISTER(raw_buffer, optimized, addrp, frame, regnum, lval) \
 216       generic_get_saved_register (raw_buffer, optimized, addrp, frame, regnum, lval)
 217
 218 /* Define this for Wingdb */
 219 #define TARGET_MN10200