gdb/config/sparc/tm-sp64.h

   1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
   2    This is included by other tm-*.h files to define SPARC64 cpu-related info.
   3    Copyright 1994, 1995, 1996, 1998, 1999, 2000
   4    Free Software Foundation, Inc.
   5    This is (obviously) based on the SPARC Vn (n<9) port.
   6    Contributed by Doug Evans (dje@cygnus.com).
   7    Further modified by Bob Manson (manson@cygnus.com).
   8
   9    This file is part of GDB.
  10
  11    This program is free software; you can redistribute it and/or modify
  12    it under the terms of the GNU General Public License as published by
  13    the Free Software Foundation; either version 2 of the License, or
  14    (at your option) any later version.
  15
  16    This program is distributed in the hope that it will be useful,
  17    but WITHOUT ANY WARRANTY; without even the implied warranty of
  18    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  19    GNU General Public License for more details.
  20
  21    You should have received a copy of the GNU General Public License
  22    along with this program; if not, write to the Free Software
  23    Foundation, Inc., 59 Temple Place - Suite 330,
  24    Boston, MA 02111-1307, USA.  */
  25
  26 #define GDB_MULTI_ARCH GDB_MULTI_ARCH_PARTIAL
  27
  28 #ifndef GDB_TARGET_IS_SPARC64
  29 #define GDB_TARGET_IS_SPARC64 1
  30 #endif
  31
  32 #include "sparc/tm-sparc.h"
  33
  34 /* Eeeew. Ok, we have to assume (for now) that the processor really is
  35    in sparc64 mode. While this is the same instruction sequence as
  36    on the Sparc, the stack frames are offset by +2047 (and the arguments
  37    are 8 bytes instead of 4). */
  38 /* Instructions are:
  39    std  %f10, [ %fp + 0x7a7 ]
  40    std  %f8, [ %fp + 0x79f ]
  41    std  %f6, [ %fp + 0x797 ]
  42    std  %f4, [ %fp + 0x78f ]
  43    std  %f2, [ %fp + 0x787 ]
  44    std  %f0, [ %fp + 0x77f ]
  45    std  %g6, [ %fp + 0x777 ]
  46    std  %g4, [ %fp + 0x76f ]
  47    std  %g2, [ %fp + 0x767 ]
  48    std  %g0, [ %fp + 0x75f ]
  49    std  %fp, [ %fp + 0x757 ]
  50    std  %i4, [ %fp + 0x74f ]
  51    std  %i2, [ %fp + 0x747 ]
  52    std  %i0, [ %fp + 0x73f ]
  53    nop
  54    nop
  55    nop
  56    nop
  57    rd  %tbr, %o0
  58    st  %o0, [ %fp + 0x72b ]
  59    rd  %tpc, %o0
  60    st  %o0, [ %fp + 0x727 ]
  61    rd  %psr, %o0
  62    st  %o0, [ %fp + 0x723 ]
  63    rd  %y, %o0
  64    st  %o0, [ %fp + 0x71f ]
  65    ldx  [ %sp + 0x8a7 ], %o5
  66    ldx  [ %sp + 0x89f ], %o4
  67    ldx  [ %sp + 0x897 ], %o3
  68    ldx  [ %sp + 0x88f ], %o2
  69    ldx  [ %sp + 0x887 ], %o1
  70    call  %g0
  71    ldx  [ %sp + 0x87f ], %o0
  72    nop
  73    ta  1
  74    nop
  75    nop
  76  */
  77
  78 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
  79 /*
  80  * The following defines must go away for MULTI_ARCH.
  81  */
  82
  83 #ifndef DO_CALL_DUMMY_ON_STACK
  84
  85 /*
  86  * These defines will suffice for the AT_ENTRY_POINT call dummy method.
  87  */
  88
  89 #undef  CALL_DUMMY
  90 #define CALL_DUMMY {0}
  91 #undef  CALL_DUMMY_LENGTH
  92 #define CALL_DUMMY_LENGTH 0
  93 #undef  CALL_DUMMY_CALL_OFFSET
  94 #define CALL_DUMMY_CALL_OFFSET 0
  95 #undef  CALL_DUMMY_START_OFFSET
  96 #define CALL_DUMMY_START_OFFSET 0
  97 #undef  CALL_DUMMY_BREAKPOINT_OFFSET
  98 #define CALL_DUMMY_BREAKPOINT_OFFSET 0
  99 #undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
 100 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
 101 #undef  CALL_DUMMY_LOCATION
 102 #define CALL_DUMMY_LOCATION AT_ENTRY_POINT
 103 #undef  CALL_DUMMY_STACK_ADJUST
 104 #define CALL_DUMMY_STACK_ADJUST 128
 105 #undef  SIZEOF_CALL_DUMMY_WORDS
 106 #define SIZEOF_CALL_DUMMY_WORDS 0
 107 #undef  CALL_DUMMY_ADDRESS
 108 #define CALL_DUMMY_ADDRESS() entry_point_address()
 109 #undef  FIX_CALL_DUMMY
 110 #define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P)
 111 #undef  PUSH_RETURN_ADDRESS
 112 #define PUSH_RETURN_ADDRESS(PC, SP) sparc_at_entry_push_return_address (PC, SP)
 113 extern CORE_ADDR
 114 sparc_at_entry_push_return_address (CORE_ADDR pc, CORE_ADDR sp);
 115
 116 #undef  STORE_STRUCT_RETURN
 117 #define STORE_STRUCT_RETURN(ADDR, SP) \
 118      sparc_at_entry_store_struct_return (ADDR, SP)
 119 extern void
 120 sparc_at_entry_store_struct_return (CORE_ADDR addr, CORE_ADDR sp);
 121
 122
 123 #else
 124 /*
 125  * Old call dummy method, with CALL_DUMMY on the stack.
 126  */
 127
 128 #undef  CALL_DUMMY
 129 #define CALL_DUMMY {             0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
 130                                  0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
 131                                  0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
 132                                  0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
 133                                  0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
 134                                  0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
 135                                  0xf03fa73f01000000LL, 0x0100000001000000LL,\
 136                                  0x0100000091580000LL, 0xd027a72b93500000LL,\
 137                                  0xd027a72791480000LL, 0xd027a72391400000LL,\
 138                                  0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
 139                                  0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
 140                                  0x0100000091d02001LL, 0x0100000001000000LL }
 141
 142
 143 /* 128 is to reserve space to write the %i/%l registers that will be restored
 144    when we resume. */
 145 #undef  CALL_DUMMY_STACK_ADJUST
 146 #define CALL_DUMMY_STACK_ADJUST 128
 147
 148 /* Size of the call dummy in bytes. */
 149 #undef  CALL_DUMMY_LENGTH
 150 #define CALL_DUMMY_LENGTH 192
 151
 152 /* Offset within CALL_DUMMY of the 'call' instruction. */
 153 #undef  CALL_DUMMY_START_OFFSET
 154 #define CALL_DUMMY_START_OFFSET 148
 155
 156 /* Offset within CALL_DUMMY of the 'call' instruction. */
 157 #undef  CALL_DUMMY_CALL_OFFSET
 158 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
 159
 160 /* Offset within CALL_DUMMY of the 'ta 1' instruction. */
 161 #undef  CALL_DUMMY_BREAKPOINT_OFFSET
 162 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
 163
 164 /* Let's GDB know that it can make a call_dummy breakpoint.  */
 165 #undef  CALL_DUMMY_BREAKPOINT_OFFSET_P
 166 #define CALL_DUMMY_BREAKPOINT_OFFSET_P 1
 167
 168 /* Call dummy will be located on the stack.  */
 169 #undef  CALL_DUMMY_LOCATION
 170 #define CALL_DUMMY_LOCATION ON_STACK
 171
 172 /* Insert the function address into the call dummy.  */
 173 #undef  FIX_CALL_DUMMY
 174 #define FIX_CALL_DUMMY(dummyname, pc, fun, nargs, args, type, gcc_p) \
 175  sparc_fix_call_dummy (dummyname, pc, fun, type, gcc_p)
 176 void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
 177                            struct type *value_type, int using_gcc);
 178
 179
 180 /* The remainder of these will accept the default definition.  */
 181 #undef  SIZEOF_CALL_DUMMY_WORDS
 182 #undef  PUSH_RETURN_ADDRESS
 183 #undef  CALL_DUMMY_ADDRESS
 184 #undef  STORE_STRUCT_RETURN
 185
 186 #endif
 187
 188 /* Does the specified function use the "struct returning" convention
 189    or the "value returning" convention?  The "value returning" convention
 190    almost invariably returns the entire value in registers.  The
 191    "struct returning" convention often returns the entire value in
 192    memory, and passes a pointer (out of or into the function) saying
 193    where the value (is or should go).
 194
 195    Since this sometimes depends on whether it was compiled with GCC,
 196    this is also an argument.  This is used in call_function to build a
 197    stack, and in value_being_returned to print return values.
 198
 199    On Sparc64, we only pass pointers to structs if they're larger than
 200    32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
 201    values go into %fp0-%fp3).  */
 202
 203 #undef  USE_STRUCT_CONVENTION
 204 #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
 205
 206 CORE_ADDR sparc64_push_arguments (int,
 207                                   struct value **, CORE_ADDR, int, CORE_ADDR);
 208 #undef PUSH_ARGUMENTS
 209 #define PUSH_ARGUMENTS(A,B,C,D,E) \
 210      (sparc64_push_arguments ((A), (B), (C), (D), (E)))
 211
 212 /* Store the address of the place in which to copy the structure the
 213    subroutine will return.  This is called from call_function. */
 214 /* FIXME: V9 uses %o0 for this.  */
 215
 216 #undef  STORE_STRUCT_RETURN
 217 #define STORE_STRUCT_RETURN(ADDR, SP) \
 218   { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
 219
 220 /* Stack must be aligned on 128-bit boundaries when synthesizing
 221    function calls. */
 222
 223 #undef  STACK_ALIGN
 224 #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
 225
 226 /* Initializer for an array of names of registers.
 227    There should be NUM_REGS strings in this initializer.  */
 228 /* Some of these registers are only accessible from priviledged mode.
 229    They are here for kernel debuggers, etc.  */
 230 /* FIXME: icc and xcc are currently considered separate registers.
 231    This may have to change and consider them as just one (ccr).
 232    Let's postpone this as long as we can.  It's nice to be able to set
 233    them individually.  */
 234 /* FIXME: fcc0-3 are currently separate, even though they are also part of
 235    fsr.  May have to remove them but let's postpone this as long as
 236    possible.  It's nice to be able to set them individually.  */
 237 /* FIXME: Whether to include f33, f35, etc. here is not clear.
 238    There are advantages and disadvantages.  */
 239
 240 #undef  REGISTER_NAMES
 241 #define REGISTER_NAMES  \
 242 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7",       \
 243   "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7",       \
 244   "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7",       \
 245   "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7",       \
 246                                                                 \
 247   "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7",               \
 248   "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15",         \
 249   "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23",       \
 250   "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31",       \
 251   "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46",       \
 252   "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62",       \
 253                                                                 \
 254   "pc", "npc", "ccr", "fsr", "fprs", "y", "asi",                \
 255   "ver", "tick", "pil", "pstate",                               \
 256   "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate",         \
 257   "cwp", "cansave", "canrestore", "cleanwin", "otherwin",       \
 258   "asr16", "asr17", "asr18", "asr19", "asr20", "asr21",         \
 259   "asr22", "asr23", "asr24", "asr25", "asr26", "asr27",         \
 260   "asr28", "asr29", "asr30", "asr31",                           \
 261   /* These are here at the end to simplify removing them if we have to.  */ \
 262   "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3"                  \
 263 }
 264
 265 #undef REG_STRUCT_HAS_ADDR
 266 #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
 267
 268 extern CORE_ADDR sparc64_read_sp ();
 269 extern CORE_ADDR sparc64_read_fp ();
 270 extern void sparc64_write_sp (CORE_ADDR);
 271 extern void sparc64_write_fp (CORE_ADDR);
 272
 273 #define TARGET_READ_SP() (sparc64_read_sp ())
 274 #define TARGET_READ_FP() (sparc64_read_fp ())
 275 #define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
 276 #define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
 277
 278 #undef EXTRACT_RETURN_VALUE
 279 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
 280      sp64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
 281 extern void sp64_extract_return_value (struct type *, char[], char *, int);
 282
 283 /* Register numbers of various important registers.
 284    Note that some of these values are "real" register numbers,
 285    and correspond to the general registers of the machine,
 286    and some are "phony" register numbers which are too large
 287    to be actual register numbers as far as the user is concerned
 288    but do serve to get the desired values when passed to read_register.  */
 289
 290 #if 0                           /* defined in tm-sparc.h, replicated
 291                                    for doc purposes */
 292 #define G0_REGNUM 0             /* %g0 */
 293 #define G1_REGNUM 1             /* %g1 */
 294 #define O0_REGNUM 8             /* %o0 */
 295 #define SP_REGNUM 14            /* Contains address of top of stack, \
 296                                    which is also the bottom of the frame.  */
 297 #define RP_REGNUM 15            /* Contains return address value, *before* \
 298                                    any windows get switched.  */
 299 #define O7_REGNUM 15            /* Last local reg not saved on stack frame */
 300 #define L0_REGNUM 16            /* First local reg that's saved on stack frame
 301                                    rather than in machine registers */
 302 #define I0_REGNUM 24            /* %i0 */
 303 #define FP_REGNUM 30            /* Contains address of executing stack frame */
 304 #define I7_REGNUM 31            /* Last local reg saved on stack frame */
 305 #define FP0_REGNUM 32           /* Floating point register 0 */
 306 #endif
 307
 308 /*#define FP_MAX_REGNUM 80*/    /* 1 + last fp reg number */
 309
 310 /* #undef v8 misc. regs */
 311
 312 #undef Y_REGNUM
 313 #undef PS_REGNUM
 314 #undef WIM_REGNUM
 315 #undef TBR_REGNUM
 316 #undef PC_REGNUM
 317 #undef NPC_REGNUM
 318 #undef FPS_REGNUM
 319 #undef CPS_REGNUM
 320
 321 /* v9 misc. and priv. regs */
 322
 323 #define C0_REGNUM 80                    /* Start of control registers */
 324
 325 #define PC_REGNUM (C0_REGNUM + 0)       /* Current PC */
 326 #define NPC_REGNUM (C0_REGNUM + 1)      /* Next PC */
 327 #define CCR_REGNUM (C0_REGNUM + 2)      /* Condition Code Register (%xcc,%icc) */
 328 #define FSR_REGNUM (C0_REGNUM + 3)      /* Floating Point State */
 329 #define FPRS_REGNUM (C0_REGNUM + 4)     /* Floating Point Registers State */
 330 #define Y_REGNUM (C0_REGNUM + 5)        /* Temp register for multiplication, etc.  */
 331 #define ASI_REGNUM (C0_REGNUM + 6)      /* Alternate Space Identifier */
 332 #define VER_REGNUM (C0_REGNUM + 7)      /* Version register */
 333 #define TICK_REGNUM (C0_REGNUM + 8)     /* Tick register */
 334 #define PIL_REGNUM (C0_REGNUM + 9)      /* Processor Interrupt Level */
 335 #define PSTATE_REGNUM (C0_REGNUM + 10)  /* Processor State */
 336 #define TSTATE_REGNUM (C0_REGNUM + 11)  /* Trap State */
 337 #define TBA_REGNUM (C0_REGNUM + 12)     /* Trap Base Address */
 338 #define TL_REGNUM (C0_REGNUM + 13)      /* Trap Level */
 339 #define TT_REGNUM (C0_REGNUM + 14)      /* Trap Type */
 340 #define TPC_REGNUM (C0_REGNUM + 15)     /* Trap pc */
 341 #define TNPC_REGNUM (C0_REGNUM + 16)    /* Trap npc */
 342 #define WSTATE_REGNUM (C0_REGNUM + 17)  /* Window State */
 343 #define CWP_REGNUM (C0_REGNUM + 18)     /* Current Window Pointer */
 344 #define CANSAVE_REGNUM (C0_REGNUM + 19)         /* Savable Windows */
 345 #define CANRESTORE_REGNUM (C0_REGNUM + 20)      /* Restorable Windows */
 346 #define CLEANWIN_REGNUM (C0_REGNUM + 21)        /* Clean Windows */
 347 #define OTHERWIN_REGNUM (C0_REGNUM + 22)        /* Other Windows */
 348 #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n))   /* Ancillary State Register
 349                                                    (n = 16...31) */
 350 #define ICC_REGNUM (C0_REGNUM + 39)     /* 32 bit condition codes */
 351 #define XCC_REGNUM (C0_REGNUM + 40)     /* 64 bit condition codes */
 352 #define FCC0_REGNUM (C0_REGNUM + 41)    /* fp cc reg 0 */
 353 #define FCC1_REGNUM (C0_REGNUM + 42)    /* fp cc reg 1 */
 354 #define FCC2_REGNUM (C0_REGNUM + 43)    /* fp cc reg 2 */
 355 #define FCC3_REGNUM (C0_REGNUM + 44)    /* fp cc reg 3 */
 356
 357 /* Number of machine registers.  */
 358
 359 #undef  NUM_REGS
 360 #define NUM_REGS 125
 361
 362 /* Total amount of space needed to store our copies of the machine's
 363    register state, the array `registers'.
 364    Some of the registers aren't 64 bits, but it's a lot simpler just to assume
 365    they all are (since most of them are).  */
 366 #undef  REGISTER_BYTES
 367 #define REGISTER_BYTES (32*8+32*8+45*8)
 368
 369 /* Index within `registers' of the first byte of the space for
 370    register N.  */
 371 #undef  REGISTER_BYTE
 372 #define REGISTER_BYTE(N) \
 373   ((N) < 32 ? (N)*8                             \
 374    : (N) < 64 ? 32*8 + ((N)-32)*4               \
 375    : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
 376    : 64*8 + ((N)-C0_REGNUM)*8)
 377
 378 /* Say how long (ordinary) registers are.  This is a piece of bogosity
 379    used in push_word and a few other places; REGISTER_RAW_SIZE is the
 380    real way to know how big a register is.  */
 381
 382 #undef  REGISTER_SIZE
 383 #define REGISTER_SIZE 8
 384
 385 /* Number of bytes of storage in the actual machine representation
 386    for register N.  */
 387
 388 #undef  REGISTER_RAW_SIZE
 389 #define REGISTER_RAW_SIZE(N) \
 390   ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
 391
 392 /* Number of bytes of storage in the program's representation
 393    for register N.  */
 394
 395 #undef  REGISTER_VIRTUAL_SIZE
 396 #define REGISTER_VIRTUAL_SIZE(N) \
 397   ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
 398
 399 /* Largest value REGISTER_RAW_SIZE can have.  */
 400 /* tm-sparc.h defines this as 8, but play it safe.  */
 401
 402 #undef  MAX_REGISTER_RAW_SIZE
 403 #define MAX_REGISTER_RAW_SIZE 8
 404
 405 /* Largest value REGISTER_VIRTUAL_SIZE can have.  */
 406 /* tm-sparc.h defines this as 8, but play it safe.  */
 407
 408 #undef  MAX_REGISTER_VIRTUAL_SIZE
 409 #define MAX_REGISTER_VIRTUAL_SIZE 8
 410
 411 /* Return the GDB type object for the "standard" data type
 412    of data in register N.  */
 413
 414 #undef  REGISTER_VIRTUAL_TYPE
 415 #define REGISTER_VIRTUAL_TYPE(N) \
 416  ((N) < 32 ? builtin_type_long_long \
 417   : (N) < 64 ? builtin_type_float \
 418   : (N) < 80 ? builtin_type_double \
 419   : builtin_type_long_long)
 420
 421 /* We use to support both 32 bit and 64 bit pointers.
 422    We can't anymore because TARGET_PTR_BIT must now be a constant.  */
 423 #undef  TARGET_PTR_BIT
 424 #define TARGET_PTR_BIT 64
 425
 426 /* Longs are 64 bits. */
 427 #undef TARGET_LONG_BIT
 428 #define TARGET_LONG_BIT 64
 429
 430 #undef TARGET_LONG_LONG_BIT
 431 #define TARGET_LONG_LONG_BIT 64
 432
 433 /* Return number of bytes at start of arglist that are not really args.  */
 434
 435 #undef  FRAME_ARGS_SKIP
 436 #define FRAME_ARGS_SKIP 136
 437
 438 #endif /* GDB_MULTI_ARCH */
 439 \f
 440 /* Offsets into jmp_buf.
 441    FIXME: This was borrowed from the v8 stuff and will probably have to change
 442    for v9.  */
 443
 444 #define JB_ELEMENT_SIZE 8       /* Size of each element in jmp_buf */
 445
 446 #define JB_ONSSTACK 0
 447 #define JB_SIGMASK 1
 448 #define JB_SP 2
 449 #define JB_PC 3
 450 #define JB_NPC 4
 451 #define JB_PSR 5
 452 #define JB_G1 6
 453 #define JB_O0 7
 454 #define JB_WBCNT 8
 455
 456 /* Figure out where the longjmp will land.  We expect that we have
 457    just entered longjmp and haven't yet setup the stack frame, so the
 458    args are still in the output regs.  %o0 (O0_REGNUM) points at the
 459    jmp_buf structure from which we extract the pc (JB_PC) that we will
 460    land at.  The pc is copied into ADDR.  This routine returns true on
 461    success */
 462
 463 extern int get_longjmp_target (CORE_ADDR *);
 464
 465 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
 466
 467 #undef TM_PRINT_INSN_MACH
 468 #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
 469