1 /* Target machine sub-parameters for SPARC64, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC64 cpu-related info.
3 Copyright 1994, 1995, 1996, 1998 Free Software Foundation, Inc.
4 This is (obviously) based on the SPARC Vn (n<9) port.
5 Contributed by Doug Evans (dje@cygnus.com).
6 Further modified by Bob Manson (manson@cygnus.com).
8 This file is part of GDB.
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
25 #define GDB_TARGET_IS_SPARC64
29 /* Eeeew. Ok, we have to assume (for now) that the processor really is
30 in sparc64 mode. While this is the same instruction sequence as
31 on the Sparc, the stack frames are offset by +2047 (and the arguments
32 are 8 bytes instead of 4). */
34 std %f10, [ %fp + 0x7a7 ]
35 std %f8, [ %fp + 0x79f ]
36 std %f6, [ %fp + 0x797 ]
37 std %f4, [ %fp + 0x78f ]
38 std %f2, [ %fp + 0x787 ]
39 std %f0, [ %fp + 0x77f ]
40 std %g6, [ %fp + 0x777 ]
41 std %g4, [ %fp + 0x76f ]
42 std %g2, [ %fp + 0x767 ]
43 std %g0, [ %fp + 0x75f ]
44 std %fp, [ %fp + 0x757 ]
45 std %i4, [ %fp + 0x74f ]
46 std %i2, [ %fp + 0x747 ]
47 std %i0, [ %fp + 0x73f ]
53 st %o0, [ %fp + 0x72b ]
55 st %o0, [ %fp + 0x727 ]
57 st %o0, [ %fp + 0x723 ]
59 st %o0, [ %fp + 0x71f ]
60 ldx [ %sp + 0x8a7 ], %o5
61 ldx [ %sp + 0x89f ], %o4
62 ldx [ %sp + 0x897 ], %o3
63 ldx [ %sp + 0x88f ], %o2
64 ldx [ %sp + 0x887 ], %o1
66 ldx [ %sp + 0x87f ], %o0
73 #define CALL_DUMMY { 0x9de3bec0fd3fa7f7LL, 0xf93fa7eff53fa7e7LL,\
74 0xf13fa7dfed3fa7d7LL, 0xe93fa7cfe53fa7c7LL,\
75 0xe13fa7bfdd3fa7b7LL, 0xd93fa7afd53fa7a7LL,\
76 0xd13fa79fcd3fa797LL, 0xc93fa78fc53fa787LL,\
77 0xc13fa77fcc3fa777LL, 0xc83fa76fc43fa767LL,\
78 0xc03fa75ffc3fa757LL, 0xf83fa74ff43fa747LL,\
79 0xf03fa73f01000000LL, 0x0100000001000000LL,\
80 0x0100000091580000LL, 0xd027a72b93500000LL,\
81 0xd027a72791480000LL, 0xd027a72391400000LL,\
82 0xd027a71fda5ba8a7LL, 0xd85ba89fd65ba897LL,\
83 0xd45ba88fd25ba887LL, 0x9fc02000d05ba87fLL,\
84 0x0100000091d02001LL, 0x0100000001000000LL }
87 /* 128 is to reserve space to write the %i/%l registers that will be restored
89 #define CALL_DUMMY_STACK_ADJUST 128
91 #define CALL_DUMMY_LENGTH 192
93 #define CALL_DUMMY_START_OFFSET 148
95 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + (5 * 4))
97 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + (8 * 4))
99 #include "sparc/tm-sparc.h"
101 /* Stack must be aligned on 128-bit boundaries when synthesizing
105 #define STACK_ALIGN(ADDR) (((ADDR) + 15 ) & -16)
107 /* Number of machine registers. */
112 /* Initializer for an array of names of registers.
113 There should be NUM_REGS strings in this initializer. */
114 /* Some of these registers are only accessible from priviledged mode.
115 They are here for kernel debuggers, etc. */
116 /* FIXME: icc and xcc are currently considered separate registers.
117 This may have to change and consider them as just one (ccr).
118 Let's postpone this as long as we can. It's nice to be able to set
119 them individually. */
120 /* FIXME: fcc0-3 are currently separate, even though they are also part of
121 fsr. May have to remove them but let's postpone this as long as
122 possible. It's nice to be able to set them individually. */
123 /* FIXME: Whether to include f33, f35, etc. here is not clear.
124 There are advantages and disadvantages. */
126 #undef REGISTER_NAMES
127 #define REGISTER_NAMES \
128 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
129 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
130 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
131 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
133 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
134 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
135 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
136 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
137 "f32", "f34", "f36", "f38", "f40", "f42", "f44", "f46", \
138 "f48", "f50", "f52", "f54", "f56", "f58", "f60", "f62", \
140 "pc", "npc", "ccr", "fsr", "fprs", "y", "asi", \
141 "ver", "tick", "pil", "pstate", \
142 "tstate", "tba", "tl", "tt", "tpc", "tnpc", "wstate", \
143 "cwp", "cansave", "canrestore", "cleanwin", "otherwin", \
144 "asr16", "asr17", "asr18", "asr19", "asr20", "asr21", \
145 "asr22", "asr23", "asr24", "asr25", "asr26", "asr27", \
146 "asr28", "asr29", "asr30", "asr31", \
147 /* These are here at the end to simplify removing them if we have to. */ \
148 "icc", "xcc", "fcc0", "fcc1", "fcc2", "fcc3" \
151 /* Register numbers of various important registers.
152 Note that some of these values are "real" register numbers,
153 and correspond to the general registers of the machine,
154 and some are "phony" register numbers which are too large
155 to be actual register numbers as far as the user is concerned
156 but do serve to get the desired values when passed to read_register. */
158 #if 0 /* defined in tm-sparc.h, replicated for doc purposes */
159 #define G0_REGNUM 0 /* %g0 */
160 #define G1_REGNUM 1 /* %g1 */
161 #define O0_REGNUM 8 /* %o0 */
162 #define SP_REGNUM 14 /* Contains address of top of stack, \
163 which is also the bottom of the frame. */
164 #define RP_REGNUM 15 /* Contains return address value, *before* \
165 any windows get switched. */
166 #define O7_REGNUM 15 /* Last local reg not saved on stack frame */
167 #define L0_REGNUM 16 /* First local reg that's saved on stack frame
168 rather than in machine registers */
169 #define I0_REGNUM 24 /* %i0 */
170 #define FP_REGNUM 30 /* Contains address of executing stack frame */
171 #define I7_REGNUM 31 /* Last local reg saved on stack frame */
172 #define FP0_REGNUM 32 /* Floating point register 0 */
175 #define FP_MAX_REGNUM 80 /* 1 + last fp reg number */
177 /* #undef v8 misc. regs */
188 /* v9 misc. and priv. regs */
190 #define C0_REGNUM FP_MAX_REGNUM /* Start of control registers */
191 #define PC_REGNUM (C0_REGNUM + 0) /* Current PC */
192 #define NPC_REGNUM (C0_REGNUM + 1) /* Next PC */
193 #define CCR_REGNUM (C0_REGNUM + 2) /* Condition Code Register (%xcc,%icc) */
194 #define FSR_REGNUM (C0_REGNUM + 3) /* Floating Point State */
195 #define FPRS_REGNUM (C0_REGNUM + 4) /* Floating Point Registers State */
196 #define Y_REGNUM (C0_REGNUM + 5) /* Temp register for multiplication, etc. */
197 #define ASI_REGNUM (C0_REGNUM + 6) /* Alternate Space Identifier */
198 #define VER_REGNUM (C0_REGNUM + 7) /* Version register */
199 #define TICK_REGNUM (C0_REGNUM + 8) /* Tick register */
200 #define PIL_REGNUM (C0_REGNUM + 9) /* Processor Interrupt Level */
201 #define PSTATE_REGNUM (C0_REGNUM + 10) /* Processor State */
202 #define TSTATE_REGNUM (C0_REGNUM + 11) /* Trap State */
203 #define TBA_REGNUM (C0_REGNUM + 12) /* Trap Base Address */
204 #define TL_REGNUM (C0_REGNUM + 13) /* Trap Level */
205 #define TT_REGNUM (C0_REGNUM + 14) /* Trap Type */
206 #define TPC_REGNUM (C0_REGNUM + 15) /* Trap pc */
207 #define TNPC_REGNUM (C0_REGNUM + 16) /* Trap npc */
208 #define WSTATE_REGNUM (C0_REGNUM + 17) /* Window State */
209 #define CWP_REGNUM (C0_REGNUM + 18) /* Current Window Pointer */
210 #define CANSAVE_REGNUM (C0_REGNUM + 19) /* Savable Windows */
211 #define CANRESTORE_REGNUM (C0_REGNUM + 20) /* Restorable Windows */
212 #define CLEANWIN_REGNUM (C0_REGNUM + 21) /* Clean Windows */
213 #define OTHERWIN_REGNUM (C0_REGNUM + 22) /* Other Windows */
214 #define ASR_REGNUM(n) (C0_REGNUM+(23-16)+(n)) /* Ancillary State Register
216 #define ICC_REGNUM (C0_REGNUM + 39) /* 32 bit condition codes */
217 #define XCC_REGNUM (C0_REGNUM + 40) /* 64 bit condition codes */
218 #define FCC0_REGNUM (C0_REGNUM + 41) /* fp cc reg 0 */
219 #define FCC1_REGNUM (C0_REGNUM + 42) /* fp cc reg 1 */
220 #define FCC2_REGNUM (C0_REGNUM + 43) /* fp cc reg 2 */
221 #define FCC3_REGNUM (C0_REGNUM + 44) /* fp cc reg 3 */
223 /* Total amount of space needed to store our copies of the machine's
224 register state, the array `registers'.
225 Some of the registers aren't 64 bits, but it's a lot simpler just to assume
226 they all are (since most of them are). */
227 #undef REGISTER_BYTES
228 #define REGISTER_BYTES (32*8+32*8+45*8)
230 /* Index within `registers' of the first byte of the space for
233 #define REGISTER_BYTE(N) \
235 : (N) < 64 ? 32*8 + ((N)-32)*4 \
236 : (N) < C0_REGNUM ? 32*8 + 32*4 + ((N)-64)*8 \
237 : 64*8 + ((N)-C0_REGNUM)*8)
239 /* Say how long (ordinary) registers are. This is a piece of bogosity
240 used in push_word and a few other places; REGISTER_RAW_SIZE is the
241 real way to know how big a register is. */
244 #define REGISTER_SIZE 8
246 /* Number of bytes of storage in the actual machine representation
249 #undef REGISTER_RAW_SIZE
250 #define REGISTER_RAW_SIZE(N) \
251 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
253 /* Number of bytes of storage in the program's representation
256 #undef REGISTER_VIRTUAL_SIZE
257 #define REGISTER_VIRTUAL_SIZE(N) \
258 ((N) < 32 ? 8 : (N) < 64 ? 4 : 8)
260 /* Largest value REGISTER_RAW_SIZE can have. */
261 /* tm-sparc.h defines this as 8, but play it safe. */
263 #undef MAX_REGISTER_RAW_SIZE
264 #define MAX_REGISTER_RAW_SIZE 8
266 /* Largest value REGISTER_VIRTUAL_SIZE can have. */
267 /* tm-sparc.h defines this as 8, but play it safe. */
269 #undef MAX_REGISTER_VIRTUAL_SIZE
270 #define MAX_REGISTER_VIRTUAL_SIZE 8
272 /* Return the GDB type object for the "standard" data type
273 of data in register N. */
275 #undef REGISTER_VIRTUAL_TYPE
276 #define REGISTER_VIRTUAL_TYPE(N) \
277 ((N) < 32 ? builtin_type_long_long \
278 : (N) < 64 ? builtin_type_float \
279 : (N) < 80 ? builtin_type_double \
280 : builtin_type_long_long)
282 /* We use to support both 32 bit and 64 bit pointers.
283 We can't anymore because TARGET_PTR_BIT must now be a constant. */
284 #undef TARGET_PTR_BIT
285 #define TARGET_PTR_BIT 64
287 /* Longs are 64 bits. */
288 #undef TARGET_LONG_BIT
289 #define TARGET_LONG_BIT 64
291 #undef TARGET_LONG_LONG_BIT
292 #define TARGET_LONG_LONG_BIT 64
294 /* Does the specified function use the "struct returning" convention
295 or the "value returning" convention? The "value returning" convention
296 almost invariably returns the entire value in registers. The
297 "struct returning" convention often returns the entire value in
298 memory, and passes a pointer (out of or into the function) saying
299 where the value (is or should go).
301 Since this sometimes depends on whether it was compiled with GCC,
302 this is also an argument. This is used in call_function to build a
303 stack, and in value_being_returned to print return values.
305 On Sparc64, we only pass pointers to structs if they're larger then
306 32 bytes. Otherwise they're stored in %o0-%o3 (floating-point
307 values go into %fp0-%fp3). */
310 #undef USE_STRUCT_CONVENTION
311 #define USE_STRUCT_CONVENTION(gcc_p, type) (TYPE_LENGTH (type) > 32)
313 #undef REG_STRUCT_HAS_ADDR
314 #define REG_STRUCT_HAS_ADDR(gcc_p,type) (TYPE_LENGTH (type) > 32)
316 /* Store the address of the place in which to copy the structure the
317 subroutine will return. This is called from call_function. */
318 /* FIXME: V9 uses %o0 for this. */
320 #undef STORE_STRUCT_RETURN
321 #define STORE_STRUCT_RETURN(ADDR, SP) \
322 { target_write_memory ((SP)+(16*8), (char *)&(ADDR), 8); }
324 /* Return number of bytes at start of arglist that are not really args. */
326 #undef FRAME_ARGS_SKIP
327 #define FRAME_ARGS_SKIP 136
329 /* Offsets into jmp_buf.
330 FIXME: This was borrowed from the v8 stuff and will probably have to change
333 #define JB_ELEMENT_SIZE 8 /* Size of each element in jmp_buf */
335 #define JB_ONSSTACK 0
345 /* Figure out where the longjmp will land. We expect that we have just entered
346 longjmp and haven't yet setup the stack frame, so the args are still in the
347 output regs. %o0 (O0_REGNUM) points at the jmp_buf structure from which we
348 extract the pc (JB_PC) that we will land at. The pc is copied into ADDR.
349 This routine returns true on success */
352 get_longjmp_target
PARAMS ((CORE_ADDR
*));
354 #define GET_LONGJMP_TARGET(ADDR) get_longjmp_target(ADDR)
356 extern CORE_ADDR
sparc64_read_sp ();
357 extern CORE_ADDR
sparc64_read_fp ();
358 extern void sparc64_write_sp
PARAMS ((CORE_ADDR
));
359 extern void sparc64_write_fp
PARAMS ((CORE_ADDR
));
361 #define TARGET_READ_SP() (sparc64_read_sp ())
362 #define TARGET_READ_FP() (sparc64_read_fp ())
363 #define TARGET_WRITE_SP(X) (sparc64_write_sp (X))
364 #define TARGET_WRITE_FP(X) (sparc64_write_fp (X))
366 #undef TM_PRINT_INSN_MACH
367 #define TM_PRINT_INSN_MACH bfd_mach_sparc_v9a
369 CORE_ADDR sp64_push_arguments
PARAMS ((int, struct value
**, CORE_ADDR
, unsigned char, CORE_ADDR
));
370 #undef PUSH_ARGUMENTS
371 #define PUSH_ARGUMENTS(A,B,C,D,E) (sp64_push_arguments ((A), (B), (C), (D), (E)))
373 #undef EXTRACT_RETURN_VALUE
374 #define EXTRACT_RETURN_VALUE(TYPE,REGBUF,VALBUF) \
375 sparc64_extract_return_value(TYPE, REGBUF, VALBUF, 0)
377 sparc64_extract_return_value
PARAMS ((struct type
*, char[], char *, int));