2002-11-26 Andrew Cagney <ac131313@redhat.com>
[deliverable/binutils-gdb.git] / gdb / config / sparc / tm-sparc.h
1 /* Target machine sub-parameters for SPARC, for GDB, the GNU debugger.
2 This is included by other tm-*.h files to define SPARC cpu-related info.
3 Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
4 1998, 1999, 2000
5 Free Software Foundation, Inc.
6 Contributed by Michael Tiemann (tiemann@mcc.com)
7
8 This file is part of GDB.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
24
25 #include "regcache.h"
26
27 struct type;
28 struct value;
29 struct frame_info;
30
31 /*
32 * The following enums are purely for the convenience of the GDB
33 * developer, when debugging GDB.
34 */
35
36 enum { /* Sparc general registers, for all sparc versions. */
37 G0_REGNUM, G1_REGNUM, G2_REGNUM, G3_REGNUM,
38 G4_REGNUM, G5_REGNUM, G6_REGNUM, G7_REGNUM,
39 O0_REGNUM, O1_REGNUM, O2_REGNUM, O3_REGNUM,
40 O4_REGNUM, O5_REGNUM, O6_REGNUM, O7_REGNUM,
41 L0_REGNUM, L1_REGNUM, L2_REGNUM, L3_REGNUM,
42 L4_REGNUM, L5_REGNUM, L6_REGNUM, L7_REGNUM,
43 I0_REGNUM, I1_REGNUM, I2_REGNUM, I3_REGNUM,
44 I4_REGNUM, I5_REGNUM, I6_REGNUM, I7_REGNUM,
45 FP0_REGNUM /* Floating point register 0 */
46 };
47
48 enum { /* Sparc general registers, alternate names. */
49 R0_REGNUM, R1_REGNUM, R2_REGNUM, R3_REGNUM,
50 R4_REGNUM, R5_REGNUM, R6_REGNUM, R7_REGNUM,
51 R8_REGNUM, R9_REGNUM, R10_REGNUM, R11_REGNUM,
52 R12_REGNUM, R13_REGNUM, R14_REGNUM, R15_REGNUM,
53 R16_REGNUM, R17_REGNUM, R18_REGNUM, R19_REGNUM,
54 R20_REGNUM, R21_REGNUM, R22_REGNUM, R23_REGNUM,
55 R24_REGNUM, R25_REGNUM, R26_REGNUM, R27_REGNUM,
56 R28_REGNUM, R29_REGNUM, R30_REGNUM, R31_REGNUM
57 };
58
59 enum { /* Sparc32 control registers. */
60 PS_REGNUM = 65, /* PC, NPC, and Y are omitted because */
61 WIM_REGNUM = 66, /* they have different values depending on */
62 TBR_REGNUM = 67, /* 32-bit / 64-bit mode. */
63 FPS_REGNUM = 70,
64 CPS_REGNUM = 71
65 };
66
67 /* v9 misc. and priv. regs */
68
69 /* Note: specifying values explicitly for documentation purposes. */
70 enum { /* Sparc64 control registers, excluding Y, PC, and NPC. */
71 CCR_REGNUM = 82, /* Condition Code Register (%xcc,%icc) */
72 FSR_REGNUM = 83, /* Floating Point State */
73 FPRS_REGNUM = 84, /* Floating Point Registers State */
74 ASI_REGNUM = 86, /* Alternate Space Identifier */
75 VER_REGNUM = 87, /* Version register */
76 TICK_REGNUM = 88, /* Tick register */
77 PIL_REGNUM = 89, /* Processor Interrupt Level */
78 PSTATE_REGNUM = 90, /* Processor State */
79 TSTATE_REGNUM = 91, /* Trap State */
80 TBA_REGNUM = 92, /* Trap Base Address */
81 TL_REGNUM = 93, /* Trap Level */
82 TT_REGNUM = 94, /* Trap Type */
83 TPC_REGNUM = 95, /* Trap pc */
84 TNPC_REGNUM = 96, /* Trap npc */
85 WSTATE_REGNUM = 97, /* Window State */
86 CWP_REGNUM = 98, /* Current Window Pointer */
87 CANSAVE_REGNUM = 99, /* Savable Windows */
88 CANRESTORE_REGNUM = 100, /* Restorable Windows */
89 CLEANWIN_REGNUM = 101, /* Clean Windows */
90 OTHERWIN_REGNUM = 102, /* Other Windows */
91 ASR16_REGNUM = 103, /* Ancillary State Registers */
92 ASR17_REGNUM = 104,
93 ASR18_REGNUM = 105,
94 ASR19_REGNUM = 106,
95 ASR20_REGNUM = 107,
96 ASR21_REGNUM = 108,
97 ASR22_REGNUM = 109,
98 ASR23_REGNUM = 110,
99 ASR24_REGNUM = 111,
100 ASR25_REGNUM = 112,
101 ASR26_REGNUM = 113,
102 ASR27_REGNUM = 114,
103 ASR28_REGNUM = 115,
104 ASR29_REGNUM = 116,
105 ASR30_REGNUM = 117,
106 ASR31_REGNUM = 118,
107 ICC_REGNUM = 119, /* 32 bit condition codes */
108 XCC_REGNUM = 120, /* 64 bit condition codes */
109 FCC0_REGNUM = 121, /* fp cc reg 0 */
110 FCC1_REGNUM = 122, /* fp cc reg 1 */
111 FCC2_REGNUM = 123, /* fp cc reg 2 */
112 FCC3_REGNUM = 124 /* fp cc reg 3 */
113 };
114
115 /*
116 * Make sparc target multi-archable: April 2000
117 */
118
119 #if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
120
121 /* Multi-arch definition of TARGET_IS_SPARC64, TARGET_ELF64 */
122 #undef GDB_TARGET_IS_SPARC64
123 #define GDB_TARGET_IS_SPARC64 \
124 (sparc_intreg_size () == 8)
125 #undef TARGET_ELF64
126 #define TARGET_ELF64 \
127 (sparc_intreg_size () == 8)
128 extern int sparc_intreg_size (void);
129 #else
130
131 /* Non-multi-arch: if it isn't defined, define it to zero. */
132 #ifndef GDB_TARGET_IS_SPARC64
133 #define GDB_TARGET_IS_SPARC64 0
134 #endif
135 #ifndef TARGET_ELF64
136 #define TARGET_ELF64 0
137 #endif
138 #endif
139
140 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
141 /*
142 * The following defines must go away for MULTI_ARCH
143 */
144
145 /* Initializer for an array of names of registers.
146 There should be NUM_REGS strings in this initializer. */
147
148 #define REGISTER_NAMES \
149 { "g0", "g1", "g2", "g3", "g4", "g5", "g6", "g7", \
150 "o0", "o1", "o2", "o3", "o4", "o5", "sp", "o7", \
151 "l0", "l1", "l2", "l3", "l4", "l5", "l6", "l7", \
152 "i0", "i1", "i2", "i3", "i4", "i5", "fp", "i7", \
153 \
154 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
155 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
156 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
157 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
158 \
159 "y", "psr", "wim", "tbr", "pc", "npc", "fpsr", "cpsr" \
160 }
161
162 /* Offset from address of function to start of its code.
163 Zero on most machines. */
164
165 #define FUNCTION_START_OFFSET 0
166
167 /* Amount PC must be decremented by after a breakpoint.
168 This is often the number of bytes in BREAKPOINT
169 but not always. */
170
171 #define DECR_PC_AFTER_BREAK 0
172
173 /* Say how long (ordinary) registers are. This is a piece of bogosity
174 used in push_word and a few other places; REGISTER_RAW_SIZE is the
175 real way to know how big a register is. */
176
177 #define REGISTER_SIZE 4
178
179 /* Number of machine registers */
180
181 #define NUM_REGS 72
182
183 #define SP_REGNUM 14 /* Contains address of top of stack, \
184 which is also the bottom of the frame. */
185 #define FP_REGNUM 30 /* Contains address of executing stack frame */
186
187 #define FP0_REGNUM 32 /* Floating point register 0 */
188
189 #define Y_REGNUM 64 /* Temp register for multiplication, etc. */
190
191 #define PC_REGNUM 68 /* Contains program counter */
192
193 #define NPC_REGNUM 69 /* Contains next PC */
194
195
196 /* Total amount of space needed to store our copies of the machine's
197 register state, the array `registers'. On the sparc, `registers'
198 contains the ins and locals, even though they are saved on the
199 stack rather than with the other registers, and this causes hair
200 and confusion in places like pop_frame. It might be better to
201 remove the ins and locals from `registers', make sure that
202 get_saved_register can get them from the stack (even in the
203 innermost frame), and make this the way to access them. For the
204 frame pointer we would do that via TARGET_READ_FP. On the other
205 hand, that is likely to be confusing or worse for flat frames. */
206
207 #define REGISTER_BYTES (32*4+32*4+8*4)
208
209 /* Index within `registers' of the first byte of the space for
210 register N. */
211
212 #define REGISTER_BYTE(N) ((N)*4)
213
214 /* Number of bytes of storage in the actual machine representation for
215 register N. */
216
217 /* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
218
219 #define REGISTER_RAW_SIZE(N) (4)
220
221 /* Number of bytes of storage in the program's representation
222 for register N. */
223
224 /* On the SPARC, all regs are 4 bytes (except Sparc64, where they're 8). */
225
226 #define REGISTER_VIRTUAL_SIZE(N) (4)
227
228 /* Largest value REGISTER_RAW_SIZE can have. */
229
230 #define MAX_REGISTER_RAW_SIZE 8
231
232 /* Largest value REGISTER_VIRTUAL_SIZE can have. */
233
234 #define MAX_REGISTER_VIRTUAL_SIZE 8
235
236 /* Return the GDB type object for the "standard" data type
237 of data in register N. */
238
239 #define REGISTER_VIRTUAL_TYPE(N) \
240 ((N) < 32 ? builtin_type_int : (N) < 64 ? builtin_type_float : \
241 builtin_type_int)
242
243 /* Sun /bin/cc gets this right as of SunOS 4.1.x. We need to define
244 BELIEVE_PCC_PROMOTION to get this right now that the code which
245 detects gcc2_compiled. is broken. This loses for SunOS 4.0.x and
246 earlier. */
247
248 #define BELIEVE_PCC_PROMOTION 1
249
250 /* Advance PC across any function entry prologue instructions
251 to reach some "real" code. */
252
253 extern CORE_ADDR sparc_skip_prologue (CORE_ADDR);
254 #define SKIP_PROLOGUE(PC) sparc_skip_prologue (PC)
255
256 /* Immediately after a function call, return the saved pc.
257 Can't go through the frames for this because on some machines
258 the new frame is not set up until the new function executes
259 some instructions. */
260
261 #define SAVED_PC_AFTER_CALL(FRAME) PC_ADJUST (read_register (RP_REGNUM))
262
263 /* Stack grows downward. */
264
265 #define INNER_THAN(LHS,RHS) ((LHS) < (RHS))
266
267 /* Write into appropriate registers a function return value of type
268 TYPE, given in virtual format. */
269
270 #define DEPRECATED_STORE_RETURN_VALUE(TYPE, VALBUF) \
271 sparc_store_return_value (TYPE, VALBUF)
272 extern void sparc_store_return_value (struct type *, char *);
273
274 /* Extract from an array REGBUF containing the (raw) register state
275 the address in which a function should return its structure value,
276 as a CORE_ADDR (or an expression that can be used as one). */
277
278 #define DEPRECATED_EXTRACT_STRUCT_VALUE_ADDRESS(REGBUF) \
279 sparc_extract_struct_value_address (REGBUF)
280
281 extern CORE_ADDR sparc_extract_struct_value_address (char *);
282
283 /* If the current gcc for for this target does not produce correct
284 debugging information for float parameters, both prototyped and
285 unprototyped, then define this macro. This forces gdb to always
286 assume that floats are passed as doubles and then converted in the
287 callee. */
288
289 #define COERCE_FLOAT_TO_DOUBLE(FORMAL, ACTUAL) (1)
290
291 /* Stack must be aligned on 64-bit boundaries when synthesizing
292 function calls (128-bit for sparc64). */
293
294 #define STACK_ALIGN(ADDR) sparc32_stack_align (ADDR)
295 extern CORE_ADDR sparc32_stack_align (CORE_ADDR addr);
296
297 /* The Sparc returns long doubles on the stack. */
298
299 #define RETURN_VALUE_ON_STACK(TYPE) \
300 (TYPE_CODE(TYPE) == TYPE_CODE_FLT \
301 && TYPE_LENGTH(TYPE) > 8)
302
303 /* When passing a structure to a function, Sun cc passes the address
304 not the structure itself. It (under SunOS4) creates two symbols,
305 which we need to combine to a LOC_REGPARM. Gcc version two (as of
306 1.92) behaves like sun cc. REG_STRUCT_HAS_ADDR is smart enough to
307 distinguish between Sun cc, gcc version 1 and gcc version 2. */
308
309 #define REG_STRUCT_HAS_ADDR(GCC_P, TYPE) \
310 sparc_reg_struct_has_addr (GCC_P, TYPE)
311 extern int sparc_reg_struct_has_addr (int, struct type *);
312
313 /* Is the prologue at PC frameless? */
314 #define PROLOGUE_FRAMELESS_P(PC) sparc_prologue_frameless_p (PC)
315 extern int sparc_prologue_frameless_p (CORE_ADDR);
316
317 #endif /* GDB_MULTI_ARCH */
318
319 #if defined (GDB_MULTI_ARCH) && (GDB_MULTI_ARCH > 0)
320 /*
321 * The following defines should ONLY appear for MULTI_ARCH.
322 */
323
324 /* Multi-arch the nPC and Y registers. */
325 #define Y_REGNUM (sparc_y_regnum ())
326 extern int sparc_npc_regnum (void);
327 extern int sparc_y_regnum (void);
328
329 #endif /* GDB_MULTI_ARCH */
330
331 /* On the Sun 4 under SunOS, the compile will leave a fake insn which
332 encodes the structure size being returned. If we detect such
333 a fake insn, step past it. */
334
335 #define PC_ADJUST(PC) sparc_pc_adjust (PC)
336 extern CORE_ADDR sparc_pc_adjust (CORE_ADDR);
337
338 /* If an argument is declared "register", Sun cc will keep it in a register,
339 never saving it onto the stack. So we better not believe the "p" symbol
340 descriptor stab. */
341
342 #define USE_REGISTER_NOT_ARG
343
344 /* For acc, there's no need to correct LBRAC entries by guessing how
345 they should work. In fact, this is harmful because the LBRAC
346 entries now all appear at the end of the function, not intermixed
347 with the SLINE entries. n_opt_found detects acc for Solaris binaries;
348 function_stab_type detects acc for SunOS4 binaries.
349
350 For binary from SunOS4 /bin/cc, need to correct LBRAC's.
351
352 For gcc, like acc, don't correct. */
353
354 #define SUN_FIXED_LBRAC_BUG \
355 (n_opt_found \
356 || function_stab_type == N_STSYM \
357 || function_stab_type == N_GSYM \
358 || processing_gcc_compilation)
359
360 /* Do variables in the debug stabs occur after the N_LBRAC or before it?
361 acc: after, gcc: before, SunOS4 /bin/cc: before. */
362
363 #define VARIABLES_INSIDE_BLOCK(desc, gcc_p) \
364 (!(gcc_p) \
365 && (n_opt_found \
366 || function_stab_type == N_STSYM \
367 || function_stab_type == N_GSYM))
368
369 /* Sequence of bytes for breakpoint instruction (ta 1). */
370
371 #define BREAKPOINT {0x91, 0xd0, 0x20, 0x01}
372
373 /* Register numbers of various important registers.
374 Note that some of these values are "real" register numbers,
375 and correspond to the general registers of the machine,
376 and some are "phony" register numbers which are too large
377 to be actual register numbers as far as the user is concerned
378 but do serve to get the desired values when passed to read_register. */
379
380 #define G0_REGNUM 0 /* %g0 */
381 #define G1_REGNUM 1 /* %g1 */
382 #define O0_REGNUM 8 /* %o0 */
383 #define RP_REGNUM 15 /* Contains return address value, *before* \
384 any windows get switched. */
385 #define O7_REGNUM 15 /* Last local reg not saved on stack frame */
386 #define L0_REGNUM 16 /* First local reg that's saved on stack frame
387 rather than in machine registers */
388 #define I0_REGNUM 24 /* %i0 */
389 #define I7_REGNUM 31 /* Last local reg saved on stack frame */
390 #define PS_REGNUM 65 /* Contains processor status */
391 #define PS_FLAG_CARRY 0x100000 /* Carry bit in PS */
392 #define WIM_REGNUM 66 /* Window Invalid Mask (not really supported) */
393 #define TBR_REGNUM 67 /* Trap Base Register (not really supported) */
394 #define FPS_REGNUM 70 /* Floating point status register */
395 #define CPS_REGNUM 71 /* Coprocessor status register */
396
397 /* Writing to %g0 is a noop (not an error or exception or anything like
398 that, however). */
399
400 #define CANNOT_STORE_REGISTER(regno) ((regno) == G0_REGNUM)
401
402 /*
403 * FRAME_CHAIN and FRAME_INFO definitions, collected here for convenience.
404 */
405
406 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
407 /*
408 * The following defines must go away for MULTI_ARCH.
409 */
410
411 /* Describe the pointer in each stack frame to the previous stack frame
412 (its caller). */
413
414 /* FRAME_CHAIN takes a frame's nominal address
415 and produces the frame's chain-pointer. */
416
417 /* In the case of the Sun 4, the frame-chain's nominal address
418 is held in the frame pointer register.
419
420 On the Sun4, the frame (in %fp) is %sp for the previous frame.
421 From the previous frame's %sp, we can find the previous frame's
422 %fp: it is in the save area just above the previous frame's %sp.
423
424 If we are setting up an arbitrary frame, we'll need to know where
425 it ends. Hence the following. This part of the frame cache
426 structure should be checked before it is assumed that this frame's
427 bottom is in the stack pointer.
428
429 If there isn't a frame below this one, the bottom of this frame is
430 in the stack pointer.
431
432 If there is a frame below this one, and the frame pointers are
433 identical, it's a leaf frame and the bottoms are the same also.
434
435 Otherwise the bottom of this frame is the top of the next frame.
436
437 The bottom field is misnamed, since it might imply that memory from
438 bottom to frame contains this frame. That need not be true if
439 stack frames are allocated in different segments (e.g. some on a
440 stack, some on a heap in the data segment).
441
442 GCC 2.6 and later can generate ``flat register window'' code that
443 makes frames by explicitly saving those registers that need to be
444 saved. %i7 is used as the frame pointer, and the frame is laid out
445 so that flat and non-flat calls can be intermixed freely within a
446 program. Unfortunately for GDB, this means it must detect and
447 record the flatness of frames.
448
449 Since the prologue in a flat frame also tells us where fp and pc
450 have been stashed (the frame is of variable size, so their location
451 is not fixed), it's convenient to record them in the frame info. */
452
453 #define EXTRA_FRAME_INFO \
454 CORE_ADDR bottom; \
455 int in_prologue; \
456 int flat; \
457 /* Following fields only relevant for flat frames. */ \
458 CORE_ADDR pc_addr; \
459 CORE_ADDR fp_addr; \
460 /* Add this to ->frame to get the value of the stack pointer at the */ \
461 /* time of the register saves. */ \
462 int sp_offset;
463
464 /* We need to override GET_SAVED_REGISTER so that we can deal with the
465 way outs change into ins in different frames. */
466
467 void sparc_get_saved_register (char *raw_buffer,
468 int *optimized,
469 CORE_ADDR * addrp,
470 struct frame_info *frame,
471 int regnum, enum lval_type *lvalp);
472
473 #define GET_SAVED_REGISTER(RAW_BUFFER, OPTIMIZED, ADDRP, FRAME, REGNUM, LVAL) \
474 sparc_get_saved_register (RAW_BUFFER, OPTIMIZED, ADDRP, \
475 FRAME, REGNUM, LVAL)
476
477 #define FRAME_INIT_SAVED_REGS(FP) /*no-op */
478
479 #define INIT_EXTRA_FRAME_INFO(FROMLEAF, FCI) \
480 sparc_init_extra_frame_info (FROMLEAF, FCI)
481 extern void sparc_init_extra_frame_info (int, struct frame_info *);
482
483 #define FRAME_CHAIN(THISFRAME) (sparc_frame_chain (THISFRAME))
484 extern CORE_ADDR sparc_frame_chain (struct frame_info *);
485
486 /* A macro that tells us whether the function invocation represented
487 by FI does not have a frame on the stack associated with it. If it
488 does not, FRAMELESS is set to 1, else 0. */
489
490 #define FRAMELESS_FUNCTION_INVOCATION(FI) \
491 frameless_look_for_prologue (FI)
492
493 /* Where is the PC for a specific frame */
494
495 #define FRAME_SAVED_PC(FRAME) sparc_frame_saved_pc (FRAME)
496 extern CORE_ADDR sparc_frame_saved_pc (struct frame_info *);
497
498 /* If the argument is on the stack, it will be here. */
499 #define FRAME_ARGS_ADDRESS(FI) ((FI)->frame)
500
501 #define FRAME_LOCALS_ADDRESS(FI) ((FI)->frame)
502
503 /* Set VAL to the number of args passed to frame described by FI.
504 Can set VAL to -1, meaning no way to tell. */
505
506 /* We can't tell how many args there are
507 now that the C compiler delays popping them. */
508 #define FRAME_NUM_ARGS(FI) (-1)
509
510 /* Return number of bytes at start of arglist that are not really args. */
511
512 #define FRAME_ARGS_SKIP 68
513
514 #endif /* GDB_MULTI_ARCH */
515
516 #define PRINT_EXTRA_FRAME_INFO(FI) \
517 sparc_print_extra_frame_info (FI)
518 extern void sparc_print_extra_frame_info (struct frame_info *);
519
520 /* INIT_EXTRA_FRAME_INFO needs the PC to detect flat frames. */
521
522 #define INIT_FRAME_PC(FROMLEAF, PREV) /* nothing */
523 #define INIT_FRAME_PC_FIRST(FROMLEAF, PREV) \
524 (PREV)->pc = ((FROMLEAF) ? SAVED_PC_AFTER_CALL ((PREV)->next) : \
525 (PREV)->next ? FRAME_SAVED_PC ((PREV)->next) : read_pc ());
526
527 /* Define other aspects of the stack frame. */
528
529 /* The location of I0 w.r.t SP. This is actually dependent on how the
530 system's window overflow/underflow routines are written. Most
531 vendors save the L regs followed by the I regs (at the higher
532 address). Some vendors get it wrong. */
533
534 #define FRAME_SAVED_L0 0
535 #define FRAME_SAVED_I0 (8 * REGISTER_RAW_SIZE (L0_REGNUM))
536
537 #define FRAME_STRUCT_ARGS_ADDRESS(FI) ((FI)->frame)
538
539 /* Things needed for making the inferior call functions. */
540 /*
541 * First of all, let me give my opinion of what the DUMMY_FRAME
542 * actually looks like.
543 *
544 * | |
545 * | |
546 * + - - - - - - - - - - - - - - - - +<-- fp (level 0)
547 * | |
548 * | |
549 * | |
550 * | |
551 * | Frame of innermost program |
552 * | function |
553 * | |
554 * | |
555 * | |
556 * | |
557 * | |
558 * |---------------------------------|<-- sp (level 0), fp (c)
559 * | |
560 * DUMMY | fp0-31 |
561 * | |
562 * | ------ |<-- fp - 0x80
563 * FRAME | g0-7 |<-- fp - 0xa0
564 * | i0-7 |<-- fp - 0xc0
565 * | other |<-- fp - 0xe0
566 * | ? |
567 * | ? |
568 * |---------------------------------|<-- sp' = fp - 0x140
569 * | |
570 * xcution start | |
571 * sp' + 0x94 -->| CALL_DUMMY (x code) |
572 * | |
573 * | |
574 * |---------------------------------|<-- sp'' = fp - 0x200
575 * | align sp to 8 byte boundary |
576 * | ==> args to fn <== |
577 * Room for | |
578 * i & l's + agg | CALL_DUMMY_STACK_ADJUST = 0x0x44|
579 * |---------------------------------|<-- final sp (variable)
580 * | |
581 * | Where function called will |
582 * | build frame. |
583 * | |
584 * | |
585 *
586 * I understand everything in this picture except what the space
587 * between fp - 0xe0 and fp - 0x140 is used for. Oh, and I don't
588 * understand why there's a large chunk of CALL_DUMMY that never gets
589 * executed (its function is superceeded by PUSH_DUMMY_FRAME; they
590 * are designed to do the same thing).
591 *
592 * PUSH_DUMMY_FRAME saves the registers above sp' and pushes the
593 * register file stack down one.
594 *
595 * call_function then writes CALL_DUMMY, pushes the args onto the
596 * stack, and adjusts the stack pointer.
597 *
598 * run_stack_dummy then starts execution (in the middle of
599 * CALL_DUMMY, as directed by call_function).
600 */
601
602 #ifndef CALL_DUMMY
603 /* This sequence of words is the instructions
604
605 00: bc 10 00 01 mov %g1, %fp
606 04: 9d e3 80 00 save %sp, %g0, %sp
607 08: bc 10 00 02 mov %g2, %fp
608 0c: be 10 00 03 mov %g3, %i7
609 10: da 03 a0 58 ld [ %sp + 0x58 ], %o5
610 14: d8 03 a0 54 ld [ %sp + 0x54 ], %o4
611 18: d6 03 a0 50 ld [ %sp + 0x50 ], %o3
612 1c: d4 03 a0 4c ld [ %sp + 0x4c ], %o2
613 20: d2 03 a0 48 ld [ %sp + 0x48 ], %o1
614 24: 40 00 00 00 call <fun>
615 28: d0 03 a0 44 ld [ %sp + 0x44 ], %o0
616 2c: 01 00 00 00 nop
617 30: 91 d0 20 01 ta 1
618 34: 01 00 00 00 nop
619
620 NOTES:
621 * the first four instructions are necessary only on the simulator.
622 * this is a multiple of 8 (not only 4) bytes.
623 * the `call' insn is a relative, not an absolute call.
624 * the `nop' at the end is needed to keep the trap from
625 clobbering things (if NPC pointed to garbage instead).
626 */
627
628 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
629 /*
630 * The following defines must go away for MULTI_ARCH.
631 */
632
633 #define CALL_DUMMY { 0xbc100001, 0x9de38000, 0xbc100002, 0xbe100003, \
634 0xda03a058, 0xd803a054, 0xd603a050, 0xd403a04c, \
635 0xd203a048, 0x40000000, 0xd003a044, 0x01000000, \
636 0x91d02001, 0x01000000 }
637
638
639 /* Size of the call dummy in bytes. */
640
641 #define CALL_DUMMY_LENGTH 0x38
642
643 /* Offset within call dummy of first instruction to execute. */
644
645 #define CALL_DUMMY_START_OFFSET 0
646
647 /* Offset within CALL_DUMMY of the 'call' instruction. */
648
649 #define CALL_DUMMY_CALL_OFFSET (CALL_DUMMY_START_OFFSET + 0x24)
650
651 /* Offset within CALL_DUMMY of the 'ta 1' trap instruction. */
652
653 #define CALL_DUMMY_BREAKPOINT_OFFSET (CALL_DUMMY_START_OFFSET + 0x30)
654
655 #define CALL_DUMMY_STACK_ADJUST 68
656
657 /* Call dummy method (eg. on stack, at entry point, etc.) */
658
659 #define CALL_DUMMY_LOCATION ON_STACK
660 #define PC_IN_CALL_DUMMY(pc, sp, frame_address) pc_in_call_dummy_on_stack (pc, sp, frame_address)
661
662 /* Method for detecting dummy frames. */
663
664 #define PC_IN_CALL_DUMMY(PC, SP, FRAME_ADDRESS) \
665 deprecated_pc_in_call_dummy_on_stack (PC, SP, FRAME_ADDRESS)
666
667 #endif /* GDB_MULTI_ARCH */
668
669 #endif /* CALL_DUMMY */
670
671 #if !defined (GDB_MULTI_ARCH) || (GDB_MULTI_ARCH == 0)
672 /*
673 * The following defines must go away for MULTI_ARCH.
674 */
675
676 /* Insert the specified number of args and function address
677 into a call sequence of the above form stored at DUMMYNAME. */
678
679 #define FIX_CALL_DUMMY(DUMMYNAME, PC, FUN, NARGS, ARGS, TYPE, GCC_P) \
680 sparc_fix_call_dummy (DUMMYNAME, PC, FUN, TYPE, GCC_P)
681 void sparc_fix_call_dummy (char *dummy, CORE_ADDR pc, CORE_ADDR fun,
682 struct type *value_type, int using_gcc);
683
684 /* Arguments smaller than an int must be promoted to ints when
685 synthesizing function calls. */
686
687 /* Push an empty stack frame, to record the current PC, etc. */
688
689 #define PUSH_DUMMY_FRAME sparc_push_dummy_frame ()
690 #define POP_FRAME sparc_pop_frame ()
691
692 void sparc_push_dummy_frame (void);
693 void sparc_pop_frame (void);
694
695 #define PUSH_ARGUMENTS(NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR) \
696 sparc32_push_arguments (NARGS, ARGS, SP, STRUCT_RETURN, STRUCT_ADDR)
697
698 extern CORE_ADDR
699 sparc32_push_arguments (int, struct value **, CORE_ADDR, int, CORE_ADDR);
700
701 /* Store the address of the place in which to copy the structure the
702 subroutine will return. This is called from call_function_by_hand.
703 The ultimate mystery is, tho, what is the value "16"? */
704
705 #define STORE_STRUCT_RETURN(ADDR, SP) \
706 { char val[4]; \
707 store_unsigned_integer (val, 4, (ADDR)); \
708 write_memory ((SP)+(16*4), val, 4); }
709
710 /* Default definition of USE_STRUCT_CONVENTION. */
711
712 #ifndef USE_STRUCT_CONVENTION
713 #define USE_STRUCT_CONVENTION(GCC_P, TYPE) \
714 generic_use_struct_convention (GCC_P, TYPE)
715 #endif
716
717 /* Extract from an array REGBUF containing the (raw) register state a
718 function return value of type TYPE, and copy that, in virtual
719 format, into VALBUF. */
720
721 #define DEPRECATED_EXTRACT_RETURN_VALUE(TYPE, REGBUF, VALBUF) \
722 sparc32_extract_return_value (TYPE, REGBUF, VALBUF)
723 extern void sparc32_extract_return_value (struct type *, char[], char *);
724
725 #endif /* GDB_MULTI_ARCH */
726
727 \f
728 /* Sparc has no reliable single step ptrace call */
729
730 #define SOFTWARE_SINGLE_STEP_P() 1
731 extern void sparc_software_single_step (enum target_signal, int);
732 #define SOFTWARE_SINGLE_STEP(sig,bp_p) sparc_software_single_step (sig,bp_p)
733
734 /* We need more arguments in a frame specification for the
735 "frame" or "info frame" command. */
736
737 #define SETUP_ARBITRARY_FRAME(argc, argv) setup_arbitrary_frame (argc, argv)
738 extern struct frame_info *setup_arbitrary_frame (int, CORE_ADDR *);
739
740 extern void sparc_do_registers_info (int regnum, int all);
741 #undef DEPRECATED_DO_REGISTERS_INFO
742 #define DEPRECATED_DO_REGISTERS_INFO(REGNUM,ALL) sparc_do_registers_info (REGNUM, ALL)
743
744 /* Optimization for storing registers to the inferior. The hook
745 DO_DEFERRED_STORES
746 actually executes any deferred stores. It is called any time
747 we are going to proceed the child, or read its registers.
748 The hook CLEAR_DEFERRED_STORES is called when we want to throw
749 away the inferior process, e.g. when it dies or we kill it.
750 FIXME, this does not handle remote debugging cleanly. */
751
752 extern int deferred_stores;
753 #define DO_DEFERRED_STORES \
754 if (deferred_stores) \
755 target_store_registers (-2);
756 #define CLEAR_DEFERRED_STORES \
757 deferred_stores = 0;
758
759 /* Select the sparc disassembler */
760
761 #define TM_PRINT_INSN_MACH bfd_mach_sparc
762
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