1 /* Target dependent code for CRIS, for GDB, the GNU debugger.
2 Copyright 2001 Free Software Foundation, Inc.
3 Contributed by Axis Communications AB.
4 Written by Hendrik Ruijter, Stefan Andersson, and Orjan Friberg.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
31 #include "opcode/cris.h"
32 #include "arch-utils.h"
35 /* To get entry_point_address. */
40 /* There are no floating point registers. Used in gdbserver low-linux.c. */
43 /* There are 16 general registers. */
46 /* There are 16 special registers. */
50 /* Register numbers of various important registers.
51 FP_REGNUM Contains address of executing stack frame.
52 STR_REGNUM Contains the address of structure return values.
53 RET_REGNUM Contains the return value when shorter than or equal to 32 bits
54 ARG1_REGNUM Contains the first parameter to a function.
55 ARG2_REGNUM Contains the second parameter to a function.
56 ARG3_REGNUM Contains the third parameter to a function.
57 ARG4_REGNUM Contains the fourth parameter to a function. Rest on stack.
58 SP_REGNUM Contains address of top of stack.
59 PC_REGNUM Contains address of next instruction.
60 SRP_REGNUM Subroutine return pointer register.
61 BRP_REGNUM Breakpoint return pointer register. */
63 /* FP_REGNUM = 8, SP_REGNUM = 14, and PC_REGNUM = 15 have been incorporated
64 into the multi-arch framework. */
68 /* Enums with respect to the general registers, valid for all
77 /* Enums with respect to the special registers, some of which may not be
78 applicable to all CRIS versions. */
96 extern const struct cris_spec_reg cris_spec_regs
[];
98 /* CRIS version, set via the user command 'set cris-version'. Affects
99 register names and sizes.*/
100 static int usr_cmd_cris_version
;
102 /* Indicates whether to trust the above variable. */
103 static int usr_cmd_cris_version_valid
= 0;
105 /* CRIS mode, set via the user command 'set cris-mode'. Affects availability
106 of some registers. */
107 static const char *usr_cmd_cris_mode
;
109 /* Indicates whether to trust the above variable. */
110 static int usr_cmd_cris_mode_valid
= 0;
112 static const char CRIS_MODE_USER
[] = "CRIS_MODE_USER";
113 static const char CRIS_MODE_SUPERVISOR
[] = "CRIS_MODE_SUPERVISOR";
114 static const char *cris_mode_enums
[] =
117 CRIS_MODE_SUPERVISOR
,
121 /* CRIS ABI, set via the user command 'set cris-abi'.
122 There are two flavours:
123 1. Original ABI with 32-bit doubles, where arguments <= 4 bytes are
125 2. New ABI with 64-bit doubles, where arguments <= 8 bytes are passed by
127 static const char *usr_cmd_cris_abi
;
129 /* Indicates whether to trust the above variable. */
130 static int usr_cmd_cris_abi_valid
= 0;
132 /* These variables are strings instead of enums to make them usable as
133 parameters to add_set_enum_cmd. */
134 static const char CRIS_ABI_ORIGINAL
[] = "CRIS_ABI_ORIGINAL";
135 static const char CRIS_ABI_V2
[] = "CRIS_ABI_V2";
136 static const char CRIS_ABI_SYMBOL
[] = ".$CRIS_ABI_V2";
137 static const char *cris_abi_enums
[] =
144 /* CRIS architecture specific information. */
148 const char *cris_mode
;
149 const char *cris_abi
;
152 /* Functions for accessing target dependent data. */
157 return (gdbarch_tdep (current_gdbarch
)->cris_version
);
163 return (gdbarch_tdep (current_gdbarch
)->cris_mode
);
169 return (gdbarch_tdep (current_gdbarch
)->cris_abi
);
172 /* For saving call-clobbered contents in R9 when returning structs. */
173 static CORE_ADDR struct_return_address
;
175 struct frame_extra_info
181 /* The instruction environment needed to find single-step breakpoints. */
183 struct instruction_environment
185 unsigned long reg
[NUM_GENREGS
];
186 unsigned long preg
[NUM_SPECREGS
];
187 unsigned long branch_break_address
;
188 unsigned long delay_slot_pc
;
189 unsigned long prefix_value
;
194 int delay_slot_pc_active
;
196 int disable_interrupt
;
199 /* Save old breakpoints in order to restore the state before a single_step.
200 At most, two breakpoints will have to be remembered. */
202 char binsn_quantum
[BREAKPOINT_MAX
];
203 static binsn_quantum break_mem
[2];
204 static CORE_ADDR next_pc
= 0;
205 static CORE_ADDR branch_target_address
= 0;
206 static unsigned char branch_break_inserted
= 0;
208 /* Machine-dependencies in CRIS for opcodes. */
210 /* Instruction sizes. */
211 enum cris_instruction_sizes
218 /* Addressing modes. */
219 enum cris_addressing_modes
226 /* Prefix addressing modes. */
227 enum cris_prefix_addressing_modes
229 PREFIX_INDEX_MODE
= 2,
230 PREFIX_ASSIGN_MODE
= 3,
232 /* Handle immediate byte offset addressing mode prefix format. */
233 PREFIX_OFFSET_MODE
= 2
236 /* Masks for opcodes. */
237 enum cris_opcode_masks
239 BRANCH_SIGNED_SHORT_OFFSET_MASK
= 0x1,
240 SIGNED_EXTEND_BIT_MASK
= 0x2,
241 SIGNED_BYTE_MASK
= 0x80,
242 SIGNED_BYTE_EXTEND_MASK
= 0xFFFFFF00,
243 SIGNED_WORD_MASK
= 0x8000,
244 SIGNED_WORD_EXTEND_MASK
= 0xFFFF0000,
245 SIGNED_DWORD_MASK
= 0x80000000,
246 SIGNED_QUICK_VALUE_MASK
= 0x20,
247 SIGNED_QUICK_VALUE_EXTEND_MASK
= 0xFFFFFFC0
250 /* Functions for opcodes. The general form of the ETRAX 16-bit instruction:
258 cris_get_operand2 (unsigned short insn
)
260 return ((insn
& 0xF000) >> 12);
264 cris_get_mode (unsigned short insn
)
266 return ((insn
& 0x0C00) >> 10);
270 cris_get_opcode (unsigned short insn
)
272 return ((insn
& 0x03C0) >> 6);
276 cris_get_size (unsigned short insn
)
278 return ((insn
& 0x0030) >> 4);
282 cris_get_operand1 (unsigned short insn
)
284 return (insn
& 0x000F);
287 /* Additional functions in order to handle opcodes. */
290 cris_get_wide_opcode (unsigned short insn
)
292 return ((insn
& 0x03E0) >> 5);
296 cris_get_short_size (unsigned short insn
)
298 return ((insn
& 0x0010) >> 4);
302 cris_get_quick_value (unsigned short insn
)
304 return (insn
& 0x003F);
308 cris_get_bdap_quick_offset (unsigned short insn
)
310 return (insn
& 0x00FF);
314 cris_get_branch_short_offset (unsigned short insn
)
316 return (insn
& 0x00FF);
320 cris_get_asr_shift_steps (unsigned long value
)
322 return (value
& 0x3F);
326 cris_get_asr_quick_shift_steps (unsigned short insn
)
328 return (insn
& 0x1F);
332 cris_get_clear_size (unsigned short insn
)
334 return ((insn
) & 0xC000);
338 cris_is_signed_extend_bit_on (unsigned short insn
)
340 return (((insn
) & 0x20) == 0x20);
344 cris_is_xflag_bit_on (unsigned short insn
)
346 return (((insn
) & 0x1000) == 0x1000);
350 cris_set_size_to_dword (unsigned short *insn
)
357 cris_get_signed_offset (unsigned short insn
)
359 return ((signed char) (insn
& 0x00FF));
362 /* Calls an op function given the op-type, working on the insn and the
364 static void cris_gdb_func (enum cris_op_type
, unsigned short, inst_env_type
*);
366 static CORE_ADDR
cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
);
368 static struct gdbarch
*cris_gdbarch_init (struct gdbarch_info
,
369 struct gdbarch_list
*);
371 static int cris_delayed_get_disassembler (bfd_vma
, disassemble_info
*);
373 static void cris_dump_tdep (struct gdbarch
*, struct ui_file
*);
375 static void cris_version_update (char *ignore_args
, int from_tty
,
376 struct cmd_list_element
*c
);
378 static void cris_mode_update (char *ignore_args
, int from_tty
,
379 struct cmd_list_element
*c
);
381 static void cris_abi_update (char *ignore_args
, int from_tty
,
382 struct cmd_list_element
*c
);
384 static CORE_ADDR
bfd_lookup_symbol (bfd
*, const char *);
386 /* Frames information. The definition of the struct frame_info is
390 int signal_handler_caller
394 If the compilation option -fno-omit-frame-pointer is present the
395 variable frame will be set to the content of R8 which is the frame
398 The variable pc contains the address where execution is performed
399 in the present frame. The innermost frame contains the current content
400 of the register PC. All other frames contain the content of the
401 register PC in the next frame.
403 The variable signal_handler_caller is non-zero when the frame is
404 associated with the call of a signal handler.
406 The variable return_pc contains the address where execution should be
407 resumed when the present frame has finished, the return address.
409 The variable leaf_function is 1 if the return address is in the register
410 SRP, and 0 if it is on the stack.
412 Prologue instructions C-code.
413 The prologue may consist of (-fno-omit-frame-pointer)
417 move.d sp,r8 move.d sp,r8
419 movem rY,[sp] movem rY,[sp]
420 move.S rZ,[r8-U] move.S rZ,[r8-U]
422 where 1 is a non-terminal function, and 2 is a leaf-function.
424 Note that this assumption is extremely brittle, and will break at the
425 slightest change in GCC's prologue.
427 If local variables are declared or register contents are saved on stack
428 the subq-instruction will be present with X as the number of bytes
429 needed for storage. The reshuffle with respect to r8 may be performed
430 with any size S (b, w, d) and any of the general registers Z={0..13}.
431 The offset U should be representable by a signed 8-bit value in all cases.
432 Thus, the prefix word is assumed to be immediate byte offset mode followed
433 by another word containing the instruction.
442 Prologue instructions C++-code.
443 Case 1) and 2) in the C-code may be followed by
449 move.S [r8+U],rZ ; P4
451 if any of the call parameters are stored. The host expects these
452 instructions to be executed in order to get the call parameters right. */
454 /* Examine the prologue of a function. The variable ip is the address of
455 the first instruction of the prologue. The variable limit is the address
456 of the first instruction after the prologue. The variable fi contains the
457 information in struct frame_info. The variable frameless_p controls whether
458 the entire prologue is examined (0) or just enough instructions to
459 determine that it is a prologue (1). */
462 cris_examine (CORE_ADDR ip
, CORE_ADDR limit
, struct frame_info
*fi
,
465 /* Present instruction. */
468 /* Next instruction, lookahead. */
469 unsigned short insn_next
;
472 /* Is there a push fp? */
475 /* Number of byte on stack used for local variables and movem. */
478 /* Highest register number in a movem. */
481 /* move.d r<source_register>,rS */
482 short source_register
;
484 /* This frame is with respect to a leaf until a push srp is found. */
485 fi
->extra_info
->leaf_function
= 1;
487 /* This frame is without the FP until a push fp is found. */
490 /* Assume nothing on stack. */
494 /* No information about register contents so far. */
496 /* We only want to know the end of the prologue when fi->saved_regs == 0.
497 When the saved registers are allocated full information is required. */
500 for (regno
= 0; regno
< NUM_REGS
; regno
++)
501 fi
->saved_regs
[regno
] = 0;
504 /* Find the prologue instructions. */
507 insn
= read_memory_unsigned_integer (ip
, sizeof (short));
508 ip
+= sizeof (short);
511 /* push <reg> 32 bit instruction */
512 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
513 ip
+= sizeof (short);
514 regno
= cris_get_operand2 (insn_next
);
515 if (regno
== (SRP_REGNUM
- NUM_GENREGS
))
521 fi
->extra_info
->leaf_function
= 0;
523 else if (regno
== FP_REGNUM
)
528 else if (insn
== 0x866E)
537 else if (cris_get_operand2 (insn
) == SP_REGNUM
538 && cris_get_mode (insn
) == 0x0000
539 && cris_get_opcode (insn
) == 0x000A)
542 val
= cris_get_quick_value (insn
);
544 else if (cris_get_mode (insn
) == 0x0002
545 && cris_get_opcode (insn
) == 0x000F
546 && cris_get_size (insn
) == 0x0003
547 && cris_get_operand1 (insn
) == SP_REGNUM
)
549 /* movem r<regsave>,[sp] */
554 regsave
= cris_get_operand2 (insn
);
556 else if (cris_get_operand2 (insn
) == SP_REGNUM
557 && ((insn
& 0x0F00) >> 8) == 0x0001
558 && (cris_get_signed_offset (insn
) < 0))
560 /* Immediate byte offset addressing prefix word with sp as base
561 register. Used for CRIS v8 i.e. ETRAX 100 and newer if <val>
562 is between 64 and 128.
563 movem r<regsave>,[sp=sp-<val>] */
564 val
= -cris_get_signed_offset (insn
);
565 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
566 ip
+= sizeof (short);
567 if (cris_get_mode (insn_next
) == PREFIX_ASSIGN_MODE
568 && cris_get_opcode (insn_next
) == 0x000F
569 && cris_get_size (insn_next
) == 0x0003
570 && cris_get_operand1 (insn_next
) == SP_REGNUM
)
576 regsave
= cris_get_operand2 (insn_next
);
580 /* The prologue ended before the limit was reached. */
581 ip
-= 2 * sizeof (short);
585 else if (cris_get_mode (insn
) == 0x0001
586 && cris_get_opcode (insn
) == 0x0009
587 && cris_get_size (insn
) == 0x0002)
589 /* move.d r<10..13>,r<0..15> */
594 source_register
= cris_get_operand1 (insn
);
596 /* FIXME? In the glibc solibs, the prologue might contain something
597 like (this example taken from relocate_doit):
600 which isn't covered by the source_register check below. Question
601 is whether to add a check for this combo, or make better use of
602 the limit variable instead. */
603 if (source_register
< ARG1_REGNUM
|| source_register
> ARG4_REGNUM
)
605 /* The prologue ended before the limit was reached. */
606 ip
-= sizeof (short);
610 else if (cris_get_operand2 (insn
) == FP_REGNUM
611 /* The size is a fixed-size. */
612 && ((insn
& 0x0F00) >> 8) == 0x0001
613 /* A negative offset. */
614 && (cris_get_signed_offset (insn
) < 0))
616 /* move.S rZ,[r8-U] (?) */
617 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
618 ip
+= sizeof (short);
619 regno
= cris_get_operand2 (insn_next
);
620 if ((regno
>= 0 && regno
< SP_REGNUM
)
621 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
622 && cris_get_opcode (insn_next
) == 0x000F)
624 /* move.S rZ,[r8-U] */
629 /* The prologue ended before the limit was reached. */
630 ip
-= 2 * sizeof (short);
634 else if (cris_get_operand2 (insn
) == FP_REGNUM
635 /* The size is a fixed-size. */
636 && ((insn
& 0x0F00) >> 8) == 0x0001
637 /* A positive offset. */
638 && (cris_get_signed_offset (insn
) > 0))
640 /* move.S [r8+U],rZ (?) */
641 insn_next
= read_memory_unsigned_integer (ip
, sizeof (short));
642 ip
+= sizeof (short);
643 regno
= cris_get_operand2 (insn_next
);
644 if ((regno
>= 0 && regno
< SP_REGNUM
)
645 && cris_get_mode (insn_next
) == PREFIX_OFFSET_MODE
646 && cris_get_opcode (insn_next
) == 0x0009
647 && cris_get_operand1 (insn_next
) == regno
)
649 /* move.S [r8+U],rZ */
654 /* The prologue ended before the limit was reached. */
655 ip
-= 2 * sizeof (short);
661 /* The prologue ended before the limit was reached. */
662 ip
-= sizeof (short);
668 /* We only want to know the end of the prologue when
669 fi->saved_regs == 0. */
675 fi
->saved_regs
[FP_REGNUM
] = FRAME_FP (fi
);
677 /* Calculate the addresses. */
678 for (regno
= regsave
; regno
>= 0; regno
--)
680 fi
->saved_regs
[regno
] = FRAME_FP (fi
) - val
;
683 if (fi
->extra_info
->leaf_function
)
685 /* Set the register SP to contain the stack pointer of
687 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 4;
691 /* Set the register SP to contain the stack pointer of
693 fi
->saved_regs
[SP_REGNUM
] = FRAME_FP (fi
) + 8;
695 /* Set the register SRP to contain the return address of
697 fi
->saved_regs
[SRP_REGNUM
] = FRAME_FP (fi
) + 4;
703 /* Advance pc beyond any function entry prologue instructions at pc
704 to reach some "real" code. */
707 cris_skip_prologue (CORE_ADDR pc
)
709 return cris_skip_prologue_main (pc
, 0);
712 /* As cris_skip_prologue, but stops as soon as it knows that the function
713 has a frame. Its result is equal to its input pc if the function is
714 frameless, unequal otherwise. */
717 cris_skip_prologue_frameless_p (CORE_ADDR pc
)
719 return cris_skip_prologue_main (pc
, 1);
722 /* Given a PC value corresponding to the start of a function, return the PC
723 of the first instruction after the function prologue. */
726 cris_skip_prologue_main (CORE_ADDR pc
, int frameless_p
)
728 struct frame_info fi
;
729 static struct frame_extra_info fei
;
730 struct symtab_and_line sal
= find_pc_line (pc
, 0);
732 CORE_ADDR pc_after_prologue
;
734 /* frame_info now contains dynamic memory. Since fi is a dummy here,
735 I use static memory for extra_info, and don't bother allocating
736 memory for saved_regs. */
738 fi
.extra_info
= &fei
;
740 /* If there is no symbol information then sal.end == 0, and we end up
741 examining only the first instruction in the function prologue.
742 Exaggerating the limit seems to be harmless. */
744 best_limit
= sal
.end
;
746 best_limit
= pc
+ 100;
748 pc_after_prologue
= cris_examine (pc
, best_limit
, &fi
, frameless_p
);
749 return pc_after_prologue
;
752 /* Use the program counter to determine the contents and size of a breakpoint
753 instruction. It returns a pointer to a string of bytes that encode a
754 breakpoint instruction, stores the length of the string to *lenptr, and
755 adjusts pcptr (if necessary) to point to the actual memory location where
756 the breakpoint should be inserted. */
759 cris_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
761 static unsigned char break_insn
[] = {0x38, 0xe9};
767 /* Returns the register SRP (subroutine return pointer) which must contain
768 the content of the register PC after a function call. */
771 cris_saved_pc_after_call ()
773 return read_register (SRP_REGNUM
);
776 /* Returns 1 if spec_reg is applicable to the current gdbarch's CRIS version,
780 cris_spec_reg_applicable (struct cris_spec_reg spec_reg
)
782 int version
= cris_version ();
784 switch (spec_reg
.applicable_version
)
786 case cris_ver_version_all
:
788 case cris_ver_warning
:
789 /* Indeterminate/obsolete. */
792 /* Simulator only. */
795 return (version
>= 0 && version
<= 3);
797 return (version
>= 3);
799 return (version
== 8 || version
== 9);
801 return (version
>= 8);
803 return (version
>= 10);
805 /* Invalid cris version. */
810 /* Returns the register size in unit byte. Returns 0 for an unimplemented
811 register, -1 for an invalid register. */
814 cris_register_size (int regno
)
819 if (regno
>= 0 && regno
< NUM_GENREGS
)
821 /* General registers (R0 - R15) are 32 bits. */
824 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
826 /* Special register (R16 - R31). cris_spec_regs is zero-based.
827 Adjust regno accordingly. */
828 spec_regno
= regno
- NUM_GENREGS
;
830 /* The entries in cris_spec_regs are stored in register number order,
831 which means we can shortcut into the array when searching it. */
832 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
834 if (cris_spec_regs
[i
].number
== spec_regno
835 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
836 /* Go with the first applicable register. */
837 return cris_spec_regs
[i
].reg_size
;
839 /* Special register not applicable to this CRIS version. */
844 /* Invalid register. */
849 /* Nonzero if regno should not be fetched from the target. This is the case
850 for unimplemented (size 0) and non-existant registers. */
853 cris_cannot_fetch_register (int regno
)
855 return ((regno
< 0 || regno
>= NUM_REGS
)
856 || (cris_register_size (regno
) == 0));
859 /* Nonzero if regno should not be written to the target, for various
863 cris_cannot_store_register (int regno
)
865 /* There are three kinds of registers we refuse to write to.
866 1. Those that not implemented.
867 2. Those that are read-only (depends on the processor mode).
868 3. Those registers to which a write has no effect.
871 if (regno
< 0 || regno
>= NUM_REGS
|| cris_register_size (regno
) == 0)
872 /* Not implemented. */
875 else if (regno
== VR_REGNUM
)
879 else if (regno
== P0_REGNUM
|| regno
== P4_REGNUM
|| regno
== P8_REGNUM
)
880 /* Writing has no effect. */
883 else if (cris_mode () == CRIS_MODE_USER
)
885 if (regno
== IBR_REGNUM
|| regno
== BAR_REGNUM
|| regno
== BRP_REGNUM
886 || regno
== IRP_REGNUM
)
887 /* Read-only in user mode. */
894 /* Returns the register offset for the first byte of register regno's space
895 in the saved register state. Returns -1 for an invalid or unimplemented
899 cris_register_offset (int regno
)
905 if (regno
>= 0 && regno
< NUM_REGS
)
907 /* FIXME: The offsets should be cached and calculated only once,
908 when the architecture being debugged has changed. */
909 for (i
= 0; i
< regno
; i
++)
910 offset
+= cris_register_size (i
);
916 /* Invalid register. */
921 /* Return the GDB type (defined in gdbtypes.c) for the "standard" data type
922 of data in register regno. */
925 cris_register_virtual_type (int regno
)
927 if (regno
== SP_REGNUM
|| regno
== PC_REGNUM
928 || (regno
> P8_REGNUM
&& regno
< USP_REGNUM
))
930 /* SP, PC, IBR, IRP, SRP, BAR, DCCR, BRP */
931 return lookup_pointer_type (builtin_type_void
);
933 else if (regno
== P8_REGNUM
|| regno
== USP_REGNUM
934 || (regno
>= 0 && regno
< SP_REGNUM
))
936 /* R0 - R13, P8, P15 */
937 return builtin_type_unsigned_long
;
939 else if (regno
> P3_REGNUM
&& regno
< P8_REGNUM
)
941 /* P4, CCR, DCR0, DCR1 */
942 return builtin_type_unsigned_short
;
944 else if (regno
> PC_REGNUM
&& regno
< P4_REGNUM
)
947 return builtin_type_unsigned_char
;
951 /* Invalid register. */
952 return builtin_type_void
;
956 /* Stores a function return value of type type, where valbuf is the address
957 of the value to be stored. */
959 /* In the original CRIS ABI, R10 is used to store return values. */
962 cris_abi_original_store_return_value (struct type
*type
, char *valbuf
)
964 int len
= TYPE_LENGTH (type
);
966 if (len
<= REGISTER_SIZE
)
967 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
969 internal_error (__FILE__
, __LINE__
, "cris_abi_original_store_return_value: type length too large.");
972 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
975 cris_abi_v2_store_return_value (struct type
*type
, char *valbuf
)
977 int len
= TYPE_LENGTH (type
);
979 if (len
<= 2 * REGISTER_SIZE
)
981 /* Note that this works since R10 and R11 are consecutive registers. */
982 write_register_bytes (REGISTER_BYTE (RET_REGNUM
), valbuf
, len
);
985 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_store_return_value: type length too large.");
988 /* Return the name of register regno as a string. Return NULL for an invalid or
989 unimplemented register. */
992 cris_register_name (int regno
)
994 static char *cris_genreg_names
[] =
995 { "r0", "r1", "r2", "r3", \
996 "r4", "r5", "r6", "r7", \
997 "r8", "r9", "r10", "r11", \
998 "r12", "r13", "sp", "pc" };
1003 if (regno
>= 0 && regno
< NUM_GENREGS
)
1005 /* General register. */
1006 return cris_genreg_names
[regno
];
1008 else if (regno
>= NUM_GENREGS
&& regno
< NUM_REGS
)
1010 /* Special register (R16 - R31). cris_spec_regs is zero-based.
1011 Adjust regno accordingly. */
1012 spec_regno
= regno
- NUM_GENREGS
;
1014 /* The entries in cris_spec_regs are stored in register number order,
1015 which means we can shortcut into the array when searching it. */
1016 for (i
= spec_regno
; cris_spec_regs
[i
].name
!= NULL
; i
++)
1018 if (cris_spec_regs
[i
].number
== spec_regno
1019 && cris_spec_reg_applicable (cris_spec_regs
[i
]))
1020 /* Go with the first applicable register. */
1021 return cris_spec_regs
[i
].name
;
1023 /* Special register not applicable to this CRIS version. */
1028 /* Invalid register. */
1034 cris_register_bytes_ok (long bytes
)
1036 return (bytes
== REGISTER_BYTES
);
1039 /* Extract from an array regbuf containing the raw register state a function
1040 return value of type type, and copy that, in virtual format, into
1043 /* In the original CRIS ABI, R10 is used to return values. */
1046 cris_abi_original_extract_return_value (struct type
*type
, char *regbuf
,
1049 int len
= TYPE_LENGTH (type
);
1051 if (len
<= REGISTER_SIZE
)
1052 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1054 internal_error (__FILE__
, __LINE__
, "cris_abi_original_extract_return_value: type length too large");
1057 /* In the CRIS ABI V2, R10 and R11 are used to store return values. */
1060 cris_abi_v2_extract_return_value (struct type
*type
, char *regbuf
,
1063 int len
= TYPE_LENGTH (type
);
1065 if (len
<= 2 * REGISTER_SIZE
)
1066 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET_REGNUM
), len
);
1068 internal_error (__FILE__
, __LINE__
, "cris_abi_v2_extract_return_value: type length too large");
1071 /* Store the address of the place in which to copy the structure the
1072 subroutine will return. In the CRIS ABI, R9 is used in order to pass
1073 the address of the allocated area where a structure return value must
1074 be stored. R9 is call-clobbered, which means we must save it here for
1078 cris_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
1080 write_register (STR_REGNUM
, addr
);
1081 struct_return_address
= addr
;
1084 /* Extract from regbuf the address where a function should return a
1085 structure value. It's not there in the CRIS ABI, so we must do it another
1089 cris_extract_struct_value_address (char *regbuf
)
1091 return struct_return_address
;
1094 /* Returns 1 if a value of the given type being returned from a function
1095 must have space allocated for it on the stack. gcc_p is true if the
1096 function being considered is known to have been compiled by GCC.
1097 In the CRIS ABI, structure return values are passed to the called
1098 function by reference in register R9 to a caller-allocated area, so
1099 this is always true. */
1102 cris_use_struct_convention (int gcc_p
, struct type
*type
)
1107 /* Returns 1 if the given type will be passed by pointer rather than
1110 /* In the original CRIS ABI, arguments shorter than or equal to 32 bits are
1114 cris_abi_original_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1116 return (TYPE_LENGTH (type
) > 4);
1119 /* In the CRIS ABI V2, arguments shorter than or equal to 64 bits are passed
1123 cris_abi_v2_reg_struct_has_addr (int gcc_p
, struct type
*type
)
1125 return (TYPE_LENGTH (type
) > 8);
1128 /* Returns 1 if the function invocation represented by fi does not have a
1129 stack frame associated with it. Otherwise return 0. */
1132 cris_frameless_function_invocation (struct frame_info
*fi
)
1134 if (fi
->signal_handler_caller
)
1137 return frameless_look_for_prologue (fi
);
1140 /* See frame.h. Determines the address of all registers in the current stack
1141 frame storing each in frame->saved_regs. Space for frame->saved_regs shall
1142 be allocated by FRAME_INIT_SAVED_REGS using either frame_saved_regs_zalloc
1143 or frame_obstack_alloc. */
1146 cris_frame_init_saved_regs (struct frame_info
*fi
)
1149 struct symtab_and_line sal
;
1151 char *dummy_regs
= generic_find_dummy_frame (fi
->pc
, fi
->frame
);
1153 /* Examine the entire prologue. */
1154 register int frameless_p
= 0;
1156 /* Has this frame's registers already been initialized? */
1160 frame_saved_regs_zalloc (fi
);
1164 /* I don't see this ever happening, considering the context in which
1165 cris_frame_init_saved_regs is called (always when we're not in
1167 memcpy (&fi
->saved_regs
, dummy_regs
, sizeof (fi
->saved_regs
));
1171 ip
= get_pc_function_start (fi
->pc
);
1172 sal
= find_pc_line (ip
, 0);
1174 /* If there is no symbol information then sal.end == 0, and we end up
1175 examining only the first instruction in the function prologue.
1176 Exaggerating the limit seems to be harmless. */
1178 best_limit
= sal
.end
;
1180 best_limit
= ip
+ 100;
1182 cris_examine (ip
, best_limit
, fi
, frameless_p
);
1186 /* Initialises the extra frame information at the creation of a new frame.
1187 The inparameter fromleaf is 0 when the call is from create_new_frame.
1188 When the call is from get_prev_frame_info, fromleaf is determined by
1189 cris_frameless_function_invocation. */
1192 cris_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
1196 /* Called from get_prev_frame. */
1197 fi
->pc
= FRAME_SAVED_PC (fi
->next
);
1200 fi
->extra_info
= (struct frame_extra_info
*)
1201 frame_obstack_alloc (sizeof (struct frame_extra_info
));
1203 fi
->extra_info
->return_pc
= 0;
1204 fi
->extra_info
->leaf_function
= 0;
1206 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1208 /* We need to setup fi->frame here because run_stack_dummy gets it wrong
1209 by assuming it's always FP. */
1210 fi
->frame
= generic_read_register_dummy (fi
->pc
, fi
->frame
, SP_REGNUM
);
1211 fi
->extra_info
->return_pc
=
1212 generic_read_register_dummy (fi
->pc
, fi
->frame
, PC_REGNUM
);
1214 /* FIXME: Is this necessarily true? */
1215 fi
->extra_info
->leaf_function
= 0;
1219 cris_frame_init_saved_regs (fi
);
1221 /* Check fromleaf/frameless_function_invocation. (FIXME) */
1223 if (fi
->saved_regs
[SRP_REGNUM
] != 0)
1225 /* SRP was saved on the stack; non-leaf function. */
1226 fi
->extra_info
->return_pc
=
1227 read_memory_integer (fi
->saved_regs
[SRP_REGNUM
],
1228 REGISTER_RAW_SIZE (SRP_REGNUM
));
1232 /* SRP is still in a register; leaf function. */
1233 fi
->extra_info
->return_pc
= read_register (SRP_REGNUM
);
1234 /* FIXME: Should leaf_function be set to 1 here? */
1235 fi
->extra_info
->leaf_function
= 1;
1240 /* Return the content of the frame pointer in the present frame. In other
1241 words, determine the address of the calling function's frame. */
1244 cris_frame_chain (struct frame_info
*fi
)
1246 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1250 else if (!inside_entry_file (fi
->pc
))
1252 return read_memory_unsigned_integer (FRAME_FP (fi
), 4);
1260 /* Return the saved PC (which equals the return address) of this frame. */
1263 cris_frame_saved_pc (struct frame_info
*fi
)
1265 return fi
->extra_info
->return_pc
;
1268 /* Return the address of the argument block for the frame described
1269 by struct frame_info. */
1272 cris_frame_args_address (struct frame_info
*fi
)
1274 return FRAME_FP (fi
);
1277 /* Return the address of the locals block for the frame
1278 described by struct frame_info. */
1281 cris_frame_locals_address (struct frame_info
*fi
)
1283 return FRAME_FP (fi
);
1286 /* Setup the function arguments for calling a function in the inferior. */
1289 cris_abi_original_push_arguments (int nargs
, struct value
**args
,
1290 CORE_ADDR sp
, int struct_return
,
1291 CORE_ADDR struct_addr
)
1302 /* Data and parameters reside in different areas on the stack.
1303 Both frame pointers grow toward higher addresses. */
1304 CORE_ADDR fp_params
;
1307 /* Are we returning a value using a structure return or a normal value
1308 return? struct_addr is the address of the reserved space for the return
1309 structure to be written on the stack. */
1312 write_register (STR_REGNUM
, struct_addr
);
1315 /* Make sure there's space on the stack. Allocate space for data and a
1316 parameter to refer to that data. */
1317 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
1318 stack_alloc
+= (TYPE_LENGTH (VALUE_TYPE (args
[argnum
])) + REGISTER_SIZE
);
1320 /* We may over-allocate a little here, but that won't hurt anything. */
1322 /* Initialize stack frame pointers. */
1324 fp_data
= sp
+ (nargs
* REGISTER_SIZE
);
1326 /* Now load as many as possible of the first arguments into
1327 registers, and push the rest onto the stack. */
1328 argreg
= ARG1_REGNUM
;
1331 for (argnum
= 0; argnum
< nargs
; argnum
++)
1333 type
= VALUE_TYPE (args
[argnum
]);
1334 len
= TYPE_LENGTH (type
);
1335 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1337 if (len
<= REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1339 /* Data fits in a register; put it in the first available
1341 write_register (argreg
, *(unsigned long *) val
);
1344 else if (len
> REGISTER_SIZE
&& argreg
<= ARG4_REGNUM
)
1346 /* Data does not fit in register; pass it on the stack and
1347 put its address in the first available register. */
1348 write_memory (fp_data
, val
, len
);
1349 write_register (argreg
, fp_data
);
1353 else if (len
> REGISTER_SIZE
)
1355 /* Data does not fit in register; put both data and
1356 parameter on the stack. */
1357 write_memory (fp_data
, val
, len
);
1358 write_memory (fp_params
, (char *) (&fp_data
), REGISTER_SIZE
);
1360 fp_params
+= REGISTER_SIZE
;
1364 /* Data fits in a register, but we are out of registers;
1365 put the parameter on the stack. */
1366 write_memory (fp_params
, val
, REGISTER_SIZE
);
1367 fp_params
+= REGISTER_SIZE
;
1375 cris_abi_v2_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1376 int struct_return
, CORE_ADDR struct_addr
)
1385 /* The function's arguments and memory allocated by gdb for the arguments to
1386 point at reside in separate areas on the stack.
1387 Both frame pointers grow toward higher addresses. */
1391 /* Are we returning a value using a structure return or a normal value
1392 return? struct_addr is the address of the reserved space for the return
1393 structure to be written on the stack. */
1396 write_register (STR_REGNUM
, struct_addr
);
1399 /* Allocate enough to keep things word-aligned on both parts of the
1402 for (argnum
= 0; argnum
< nargs
; argnum
++)
1407 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1408 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1410 /* reg_demand * REGISTER_SIZE is the amount of memory we might need to
1411 allocate for this argument. 2 * REGISTER_SIZE is the amount of stack
1412 space we might need to pass the argument itself (either by value or by
1414 stack_alloc
+= (reg_demand
* REGISTER_SIZE
+ 2 * REGISTER_SIZE
);
1417 /* We may over-allocate a little here, but that won't hurt anything. */
1419 /* Initialize frame pointers. */
1421 fp_mem
= sp
+ (nargs
* (2 * REGISTER_SIZE
));
1423 /* Now load as many as possible of the first arguments into registers,
1424 and push the rest onto the stack. */
1425 argreg
= ARG1_REGNUM
;
1428 for (argnum
= 0; argnum
< nargs
; argnum
++)
1435 len
= TYPE_LENGTH (VALUE_TYPE (args
[argnum
]));
1436 val
= (char *) VALUE_CONTENTS (args
[argnum
]);
1438 /* How may registers worth of storage do we need for this argument? */
1439 reg_demand
= (len
/ REGISTER_SIZE
) + (len
% REGISTER_SIZE
!= 0 ? 1 : 0);
1441 if (len
<= (2 * REGISTER_SIZE
)
1442 && (argreg
+ reg_demand
- 1 <= ARG4_REGNUM
))
1444 /* Data passed by value. Fits in available register(s). */
1445 for (i
= 0; i
< reg_demand
; i
++)
1447 write_register (argreg
, *(unsigned long *) val
);
1449 val
+= REGISTER_SIZE
;
1452 else if (len
<= (2 * REGISTER_SIZE
) && argreg
<= ARG4_REGNUM
)
1454 /* Data passed by value. Does not fit in available register(s).
1455 Use the register(s) first, then the stack. */
1456 for (i
= 0; i
< reg_demand
; i
++)
1458 if (argreg
<= ARG4_REGNUM
)
1460 write_register (argreg
, *(unsigned long *) val
);
1462 val
+= REGISTER_SIZE
;
1466 /* I guess this memory write could write the remaining data
1467 all at once instead of in REGISTER_SIZE chunks. */
1468 write_memory (fp_arg
, val
, REGISTER_SIZE
);
1469 fp_arg
+= REGISTER_SIZE
;
1470 val
+= REGISTER_SIZE
;
1474 else if (len
> (2 * REGISTER_SIZE
))
1476 /* Data passed by reference. Put it on the stack. */
1477 write_memory (fp_mem
, val
, len
);
1478 write_memory (fp_arg
, (char *) (&fp_mem
), REGISTER_SIZE
);
1480 /* fp_mem need not be word-aligned since it's just a chunk of
1481 memory being pointed at. That is, += len would do. */
1482 fp_mem
+= reg_demand
* REGISTER_SIZE
;
1483 fp_arg
+= REGISTER_SIZE
;
1487 /* Data passed by value. No available registers. Put it on
1489 write_memory (fp_arg
, val
, len
);
1491 /* fp_arg must be word-aligned (i.e., don't += len) to match
1492 the function prologue. */
1493 fp_arg
+= reg_demand
* REGISTER_SIZE
;
1500 /* Never put the return address on the stack. The register SRP is pushed
1501 by the called function unless it is a leaf-function. Due to the BRP
1502 register the PC will change when continue is sent. */
1505 cris_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
1507 write_register (SRP_REGNUM
, CALL_DUMMY_ADDRESS ());
1511 /* Restore the machine to the state it had before the current frame
1512 was created. Discard the innermost frame from the stack and restore
1513 all saved registers. */
1518 register struct frame_info
*fi
= get_current_frame ();
1520 register int stack_offset
= 0;
1522 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
1524 /* This happens when we hit a breakpoint set at the entry point,
1525 when returning from a dummy frame. */
1526 generic_pop_dummy_frame ();
1530 cris_frame_init_saved_regs (fi
);
1532 /* For each register, the address of where it was saved on entry to
1533 the frame now lies in fi->saved_regs[regno], or zero if it was not
1534 saved. This includes special registers such as PC and FP saved in
1535 special ways in the stack frame. The SP_REGNUM is even more
1536 special, the address here is the SP for the next frame, not the
1537 address where the SP was saved. */
1539 /* Restore general registers R0 - R7. They were pushed on the stack
1540 after SP was saved. */
1541 for (regno
= 0; regno
< FP_REGNUM
; regno
++)
1543 if (fi
->saved_regs
[regno
])
1545 write_register (regno
,
1546 read_memory_integer (fi
->saved_regs
[regno
], 4));
1550 if (fi
->saved_regs
[FP_REGNUM
])
1552 /* Pop the frame pointer (R8). It was pushed before SP
1554 write_register (FP_REGNUM
,
1555 read_memory_integer (fi
->saved_regs
[FP_REGNUM
], 4));
1558 /* Not a leaf function. */
1559 if (fi
->saved_regs
[SRP_REGNUM
])
1561 /* SRP was pushed before SP was saved. */
1565 /* Restore the SP and adjust for R8 and (possibly) SRP. */
1566 write_register (SP_REGNUM
, fi
->saved_regs
[FP_REGNUM
] + stack_offset
);
1570 /* Currently, we can't get the correct info into fi->saved_regs
1571 without a frame pointer. */
1574 /* Restore the PC. */
1575 write_register (PC_REGNUM
, fi
->extra_info
->return_pc
);
1577 flush_cached_frames ();
1580 /* Calculates a value that measures how good inst_args constraints an
1581 instruction. It stems from cris_constraint, found in cris-dis.c. */
1584 constraint (unsigned int insn
, const signed char *inst_args
,
1585 inst_env_type
*inst_env
)
1590 const char *s
= inst_args
;
1596 if ((insn
& 0x30) == 0x30)
1601 /* A prefix operand. */
1602 if (inst_env
->prefix_found
)
1608 /* A "push" prefix. (This check was REMOVED by san 970921.) Check for
1609 valid "push" size. In case of special register, it may be != 4. */
1610 if (inst_env
->prefix_found
)
1616 retval
= (((insn
>> 0xC) & 0xF) == (insn
& 0xF));
1624 tmp
= (insn
>> 0xC) & 0xF;
1626 for (i
= 0; cris_spec_regs
[i
].name
!= NULL
; i
++)
1628 /* Since we match four bits, we will give a value of
1629 4 - 1 = 3 in a match. If there is a corresponding
1630 exact match of a special register in another pattern, it
1631 will get a value of 4, which will be higher. This should
1632 be correct in that an exact pattern would match better that
1634 Note that there is a reason for not returning zero; the
1635 pattern for "clear" is partly matched in the bit-pattern
1636 (the two lower bits must be zero), while the bit-pattern
1637 for a move from a special register is matched in the
1638 register constraint.
1639 This also means we will will have a race condition if
1640 there is a partly match in three bits in the bit pattern. */
1641 if (tmp
== cris_spec_regs
[i
].number
)
1648 if (cris_spec_regs
[i
].name
== NULL
)
1655 /* Returns the number of bits set in the variable value. */
1658 number_of_bits (unsigned int value
)
1660 int number_of_bits
= 0;
1664 number_of_bits
+= 1;
1665 value
&= (value
- 1);
1667 return number_of_bits
;
1670 /* Finds the address that should contain the single step breakpoint(s).
1671 It stems from code in cris-dis.c. */
1674 find_cris_op (unsigned short insn
, inst_env_type
*inst_env
)
1677 int max_level_of_match
= -1;
1678 int max_matched
= -1;
1681 for (i
= 0; cris_opcodes
[i
].name
!= NULL
; i
++)
1683 if (((cris_opcodes
[i
].match
& insn
) == cris_opcodes
[i
].match
)
1684 && ((cris_opcodes
[i
].lose
& insn
) == 0))
1686 level_of_match
= constraint (insn
, cris_opcodes
[i
].args
, inst_env
);
1687 if (level_of_match
>= 0)
1690 number_of_bits (cris_opcodes
[i
].match
| cris_opcodes
[i
].lose
);
1691 if (level_of_match
> max_level_of_match
)
1694 max_level_of_match
= level_of_match
;
1695 if (level_of_match
== 16)
1697 /* All bits matched, cannot find better. */
1707 /* Attempts to find single-step breakpoints. Returns -1 on failure which is
1708 actually an internal error. */
1711 find_step_target (inst_env_type
*inst_env
)
1715 unsigned short insn
;
1717 /* Create a local register image and set the initial state. */
1718 for (i
= 0; i
< NUM_GENREGS
; i
++)
1720 inst_env
->reg
[i
] = (unsigned long) read_register (i
);
1722 offset
= NUM_GENREGS
;
1723 for (i
= 0; i
< NUM_SPECREGS
; i
++)
1725 inst_env
->preg
[i
] = (unsigned long) read_register (offset
+ i
);
1727 inst_env
->branch_found
= 0;
1728 inst_env
->slot_needed
= 0;
1729 inst_env
->delay_slot_pc_active
= 0;
1730 inst_env
->prefix_found
= 0;
1731 inst_env
->invalid
= 0;
1732 inst_env
->xflag_found
= 0;
1733 inst_env
->disable_interrupt
= 0;
1735 /* Look for a step target. */
1738 /* Read an instruction from the client. */
1739 insn
= read_memory_unsigned_integer (inst_env
->reg
[PC_REGNUM
], 2);
1741 /* If the instruction is not in a delay slot the new content of the
1742 PC is [PC] + 2. If the instruction is in a delay slot it is not
1743 that simple. Since a instruction in a delay slot cannot change
1744 the content of the PC, it does not matter what value PC will have.
1745 Just make sure it is a valid instruction. */
1746 if (!inst_env
->delay_slot_pc_active
)
1748 inst_env
->reg
[PC_REGNUM
] += 2;
1752 inst_env
->delay_slot_pc_active
= 0;
1753 inst_env
->reg
[PC_REGNUM
] = inst_env
->delay_slot_pc
;
1755 /* Analyse the present instruction. */
1756 i
= find_cris_op (insn
, inst_env
);
1759 inst_env
->invalid
= 1;
1763 cris_gdb_func (cris_opcodes
[i
].op
, insn
, inst_env
);
1765 } while (!inst_env
->invalid
1766 && (inst_env
->prefix_found
|| inst_env
->xflag_found
1767 || inst_env
->slot_needed
));
1771 /* There is no hardware single-step support. The function find_step_target
1772 digs through the opcodes in order to find all possible targets.
1773 Either one ordinary target or two targets for branches may be found. */
1776 cris_software_single_step (enum target_signal ignore
, int insert_breakpoints
)
1778 inst_env_type inst_env
;
1780 if (insert_breakpoints
)
1782 /* Analyse the present instruction environment and insert
1784 int status
= find_step_target (&inst_env
);
1787 /* Could not find a target. FIXME: Should do something. */
1791 /* Insert at most two breakpoints. One for the next PC content
1792 and possibly another one for a branch, jump, etc. */
1793 next_pc
= (CORE_ADDR
) inst_env
.reg
[PC_REGNUM
];
1794 target_insert_breakpoint (next_pc
, break_mem
[0]);
1795 if (inst_env
.branch_found
1796 && (CORE_ADDR
) inst_env
.branch_break_address
!= next_pc
)
1798 branch_target_address
=
1799 (CORE_ADDR
) inst_env
.branch_break_address
;
1800 target_insert_breakpoint (branch_target_address
, break_mem
[1]);
1801 branch_break_inserted
= 1;
1807 /* Remove breakpoints. */
1808 target_remove_breakpoint (next_pc
, break_mem
[0]);
1809 if (branch_break_inserted
)
1811 target_remove_breakpoint (branch_target_address
, break_mem
[1]);
1812 branch_break_inserted
= 0;
1817 /* Calculates the prefix value for quick offset addressing mode. */
1820 quick_mode_bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1822 /* It's invalid to be in a delay slot. You can't have a prefix to this
1823 instruction (not 100% sure). */
1824 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1826 inst_env
->invalid
= 1;
1830 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1831 inst_env
->prefix_value
+= cris_get_bdap_quick_offset (inst
);
1833 /* A prefix doesn't change the xflag_found. But the rest of the flags
1835 inst_env
->slot_needed
= 0;
1836 inst_env
->prefix_found
= 1;
1839 /* Updates the autoincrement register. The size of the increment is derived
1840 from the size of the operation. The PC is always kept aligned on even
1844 process_autoincrement (int size
, unsigned short inst
, inst_env_type
*inst_env
)
1846 if (size
== INST_BYTE_SIZE
)
1848 inst_env
->reg
[cris_get_operand1 (inst
)] += 1;
1850 /* The PC must be word aligned, so increase the PC with one
1851 word even if the size is byte. */
1852 if (cris_get_operand1 (inst
) == REG_PC
)
1854 inst_env
->reg
[REG_PC
] += 1;
1857 else if (size
== INST_WORD_SIZE
)
1859 inst_env
->reg
[cris_get_operand1 (inst
)] += 2;
1861 else if (size
== INST_DWORD_SIZE
)
1863 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1868 inst_env
->invalid
= 1;
1872 /* Just a forward declaration. */
1875 get_data_from_address (unsigned short *inst
, CORE_ADDR address
);
1877 /* Calculates the prefix value for the general case of offset addressing
1881 bdap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1886 /* It's invalid to be in a delay slot. */
1887 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1889 inst_env
->invalid
= 1;
1893 /* The calculation of prefix_value used to be after process_autoincrement,
1894 but that fails for an instruction such as jsr [$r0+12] which is encoded
1895 as 5f0d 0c00 30b9 when compiled with -fpic. Since PC is operand1 it
1896 mustn't be incremented until we have read it and what it points at. */
1897 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand2 (inst
)];
1899 /* The offset is an indirection of the contents of the operand1 register. */
1900 inst_env
->prefix_value
+=
1901 get_data_from_address (&inst
, inst_env
->reg
[cris_get_operand1 (inst
)]);
1903 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1905 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
1908 /* A prefix doesn't change the xflag_found. But the rest of the flags
1910 inst_env
->slot_needed
= 0;
1911 inst_env
->prefix_found
= 1;
1914 /* Calculates the prefix value for the index addressing mode. */
1917 biap_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1919 /* It's invalid to be in a delay slot. I can't see that it's possible to
1920 have a prefix to this instruction. So I will treat this as invalid. */
1921 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1923 inst_env
->invalid
= 1;
1927 inst_env
->prefix_value
= inst_env
->reg
[cris_get_operand1 (inst
)];
1929 /* The offset is the operand2 value shifted the size of the instruction
1931 inst_env
->prefix_value
+=
1932 inst_env
->reg
[cris_get_operand2 (inst
)] << cris_get_size (inst
);
1934 /* If the PC is operand1 (base) the address used is the address after
1935 the main instruction, i.e. address + 2 (the PC is already compensated
1936 for the prefix operation). */
1937 if (cris_get_operand1 (inst
) == REG_PC
)
1939 inst_env
->prefix_value
+= 2;
1942 /* A prefix doesn't change the xflag_found. But the rest of the flags
1944 inst_env
->slot_needed
= 0;
1945 inst_env
->xflag_found
= 0;
1946 inst_env
->prefix_found
= 1;
1949 /* Calculates the prefix value for the double indirect addressing mode. */
1952 dip_prefix (unsigned short inst
, inst_env_type
*inst_env
)
1957 /* It's invalid to be in a delay slot. */
1958 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1960 inst_env
->invalid
= 1;
1964 /* The prefix value is one dereference of the contents of the operand1
1966 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
1967 inst_env
->prefix_value
= read_memory_unsigned_integer (address
, 4);
1969 /* Check if the mode is autoincrement. */
1970 if (cris_get_mode (inst
) == AUTOINC_MODE
)
1972 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
1975 /* A prefix doesn't change the xflag_found. But the rest of the flags
1977 inst_env
->slot_needed
= 0;
1978 inst_env
->xflag_found
= 0;
1979 inst_env
->prefix_found
= 1;
1982 /* Finds the destination for a branch with 8-bits offset. */
1985 eight_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
1990 /* If we have a prefix or are in a delay slot it's bad. */
1991 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
1993 inst_env
->invalid
= 1;
1997 /* We have a branch, find out where the branch will land. */
1998 offset
= cris_get_branch_short_offset (inst
);
2000 /* Check if the offset is signed. */
2001 if (offset
& BRANCH_SIGNED_SHORT_OFFSET_MASK
)
2006 /* The offset ends with the sign bit, set it to zero. The address
2007 should always be word aligned. */
2008 offset
&= ~BRANCH_SIGNED_SHORT_OFFSET_MASK
;
2010 inst_env
->branch_found
= 1;
2011 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2013 inst_env
->slot_needed
= 1;
2014 inst_env
->prefix_found
= 0;
2015 inst_env
->xflag_found
= 0;
2016 inst_env
->disable_interrupt
= 1;
2019 /* Finds the destination for a branch with 16-bits offset. */
2022 sixteen_bit_offset_branch_op (unsigned short inst
, inst_env_type
*inst_env
)
2026 /* If we have a prefix or is in a delay slot it's bad. */
2027 if (inst_env
->slot_needed
|| inst_env
->prefix_found
)
2029 inst_env
->invalid
= 1;
2033 /* We have a branch, find out the offset for the branch. */
2034 offset
= read_memory_integer (inst_env
->reg
[REG_PC
], 2);
2036 /* The instruction is one word longer than normal, so add one word
2038 inst_env
->reg
[REG_PC
] += 2;
2040 inst_env
->branch_found
= 1;
2041 inst_env
->branch_break_address
= inst_env
->reg
[REG_PC
] + offset
;
2044 inst_env
->slot_needed
= 1;
2045 inst_env
->prefix_found
= 0;
2046 inst_env
->xflag_found
= 0;
2047 inst_env
->disable_interrupt
= 1;
2050 /* Handles the ABS instruction. */
2053 abs_op (unsigned short inst
, inst_env_type
*inst_env
)
2058 /* ABS can't have a prefix, so it's bad if it does. */
2059 if (inst_env
->prefix_found
)
2061 inst_env
->invalid
= 1;
2065 /* Check if the operation affects the PC. */
2066 if (cris_get_operand2 (inst
) == REG_PC
)
2069 /* It's invalid to change to the PC if we are in a delay slot. */
2070 if (inst_env
->slot_needed
)
2072 inst_env
->invalid
= 1;
2076 value
= (long) inst_env
->reg
[REG_PC
];
2078 /* The value of abs (SIGNED_DWORD_MASK) is SIGNED_DWORD_MASK. */
2079 if (value
!= SIGNED_DWORD_MASK
)
2082 inst_env
->reg
[REG_PC
] = (long) value
;
2086 inst_env
->slot_needed
= 0;
2087 inst_env
->prefix_found
= 0;
2088 inst_env
->xflag_found
= 0;
2089 inst_env
->disable_interrupt
= 0;
2092 /* Handles the ADDI instruction. */
2095 addi_op (unsigned short inst
, inst_env_type
*inst_env
)
2097 /* It's invalid to have the PC as base register. And ADDI can't have
2099 if (inst_env
->prefix_found
|| (cris_get_operand1 (inst
) == REG_PC
))
2101 inst_env
->invalid
= 1;
2105 inst_env
->slot_needed
= 0;
2106 inst_env
->prefix_found
= 0;
2107 inst_env
->xflag_found
= 0;
2108 inst_env
->disable_interrupt
= 0;
2111 /* Handles the ASR instruction. */
2114 asr_op (unsigned short inst
, inst_env_type
*inst_env
)
2117 unsigned long value
;
2118 unsigned long signed_extend_mask
= 0;
2120 /* ASR can't have a prefix, so check that it doesn't. */
2121 if (inst_env
->prefix_found
)
2123 inst_env
->invalid
= 1;
2127 /* Check if the PC is the target register. */
2128 if (cris_get_operand2 (inst
) == REG_PC
)
2130 /* It's invalid to change the PC in a delay slot. */
2131 if (inst_env
->slot_needed
)
2133 inst_env
->invalid
= 1;
2136 /* Get the number of bits to shift. */
2137 shift_steps
= cris_get_asr_shift_steps (inst_env
->reg
[cris_get_operand1 (inst
)]);
2138 value
= inst_env
->reg
[REG_PC
];
2140 /* Find out how many bits the operation should apply to. */
2141 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2143 if (value
& SIGNED_BYTE_MASK
)
2145 signed_extend_mask
= 0xFF;
2146 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2147 signed_extend_mask
= ~signed_extend_mask
;
2149 value
= value
>> shift_steps
;
2150 value
|= signed_extend_mask
;
2152 inst_env
->reg
[REG_PC
] &= 0xFFFFFF00;
2153 inst_env
->reg
[REG_PC
] |= value
;
2155 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2157 if (value
& SIGNED_WORD_MASK
)
2159 signed_extend_mask
= 0xFFFF;
2160 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2161 signed_extend_mask
= ~signed_extend_mask
;
2163 value
= value
>> shift_steps
;
2164 value
|= signed_extend_mask
;
2166 inst_env
->reg
[REG_PC
] &= 0xFFFF0000;
2167 inst_env
->reg
[REG_PC
] |= value
;
2169 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2171 if (value
& SIGNED_DWORD_MASK
)
2173 signed_extend_mask
= 0xFFFFFFFF;
2174 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2175 signed_extend_mask
= ~signed_extend_mask
;
2177 value
= value
>> shift_steps
;
2178 value
|= signed_extend_mask
;
2179 inst_env
->reg
[REG_PC
] = value
;
2182 inst_env
->slot_needed
= 0;
2183 inst_env
->prefix_found
= 0;
2184 inst_env
->xflag_found
= 0;
2185 inst_env
->disable_interrupt
= 0;
2188 /* Handles the ASRQ instruction. */
2191 asrq_op (unsigned short inst
, inst_env_type
*inst_env
)
2195 unsigned long value
;
2196 unsigned long signed_extend_mask
= 0;
2198 /* ASRQ can't have a prefix, so check that it doesn't. */
2199 if (inst_env
->prefix_found
)
2201 inst_env
->invalid
= 1;
2205 /* Check if the PC is the target register. */
2206 if (cris_get_operand2 (inst
) == REG_PC
)
2209 /* It's invalid to change the PC in a delay slot. */
2210 if (inst_env
->slot_needed
)
2212 inst_env
->invalid
= 1;
2215 /* The shift size is given as a 5 bit quick value, i.e. we don't
2216 want the the sign bit of the quick value. */
2217 shift_steps
= cris_get_asr_shift_steps (inst
);
2218 value
= inst_env
->reg
[REG_PC
];
2219 if (value
& SIGNED_DWORD_MASK
)
2221 signed_extend_mask
= 0xFFFFFFFF;
2222 signed_extend_mask
= signed_extend_mask
>> shift_steps
;
2223 signed_extend_mask
= ~signed_extend_mask
;
2225 value
= value
>> shift_steps
;
2226 value
|= signed_extend_mask
;
2227 inst_env
->reg
[REG_PC
] = value
;
2229 inst_env
->slot_needed
= 0;
2230 inst_env
->prefix_found
= 0;
2231 inst_env
->xflag_found
= 0;
2232 inst_env
->disable_interrupt
= 0;
2235 /* Handles the AX, EI and SETF instruction. */
2238 ax_ei_setf_op (unsigned short inst
, inst_env_type
*inst_env
)
2240 if (inst_env
->prefix_found
)
2242 inst_env
->invalid
= 1;
2245 /* Check if the instruction is setting the X flag. */
2246 if (cris_is_xflag_bit_on (inst
))
2248 inst_env
->xflag_found
= 1;
2252 inst_env
->xflag_found
= 0;
2254 inst_env
->slot_needed
= 0;
2255 inst_env
->prefix_found
= 0;
2256 inst_env
->disable_interrupt
= 1;
2259 /* Checks if the instruction is in assign mode. If so, it updates the assign
2260 register. Note that check_assign assumes that the caller has checked that
2261 there is a prefix to this instruction. The mode check depends on this. */
2264 check_assign (unsigned short inst
, inst_env_type
*inst_env
)
2266 /* Check if it's an assign addressing mode. */
2267 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2269 /* Assign the prefix value to operand 1. */
2270 inst_env
->reg
[cris_get_operand1 (inst
)] = inst_env
->prefix_value
;
2274 /* Handles the 2-operand BOUND instruction. */
2277 two_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2279 /* It's invalid to have the PC as the index operand. */
2280 if (cris_get_operand2 (inst
) == REG_PC
)
2282 inst_env
->invalid
= 1;
2285 /* Check if we have a prefix. */
2286 if (inst_env
->prefix_found
)
2288 check_assign (inst
, inst_env
);
2290 /* Check if this is an autoincrement mode. */
2291 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2293 /* It's invalid to change the PC in a delay slot. */
2294 if (inst_env
->slot_needed
)
2296 inst_env
->invalid
= 1;
2299 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2301 inst_env
->slot_needed
= 0;
2302 inst_env
->prefix_found
= 0;
2303 inst_env
->xflag_found
= 0;
2304 inst_env
->disable_interrupt
= 0;
2307 /* Handles the 3-operand BOUND instruction. */
2310 three_operand_bound_op (unsigned short inst
, inst_env_type
*inst_env
)
2312 /* It's an error if we haven't got a prefix. And it's also an error
2313 if the PC is the destination register. */
2314 if ((!inst_env
->prefix_found
) || (cris_get_operand1 (inst
) == REG_PC
))
2316 inst_env
->invalid
= 1;
2319 inst_env
->slot_needed
= 0;
2320 inst_env
->prefix_found
= 0;
2321 inst_env
->xflag_found
= 0;
2322 inst_env
->disable_interrupt
= 0;
2325 /* Clears the status flags in inst_env. */
2328 btst_nop_op (unsigned short inst
, inst_env_type
*inst_env
)
2330 /* It's an error if we have got a prefix. */
2331 if (inst_env
->prefix_found
)
2333 inst_env
->invalid
= 1;
2337 inst_env
->slot_needed
= 0;
2338 inst_env
->prefix_found
= 0;
2339 inst_env
->xflag_found
= 0;
2340 inst_env
->disable_interrupt
= 0;
2343 /* Clears the status flags in inst_env. */
2346 clearf_di_op (unsigned short inst
, inst_env_type
*inst_env
)
2348 /* It's an error if we have got a prefix. */
2349 if (inst_env
->prefix_found
)
2351 inst_env
->invalid
= 1;
2355 inst_env
->slot_needed
= 0;
2356 inst_env
->prefix_found
= 0;
2357 inst_env
->xflag_found
= 0;
2358 inst_env
->disable_interrupt
= 1;
2361 /* Handles the CLEAR instruction if it's in register mode. */
2364 reg_mode_clear_op (unsigned short inst
, inst_env_type
*inst_env
)
2366 /* Check if the target is the PC. */
2367 if (cris_get_operand2 (inst
) == REG_PC
)
2369 /* The instruction will clear the instruction's size bits. */
2370 int clear_size
= cris_get_clear_size (inst
);
2371 if (clear_size
== INST_BYTE_SIZE
)
2373 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFFFF00;
2375 if (clear_size
== INST_WORD_SIZE
)
2377 inst_env
->delay_slot_pc
= inst_env
->reg
[REG_PC
] & 0xFFFF0000;
2379 if (clear_size
== INST_DWORD_SIZE
)
2381 inst_env
->delay_slot_pc
= 0x0;
2383 /* The jump will be delayed with one delay slot. So we need a delay
2385 inst_env
->slot_needed
= 1;
2386 inst_env
->delay_slot_pc_active
= 1;
2390 /* The PC will not change => no delay slot. */
2391 inst_env
->slot_needed
= 0;
2393 inst_env
->prefix_found
= 0;
2394 inst_env
->xflag_found
= 0;
2395 inst_env
->disable_interrupt
= 0;
2398 /* Handles the TEST instruction if it's in register mode. */
2401 reg_mode_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2403 /* It's an error if we have got a prefix. */
2404 if (inst_env
->prefix_found
)
2406 inst_env
->invalid
= 1;
2409 inst_env
->slot_needed
= 0;
2410 inst_env
->prefix_found
= 0;
2411 inst_env
->xflag_found
= 0;
2412 inst_env
->disable_interrupt
= 0;
2416 /* Handles the CLEAR and TEST instruction if the instruction isn't
2417 in register mode. */
2420 none_reg_mode_clear_test_op (unsigned short inst
, inst_env_type
*inst_env
)
2422 /* Check if we are in a prefix mode. */
2423 if (inst_env
->prefix_found
)
2425 /* The only way the PC can change is if this instruction is in
2426 assign addressing mode. */
2427 check_assign (inst
, inst_env
);
2429 /* Indirect mode can't change the PC so just check if the mode is
2431 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2433 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2435 inst_env
->slot_needed
= 0;
2436 inst_env
->prefix_found
= 0;
2437 inst_env
->xflag_found
= 0;
2438 inst_env
->disable_interrupt
= 0;
2441 /* Checks that the PC isn't the destination register or the instructions has
2445 dstep_logshift_mstep_neg_not_op (unsigned short inst
, inst_env_type
*inst_env
)
2447 /* It's invalid to have the PC as the destination. The instruction can't
2449 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2451 inst_env
->invalid
= 1;
2455 inst_env
->slot_needed
= 0;
2456 inst_env
->prefix_found
= 0;
2457 inst_env
->xflag_found
= 0;
2458 inst_env
->disable_interrupt
= 0;
2461 /* Checks that the instruction doesn't have a prefix. */
2464 break_op (unsigned short inst
, inst_env_type
*inst_env
)
2466 /* The instruction can't have a prefix. */
2467 if (inst_env
->prefix_found
)
2469 inst_env
->invalid
= 1;
2473 inst_env
->slot_needed
= 0;
2474 inst_env
->prefix_found
= 0;
2475 inst_env
->xflag_found
= 0;
2476 inst_env
->disable_interrupt
= 1;
2479 /* Checks that the PC isn't the destination register and that the instruction
2480 doesn't have a prefix. */
2483 scc_op (unsigned short inst
, inst_env_type
*inst_env
)
2485 /* It's invalid to have the PC as the destination. The instruction can't
2487 if ((cris_get_operand2 (inst
) == REG_PC
) || inst_env
->prefix_found
)
2489 inst_env
->invalid
= 1;
2493 inst_env
->slot_needed
= 0;
2494 inst_env
->prefix_found
= 0;
2495 inst_env
->xflag_found
= 0;
2496 inst_env
->disable_interrupt
= 1;
2499 /* Handles the register mode JUMP instruction. */
2502 reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2504 /* It's invalid to do a JUMP in a delay slot. The mode is register, so
2505 you can't have a prefix. */
2506 if ((inst_env
->slot_needed
) || (inst_env
->prefix_found
))
2508 inst_env
->invalid
= 1;
2512 /* Just change the PC. */
2513 inst_env
->reg
[REG_PC
] = inst_env
->reg
[cris_get_operand1 (inst
)];
2514 inst_env
->slot_needed
= 0;
2515 inst_env
->prefix_found
= 0;
2516 inst_env
->xflag_found
= 0;
2517 inst_env
->disable_interrupt
= 1;
2520 /* Handles the JUMP instruction for all modes except register. */
2522 void none_reg_mode_jump_op (unsigned short inst
, inst_env_type
*inst_env
)
2524 unsigned long newpc
;
2527 /* It's invalid to do a JUMP in a delay slot. */
2528 if (inst_env
->slot_needed
)
2530 inst_env
->invalid
= 1;
2534 /* Check if we have a prefix. */
2535 if (inst_env
->prefix_found
)
2537 check_assign (inst
, inst_env
);
2539 /* Get the new value for the the PC. */
2541 read_memory_unsigned_integer ((CORE_ADDR
) inst_env
->prefix_value
,
2546 /* Get the new value for the PC. */
2547 address
= (CORE_ADDR
) inst_env
->reg
[cris_get_operand1 (inst
)];
2548 newpc
= read_memory_unsigned_integer (address
, 4);
2550 /* Check if we should increment a register. */
2551 if (cris_get_mode (inst
) == AUTOINC_MODE
)
2553 inst_env
->reg
[cris_get_operand1 (inst
)] += 4;
2556 inst_env
->reg
[REG_PC
] = newpc
;
2558 inst_env
->slot_needed
= 0;
2559 inst_env
->prefix_found
= 0;
2560 inst_env
->xflag_found
= 0;
2561 inst_env
->disable_interrupt
= 1;
2564 /* Handles moves to special registers (aka P-register) for all modes. */
2567 move_to_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2569 if (inst_env
->prefix_found
)
2571 /* The instruction has a prefix that means we are only interested if
2572 the instruction is in assign mode. */
2573 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2575 /* The prefix handles the problem if we are in a delay slot. */
2576 if (cris_get_operand1 (inst
) == REG_PC
)
2578 /* Just take care of the assign. */
2579 check_assign (inst
, inst_env
);
2583 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2585 /* The instruction doesn't have a prefix, the only case left that we
2586 are interested in is the autoincrement mode. */
2587 if (cris_get_operand1 (inst
) == REG_PC
)
2589 /* If the PC is to be incremented it's invalid to be in a
2591 if (inst_env
->slot_needed
)
2593 inst_env
->invalid
= 1;
2597 /* The increment depends on the size of the special register. */
2598 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2600 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2602 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2604 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2608 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2612 inst_env
->slot_needed
= 0;
2613 inst_env
->prefix_found
= 0;
2614 inst_env
->xflag_found
= 0;
2615 inst_env
->disable_interrupt
= 1;
2618 /* Handles moves from special registers (aka P-register) for all modes
2622 none_reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2624 if (inst_env
->prefix_found
)
2626 /* The instruction has a prefix that means we are only interested if
2627 the instruction is in assign mode. */
2628 if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
2630 /* The prefix handles the problem if we are in a delay slot. */
2631 if (cris_get_operand1 (inst
) == REG_PC
)
2633 /* Just take care of the assign. */
2634 check_assign (inst
, inst_env
);
2638 /* The instruction doesn't have a prefix, the only case left that we
2639 are interested in is the autoincrement mode. */
2640 else if (cris_get_mode (inst
) == AUTOINC_MODE
)
2642 if (cris_get_operand1 (inst
) == REG_PC
)
2644 /* If the PC is to be incremented it's invalid to be in a
2646 if (inst_env
->slot_needed
)
2648 inst_env
->invalid
= 1;
2652 /* The increment depends on the size of the special register. */
2653 if (cris_register_size (cris_get_operand2 (inst
)) == 1)
2655 process_autoincrement (INST_BYTE_SIZE
, inst
, inst_env
);
2657 else if (cris_register_size (cris_get_operand2 (inst
)) == 2)
2659 process_autoincrement (INST_WORD_SIZE
, inst
, inst_env
);
2663 process_autoincrement (INST_DWORD_SIZE
, inst
, inst_env
);
2667 inst_env
->slot_needed
= 0;
2668 inst_env
->prefix_found
= 0;
2669 inst_env
->xflag_found
= 0;
2670 inst_env
->disable_interrupt
= 1;
2673 /* Handles moves from special registers (aka P-register) when the mode
2677 reg_mode_move_from_preg_op (unsigned short inst
, inst_env_type
*inst_env
)
2679 /* Register mode move from special register can't have a prefix. */
2680 if (inst_env
->prefix_found
)
2682 inst_env
->invalid
= 1;
2686 if (cris_get_operand1 (inst
) == REG_PC
)
2688 /* It's invalid to change the PC in a delay slot. */
2689 if (inst_env
->slot_needed
)
2691 inst_env
->invalid
= 1;
2694 /* The destination is the PC, the jump will have a delay slot. */
2695 inst_env
->delay_slot_pc
= inst_env
->preg
[cris_get_operand2 (inst
)];
2696 inst_env
->slot_needed
= 1;
2697 inst_env
->delay_slot_pc_active
= 1;
2701 /* If the destination isn't PC, there will be no jump. */
2702 inst_env
->slot_needed
= 0;
2704 inst_env
->prefix_found
= 0;
2705 inst_env
->xflag_found
= 0;
2706 inst_env
->disable_interrupt
= 1;
2709 /* Handles the MOVEM from memory to general register instruction. */
2712 move_mem_to_reg_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2714 if (inst_env
->prefix_found
)
2716 /* The prefix handles the problem if we are in a delay slot. Is the
2717 MOVEM instruction going to change the PC? */
2718 if (cris_get_operand2 (inst
) >= REG_PC
)
2720 inst_env
->reg
[REG_PC
] =
2721 read_memory_unsigned_integer (inst_env
->prefix_value
, 4);
2723 /* The assign value is the value after the increment. Normally, the
2724 assign value is the value before the increment. */
2725 if ((cris_get_operand1 (inst
) == REG_PC
)
2726 && (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2728 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2729 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2734 /* Is the MOVEM instruction going to change the PC? */
2735 if (cris_get_operand2 (inst
) == REG_PC
)
2737 /* It's invalid to change the PC in a delay slot. */
2738 if (inst_env
->slot_needed
)
2740 inst_env
->invalid
= 1;
2743 inst_env
->reg
[REG_PC
] =
2744 read_memory_unsigned_integer (inst_env
->reg
[cris_get_operand1 (inst
)],
2747 /* The increment is not depending on the size, instead it's depending
2748 on the number of registers loaded from memory. */
2749 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2751 /* It's invalid to change the PC in a delay slot. */
2752 if (inst_env
->slot_needed
)
2754 inst_env
->invalid
= 1;
2757 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2760 inst_env
->slot_needed
= 0;
2761 inst_env
->prefix_found
= 0;
2762 inst_env
->xflag_found
= 0;
2763 inst_env
->disable_interrupt
= 0;
2766 /* Handles the MOVEM to memory from general register instruction. */
2769 move_reg_to_mem_movem_op (unsigned short inst
, inst_env_type
*inst_env
)
2771 if (inst_env
->prefix_found
)
2773 /* The assign value is the value after the increment. Normally, the
2774 assign value is the value before the increment. */
2775 if ((cris_get_operand1 (inst
) == REG_PC
) &&
2776 (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
))
2778 /* The prefix handles the problem if we are in a delay slot. */
2779 inst_env
->reg
[REG_PC
] = inst_env
->prefix_value
;
2780 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2785 /* The increment is not depending on the size, instead it's depending
2786 on the number of registers loaded to memory. */
2787 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
2789 /* It's invalid to change the PC in a delay slot. */
2790 if (inst_env
->slot_needed
)
2792 inst_env
->invalid
= 1;
2795 inst_env
->reg
[REG_PC
] += 4 * (cris_get_operand2 (inst
) + 1);
2798 inst_env
->slot_needed
= 0;
2799 inst_env
->prefix_found
= 0;
2800 inst_env
->xflag_found
= 0;
2801 inst_env
->disable_interrupt
= 0;
2804 /* Handles the pop instruction to a general register.
2805 POP is a assembler macro for MOVE.D [SP+], Rd. */
2808 reg_pop_op (unsigned short inst
, inst_env_type
*inst_env
)
2810 /* POP can't have a prefix. */
2811 if (inst_env
->prefix_found
)
2813 inst_env
->invalid
= 1;
2816 if (cris_get_operand2 (inst
) == REG_PC
)
2818 /* It's invalid to change the PC in a delay slot. */
2819 if (inst_env
->slot_needed
)
2821 inst_env
->invalid
= 1;
2824 inst_env
->reg
[REG_PC
] =
2825 read_memory_unsigned_integer (inst_env
->reg
[REG_SP
], 4);
2827 inst_env
->slot_needed
= 0;
2828 inst_env
->prefix_found
= 0;
2829 inst_env
->xflag_found
= 0;
2830 inst_env
->disable_interrupt
= 0;
2833 /* Handles moves from register to memory. */
2836 move_reg_to_mem_index_inc_op (unsigned short inst
, inst_env_type
*inst_env
)
2838 /* Check if we have a prefix. */
2839 if (inst_env
->prefix_found
)
2841 /* The only thing that can change the PC is an assign. */
2842 check_assign (inst
, inst_env
);
2844 else if ((cris_get_operand1 (inst
) == REG_PC
)
2845 && (cris_get_mode (inst
) == AUTOINC_MODE
))
2847 /* It's invalid to change the PC in a delay slot. */
2848 if (inst_env
->slot_needed
)
2850 inst_env
->invalid
= 1;
2853 process_autoincrement (cris_get_size (inst
), inst
, inst_env
);
2855 inst_env
->slot_needed
= 0;
2856 inst_env
->prefix_found
= 0;
2857 inst_env
->xflag_found
= 0;
2858 inst_env
->disable_interrupt
= 0;
2861 /* Handles the intructions that's not yet implemented, by setting
2862 inst_env->invalid to true. */
2865 not_implemented_op (unsigned short inst
, inst_env_type
*inst_env
)
2867 inst_env
->invalid
= 1;
2870 /* Handles the XOR instruction. */
2873 xor_op (unsigned short inst
, inst_env_type
*inst_env
)
2875 /* XOR can't have a prefix. */
2876 if (inst_env
->prefix_found
)
2878 inst_env
->invalid
= 1;
2882 /* Check if the PC is the target. */
2883 if (cris_get_operand2 (inst
) == REG_PC
)
2885 /* It's invalid to change the PC in a delay slot. */
2886 if (inst_env
->slot_needed
)
2888 inst_env
->invalid
= 1;
2891 inst_env
->reg
[REG_PC
] ^= inst_env
->reg
[cris_get_operand1 (inst
)];
2893 inst_env
->slot_needed
= 0;
2894 inst_env
->prefix_found
= 0;
2895 inst_env
->xflag_found
= 0;
2896 inst_env
->disable_interrupt
= 0;
2899 /* Handles the MULS instruction. */
2902 muls_op (unsigned short inst
, inst_env_type
*inst_env
)
2904 /* MULS/U can't have a prefix. */
2905 if (inst_env
->prefix_found
)
2907 inst_env
->invalid
= 1;
2911 /* Consider it invalid if the PC is the target. */
2912 if (cris_get_operand2 (inst
) == REG_PC
)
2914 inst_env
->invalid
= 1;
2917 inst_env
->slot_needed
= 0;
2918 inst_env
->prefix_found
= 0;
2919 inst_env
->xflag_found
= 0;
2920 inst_env
->disable_interrupt
= 0;
2923 /* Handles the MULU instruction. */
2926 mulu_op (unsigned short inst
, inst_env_type
*inst_env
)
2928 /* MULS/U can't have a prefix. */
2929 if (inst_env
->prefix_found
)
2931 inst_env
->invalid
= 1;
2935 /* Consider it invalid if the PC is the target. */
2936 if (cris_get_operand2 (inst
) == REG_PC
)
2938 inst_env
->invalid
= 1;
2941 inst_env
->slot_needed
= 0;
2942 inst_env
->prefix_found
= 0;
2943 inst_env
->xflag_found
= 0;
2944 inst_env
->disable_interrupt
= 0;
2947 /* Calculate the result of the instruction for ADD, SUB, CMP AND, OR and MOVE.
2948 The MOVE instruction is the move from source to register. */
2951 add_sub_cmp_and_or_move_action (unsigned short inst
, inst_env_type
*inst_env
,
2952 unsigned long source1
, unsigned long source2
)
2954 unsigned long pc_mask
;
2955 unsigned long operation_mask
;
2957 /* Find out how many bits the operation should apply to. */
2958 if (cris_get_size (inst
) == INST_BYTE_SIZE
)
2960 pc_mask
= 0xFFFFFF00;
2961 operation_mask
= 0xFF;
2963 else if (cris_get_size (inst
) == INST_WORD_SIZE
)
2965 pc_mask
= 0xFFFF0000;
2966 operation_mask
= 0xFFFF;
2968 else if (cris_get_size (inst
) == INST_DWORD_SIZE
)
2971 operation_mask
= 0xFFFFFFFF;
2975 /* The size is out of range. */
2976 inst_env
->invalid
= 1;
2980 /* The instruction just works on uw_operation_mask bits. */
2981 source2
&= operation_mask
;
2982 source1
&= operation_mask
;
2984 /* Now calculate the result. The opcode's 3 first bits separates
2985 the different actions. */
2986 switch (cris_get_opcode (inst
) & 7)
2996 case 2: /* subtract */
3000 case 3: /* compare */
3012 inst_env
->invalid
= 1;
3018 /* Make sure that the result doesn't contain more than the instruction
3020 source2
&= operation_mask
;
3022 /* Calculate the new breakpoint address. */
3023 inst_env
->reg
[REG_PC
] &= pc_mask
;
3024 inst_env
->reg
[REG_PC
] |= source1
;
3028 /* Extends the value from either byte or word size to a dword. If the mode
3029 is zero extend then the value is extended with zero. If instead the mode
3030 is signed extend the sign bit of the value is taken into consideration. */
3033 do_sign_or_zero_extend (unsigned long value
, unsigned short *inst
)
3035 /* The size can be either byte or word, check which one it is.
3036 Don't check the highest bit, it's indicating if it's a zero
3038 if (cris_get_size (*inst
) & INST_WORD_SIZE
)
3043 /* Check if the instruction is signed extend. If so, check if value has
3045 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_WORD_MASK
))
3047 value
|= SIGNED_WORD_EXTEND_MASK
;
3055 /* Check if the instruction is signed extend. If so, check if value has
3057 if (cris_is_signed_extend_bit_on (*inst
) && (value
& SIGNED_BYTE_MASK
))
3059 value
|= SIGNED_BYTE_EXTEND_MASK
;
3062 /* The size should now be dword. */
3063 cris_set_size_to_dword (inst
);
3067 /* Handles the register mode for the ADD, SUB, CMP, AND, OR and MOVE
3068 instruction. The MOVE instruction is the move from source to register. */
3071 reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3072 inst_env_type
*inst_env
)
3074 unsigned long operand1
;
3075 unsigned long operand2
;
3077 /* It's invalid to have a prefix to the instruction. This is a register
3078 mode instruction and can't have a prefix. */
3079 if (inst_env
->prefix_found
)
3081 inst_env
->invalid
= 1;
3084 /* Check if the instruction has PC as its target. */
3085 if (cris_get_operand2 (inst
) == REG_PC
)
3087 if (inst_env
->slot_needed
)
3089 inst_env
->invalid
= 1;
3092 /* The instruction has the PC as its target register. */
3093 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3094 operand2
= inst_env
->reg
[REG_PC
];
3096 /* Check if it's a extend, signed or zero instruction. */
3097 if (cris_get_opcode (inst
) < 4)
3099 operand1
= do_sign_or_zero_extend (operand1
, &inst
);
3101 /* Calculate the PC value after the instruction, i.e. where the
3102 breakpoint should be. The order of the udw_operands is vital. */
3103 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3105 inst_env
->slot_needed
= 0;
3106 inst_env
->prefix_found
= 0;
3107 inst_env
->xflag_found
= 0;
3108 inst_env
->disable_interrupt
= 0;
3111 /* Returns the data contained at address. The size of the data is derived from
3112 the size of the operation. If the instruction is a zero or signed
3113 extend instruction, the size field is changed in instruction. */
3116 get_data_from_address (unsigned short *inst
, CORE_ADDR address
)
3118 int size
= cris_get_size (*inst
);
3119 unsigned long value
;
3121 /* If it's an extend instruction we don't want the signed extend bit,
3122 because it influences the size. */
3123 if (cris_get_opcode (*inst
) < 4)
3125 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3127 /* Is there a need for checking the size? Size should contain the number of
3130 value
= read_memory_unsigned_integer (address
, size
);
3132 /* Check if it's an extend, signed or zero instruction. */
3133 if (cris_get_opcode (*inst
) < 4)
3135 value
= do_sign_or_zero_extend (value
, inst
);
3140 /* Handles the assign addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3141 instructions. The MOVE instruction is the move from source to register. */
3144 handle_prefix_assign_mode_for_aritm_op (unsigned short inst
,
3145 inst_env_type
*inst_env
)
3147 unsigned long operand2
;
3148 unsigned long operand3
;
3150 check_assign (inst
, inst_env
);
3151 if (cris_get_operand2 (inst
) == REG_PC
)
3153 operand2
= inst_env
->reg
[REG_PC
];
3155 /* Get the value of the third operand. */
3156 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3158 /* Calculate the PC value after the instruction, i.e. where the
3159 breakpoint should be. The order of the udw_operands is vital. */
3160 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3162 inst_env
->slot_needed
= 0;
3163 inst_env
->prefix_found
= 0;
3164 inst_env
->xflag_found
= 0;
3165 inst_env
->disable_interrupt
= 0;
3168 /* Handles the three-operand addressing mode for the ADD, SUB, CMP, AND and
3169 OR instructions. Note that for this to work as expected, the calling
3170 function must have made sure that there is a prefix to this instruction. */
3173 three_operand_add_sub_cmp_and_or_op (unsigned short inst
,
3174 inst_env_type
*inst_env
)
3176 unsigned long operand2
;
3177 unsigned long operand3
;
3179 if (cris_get_operand1 (inst
) == REG_PC
)
3181 /* The PC will be changed by the instruction. */
3182 operand2
= inst_env
->reg
[cris_get_operand2 (inst
)];
3184 /* Get the value of the third operand. */
3185 operand3
= get_data_from_address (&inst
, inst_env
->prefix_value
);
3187 /* Calculate the PC value after the instruction, i.e. where the
3188 breakpoint should be. */
3189 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3191 inst_env
->slot_needed
= 0;
3192 inst_env
->prefix_found
= 0;
3193 inst_env
->xflag_found
= 0;
3194 inst_env
->disable_interrupt
= 0;
3197 /* Handles the index addresing mode for the ADD, SUB, CMP, AND, OR and MOVE
3198 instructions. The MOVE instruction is the move from source to register. */
3201 handle_prefix_index_mode_for_aritm_op (unsigned short inst
,
3202 inst_env_type
*inst_env
)
3204 if (cris_get_operand1 (inst
) != cris_get_operand2 (inst
))
3206 /* If the instruction is MOVE it's invalid. If the instruction is ADD,
3207 SUB, AND or OR something weird is going on (if everything works these
3208 instructions should end up in the three operand version). */
3209 inst_env
->invalid
= 1;
3214 /* three_operand_add_sub_cmp_and_or does the same as we should do here
3216 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3218 inst_env
->slot_needed
= 0;
3219 inst_env
->prefix_found
= 0;
3220 inst_env
->xflag_found
= 0;
3221 inst_env
->disable_interrupt
= 0;
3224 /* Handles the autoincrement and indirect addresing mode for the ADD, SUB,
3225 CMP, AND OR and MOVE instruction. The MOVE instruction is the move from
3226 source to register. */
3229 handle_inc_and_index_mode_for_aritm_op (unsigned short inst
,
3230 inst_env_type
*inst_env
)
3232 unsigned long operand1
;
3233 unsigned long operand2
;
3234 unsigned long operand3
;
3237 /* The instruction is either an indirect or autoincrement addressing mode.
3238 Check if the destination register is the PC. */
3239 if (cris_get_operand2 (inst
) == REG_PC
)
3241 /* Must be done here, get_data_from_address may change the size
3243 size
= cris_get_size (inst
);
3244 operand2
= inst_env
->reg
[REG_PC
];
3246 /* Get the value of the third operand, i.e. the indirect operand. */
3247 operand1
= inst_env
->reg
[cris_get_operand1 (inst
)];
3248 operand3
= get_data_from_address (&inst
, operand1
);
3250 /* Calculate the PC value after the instruction, i.e. where the
3251 breakpoint should be. The order of the udw_operands is vital. */
3252 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand3
);
3254 /* If this is an autoincrement addressing mode, check if the increment
3256 if ((cris_get_operand1 (inst
) == REG_PC
) && (cris_get_mode (inst
) == AUTOINC_MODE
))
3258 /* Get the size field. */
3259 size
= cris_get_size (inst
);
3261 /* If it's an extend instruction we don't want the signed extend bit,
3262 because it influences the size. */
3263 if (cris_get_opcode (inst
) < 4)
3265 size
&= ~SIGNED_EXTEND_BIT_MASK
;
3267 process_autoincrement (size
, inst
, inst_env
);
3269 inst_env
->slot_needed
= 0;
3270 inst_env
->prefix_found
= 0;
3271 inst_env
->xflag_found
= 0;
3272 inst_env
->disable_interrupt
= 0;
3275 /* Handles the two-operand addressing mode, all modes except register, for
3276 the ADD, SUB CMP, AND and OR instruction. */
3279 none_reg_mode_add_sub_cmp_and_or_move_op (unsigned short inst
,
3280 inst_env_type
*inst_env
)
3282 if (inst_env
->prefix_found
)
3284 if (cris_get_mode (inst
) == PREFIX_INDEX_MODE
)
3286 handle_prefix_index_mode_for_aritm_op (inst
, inst_env
);
3288 else if (cris_get_mode (inst
) == PREFIX_ASSIGN_MODE
)
3290 handle_prefix_assign_mode_for_aritm_op (inst
, inst_env
);
3294 /* The mode is invalid for a prefixed base instruction. */
3295 inst_env
->invalid
= 1;
3301 handle_inc_and_index_mode_for_aritm_op (inst
, inst_env
);
3305 /* Handles the quick addressing mode for the ADD and SUB instruction. */
3308 quick_mode_add_sub_op (unsigned short inst
, inst_env_type
*inst_env
)
3310 unsigned long operand1
;
3311 unsigned long operand2
;
3313 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3314 instruction and can't have a prefix. */
3315 if (inst_env
->prefix_found
)
3317 inst_env
->invalid
= 1;
3321 /* Check if the instruction has PC as its target. */
3322 if (cris_get_operand2 (inst
) == REG_PC
)
3324 if (inst_env
->slot_needed
)
3326 inst_env
->invalid
= 1;
3329 operand1
= cris_get_quick_value (inst
);
3330 operand2
= inst_env
->reg
[REG_PC
];
3332 /* The size should now be dword. */
3333 cris_set_size_to_dword (&inst
);
3335 /* Calculate the PC value after the instruction, i.e. where the
3336 breakpoint should be. */
3337 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3339 inst_env
->slot_needed
= 0;
3340 inst_env
->prefix_found
= 0;
3341 inst_env
->xflag_found
= 0;
3342 inst_env
->disable_interrupt
= 0;
3345 /* Handles the quick addressing mode for the CMP, AND and OR instruction. */
3348 quick_mode_and_cmp_move_or_op (unsigned short inst
, inst_env_type
*inst_env
)
3350 unsigned long operand1
;
3351 unsigned long operand2
;
3353 /* It's a bad idea to be in a prefix instruction now. This is a quick mode
3354 instruction and can't have a prefix. */
3355 if (inst_env
->prefix_found
)
3357 inst_env
->invalid
= 1;
3360 /* Check if the instruction has PC as its target. */
3361 if (cris_get_operand2 (inst
) == REG_PC
)
3363 if (inst_env
->slot_needed
)
3365 inst_env
->invalid
= 1;
3368 /* The instruction has the PC as its target register. */
3369 operand1
= cris_get_quick_value (inst
);
3370 operand2
= inst_env
->reg
[REG_PC
];
3372 /* The quick value is signed, so check if we must do a signed extend. */
3373 if (operand1
& SIGNED_QUICK_VALUE_MASK
)
3376 operand1
|= SIGNED_QUICK_VALUE_EXTEND_MASK
;
3378 /* The size should now be dword. */
3379 cris_set_size_to_dword (&inst
);
3381 /* Calculate the PC value after the instruction, i.e. where the
3382 breakpoint should be. */
3383 add_sub_cmp_and_or_move_action (inst
, inst_env
, operand2
, operand1
);
3385 inst_env
->slot_needed
= 0;
3386 inst_env
->prefix_found
= 0;
3387 inst_env
->xflag_found
= 0;
3388 inst_env
->disable_interrupt
= 0;
3391 /* Translate op_type to a function and call it. */
3393 static void cris_gdb_func (enum cris_op_type op_type
, unsigned short inst
,
3394 inst_env_type
*inst_env
)
3398 case cris_not_implemented_op
:
3399 not_implemented_op (inst
, inst_env
);
3403 abs_op (inst
, inst_env
);
3407 addi_op (inst
, inst_env
);
3411 asr_op (inst
, inst_env
);
3415 asrq_op (inst
, inst_env
);
3418 case cris_ax_ei_setf_op
:
3419 ax_ei_setf_op (inst
, inst_env
);
3422 case cris_bdap_prefix
:
3423 bdap_prefix (inst
, inst_env
);
3426 case cris_biap_prefix
:
3427 biap_prefix (inst
, inst_env
);
3431 break_op (inst
, inst_env
);
3434 case cris_btst_nop_op
:
3435 btst_nop_op (inst
, inst_env
);
3438 case cris_clearf_di_op
:
3439 clearf_di_op (inst
, inst_env
);
3442 case cris_dip_prefix
:
3443 dip_prefix (inst
, inst_env
);
3446 case cris_dstep_logshift_mstep_neg_not_op
:
3447 dstep_logshift_mstep_neg_not_op (inst
, inst_env
);
3450 case cris_eight_bit_offset_branch_op
:
3451 eight_bit_offset_branch_op (inst
, inst_env
);
3454 case cris_move_mem_to_reg_movem_op
:
3455 move_mem_to_reg_movem_op (inst
, inst_env
);
3458 case cris_move_reg_to_mem_movem_op
:
3459 move_reg_to_mem_movem_op (inst
, inst_env
);
3462 case cris_move_to_preg_op
:
3463 move_to_preg_op (inst
, inst_env
);
3467 muls_op (inst
, inst_env
);
3471 mulu_op (inst
, inst_env
);
3474 case cris_none_reg_mode_add_sub_cmp_and_or_move_op
:
3475 none_reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3478 case cris_none_reg_mode_clear_test_op
:
3479 none_reg_mode_clear_test_op (inst
, inst_env
);
3482 case cris_none_reg_mode_jump_op
:
3483 none_reg_mode_jump_op (inst
, inst_env
);
3486 case cris_none_reg_mode_move_from_preg_op
:
3487 none_reg_mode_move_from_preg_op (inst
, inst_env
);
3490 case cris_quick_mode_add_sub_op
:
3491 quick_mode_add_sub_op (inst
, inst_env
);
3494 case cris_quick_mode_and_cmp_move_or_op
:
3495 quick_mode_and_cmp_move_or_op (inst
, inst_env
);
3498 case cris_quick_mode_bdap_prefix
:
3499 quick_mode_bdap_prefix (inst
, inst_env
);
3502 case cris_reg_mode_add_sub_cmp_and_or_move_op
:
3503 reg_mode_add_sub_cmp_and_or_move_op (inst
, inst_env
);
3506 case cris_reg_mode_clear_op
:
3507 reg_mode_clear_op (inst
, inst_env
);
3510 case cris_reg_mode_jump_op
:
3511 reg_mode_jump_op (inst
, inst_env
);
3514 case cris_reg_mode_move_from_preg_op
:
3515 reg_mode_move_from_preg_op (inst
, inst_env
);
3518 case cris_reg_mode_test_op
:
3519 reg_mode_test_op (inst
, inst_env
);
3523 scc_op (inst
, inst_env
);
3526 case cris_sixteen_bit_offset_branch_op
:
3527 sixteen_bit_offset_branch_op (inst
, inst_env
);
3530 case cris_three_operand_add_sub_cmp_and_or_op
:
3531 three_operand_add_sub_cmp_and_or_op (inst
, inst_env
);
3534 case cris_three_operand_bound_op
:
3535 three_operand_bound_op (inst
, inst_env
);
3538 case cris_two_operand_bound_op
:
3539 two_operand_bound_op (inst
, inst_env
);
3543 xor_op (inst
, inst_env
);
3548 /* This wrapper is to avoid cris_get_assembler being called before
3549 exec_bfd has been set. */
3552 cris_delayed_get_disassembler (bfd_vma addr
, disassemble_info
*info
)
3554 tm_print_insn
= cris_get_disassembler (exec_bfd
);
3555 return TARGET_PRINT_INSN (addr
, info
);
3559 _initialize_cris_tdep (void)
3561 struct cmd_list_element
*c
;
3563 gdbarch_register (bfd_arch_cris
, cris_gdbarch_init
, cris_dump_tdep
);
3565 /* Used in disassembly. */
3566 tm_print_insn
= cris_delayed_get_disassembler
;
3568 /* CRIS-specific user-commands. */
3569 c
= add_set_cmd ("cris-version", class_support
, var_integer
,
3570 (char *) &usr_cmd_cris_version
,
3571 "Set the current CRIS version.", &setlist
);
3572 c
->function
.sfunc
= cris_version_update
;
3573 add_show_from_set (c
, &showlist
);
3575 c
= add_set_enum_cmd ("cris-mode", class_support
, cris_mode_enums
,
3577 "Set the current CRIS mode.", &setlist
);
3578 c
->function
.sfunc
= cris_mode_update
;
3579 add_show_from_set (c
, &showlist
);
3581 c
= add_set_enum_cmd ("cris-abi", class_support
, cris_abi_enums
,
3583 "Set the current CRIS ABI version.", &setlist
);
3584 c
->function
.sfunc
= cris_abi_update
;
3585 add_show_from_set (c
, &showlist
);
3588 /* Prints out all target specific values. */
3591 cris_dump_tdep (struct gdbarch
*gdbarch
, struct ui_file
*file
)
3593 struct gdbarch_tdep
*tdep
= gdbarch_tdep (current_gdbarch
);
3596 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_version = %i\n",
3597 tdep
->cris_version
);
3598 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_mode = %s\n",
3600 fprintf_unfiltered (file
, "cris_dump_tdep: tdep->cris_abi = %s\n",
3607 cris_version_update (char *ignore_args
, int from_tty
,
3608 struct cmd_list_element
*c
)
3610 struct gdbarch_info info
;
3612 /* From here on, trust the user's CRIS version setting. */
3613 if (c
->type
== set_cmd
)
3615 usr_cmd_cris_version_valid
= 1;
3617 /* Update the current architecture, if needed. */
3618 gdbarch_info_init (&info
);
3619 if (!gdbarch_update_p (info
))
3620 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3625 cris_mode_update (char *ignore_args
, int from_tty
,
3626 struct cmd_list_element
*c
)
3628 struct gdbarch_info info
;
3630 /* From here on, trust the user's CRIS mode setting. */
3631 if (c
->type
== set_cmd
)
3633 usr_cmd_cris_mode_valid
= 1;
3635 /* Update the current architecture, if needed. */
3636 gdbarch_info_init (&info
);
3637 if (!gdbarch_update_p (info
))
3638 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3643 cris_abi_update (char *ignore_args
, int from_tty
,
3644 struct cmd_list_element
*c
)
3646 struct gdbarch_info info
;
3648 /* From here on, trust the user's CRIS ABI setting. */
3649 if (c
->type
== set_cmd
)
3651 usr_cmd_cris_abi_valid
= 1;
3653 /* Update the current architecture, if needed. */
3654 gdbarch_info_init (&info
);
3655 if (!gdbarch_update_p (info
))
3656 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_update: failed to update architecture.");
3660 /* Copied from pa64solib.c, with a couple of minor changes. */
3663 bfd_lookup_symbol (bfd
*abfd
, const char *symname
)
3665 unsigned int storage_needed
;
3667 asymbol
**symbol_table
;
3668 unsigned int number_of_symbols
;
3670 struct cleanup
*back_to
;
3671 CORE_ADDR symaddr
= 0;
3673 storage_needed
= bfd_get_symtab_upper_bound (abfd
);
3675 if (storage_needed
> 0)
3677 symbol_table
= (asymbol
**) xmalloc (storage_needed
);
3678 back_to
= make_cleanup (free
, (PTR
) symbol_table
);
3679 number_of_symbols
= bfd_canonicalize_symtab (abfd
, symbol_table
);
3681 for (i
= 0; i
< number_of_symbols
; i
++)
3683 sym
= *symbol_table
++;
3684 if (!strcmp (sym
->name
, symname
))
3686 /* Bfd symbols are section relative. */
3687 symaddr
= sym
->value
+ sym
->section
->vma
;
3691 do_cleanups (back_to
);
3696 static struct gdbarch
*
3697 cris_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
3699 struct gdbarch
*gdbarch
;
3700 struct gdbarch_tdep
*tdep
;
3702 const char *cris_mode
;
3703 const char *cris_abi
;
3704 CORE_ADDR cris_abi_sym
= 0;
3707 if (usr_cmd_cris_version_valid
)
3709 /* Trust the user's CRIS version setting. */
3710 cris_version
= usr_cmd_cris_version
;
3714 /* Assume it's CRIS version 10. */
3718 if (usr_cmd_cris_mode_valid
)
3720 /* Trust the user's CRIS mode setting. */
3721 cris_mode
= usr_cmd_cris_mode
;
3723 else if (cris_version
== 10)
3725 /* Assume CRIS version 10 is in user mode. */
3726 cris_mode
= CRIS_MODE_USER
;
3730 /* Strictly speaking, older CRIS version don't have a supervisor mode,
3731 but we regard its only mode as supervisor mode. */
3732 cris_mode
= CRIS_MODE_SUPERVISOR
;
3735 if (usr_cmd_cris_abi_valid
)
3737 /* Trust the user's ABI setting. */
3738 cris_abi
= usr_cmd_cris_abi
;
3742 if (bfd_get_flavour (info
.abfd
) == bfd_target_elf_flavour
)
3744 /* An elf target uses the new ABI. */
3745 cris_abi
= CRIS_ABI_V2
;
3747 else if (bfd_get_flavour (info
.abfd
) == bfd_target_aout_flavour
)
3749 /* An a.out target may use either ABI. Look for hints in the
3751 cris_abi_sym
= bfd_lookup_symbol (info
.abfd
, CRIS_ABI_SYMBOL
);
3752 cris_abi
= cris_abi_sym
? CRIS_ABI_V2
: CRIS_ABI_ORIGINAL
;
3756 /* Unknown bfd flavour. Assume it's the new ABI. */
3757 cris_abi
= CRIS_ABI_V2
;
3760 else if (gdbarch_tdep (current_gdbarch
))
3762 /* No bfd available. Stick with whatever ABI we're currently using.
3763 (This is to avoid changing the ABI when the user updates the
3764 architecture with the 'set cris-version' command.) */
3765 cris_abi
= gdbarch_tdep (current_gdbarch
)->cris_abi
;
3769 /* No bfd, and no current architecture available. Assume it's the
3771 cris_abi
= CRIS_ABI_V2
;
3774 /* Make the current settings visible to the user. */
3775 usr_cmd_cris_version
= cris_version
;
3776 usr_cmd_cris_mode
= cris_mode
;
3777 usr_cmd_cris_abi
= cris_abi
;
3779 /* Find a candidate among the list of pre-declared architectures. Both
3780 CRIS version and ABI must match. */
3781 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
3783 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
3785 if ((gdbarch_tdep (arches
->gdbarch
)->cris_version
== cris_version
)
3786 && (gdbarch_tdep (arches
->gdbarch
)->cris_mode
== cris_mode
)
3787 && (gdbarch_tdep (arches
->gdbarch
)->cris_abi
== cris_abi
))
3788 return arches
->gdbarch
;
3791 /* No matching architecture was found. Create a new one. */
3792 tdep
= (struct gdbarch_tdep
*) xmalloc (sizeof (struct gdbarch_tdep
));
3793 gdbarch
= gdbarch_alloc (&info
, tdep
);
3795 tdep
->cris_version
= cris_version
;
3796 tdep
->cris_mode
= cris_mode
;
3797 tdep
->cris_abi
= cris_abi
;
3799 /* INIT shall ensure that the INFO.BYTE_ORDER is non-zero. */
3800 switch (info
.byte_order
)
3802 case BFD_ENDIAN_LITTLE
:
3807 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: big endian byte order in info");
3811 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown byte order in info");
3814 /* Initialize the ABI dependent things. */
3815 if (tdep
->cris_abi
== CRIS_ABI_ORIGINAL
)
3817 set_gdbarch_double_bit (gdbarch
, 32);
3818 set_gdbarch_push_arguments (gdbarch
, cris_abi_original_push_arguments
);
3819 set_gdbarch_store_return_value (gdbarch
,
3820 cris_abi_original_store_return_value
);
3821 set_gdbarch_extract_return_value
3822 (gdbarch
, cris_abi_original_extract_return_value
);
3823 set_gdbarch_reg_struct_has_addr
3824 (gdbarch
, cris_abi_original_reg_struct_has_addr
);
3826 else if (tdep
->cris_abi
== CRIS_ABI_V2
)
3828 set_gdbarch_double_bit (gdbarch
, 64);
3829 set_gdbarch_push_arguments (gdbarch
, cris_abi_v2_push_arguments
);
3830 set_gdbarch_store_return_value (gdbarch
, cris_abi_v2_store_return_value
);
3831 set_gdbarch_extract_return_value (gdbarch
,
3832 cris_abi_v2_extract_return_value
);
3833 set_gdbarch_reg_struct_has_addr (gdbarch
,
3834 cris_abi_v2_reg_struct_has_addr
);
3837 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS ABI");
3839 /* The default definition of a long double is 2 * TARGET_DOUBLE_BIT,
3840 which means we have to set this explicitly. */
3841 set_gdbarch_long_double_bit (gdbarch
, 64);
3843 /* Floating point is IEEE compatible. */
3844 set_gdbarch_ieee_float (gdbarch
, 1);
3846 /* There are 32 registers (some of which may not be implemented). */
3847 set_gdbarch_num_regs (gdbarch
, 32);
3848 set_gdbarch_sp_regnum (gdbarch
, 14);
3849 set_gdbarch_fp_regnum (gdbarch
, 8);
3850 set_gdbarch_pc_regnum (gdbarch
, 15);
3852 set_gdbarch_register_name (gdbarch
, cris_register_name
);
3854 /* Length of ordinary registers used in push_word and a few other places.
3855 REGISTER_RAW_SIZE is the real way to know how big a register is. */
3856 set_gdbarch_register_size (gdbarch
, 4);
3859 set_gdbarch_register_bytes_ok (gdbarch
, cris_register_bytes_ok
);
3860 set_gdbarch_software_single_step (gdbarch
, cris_software_single_step
);
3863 set_gdbarch_cannot_store_register (gdbarch
, cris_cannot_store_register
);
3864 set_gdbarch_cannot_fetch_register (gdbarch
, cris_cannot_fetch_register
);
3867 /* The total amount of space needed to store (in an array called registers)
3868 GDB's copy of the machine's register state. Note: We can not use
3869 cris_register_size at this point, since it relies on current_gdbarch
3871 switch (tdep
->cris_version
)
3877 /* Support for these may be added later. */
3878 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unsupported CRIS version");
3883 /* CRIS v8 and v9, a.k.a. ETRAX 100. General registers R0 - R15
3884 (32 bits), special registers P0 - P1 (8 bits), P4 - P5 (16 bits),
3885 and P8 - P14 (32 bits). */
3886 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (7 * 4);
3891 /* CRIS v10 and v11, a.k.a. ETRAX 100LX. In addition to ETRAX 100,
3892 P7 (32 bits), and P15 (32 bits) have been implemented. */
3893 register_bytes
= (16 * 4) + (2 * 1) + (2 * 2) + (9 * 4);
3897 internal_error (__FILE__
, __LINE__
, "cris_gdbarch_init: unknown CRIS version");
3900 set_gdbarch_register_bytes (gdbarch
, register_bytes
);
3902 /* Returns the register offset for the first byte of register regno's space
3903 in the saved register state. */
3904 set_gdbarch_register_byte (gdbarch
, cris_register_offset
);
3906 /* The length of the registers in the actual machine representation. */
3907 set_gdbarch_register_raw_size (gdbarch
, cris_register_size
);
3909 /* The largest value REGISTER_RAW_SIZE can have. */
3910 set_gdbarch_max_register_raw_size (gdbarch
, 32);
3912 /* The length of the registers in the program's representation. */
3913 set_gdbarch_register_virtual_size (gdbarch
, cris_register_size
);
3915 /* The largest value REGISTER_VIRTUAL_SIZE can have. */
3916 set_gdbarch_max_register_virtual_size (gdbarch
, 32);
3918 set_gdbarch_register_virtual_type (gdbarch
, cris_register_virtual_type
);
3920 /* Use generic dummy frames. */
3921 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
3923 /* Where to execute the call in the memory segments. */
3924 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
3925 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
3927 /* Start execution at the beginning of dummy. */
3928 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
3929 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
3931 /* Set to 1 since call_dummy_breakpoint_offset was defined. */
3932 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
3934 /* Read all about dummy frames in blockframe.c. */
3935 set_gdbarch_call_dummy_length (gdbarch
, 0);
3936 set_gdbarch_pc_in_call_dummy (gdbarch
, pc_in_call_dummy_at_entry_point
);
3938 /* Defined to 1 to indicate that the target supports inferior function
3940 set_gdbarch_call_dummy_p (gdbarch
, 1);
3941 set_gdbarch_call_dummy_words (gdbarch
, 0);
3942 set_gdbarch_sizeof_call_dummy_words (gdbarch
, 0);
3944 /* No stack adjustment needed when peforming an inferior function call. */
3945 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
3946 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
3948 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
3950 /* No register requires conversion from raw format to virtual format. */
3951 set_gdbarch_register_convertible (gdbarch
, generic_register_convertible_not
);
3953 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
3954 set_gdbarch_push_return_address (gdbarch
, cris_push_return_address
);
3955 set_gdbarch_pop_frame (gdbarch
, cris_pop_frame
);
3957 set_gdbarch_store_struct_return (gdbarch
, cris_store_struct_return
);
3958 set_gdbarch_extract_struct_value_address (gdbarch
,
3959 cris_extract_struct_value_address
);
3960 set_gdbarch_use_struct_convention (gdbarch
, cris_use_struct_convention
);
3962 set_gdbarch_frame_init_saved_regs (gdbarch
, cris_frame_init_saved_regs
);
3963 set_gdbarch_init_extra_frame_info (gdbarch
, cris_init_extra_frame_info
);
3964 set_gdbarch_skip_prologue (gdbarch
, cris_skip_prologue
);
3965 set_gdbarch_prologue_frameless_p (gdbarch
, generic_prologue_frameless_p
);
3967 /* The stack grows downward. */
3968 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
3970 set_gdbarch_breakpoint_from_pc (gdbarch
, cris_breakpoint_from_pc
);
3972 /* The PC must not be decremented after a breakpoint. (The breakpoint
3973 handler takes care of that.) */
3974 set_gdbarch_decr_pc_after_break (gdbarch
, 0);
3976 /* Offset from address of function to start of its code. */
3977 set_gdbarch_function_start_offset (gdbarch
, 0);
3979 /* The number of bytes at the start of arglist that are not really args,
3980 0 in the CRIS ABI. */
3981 set_gdbarch_frame_args_skip (gdbarch
, 0);
3982 set_gdbarch_frameless_function_invocation
3983 (gdbarch
, cris_frameless_function_invocation
);
3984 set_gdbarch_frame_chain (gdbarch
, cris_frame_chain
);
3985 set_gdbarch_frame_chain_valid (gdbarch
, generic_file_frame_chain_valid
);
3987 set_gdbarch_frame_saved_pc (gdbarch
, cris_frame_saved_pc
);
3988 set_gdbarch_frame_args_address (gdbarch
, cris_frame_args_address
);
3989 set_gdbarch_frame_locals_address (gdbarch
, cris_frame_locals_address
);
3990 set_gdbarch_saved_pc_after_call (gdbarch
, cris_saved_pc_after_call
);
3992 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
3994 /* No extra stack alignment needed. Set to 1 by default. */
3995 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
3997 /* Helpful for backtracing and returning in a call dummy. */
3998 set_gdbarch_save_dummy_frame_tos (gdbarch
, generic_save_dummy_frame_tos
);