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Add testcase for PR/24065.
[deliverable/binutils-gdb.git] / gdb / csky-tdep.c
1 /* Target-dependent code for the CSKY architecture, for GDB.
2
3 Copyright (C) 2010-2019 Free Software Foundation, Inc.
4
5 Contributed by C-SKY Microsystems and Mentor Graphics.
6
7 This file is part of GDB.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21
22 #include "defs.h"
23 #include "gdb_assert.h"
24 #include "frame.h"
25 #include "inferior.h"
26 #include "symtab.h"
27 #include "value.h"
28 #include "gdbcmd.h"
29 #include "language.h"
30 #include "gdbcore.h"
31 #include "symfile.h"
32 #include "objfiles.h"
33 #include "gdbtypes.h"
34 #include "target.h"
35 #include "arch-utils.h"
36 #include "regcache.h"
37 #include "osabi.h"
38 #include "block.h"
39 #include "reggroups.h"
40 #include "elf/csky.h"
41 #include "elf-bfd.h"
42 #include "symcat.h"
43 #include "sim-regno.h"
44 #include "dis-asm.h"
45 #include "frame-unwind.h"
46 #include "frame-base.h"
47 #include "trad-frame.h"
48 #include "infcall.h"
49 #include "floatformat.h"
50 #include "remote.h"
51 #include "target-descriptions.h"
52 #include "dwarf2-frame.h"
53 #include "user-regs.h"
54 #include "valprint.h"
55 #include "reggroups.h"
56 #include "csky-tdep.h"
57 #include "regset.h"
58 #include "block.h"
59 #include "opcode/csky.h"
60 #include <algorithm>
61 #include <vector>
62
63 /* Control debugging information emitted in this file. */
64 static int csky_debug = 0;
65
66 static struct reggroup *cr_reggroup;
67 static struct reggroup *fr_reggroup;
68 static struct reggroup *vr_reggroup;
69 static struct reggroup *mmu_reggroup;
70 static struct reggroup *prof_reggroup;
71
72 /* Convenience function to print debug messages in prologue analysis. */
73
74 static void
75 print_savedreg_msg (int regno, int offsets[], bool print_continuing)
76 {
77 fprintf_unfiltered (gdb_stdlog, "csky: r%d saved at offset 0x%x\n",
78 regno, offsets[regno]);
79 if (print_continuing)
80 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
81 }
82
83 /* Check whether the instruction at ADDR is 16-bit or not. */
84
85 static int
86 csky_pc_is_csky16 (struct gdbarch *gdbarch, CORE_ADDR addr)
87 {
88 gdb_byte target_mem[2];
89 int status;
90 unsigned int insn;
91 int ret = 1;
92 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
93
94 status = target_read_memory (addr, target_mem, 2);
95 /* Assume a 16-bit instruction if we can't read memory. */
96 if (status)
97 return 1;
98
99 /* Get instruction from memory. */
100 insn = extract_unsigned_integer (target_mem, 2, byte_order);
101 if ((insn & CSKY_32_INSN_MASK) == CSKY_32_INSN_MASK)
102 ret = 0;
103 else if (insn == CSKY_BKPT_INSN)
104 {
105 /* Check for 32-bit bkpt instruction which is all 0. */
106 status = target_read_memory (addr + 2, target_mem, 2);
107 if (status)
108 return 1;
109
110 insn = extract_unsigned_integer (target_mem, 2, byte_order);
111 if (insn == CSKY_BKPT_INSN)
112 ret = 0;
113 }
114 return ret;
115 }
116
117 /* Get one instruction at ADDR and store it in INSN. Return 2 for
118 a 16-bit instruction or 4 for a 32-bit instruction. */
119
120 static int
121 csky_get_insn (struct gdbarch *gdbarch, CORE_ADDR addr, unsigned int *insn)
122 {
123 gdb_byte target_mem[2];
124 unsigned int insn_type;
125 int status;
126 int insn_len = 2;
127 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
128
129 status = target_read_memory (addr, target_mem, 2);
130 if (status)
131 memory_error (TARGET_XFER_E_IO, addr);
132
133 insn_type = extract_unsigned_integer (target_mem, 2, byte_order);
134 if (CSKY_32_INSN_MASK == (insn_type & CSKY_32_INSN_MASK))
135 {
136 status = target_read_memory (addr + 2, target_mem, 2);
137 if (status)
138 memory_error (TARGET_XFER_E_IO, addr);
139 insn_type = ((insn_type << 16)
140 | extract_unsigned_integer (target_mem, 2, byte_order));
141 insn_len = 4;
142 }
143 *insn = insn_type;
144 return insn_len;
145 }
146
147 /* Implement the read_pc gdbarch method. */
148
149 static CORE_ADDR
150 csky_read_pc (readable_regcache *regcache)
151 {
152 ULONGEST pc;
153 regcache->cooked_read (CSKY_PC_REGNUM, &pc);
154 return pc;
155 }
156
157 /* Implement the write_pc gdbarch method. */
158
159 static void
160 csky_write_pc (regcache *regcache, CORE_ADDR val)
161 {
162 regcache_cooked_write_unsigned (regcache, CSKY_PC_REGNUM, val);
163 }
164
165 /* Implement the unwind_sp gdbarch method. */
166
167 static CORE_ADDR
168 csky_unwind_sp (struct gdbarch *gdbarch, struct frame_info *next_frame)
169 {
170 return frame_unwind_register_unsigned (next_frame, CSKY_SP_REGNUM);
171 }
172
173 /* C-Sky ABI register names. */
174
175 static const char *csky_register_names[] =
176 {
177 /* General registers 0 - 31. */
178 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
180 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
181 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
182
183 /* DSP hilo registers 36 and 37. */
184 "", "", "", "", "hi", "lo", "", "",
185
186 /* FPU/VPU general registers 40 - 71. */
187 "fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
188 "fr8", "fr9", "fr10", "fr11", "fr12", "fr13", "fr14", "fr15",
189 "vr0", "vr1", "vr2", "vr3", "vr4", "vr5", "vr6", "vr7",
190 "vr8", "vr9", "vr10", "vr11", "vr12", "vr13", "vr14", "vr15",
191
192 /* Program counter 72. */
193 "pc",
194
195 /* Optional registers (ar) 73 - 88. */
196 "ar0", "ar1", "ar2", "ar3", "ar4", "ar5", "ar6", "ar7",
197 "ar8", "ar9", "ar10", "ar11", "ar12", "ar13", "ar14", "ar15",
198
199 /* Control registers (cr) 89 - 119. */
200 "psr", "vbr", "epsr", "fpsr", "epc", "fpc", "ss0", "ss1",
201 "ss2", "ss3", "ss4", "gcr", "gsr", "cr13", "cr14", "cr15",
202 "cr16", "cr17", "cr18", "cr19", "cr20", "cr21", "cr22", "cr23",
203 "cr24", "cr25", "cr26", "cr27", "cr28", "cr29", "cr30", "cr31",
204
205 /* FPU/VPU control registers 121 ~ 123. */
206 /* User sp 127. */
207 "fid", "fcr", "fesr", "", "", "", "usp",
208
209 /* MMU control registers: 128 - 136. */
210 "mcr0", "mcr2", "mcr3", "mcr4", "mcr6", "mcr8", "mcr29", "mcr30",
211 "mcr31", "", "", "",
212
213 /* Profiling control registers 140 - 143. */
214 /* Profiling software general registers 144 - 157. */
215 "profcr0", "profcr1", "profcr2", "profcr3", "profsgr0", "profsgr1",
216 "profsgr2", "profsgr3", "profsgr4", "profsgr5", "profsgr6", "profsgr7",
217 "profsgr8", "profsgr9", "profsgr10","profsgr11","profsgr12", "profsgr13",
218 "", "",
219
220 /* Profiling architecture general registers 160 - 174. */
221 "profagr0", "profagr1", "profagr2", "profagr3", "profagr4", "profagr5",
222 "profagr6", "profagr7", "profagr8", "profagr9", "profagr10","profagr11",
223 "profagr12","profagr13","profagr14", "",
224
225 /* Profiling extension general registers 176 - 188. */
226 "profxgr0", "profxgr1", "profxgr2", "profxgr3", "profxgr4", "profxgr5",
227 "profxgr6", "profxgr7", "profxgr8", "profxgr9", "profxgr10","profxgr11",
228 "profxgr12",
229
230 /* Control registers in bank1. */
231 "", "", "", "", "", "", "", "",
232 "", "", "", "", "", "", "", "",
233 "cp1cr16", "cp1cr17", "cp1cr18", "cp1cr19", "cp1cr20", "", "", "",
234 "", "", "", "", "", "", "", "",
235
236 /* Control registers in bank3 (ICE). */
237 "sepsr", "sevbr", "seepsr", "", "seepc", "", "nsssp", "seusp",
238 "sedcr", "", "", "", "", "", "", "",
239 "", "", "", "", "", "", "", "",
240 "", "", "", "", "", "", "", ""
241 };
242
243 /* Implement the register_name gdbarch method. */
244
245 static const char *
246 csky_register_name (struct gdbarch *gdbarch, int reg_nr)
247 {
248 if (tdesc_has_registers (gdbarch_target_desc (gdbarch)))
249 return tdesc_register_name (gdbarch, reg_nr);
250
251 if (reg_nr < 0)
252 return NULL;
253
254 if (reg_nr >= gdbarch_num_regs (gdbarch))
255 return NULL;
256
257 return csky_register_names[reg_nr];
258 }
259
260 /* Construct vector type for vrx registers. */
261
262 static struct type *
263 csky_vector_type (struct gdbarch *gdbarch)
264 {
265 const struct builtin_type *bt = builtin_type (gdbarch);
266
267 struct type *t;
268
269 t = arch_composite_type (gdbarch, "__gdb_builtin_type_vec128i",
270 TYPE_CODE_UNION);
271
272 append_composite_type_field (t, "u32",
273 init_vector_type (bt->builtin_int32, 4));
274 append_composite_type_field (t, "u16",
275 init_vector_type (bt->builtin_int16, 8));
276 append_composite_type_field (t, "u8",
277 init_vector_type (bt->builtin_int8, 16));
278
279 TYPE_VECTOR (t) = 1;
280 TYPE_NAME (t) = "builtin_type_vec128i";
281
282 return t;
283 }
284
285 /* Return the GDB type object for the "standard" data type
286 of data in register N. */
287
288 static struct type *
289 csky_register_type (struct gdbarch *gdbarch, int reg_nr)
290 {
291 /* PC, EPC, FPC is a text pointer. */
292 if ((reg_nr == CSKY_PC_REGNUM) || (reg_nr == CSKY_EPC_REGNUM)
293 || (reg_nr == CSKY_FPC_REGNUM))
294 return builtin_type (gdbarch)->builtin_func_ptr;
295
296 /* VBR is a data pointer. */
297 if (reg_nr == CSKY_VBR_REGNUM)
298 return builtin_type (gdbarch)->builtin_data_ptr;
299
300 /* Float register has 64 bits, and only in ck810. */
301 if ((reg_nr >=CSKY_FR0_REGNUM) && (reg_nr <= CSKY_FR0_REGNUM + 15))
302 return arch_float_type (gdbarch, 64, "builtin_type_csky_ext",
303 floatformats_ieee_double);
304
305 /* Vector register has 128 bits, and only in ck810. */
306 if ((reg_nr >= CSKY_VR0_REGNUM) && (reg_nr <= CSKY_VR0_REGNUM + 15))
307 return csky_vector_type (gdbarch);
308
309 /* Profiling general register has 48 bits, we use 64bit. */
310 if ((reg_nr >= CSKY_PROFGR_REGNUM) && (reg_nr <= CSKY_PROFGR_REGNUM + 44))
311 return builtin_type (gdbarch)->builtin_uint64;
312
313 if (reg_nr == CSKY_SP_REGNUM)
314 return builtin_type (gdbarch)->builtin_data_ptr;
315
316 /* Others are 32 bits. */
317 return builtin_type (gdbarch)->builtin_int32;
318 }
319
320 /* Data structure to marshall items in a dummy stack frame when
321 calling a function in the inferior. */
322
323 struct stack_item
324 {
325 stack_item (int len_, const gdb_byte *data_)
326 : len (len_), data (data_)
327 {}
328
329 int len;
330 const gdb_byte *data;
331 };
332
333 /* Implement the push_dummy_call gdbarch method. */
334
335 static CORE_ADDR
336 csky_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
337 struct regcache *regcache, CORE_ADDR bp_addr,
338 int nargs, struct value **args, CORE_ADDR sp,
339 function_call_return_method return_method,
340 CORE_ADDR struct_addr)
341 {
342 int argnum;
343 int argreg = CSKY_ABI_A0_REGNUM;
344 int last_arg_regnum = CSKY_ABI_LAST_ARG_REGNUM;
345 int need_dummy_stack = 0;
346 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
347 std::vector<stack_item> stack_items;
348
349 /* Set the return address. For CSKY, the return breakpoint is
350 always at BP_ADDR. */
351 regcache_cooked_write_unsigned (regcache, CSKY_LR_REGNUM, bp_addr);
352
353 /* The struct_return pointer occupies the first parameter
354 passing register. */
355 if (return_method == return_method_struct)
356 {
357 if (csky_debug)
358 {
359 fprintf_unfiltered (gdb_stdlog,
360 "csky: struct return in %s = %s\n",
361 gdbarch_register_name (gdbarch, argreg),
362 paddress (gdbarch, struct_addr));
363 }
364 regcache_cooked_write_unsigned (regcache, argreg, struct_addr);
365 argreg++;
366 }
367
368 /* Put parameters into argument registers in REGCACHE.
369 In ABI argument registers are r0 through r3. */
370 for (argnum = 0; argnum < nargs; argnum++)
371 {
372 int len;
373 struct type *arg_type;
374 const gdb_byte *val;
375
376 arg_type = check_typedef (value_type (args[argnum]));
377 len = TYPE_LENGTH (arg_type);
378 val = value_contents (args[argnum]);
379
380 /* Copy the argument to argument registers or the dummy stack.
381 Large arguments are split between registers and stack.
382
383 If len < 4, there is no need to worry about endianness since
384 the arguments will always be stored in the low address. */
385 if (len < 4)
386 {
387 CORE_ADDR regval
388 = extract_unsigned_integer (val, len, byte_order);
389 regcache_cooked_write_unsigned (regcache, argreg, regval);
390 argreg++;
391 }
392 else
393 {
394 while (len > 0)
395 {
396 int partial_len = len < 4 ? len : 4;
397 if (argreg <= last_arg_regnum)
398 {
399 /* The argument is passed in an argument register. */
400 CORE_ADDR regval
401 = extract_unsigned_integer (val, partial_len,
402 byte_order);
403 if (byte_order == BFD_ENDIAN_BIG)
404 regval <<= (4 - partial_len) * 8;
405
406 /* Put regval into register in REGCACHE. */
407 regcache_cooked_write_unsigned (regcache, argreg,
408 regval);
409 argreg++;
410 }
411 else
412 {
413 /* The argument should be pushed onto the dummy stack. */
414 stack_items.emplace_back (4, val);
415 need_dummy_stack += 4;
416 }
417 len -= partial_len;
418 val += partial_len;
419 }
420 }
421 }
422
423 /* Transfer the dummy stack frame to the target. */
424 std::vector<stack_item>::reverse_iterator iter;
425 for (iter = stack_items.rbegin (); iter != stack_items.rend (); ++iter)
426 {
427 sp -= iter->len;
428 write_memory (sp, iter->data, iter->len);
429 }
430
431 /* Finally, update the SP register. */
432 regcache_cooked_write_unsigned (regcache, CSKY_SP_REGNUM, sp);
433 return sp;
434 }
435
436 /* Implement the return_value gdbarch method. */
437
438 static enum return_value_convention
439 csky_return_value (struct gdbarch *gdbarch, struct value *function,
440 struct type *valtype, struct regcache *regcache,
441 gdb_byte *readbuf, const gdb_byte *writebuf)
442 {
443 CORE_ADDR regval;
444 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
445 int len = TYPE_LENGTH (valtype);
446 unsigned int ret_regnum = CSKY_RET_REGNUM;
447
448 /* Csky abi specifies that return values larger than 8 bytes
449 are put on the stack. */
450 if (len > 8)
451 return RETURN_VALUE_STRUCT_CONVENTION;
452 else
453 {
454 if (readbuf != NULL)
455 {
456 ULONGEST tmp;
457 /* By using store_unsigned_integer we avoid having to do
458 anything special for small big-endian values. */
459 regcache->cooked_read (ret_regnum, &tmp);
460 store_unsigned_integer (readbuf, (len > 4 ? 4 : len),
461 byte_order, tmp);
462 if (len > 4)
463 {
464 regcache->cooked_read (ret_regnum + 1, &tmp);
465 store_unsigned_integer (readbuf + 4, 4, byte_order, tmp);
466 }
467 }
468 if (writebuf != NULL)
469 {
470 regval = extract_unsigned_integer (writebuf, len > 4 ? 4 : len,
471 byte_order);
472 regcache_cooked_write_unsigned (regcache, ret_regnum, regval);
473 if (len > 4)
474 {
475 regval = extract_unsigned_integer ((gdb_byte *) writebuf + 4,
476 4, byte_order);
477 regcache_cooked_write_unsigned (regcache, ret_regnum + 1,
478 regval);
479 }
480
481 }
482 return RETURN_VALUE_REGISTER_CONVENTION;
483 }
484 }
485
486 /* Implement the frame_align gdbarch method.
487
488 Adjust the address downward (direction of stack growth) so that it
489 is correctly aligned for a new stack frame. */
490
491 static CORE_ADDR
492 csky_frame_align (struct gdbarch *gdbarch, CORE_ADDR addr)
493 {
494 return align_down (addr, 4);
495 }
496
497 /* Unwind cache used for gdbarch fallback unwinder. */
498
499 struct csky_unwind_cache
500 {
501 /* The stack pointer at the time this frame was created; i.e. the
502 caller's stack pointer when this function was called. It is used
503 to identify this frame. */
504 CORE_ADDR prev_sp;
505
506 /* The frame base for this frame is just prev_sp - frame size.
507 FRAMESIZE is the distance from the frame pointer to the
508 initial stack pointer. */
509 int framesize;
510
511 /* The register used to hold the frame pointer for this frame. */
512 int framereg;
513
514 /* Saved register offsets. */
515 struct trad_frame_saved_reg *saved_regs;
516 };
517
518 /* Do prologue analysis, returning the PC of the first instruction
519 after the function prologue. */
520
521 static CORE_ADDR
522 csky_analyze_prologue (struct gdbarch *gdbarch,
523 CORE_ADDR start_pc,
524 CORE_ADDR limit_pc,
525 CORE_ADDR end_pc,
526 struct frame_info *this_frame,
527 struct csky_unwind_cache *this_cache,
528 lr_type_t lr_type)
529 {
530 CORE_ADDR addr;
531 unsigned int insn, rn;
532 int framesize = 0;
533 int stacksize = 0;
534 int register_offsets[CSKY_NUM_GREGS_SAVED_GREGS];
535 int insn_len;
536 /* For adjusting fp. */
537 int is_fp_saved = 0;
538 int adjust_fp = 0;
539
540 /* REGISTER_OFFSETS will contain offsets from the top of the frame
541 (NOT the frame pointer) for the various saved registers, or -1
542 if the register is not saved. */
543 for (rn = 0; rn < CSKY_NUM_GREGS_SAVED_GREGS; rn++)
544 register_offsets[rn] = -1;
545
546 /* Analyze the prologue. Things we determine from analyzing the
547 prologue include the size of the frame and which registers are
548 saved (and where). */
549 if (csky_debug)
550 {
551 fprintf_unfiltered (gdb_stdlog,
552 "csky: Scanning prologue: start_pc = 0x%x,"
553 "limit_pc = 0x%x\n", (unsigned int) start_pc,
554 (unsigned int) limit_pc);
555 }
556
557 /* Default to 16 bit instruction. */
558 insn_len = 2;
559 stacksize = 0;
560 for (addr = start_pc; addr < limit_pc; addr += insn_len)
561 {
562 /* Get next insn. */
563 insn_len = csky_get_insn (gdbarch, addr, &insn);
564
565 /* Check if 32 bit. */
566 if (insn_len == 4)
567 {
568 /* subi32 sp,sp oimm12. */
569 if (CSKY_32_IS_SUBI0 (insn))
570 {
571 /* Got oimm12. */
572 int offset = CSKY_32_SUBI_IMM (insn);
573 if (csky_debug)
574 {
575 fprintf_unfiltered (gdb_stdlog,
576 "csky: got subi sp,%d; continuing\n",
577 offset);
578 }
579 stacksize += offset;
580 continue;
581 }
582 /* stm32 ry-rz,(sp). */
583 else if (CSKY_32_IS_STMx0 (insn))
584 {
585 /* Spill register(s). */
586 int start_register;
587 int reg_count;
588 int offset;
589
590 /* BIG WARNING! The CKCore ABI does not restrict functions
591 to taking only one stack allocation. Therefore, when
592 we save a register, we record the offset of where it was
593 saved relative to the current stacksize. This will
594 then give an offset from the SP upon entry to our
595 function. Remember, stacksize is NOT constant until
596 we're done scanning the prologue. */
597 start_register = CSKY_32_STM_VAL_REGNUM (insn);
598 reg_count = CSKY_32_STM_SIZE (insn);
599 if (csky_debug)
600 {
601 fprintf_unfiltered (gdb_stdlog,
602 "csky: got stm r%d-r%d,(sp)\n",
603 start_register,
604 start_register + reg_count);
605 }
606
607 for (rn = start_register, offset = 0;
608 rn <= start_register + reg_count;
609 rn++, offset += 4)
610 {
611 register_offsets[rn] = stacksize - offset;
612 if (csky_debug)
613 {
614 fprintf_unfiltered (gdb_stdlog,
615 "csky: r%d saved at 0x%x"
616 " (offset %d)\n",
617 rn, register_offsets[rn],
618 offset);
619 }
620 }
621 if (csky_debug)
622 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
623 continue;
624 }
625 /* stw ry,(sp,disp). */
626 else if (CSKY_32_IS_STWx0 (insn))
627 {
628 /* Spill register: see note for IS_STM above. */
629 int disp;
630
631 rn = CSKY_32_ST_VAL_REGNUM (insn);
632 disp = CSKY_32_ST_OFFSET (insn);
633 register_offsets[rn] = stacksize - disp;
634 if (csky_debug)
635 print_savedreg_msg (rn, register_offsets, true);
636 continue;
637 }
638 else if (CSKY_32_IS_MOV_FP_SP (insn))
639 {
640 /* SP is saved to FP reg, means code afer prologue may
641 modify SP. */
642 is_fp_saved = 1;
643 adjust_fp = stacksize;
644 continue;
645 }
646 else if (CSKY_32_IS_MFCR_EPSR (insn))
647 {
648 unsigned int insn2;
649 addr += 4;
650 int mfcr_regnum = insn & 0x1f;
651 insn_len = csky_get_insn (gdbarch, addr, &insn2);
652 if (insn_len == 2)
653 {
654 int stw_regnum = (insn2 >> 5) & 0x7;
655 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
656 {
657 int offset;
658
659 /* CSKY_EPSR_REGNUM. */
660 rn = CSKY_NUM_GREGS;
661 offset = CSKY_16_STWx0_OFFSET (insn2);
662 register_offsets[rn] = stacksize - offset;
663 if (csky_debug)
664 print_savedreg_msg (rn, register_offsets, true);
665 continue;
666 }
667 break;
668 }
669 else
670 {
671 /* INSN_LEN == 4. */
672 int stw_regnum = (insn2 >> 21) & 0x1f;
673 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
674 {
675 int offset;
676
677 /* CSKY_EPSR_REGNUM. */
678 rn = CSKY_NUM_GREGS;
679 offset = CSKY_32_ST_OFFSET (insn2);
680 register_offsets[rn] = framesize - offset;
681 if (csky_debug)
682 print_savedreg_msg (rn, register_offsets, true);
683 continue;
684 }
685 break;
686 }
687 }
688 else if (CSKY_32_IS_MFCR_FPSR (insn))
689 {
690 unsigned int insn2;
691 addr += 4;
692 int mfcr_regnum = insn & 0x1f;
693 insn_len = csky_get_insn (gdbarch, addr, &insn2);
694 if (insn_len == 2)
695 {
696 int stw_regnum = (insn2 >> 5) & 0x7;
697 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum
698 == stw_regnum))
699 {
700 int offset;
701
702 /* CSKY_FPSR_REGNUM. */
703 rn = CSKY_NUM_GREGS + 1;
704 offset = CSKY_16_STWx0_OFFSET (insn2);
705 register_offsets[rn] = stacksize - offset;
706 if (csky_debug)
707 print_savedreg_msg (rn, register_offsets, true);
708 continue;
709 }
710 break;
711 }
712 else
713 {
714 /* INSN_LEN == 4. */
715 int stw_regnum = (insn2 >> 21) & 0x1f;
716 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
717 {
718 int offset;
719
720 /* CSKY_FPSR_REGNUM. */
721 rn = CSKY_NUM_GREGS + 1;
722 offset = CSKY_32_ST_OFFSET (insn2);
723 register_offsets[rn] = framesize - offset;
724 if (csky_debug)
725 print_savedreg_msg (rn, register_offsets, true);
726 continue;
727 }
728 break;
729 }
730 }
731 else if (CSKY_32_IS_MFCR_EPC (insn))
732 {
733 unsigned int insn2;
734 addr += 4;
735 int mfcr_regnum = insn & 0x1f;
736 insn_len = csky_get_insn (gdbarch, addr, &insn2);
737 if (insn_len == 2)
738 {
739 int stw_regnum = (insn2 >> 5) & 0x7;
740 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
741 {
742 int offset;
743
744 /* CSKY_EPC_REGNUM. */
745 rn = CSKY_NUM_GREGS + 2;
746 offset = CSKY_16_STWx0_OFFSET (insn2);
747 register_offsets[rn] = stacksize - offset;
748 if (csky_debug)
749 print_savedreg_msg (rn, register_offsets, true);
750 continue;
751 }
752 break;
753 }
754 else
755 {
756 /* INSN_LEN == 4. */
757 int stw_regnum = (insn2 >> 21) & 0x1f;
758 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
759 {
760 int offset;
761
762 /* CSKY_EPC_REGNUM. */
763 rn = CSKY_NUM_GREGS + 2;
764 offset = CSKY_32_ST_OFFSET (insn2);
765 register_offsets[rn] = framesize - offset;
766 if (csky_debug)
767 print_savedreg_msg (rn, register_offsets, true);
768 continue;
769 }
770 break;
771 }
772 }
773 else if (CSKY_32_IS_MFCR_FPC (insn))
774 {
775 unsigned int insn2;
776 addr += 4;
777 int mfcr_regnum = insn & 0x1f;
778 insn_len = csky_get_insn (gdbarch, addr, &insn2);
779 if (insn_len == 2)
780 {
781 int stw_regnum = (insn2 >> 5) & 0x7;
782 if (CSKY_16_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
783 {
784 int offset;
785
786 /* CSKY_FPC_REGNUM. */
787 rn = CSKY_NUM_GREGS + 3;
788 offset = CSKY_16_STWx0_OFFSET (insn2);
789 register_offsets[rn] = stacksize - offset;
790 if (csky_debug)
791 print_savedreg_msg (rn, register_offsets, true);
792 continue;
793 }
794 break;
795 }
796 else
797 {
798 /* INSN_LEN == 4. */
799 int stw_regnum = (insn2 >> 21) & 0x1f;
800 if (CSKY_32_IS_STWx0 (insn2) && (mfcr_regnum == stw_regnum))
801 {
802 int offset;
803
804 /* CSKY_FPC_REGNUM. */
805 rn = CSKY_NUM_GREGS + 3;
806 offset = CSKY_32_ST_OFFSET (insn2);
807 register_offsets[rn] = framesize - offset;
808 if (csky_debug)
809 print_savedreg_msg (rn, register_offsets, true);
810 continue;
811 }
812 break;
813 }
814 }
815 else if (CSKY_32_IS_PUSH (insn))
816 {
817 /* Push for 32_bit. */
818 int offset = 0;
819 if (CSKY_32_IS_PUSH_R29 (insn))
820 {
821 stacksize += 4;
822 register_offsets[29] = stacksize;
823 if (csky_debug)
824 print_savedreg_msg (29, register_offsets, false);
825 offset += 4;
826 }
827 if (CSKY_32_PUSH_LIST2 (insn))
828 {
829 int num = CSKY_32_PUSH_LIST2 (insn);
830 int tmp = 0;
831 stacksize += num * 4;
832 offset += num * 4;
833 if (csky_debug)
834 {
835 fprintf_unfiltered (gdb_stdlog,
836 "csky: push regs_array: r16-r%d\n",
837 16 + num - 1);
838 }
839 for (rn = 16; rn <= 16 + num - 1; rn++)
840 {
841 register_offsets[rn] = stacksize - tmp;
842 if (csky_debug)
843 {
844 fprintf_unfiltered (gdb_stdlog,
845 "csky: r%d saved at 0x%x"
846 " (offset %d)\n", rn,
847 register_offsets[rn], tmp);
848 }
849 tmp += 4;
850 }
851 }
852 if (CSKY_32_IS_PUSH_R15 (insn))
853 {
854 stacksize += 4;
855 register_offsets[15] = stacksize;
856 if (csky_debug)
857 print_savedreg_msg (15, register_offsets, false);
858 offset += 4;
859 }
860 if (CSKY_32_PUSH_LIST1 (insn))
861 {
862 int num = CSKY_32_PUSH_LIST1 (insn);
863 int tmp = 0;
864 stacksize += num * 4;
865 offset += num * 4;
866 if (csky_debug)
867 {
868 fprintf_unfiltered (gdb_stdlog,
869 "csky: push regs_array: r4-r%d\n",
870 4 + num - 1);
871 }
872 for (rn = 4; rn <= 4 + num - 1; rn++)
873 {
874 register_offsets[rn] = stacksize - tmp;
875 if (csky_debug)
876 {
877 fprintf_unfiltered (gdb_stdlog,
878 "csky: r%d saved at 0x%x"
879 " (offset %d)\n", rn,
880 register_offsets[rn], tmp);
881 }
882 tmp += 4;
883 }
884 }
885
886 framesize = stacksize;
887 if (csky_debug)
888 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
889 continue;
890 }
891 else if (CSKY_32_IS_LRW4 (insn) || CSKY_32_IS_MOVI4 (insn)
892 || CSKY_32_IS_MOVIH4 (insn) || CSKY_32_IS_BMASKI4 (insn))
893 {
894 int adjust = 0;
895 int offset = 0;
896 unsigned int insn2;
897
898 if (csky_debug)
899 {
900 fprintf_unfiltered (gdb_stdlog,
901 "csky: looking at large frame\n");
902 }
903 if (CSKY_32_IS_LRW4 (insn))
904 {
905 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
906 int literal_addr = (addr + ((insn & 0xffff) << 2))
907 & 0xfffffffc;
908 adjust = read_memory_unsigned_integer (literal_addr, 4,
909 byte_order);
910 }
911 else if (CSKY_32_IS_MOVI4 (insn))
912 adjust = (insn & 0xffff);
913 else if (CSKY_32_IS_MOVIH4 (insn))
914 adjust = (insn & 0xffff) << 16;
915 else
916 {
917 /* CSKY_32_IS_BMASKI4 (insn). */
918 adjust = (1 << (((insn & 0x3e00000) >> 21) + 1)) - 1;
919 }
920
921 if (csky_debug)
922 {
923 fprintf_unfiltered (gdb_stdlog,
924 "csky: base stacksize=0x%x\n", adjust);
925
926 /* May have zero or more insns which modify r4. */
927 fprintf_unfiltered (gdb_stdlog,
928 "csky: looking for r4 adjusters...\n");
929 }
930
931 offset = 4;
932 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
933 while (CSKY_IS_R4_ADJUSTER (insn2))
934 {
935 if (CSKY_32_IS_ADDI4 (insn2))
936 {
937 int imm = (insn2 & 0xfff) + 1;
938 adjust += imm;
939 if (csky_debug)
940 {
941 fprintf_unfiltered (gdb_stdlog,
942 "csky: addi r4,%d\n", imm);
943 }
944 }
945 else if (CSKY_32_IS_SUBI4 (insn2))
946 {
947 int imm = (insn2 & 0xfff) + 1;
948 adjust -= imm;
949 if (csky_debug)
950 {
951 fprintf_unfiltered (gdb_stdlog,
952 "csky: subi r4,%d\n", imm);
953 }
954 }
955 else if (CSKY_32_IS_NOR4 (insn2))
956 {
957 adjust = ~adjust;
958 if (csky_debug)
959 {
960 fprintf_unfiltered (gdb_stdlog,
961 "csky: nor r4,r4,r4\n");
962 }
963 }
964 else if (CSKY_32_IS_ROTLI4 (insn2))
965 {
966 int imm = ((insn2 >> 21) & 0x1f);
967 int temp = adjust >> (32 - imm);
968 adjust <<= imm;
969 adjust |= temp;
970 if (csky_debug)
971 {
972 fprintf_unfiltered (gdb_stdlog,
973 "csky: rotli r4,r4,%d\n", imm);
974 }
975 }
976 else if (CSKY_32_IS_LISI4 (insn2))
977 {
978 int imm = ((insn2 >> 21) & 0x1f);
979 adjust <<= imm;
980 if (csky_debug)
981 {
982 fprintf_unfiltered (gdb_stdlog,
983 "csky: lsli r4,r4,%d\n", imm);
984 }
985 }
986 else if (CSKY_32_IS_BSETI4 (insn2))
987 {
988 int imm = ((insn2 >> 21) & 0x1f);
989 adjust |= (1 << imm);
990 if (csky_debug)
991 {
992 fprintf_unfiltered (gdb_stdlog,
993 "csky: bseti r4,r4 %d\n", imm);
994 }
995 }
996 else if (CSKY_32_IS_BCLRI4 (insn2))
997 {
998 int imm = ((insn2 >> 21) & 0x1f);
999 adjust &= ~(1 << imm);
1000 if (csky_debug)
1001 {
1002 fprintf_unfiltered (gdb_stdlog,
1003 "csky: bclri r4,r4 %d\n", imm);
1004 }
1005 }
1006 else if (CSKY_32_IS_IXH4 (insn2))
1007 {
1008 adjust *= 3;
1009 if (csky_debug)
1010 {
1011 fprintf_unfiltered (gdb_stdlog,
1012 "csky: ixh r4,r4,r4\n");
1013 }
1014 }
1015 else if (CSKY_32_IS_IXW4 (insn2))
1016 {
1017 adjust *= 5;
1018 if (csky_debug)
1019 {
1020 fprintf_unfiltered (gdb_stdlog,
1021 "csky: ixw r4,r4,r4\n");
1022 }
1023 }
1024 else if (CSKY_16_IS_ADDI4 (insn2))
1025 {
1026 int imm = (insn2 & 0xff) + 1;
1027 adjust += imm;
1028 if (csky_debug)
1029 {
1030 fprintf_unfiltered (gdb_stdlog,
1031 "csky: addi r4,%d\n", imm);
1032 }
1033 }
1034 else if (CSKY_16_IS_SUBI4 (insn2))
1035 {
1036 int imm = (insn2 & 0xff) + 1;
1037 adjust -= imm;
1038 if (csky_debug)
1039 {
1040 fprintf_unfiltered (gdb_stdlog,
1041 "csky: subi r4,%d\n", imm);
1042 }
1043 }
1044 else if (CSKY_16_IS_NOR4 (insn2))
1045 {
1046 adjust = ~adjust;
1047 if (csky_debug)
1048 {
1049 fprintf_unfiltered (gdb_stdlog,
1050 "csky: nor r4,r4\n");
1051 }
1052 }
1053 else if (CSKY_16_IS_BSETI4 (insn2))
1054 {
1055 int imm = (insn2 & 0x1f);
1056 adjust |= (1 << imm);
1057 if (csky_debug)
1058 {
1059 fprintf_unfiltered (gdb_stdlog,
1060 "csky: bseti r4, %d\n", imm);
1061 }
1062 }
1063 else if (CSKY_16_IS_BCLRI4 (insn2))
1064 {
1065 int imm = (insn2 & 0x1f);
1066 adjust &= ~(1 << imm);
1067 if (csky_debug)
1068 {
1069 fprintf_unfiltered (gdb_stdlog,
1070 "csky: bclri r4, %d\n", imm);
1071 }
1072 }
1073 else if (CSKY_16_IS_LSLI4 (insn2))
1074 {
1075 int imm = (insn2 & 0x1f);
1076 adjust <<= imm;
1077 if (csky_debug)
1078 {
1079 fprintf_unfiltered (gdb_stdlog,
1080 "csky: lsli r4,r4, %d\n", imm);
1081 }
1082 }
1083
1084 offset += insn_len;
1085 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1086 };
1087
1088 if (csky_debug)
1089 {
1090 fprintf_unfiltered (gdb_stdlog, "csky: done looking for"
1091 " r4 adjusters\n");
1092 }
1093
1094 /* If the next insn adjusts the stack pointer, we keep
1095 everything; if not, we scrap it and we've found the
1096 end of the prologue. */
1097 if (CSKY_IS_SUBU4 (insn2))
1098 {
1099 addr += offset;
1100 stacksize += adjust;
1101 if (csky_debug)
1102 {
1103 fprintf_unfiltered (gdb_stdlog,
1104 "csky: found stack adjustment of"
1105 " 0x%x bytes.\n", adjust);
1106 fprintf_unfiltered (gdb_stdlog,
1107 "csky: skipping to new address %s\n",
1108 core_addr_to_string_nz (addr));
1109 fprintf_unfiltered (gdb_stdlog,
1110 "csky: continuing\n");
1111 }
1112 continue;
1113 }
1114
1115 /* None of these instructions are prologue, so don't touch
1116 anything. */
1117 if (csky_debug)
1118 {
1119 fprintf_unfiltered (gdb_stdlog,
1120 "csky: no subu sp,sp,r4; NOT altering"
1121 " stacksize.\n");
1122 }
1123 break;
1124 }
1125 }
1126 else
1127 {
1128 /* insn_len != 4. */
1129
1130 /* subi.sp sp,disp. */
1131 if (CSKY_16_IS_SUBI0 (insn))
1132 {
1133 int offset = CSKY_16_SUBI_IMM (insn);
1134 if (csky_debug)
1135 {
1136 fprintf_unfiltered (gdb_stdlog,
1137 "csky: got subi r0,%d; continuing\n",
1138 offset);
1139 }
1140 stacksize += offset;
1141 continue;
1142 }
1143 /* stw.16 rz,(sp,disp). */
1144 else if (CSKY_16_IS_STWx0 (insn))
1145 {
1146 /* Spill register: see note for IS_STM above. */
1147 int disp;
1148
1149 rn = CSKY_16_ST_VAL_REGNUM (insn);
1150 disp = CSKY_16_ST_OFFSET (insn);
1151 register_offsets[rn] = stacksize - disp;
1152 if (csky_debug)
1153 print_savedreg_msg (rn, register_offsets, true);
1154 continue;
1155 }
1156 else if (CSKY_16_IS_MOV_FP_SP (insn))
1157 {
1158 /* SP is saved to FP reg, means prologue may modify SP. */
1159 is_fp_saved = 1;
1160 adjust_fp = stacksize;
1161 continue;
1162 }
1163 else if (CSKY_16_IS_PUSH (insn))
1164 {
1165 /* Push for 16_bit. */
1166 int offset = 0;
1167 if (CSKY_16_IS_PUSH_R15 (insn))
1168 {
1169 stacksize += 4;
1170 register_offsets[15] = stacksize;
1171 if (csky_debug)
1172 print_savedreg_msg (15, register_offsets, false);
1173 offset += 4;
1174 }
1175 if (CSKY_16_PUSH_LIST1 (insn))
1176 {
1177 int num = CSKY_16_PUSH_LIST1 (insn);
1178 int tmp = 0;
1179 stacksize += num * 4;
1180 offset += num * 4;
1181 if (csky_debug)
1182 {
1183 fprintf_unfiltered (gdb_stdlog,
1184 "csky: push regs_array: r4-r%d\n",
1185 4 + num - 1);
1186 }
1187 for (rn = 4; rn <= 4 + num - 1; rn++)
1188 {
1189 register_offsets[rn] = stacksize - tmp;
1190 if (csky_debug)
1191 {
1192 fprintf_unfiltered (gdb_stdlog,
1193 "csky: r%d saved at 0x%x"
1194 " (offset %d)\n", rn,
1195 register_offsets[rn], offset);
1196 }
1197 tmp += 4;
1198 }
1199 }
1200
1201 framesize = stacksize;
1202 if (csky_debug)
1203 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1204 continue;
1205 }
1206 else if (CSKY_16_IS_LRW4 (insn) || CSKY_16_IS_MOVI4 (insn))
1207 {
1208 int adjust = 0;
1209 unsigned int insn2;
1210
1211 if (csky_debug)
1212 {
1213 fprintf_unfiltered (gdb_stdlog,
1214 "csky: looking at large frame\n");
1215 }
1216 if (CSKY_16_IS_LRW4 (insn))
1217 {
1218 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1219 int offset = ((insn & 0x300) >> 3) | (insn & 0x1f);
1220 int literal_addr = (addr + ( offset << 2)) & 0xfffffffc;
1221 adjust = read_memory_unsigned_integer (literal_addr, 4,
1222 byte_order);
1223 }
1224 else
1225 {
1226 /* CSKY_16_IS_MOVI4 (insn). */
1227 adjust = (insn & 0xff);
1228 }
1229
1230 if (csky_debug)
1231 {
1232 fprintf_unfiltered (gdb_stdlog,
1233 "csky: base stacksize=0x%x\n", adjust);
1234 }
1235
1236 /* May have zero or more instructions which modify r4. */
1237 if (csky_debug)
1238 {
1239 fprintf_unfiltered (gdb_stdlog,
1240 "csky: looking for r4 adjusters...\n");
1241 }
1242 int offset = 2;
1243 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1244 while (CSKY_IS_R4_ADJUSTER (insn2))
1245 {
1246 if (CSKY_32_IS_ADDI4 (insn2))
1247 {
1248 int imm = (insn2 & 0xfff) + 1;
1249 adjust += imm;
1250 if (csky_debug)
1251 {
1252 fprintf_unfiltered (gdb_stdlog,
1253 "csky: addi r4,%d\n", imm);
1254 }
1255 }
1256 else if (CSKY_32_IS_SUBI4 (insn2))
1257 {
1258 int imm = (insn2 & 0xfff) + 1;
1259 adjust -= imm;
1260 if (csky_debug)
1261 {
1262 fprintf_unfiltered (gdb_stdlog,
1263 "csky: subi r4,%d\n", imm);
1264 }
1265 }
1266 else if (CSKY_32_IS_NOR4 (insn2))
1267 {
1268 adjust = ~adjust;
1269 if (csky_debug)
1270 {
1271 fprintf_unfiltered (gdb_stdlog,
1272 "csky: nor r4,r4,r4\n");
1273 }
1274 }
1275 else if (CSKY_32_IS_ROTLI4 (insn2))
1276 {
1277 int imm = ((insn2 >> 21) & 0x1f);
1278 int temp = adjust >> (32 - imm);
1279 adjust <<= imm;
1280 adjust |= temp;
1281 if (csky_debug)
1282 {
1283 fprintf_unfiltered (gdb_stdlog,
1284 "csky: rotli r4,r4,%d\n", imm);
1285 }
1286 }
1287 else if (CSKY_32_IS_LISI4 (insn2))
1288 {
1289 int imm = ((insn2 >> 21) & 0x1f);
1290 adjust <<= imm;
1291 if (csky_debug)
1292 {
1293 fprintf_unfiltered (gdb_stdlog,
1294 "csky: lsli r4,r4,%d\n", imm);
1295 }
1296 }
1297 else if (CSKY_32_IS_BSETI4 (insn2))
1298 {
1299 int imm = ((insn2 >> 21) & 0x1f);
1300 adjust |= (1 << imm);
1301 if (csky_debug)
1302 {
1303 fprintf_unfiltered (gdb_stdlog,
1304 "csky: bseti r4,r4 %d\n", imm);
1305 }
1306 }
1307 else if (CSKY_32_IS_BCLRI4 (insn2))
1308 {
1309 int imm = ((insn2 >> 21) & 0x1f);
1310 adjust &= ~(1 << imm);
1311 if (csky_debug)
1312 {
1313 fprintf_unfiltered (gdb_stdlog,
1314 "csky: bclri r4,r4 %d\n", imm);
1315 }
1316 }
1317 else if (CSKY_32_IS_IXH4 (insn2))
1318 {
1319 adjust *= 3;
1320 if (csky_debug)
1321 {
1322 fprintf_unfiltered (gdb_stdlog,
1323 "csky: ixh r4,r4,r4\n");
1324 }
1325 }
1326 else if (CSKY_32_IS_IXW4 (insn2))
1327 {
1328 adjust *= 5;
1329 if (csky_debug)
1330 {
1331 fprintf_unfiltered (gdb_stdlog,
1332 "csky: ixw r4,r4,r4\n");
1333 }
1334 }
1335 else if (CSKY_16_IS_ADDI4 (insn2))
1336 {
1337 int imm = (insn2 & 0xff) + 1;
1338 adjust += imm;
1339 if (csky_debug)
1340 {
1341 fprintf_unfiltered (gdb_stdlog,
1342 "csky: addi r4,%d\n", imm);
1343 }
1344 }
1345 else if (CSKY_16_IS_SUBI4 (insn2))
1346 {
1347 int imm = (insn2 & 0xff) + 1;
1348 adjust -= imm;
1349 if (csky_debug)
1350 {
1351 fprintf_unfiltered (gdb_stdlog,
1352 "csky: subi r4,%d\n", imm);
1353 }
1354 }
1355 else if (CSKY_16_IS_NOR4 (insn2))
1356 {
1357 adjust = ~adjust;
1358 if (csky_debug)
1359 {
1360 fprintf_unfiltered (gdb_stdlog,
1361 "csky: nor r4,r4\n");
1362 }
1363 }
1364 else if (CSKY_16_IS_BSETI4 (insn2))
1365 {
1366 int imm = (insn2 & 0x1f);
1367 adjust |= (1 << imm);
1368 if (csky_debug)
1369 {
1370 fprintf_unfiltered (gdb_stdlog,
1371 "csky: bseti r4, %d\n", imm);
1372 }
1373 }
1374 else if (CSKY_16_IS_BCLRI4 (insn2))
1375 {
1376 int imm = (insn2 & 0x1f);
1377 adjust &= ~(1 << imm);
1378 if (csky_debug)
1379 {
1380 fprintf_unfiltered (gdb_stdlog,
1381 "csky: bclri r4, %d\n", imm);
1382 }
1383 }
1384 else if (CSKY_16_IS_LSLI4 (insn2))
1385 {
1386 int imm = (insn2 & 0x1f);
1387 adjust <<= imm;
1388 if (csky_debug)
1389 {
1390 fprintf_unfiltered (gdb_stdlog,
1391 "csky: lsli r4,r4, %d\n", imm);
1392 }
1393 }
1394
1395 offset += insn_len;
1396 insn_len = csky_get_insn (gdbarch, addr + offset, &insn2);
1397 };
1398
1399 if (csky_debug)
1400 {
1401 fprintf_unfiltered (gdb_stdlog, "csky: "
1402 "done looking for r4 adjusters\n");
1403 }
1404
1405 /* If the next instruction adjusts the stack pointer, we keep
1406 everything; if not, we scrap it and we've found the end
1407 of the prologue. */
1408 if (CSKY_IS_SUBU4 (insn2))
1409 {
1410 addr += offset;
1411 stacksize += adjust;
1412 if (csky_debug)
1413 {
1414 fprintf_unfiltered (gdb_stdlog, "csky: "
1415 "found stack adjustment of 0x%x"
1416 " bytes.\n", adjust);
1417 fprintf_unfiltered (gdb_stdlog, "csky: "
1418 "skipping to new address %s\n",
1419 core_addr_to_string_nz (addr));
1420 fprintf_unfiltered (gdb_stdlog, "csky: continuing\n");
1421 }
1422 continue;
1423 }
1424
1425 /* None of these instructions are prologue, so don't touch
1426 anything. */
1427 if (csky_debug)
1428 {
1429 fprintf_unfiltered (gdb_stdlog, "csky: no subu sp,r4; "
1430 "NOT altering stacksize.\n");
1431 }
1432 break;
1433 }
1434 }
1435
1436 /* This is not a prologue instruction, so stop here. */
1437 if (csky_debug)
1438 {
1439 fprintf_unfiltered (gdb_stdlog, "csky: insn is not a prologue"
1440 " insn -- ending scan\n");
1441 }
1442 break;
1443 }
1444
1445 if (this_cache)
1446 {
1447 CORE_ADDR unwound_fp;
1448 enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
1449 this_cache->framesize = framesize;
1450
1451 if (is_fp_saved)
1452 {
1453 this_cache->framereg = CSKY_FP_REGNUM;
1454 unwound_fp = get_frame_register_unsigned (this_frame,
1455 this_cache->framereg);
1456 this_cache->prev_sp = unwound_fp + adjust_fp;
1457 }
1458 else
1459 {
1460 this_cache->framereg = CSKY_SP_REGNUM;
1461 unwound_fp = get_frame_register_unsigned (this_frame,
1462 this_cache->framereg);
1463 this_cache->prev_sp = unwound_fp + stacksize;
1464 }
1465
1466 /* Note where saved registers are stored. The offsets in
1467 REGISTER_OFFSETS are computed relative to the top of the frame. */
1468 for (rn = 0; rn < CSKY_NUM_GREGS; rn++)
1469 {
1470 if (register_offsets[rn] >= 0)
1471 {
1472 this_cache->saved_regs[rn].addr
1473 = this_cache->prev_sp - register_offsets[rn];
1474 if (csky_debug)
1475 {
1476 CORE_ADDR rn_value = read_memory_unsigned_integer (
1477 this_cache->saved_regs[rn].addr, 4, byte_order);
1478 fprintf_unfiltered (gdb_stdlog, "Saved register %s "
1479 "stored at 0x%08lx, value=0x%08lx\n",
1480 csky_register_names[rn],
1481 (unsigned long)
1482 this_cache->saved_regs[rn].addr,
1483 (unsigned long) rn_value);
1484 }
1485 }
1486 }
1487 if (lr_type == LR_TYPE_EPC)
1488 {
1489 /* rte || epc . */
1490 this_cache->saved_regs[CSKY_PC_REGNUM]
1491 = this_cache->saved_regs[CSKY_EPC_REGNUM];
1492 }
1493 else if (lr_type == LR_TYPE_FPC)
1494 {
1495 /* rfi || fpc . */
1496 this_cache->saved_regs[CSKY_PC_REGNUM]
1497 = this_cache->saved_regs[CSKY_FPC_REGNUM];
1498 }
1499 else
1500 {
1501 this_cache->saved_regs[CSKY_PC_REGNUM]
1502 = this_cache->saved_regs[CSKY_LR_REGNUM];
1503 }
1504 }
1505
1506 return addr;
1507 }
1508
1509 /* Detect whether PC is at a point where the stack frame has been
1510 destroyed. */
1511
1512 static int
1513 csky_stack_frame_destroyed_p (struct gdbarch *gdbarch, CORE_ADDR pc)
1514 {
1515 unsigned int insn;
1516 CORE_ADDR addr;
1517 CORE_ADDR func_start, func_end;
1518
1519 if (!find_pc_partial_function (pc, NULL, &func_start, &func_end))
1520 return 0;
1521
1522 bool fp_saved = false;
1523 int insn_len;
1524 for (addr = func_start; addr < func_end; addr += insn_len)
1525 {
1526 /* Get next insn. */
1527 insn_len = csky_get_insn (gdbarch, addr, &insn);
1528
1529 if (insn_len == 2)
1530 {
1531 /* Is sp is saved to fp. */
1532 if (CSKY_16_IS_MOV_FP_SP (insn))
1533 fp_saved = true;
1534 /* If sp was saved to fp and now being restored from
1535 fp then it indicates the start of epilog. */
1536 else if (fp_saved && CSKY_16_IS_MOV_SP_FP (insn))
1537 return pc >= addr;
1538 }
1539 }
1540 return 0;
1541 }
1542
1543 /* Implement the skip_prologue gdbarch hook. */
1544
1545 static CORE_ADDR
1546 csky_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
1547 {
1548 CORE_ADDR func_addr, func_end;
1549 struct symtab_and_line sal;
1550 const int default_search_limit = 128;
1551
1552 /* See if we can find the end of the prologue using the symbol table. */
1553 if (find_pc_partial_function (pc, NULL, &func_addr, &func_end))
1554 {
1555 CORE_ADDR post_prologue_pc
1556 = skip_prologue_using_sal (gdbarch, func_addr);
1557
1558 if (post_prologue_pc != 0)
1559 return std::max (pc, post_prologue_pc);
1560 }
1561 else
1562 func_end = pc + default_search_limit;
1563
1564 /* Find the end of prologue. Default lr_type. */
1565 return csky_analyze_prologue (gdbarch, pc, func_end, func_end,
1566 NULL, NULL, LR_TYPE_R15);
1567 }
1568
1569 /* Implement the breakpoint_kind_from_pc gdbarch method. */
1570
1571 static int
1572 csky_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
1573 {
1574 if (csky_pc_is_csky16 (gdbarch, *pcptr))
1575 return CSKY_INSN_SIZE16;
1576 else
1577 return CSKY_INSN_SIZE32;
1578 }
1579
1580 /* Implement the sw_breakpoint_from_kind gdbarch method. */
1581
1582 static const gdb_byte *
1583 csky_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
1584 {
1585 *size = kind;
1586 if (kind == CSKY_INSN_SIZE16)
1587 {
1588 static gdb_byte csky_16_breakpoint[] = { 0, 0 };
1589 return csky_16_breakpoint;
1590 }
1591 else
1592 {
1593 static gdb_byte csky_32_breakpoint[] = { 0, 0, 0, 0 };
1594 return csky_32_breakpoint;
1595 }
1596 }
1597
1598 /* Implement the memory_insert_breakpoint gdbarch method. */
1599
1600 static int
1601 csky_memory_insert_breakpoint (struct gdbarch *gdbarch,
1602 struct bp_target_info *bp_tgt)
1603 {
1604 int val;
1605 const unsigned char *bp;
1606 gdb_byte bp_write_record1[] = { 0, 0, 0, 0 };
1607 gdb_byte bp_write_record2[] = { 0, 0, 0, 0 };
1608 gdb_byte bp_record[] = { 0, 0, 0, 0 };
1609
1610 /* Sanity-check bp_address. */
1611 if (bp_tgt->reqstd_address % 2)
1612 warning (_("Invalid breakpoint address 0x%x is an odd number."),
1613 (unsigned int) bp_tgt->reqstd_address);
1614 scoped_restore restore_memory
1615 = make_scoped_restore_show_memory_breakpoints (1);
1616
1617 /* Determine appropriate breakpoint_kind for this address. */
1618 bp_tgt->kind = csky_breakpoint_kind_from_pc (gdbarch,
1619 &bp_tgt->reqstd_address);
1620
1621 /* Save the memory contents. */
1622 bp_tgt->shadow_len = bp_tgt->kind;
1623
1624 /* Fill bp_tgt->placed_address. */
1625 bp_tgt->placed_address = bp_tgt->reqstd_address;
1626
1627 if (bp_tgt->kind == CSKY_INSN_SIZE16)
1628 {
1629 if ((bp_tgt->reqstd_address % 4) == 0)
1630 {
1631 /* Read two bytes. */
1632 val = target_read_memory (bp_tgt->reqstd_address,
1633 bp_tgt->shadow_contents, 2);
1634 if (val)
1635 return val;
1636
1637 /* Read two bytes. */
1638 val = target_read_memory (bp_tgt->reqstd_address + 2,
1639 bp_record, 2);
1640 if (val)
1641 return val;
1642
1643 /* Write the breakpoint. */
1644 bp_write_record1[2] = bp_record[0];
1645 bp_write_record1[3] = bp_record[1];
1646 bp = bp_write_record1;
1647 val = target_write_raw_memory (bp_tgt->reqstd_address, bp,
1648 CSKY_WR_BKPT_MODE);
1649 }
1650 else
1651 {
1652 val = target_read_memory (bp_tgt->reqstd_address,
1653 bp_tgt->shadow_contents, 2);
1654 if (val)
1655 return val;
1656
1657 val = target_read_memory (bp_tgt->reqstd_address - 2,
1658 bp_record, 2);
1659 if (val)
1660 return val;
1661
1662 /* Write the breakpoint. */
1663 bp_write_record1[0] = bp_record[0];
1664 bp_write_record1[1] = bp_record[1];
1665 bp = bp_write_record1;
1666 val = target_write_raw_memory (bp_tgt->reqstd_address - 2,
1667 bp, CSKY_WR_BKPT_MODE);
1668 }
1669 }
1670 else
1671 {
1672 if (bp_tgt->placed_address % 4 == 0)
1673 {
1674 val = target_read_memory (bp_tgt->reqstd_address,
1675 bp_tgt->shadow_contents,
1676 CSKY_WR_BKPT_MODE);
1677 if (val)
1678 return val;
1679
1680 /* Write the breakpoint. */
1681 bp = bp_write_record1;
1682 val = target_write_raw_memory (bp_tgt->reqstd_address,
1683 bp, CSKY_WR_BKPT_MODE);
1684 }
1685 else
1686 {
1687 val = target_read_memory (bp_tgt->reqstd_address,
1688 bp_tgt->shadow_contents,
1689 CSKY_WR_BKPT_MODE);
1690 if (val)
1691 return val;
1692
1693 val = target_read_memory (bp_tgt->reqstd_address - 2,
1694 bp_record, 2);
1695 if (val)
1696 return val;
1697
1698 val = target_read_memory (bp_tgt->reqstd_address + 4,
1699 bp_record + 2, 2);
1700 if (val)
1701 return val;
1702
1703 bp_write_record1[0] = bp_record[0];
1704 bp_write_record1[1] = bp_record[1];
1705 bp_write_record2[2] = bp_record[2];
1706 bp_write_record2[3] = bp_record[3];
1707
1708 /* Write the breakpoint. */
1709 bp = bp_write_record1;
1710 val = target_write_raw_memory (bp_tgt->reqstd_address - 2, bp,
1711 CSKY_WR_BKPT_MODE);
1712 if (val)
1713 return val;
1714
1715 /* Write the breakpoint. */
1716 bp = bp_write_record2;
1717 val = target_write_raw_memory (bp_tgt->reqstd_address + 2, bp,
1718 CSKY_WR_BKPT_MODE);
1719 }
1720 }
1721 return val;
1722 }
1723
1724 /* Restore the breakpoint shadow_contents to the target. */
1725
1726 static int
1727 csky_memory_remove_breakpoint (struct gdbarch *gdbarch,
1728 struct bp_target_info *bp_tgt)
1729 {
1730 int val;
1731 gdb_byte bp_record[] = { 0, 0, 0, 0, 0, 0, 0, 0 };
1732 /* Different for shadow_len 2 or 4. */
1733 if (bp_tgt->shadow_len == 2)
1734 {
1735 /* Do word-sized writes on word-aligned boundaries and read
1736 padding bytes as necessary. */
1737 if (bp_tgt->reqstd_address % 4 == 0)
1738 {
1739 val = target_read_memory (bp_tgt->reqstd_address + 2,
1740 bp_record + 2, 2);
1741 if (val)
1742 return val;
1743 bp_record[0] = bp_tgt->shadow_contents[0];
1744 bp_record[1] = bp_tgt->shadow_contents[1];
1745 return target_write_raw_memory (bp_tgt->reqstd_address,
1746 bp_record, CSKY_WR_BKPT_MODE);
1747 }
1748 else
1749 {
1750 val = target_read_memory (bp_tgt->reqstd_address - 2,
1751 bp_record, 2);
1752 if (val)
1753 return val;
1754 bp_record[2] = bp_tgt->shadow_contents[0];
1755 bp_record[3] = bp_tgt->shadow_contents[1];
1756 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1757 bp_record, CSKY_WR_BKPT_MODE);
1758 }
1759 }
1760 else
1761 {
1762 /* Do word-sized writes on word-aligned boundaries and read
1763 padding bytes as necessary. */
1764 if (bp_tgt->placed_address % 4 == 0)
1765 {
1766 return target_write_raw_memory (bp_tgt->reqstd_address,
1767 bp_tgt->shadow_contents,
1768 CSKY_WR_BKPT_MODE);
1769 }
1770 else
1771 {
1772 val = target_read_memory (bp_tgt->reqstd_address - 2,
1773 bp_record, 2);
1774 if (val)
1775 return val;
1776 val = target_read_memory (bp_tgt->reqstd_address + 4,
1777 bp_record+6, 2);
1778 if (val)
1779 return val;
1780
1781 bp_record[2] = bp_tgt->shadow_contents[0];
1782 bp_record[3] = bp_tgt->shadow_contents[1];
1783 bp_record[4] = bp_tgt->shadow_contents[2];
1784 bp_record[5] = bp_tgt->shadow_contents[3];
1785
1786 return target_write_raw_memory (bp_tgt->reqstd_address - 2,
1787 bp_record,
1788 CSKY_WR_BKPT_MODE * 2);
1789 }
1790 }
1791 }
1792
1793 /* Determine link register type. */
1794
1795 static lr_type_t
1796 csky_analyze_lr_type (struct gdbarch *gdbarch,
1797 CORE_ADDR start_pc, CORE_ADDR end_pc)
1798 {
1799 CORE_ADDR addr;
1800 unsigned int insn, insn_len;
1801 insn_len = 2;
1802
1803 for (addr = start_pc; addr < end_pc; addr += insn_len)
1804 {
1805 insn_len = csky_get_insn (gdbarch, addr, &insn);
1806 if (insn_len == 4)
1807 {
1808 if (CSKY_32_IS_MFCR_EPSR (insn) || CSKY_32_IS_MFCR_EPC (insn)
1809 || CSKY_32_IS_RTE (insn))
1810 return LR_TYPE_EPC;
1811 }
1812 else if (CSKY_32_IS_MFCR_FPSR (insn) || CSKY_32_IS_MFCR_FPC (insn)
1813 || CSKY_32_IS_RFI (insn))
1814 return LR_TYPE_FPC;
1815 else if (CSKY_32_IS_JMP (insn) || CSKY_32_IS_BR (insn)
1816 || CSKY_32_IS_JMPIX (insn) || CSKY_32_IS_JMPI (insn))
1817 return LR_TYPE_R15;
1818 else
1819 {
1820 /* 16 bit instruction. */
1821 if (CSKY_16_IS_JMP (insn) || CSKY_16_IS_BR (insn)
1822 || CSKY_16_IS_JMPIX (insn))
1823 return LR_TYPE_R15;
1824 }
1825 }
1826 return LR_TYPE_R15;
1827 }
1828
1829 /* Heuristic unwinder. */
1830
1831 static struct csky_unwind_cache *
1832 csky_frame_unwind_cache (struct frame_info *this_frame)
1833 {
1834 CORE_ADDR prologue_start, prologue_end, func_end, prev_pc, block_addr;
1835 struct csky_unwind_cache *cache;
1836 const struct block *bl;
1837 unsigned long func_size = 0;
1838 struct gdbarch *gdbarch = get_frame_arch (this_frame);
1839 unsigned int sp_regnum = CSKY_SP_REGNUM;
1840
1841 /* Default lr type is r15. */
1842 lr_type_t lr_type = LR_TYPE_R15;
1843
1844 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1845 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1846
1847 /* Assume there is no frame until proven otherwise. */
1848 cache->framereg = sp_regnum;
1849
1850 cache->framesize = 0;
1851
1852 prev_pc = get_frame_pc (this_frame);
1853 block_addr = get_frame_address_in_block (this_frame);
1854 if (find_pc_partial_function (block_addr, NULL, &prologue_start,
1855 &func_end) == 0)
1856 /* We couldn't find a function containing block_addr, so bail out
1857 and hope for the best. */
1858 return cache;
1859
1860 /* Get the (function) symbol matching prologue_start. */
1861 bl = block_for_pc (prologue_start);
1862 if (bl != NULL)
1863 func_size = bl->endaddr - bl->startaddr;
1864 else
1865 {
1866 struct bound_minimal_symbol msymbol
1867 = lookup_minimal_symbol_by_pc (prologue_start);
1868 if (msymbol.minsym != NULL)
1869 func_size = MSYMBOL_SIZE (msymbol.minsym);
1870 }
1871
1872 /* If FUNC_SIZE is 0 we may have a special-case use of lr
1873 e.g. exception or interrupt. */
1874 if (func_size == 0)
1875 lr_type = csky_analyze_lr_type (gdbarch, prologue_start, func_end);
1876
1877 prologue_end = std::min (func_end, prev_pc);
1878
1879 /* Analyze the function prologue. */
1880 csky_analyze_prologue (gdbarch, prologue_start, prologue_end,
1881 func_end, this_frame, cache, lr_type);
1882
1883 /* gdbarch_sp_regnum contains the value and not the address. */
1884 trad_frame_set_value (cache->saved_regs, sp_regnum, cache->prev_sp);
1885 return cache;
1886 }
1887
1888 /* Implement the unwind_pc gdbarch method. */
1889
1890 static CORE_ADDR
1891 csky_unwind_pc (struct gdbarch *gdbarch, struct frame_info *next_frame)
1892 {
1893 return frame_unwind_register_unsigned (next_frame, CSKY_PC_REGNUM);
1894 }
1895
1896 /* Implement the this_id function for the normal unwinder. */
1897
1898 static void
1899 csky_frame_this_id (struct frame_info *this_frame,
1900 void **this_prologue_cache, struct frame_id *this_id)
1901 {
1902 struct csky_unwind_cache *cache;
1903 struct frame_id id;
1904
1905 if (*this_prologue_cache == NULL)
1906 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1907 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1908
1909 /* This marks the outermost frame. */
1910 if (cache->prev_sp == 0)
1911 return;
1912
1913 id = frame_id_build (cache->prev_sp, get_frame_func (this_frame));
1914 *this_id = id;
1915 }
1916
1917 /* Implement the prev_register function for the normal unwinder. */
1918
1919 static struct value *
1920 csky_frame_prev_register (struct frame_info *this_frame,
1921 void **this_prologue_cache, int regnum)
1922 {
1923 struct csky_unwind_cache *cache;
1924
1925 if (*this_prologue_cache == NULL)
1926 *this_prologue_cache = csky_frame_unwind_cache (this_frame);
1927 cache = (struct csky_unwind_cache *) *this_prologue_cache;
1928
1929 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
1930 regnum);
1931 }
1932
1933 /* Data structures for the normal prologue-analysis-based
1934 unwinder. */
1935
1936 static const struct frame_unwind csky_unwind_cache = {
1937 NORMAL_FRAME,
1938 default_frame_unwind_stop_reason,
1939 csky_frame_this_id,
1940 csky_frame_prev_register,
1941 NULL,
1942 default_frame_sniffer,
1943 NULL,
1944 NULL
1945 };
1946
1947
1948
1949 static int
1950 csky_stub_unwind_sniffer (const struct frame_unwind *self,
1951 struct frame_info *this_frame,
1952 void **this_prologue_cache)
1953 {
1954 CORE_ADDR addr_in_block;
1955
1956 addr_in_block = get_frame_address_in_block (this_frame);
1957
1958 if (find_pc_partial_function (addr_in_block, NULL, NULL, NULL) == 0
1959 || in_plt_section (addr_in_block))
1960 return 1;
1961
1962 return 0;
1963 }
1964
1965 static struct csky_unwind_cache *
1966 csky_make_stub_cache (struct frame_info *this_frame)
1967 {
1968 struct csky_unwind_cache *cache;
1969
1970 cache = FRAME_OBSTACK_ZALLOC (struct csky_unwind_cache);
1971 cache->saved_regs = trad_frame_alloc_saved_regs (this_frame);
1972 cache->prev_sp = get_frame_register_unsigned (this_frame, CSKY_SP_REGNUM);
1973
1974 return cache;
1975 }
1976
1977 static void
1978 csky_stub_this_id (struct frame_info *this_frame,
1979 void **this_cache,
1980 struct frame_id *this_id)
1981 {
1982 struct csky_unwind_cache *cache;
1983
1984 if (*this_cache == NULL)
1985 *this_cache = csky_make_stub_cache (this_frame);
1986 cache = (struct csky_unwind_cache *) *this_cache;
1987
1988 /* Our frame ID for a stub frame is the current SP and LR. */
1989 *this_id = frame_id_build (cache->prev_sp, get_frame_pc (this_frame));
1990 }
1991
1992 static struct value *
1993 csky_stub_prev_register (struct frame_info *this_frame,
1994 void **this_cache,
1995 int prev_regnum)
1996 {
1997 struct csky_unwind_cache *cache;
1998
1999 if (*this_cache == NULL)
2000 *this_cache = csky_make_stub_cache (this_frame);
2001 cache = (struct csky_unwind_cache *) *this_cache;
2002
2003 /* If we are asked to unwind the PC, then return the LR. */
2004 if (prev_regnum == CSKY_PC_REGNUM)
2005 {
2006 CORE_ADDR lr;
2007
2008 lr = frame_unwind_register_unsigned (this_frame, CSKY_LR_REGNUM);
2009 return frame_unwind_got_constant (this_frame, prev_regnum, lr);
2010 }
2011
2012 if (prev_regnum == CSKY_SP_REGNUM)
2013 return frame_unwind_got_constant (this_frame, prev_regnum, cache->prev_sp);
2014
2015 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
2016 prev_regnum);
2017 }
2018
2019 struct frame_unwind csky_stub_unwind = {
2020 NORMAL_FRAME,
2021 default_frame_unwind_stop_reason,
2022 csky_stub_this_id,
2023 csky_stub_prev_register,
2024 NULL,
2025 csky_stub_unwind_sniffer
2026 };
2027
2028 /* Implement the this_base, this_locals, and this_args hooks
2029 for the normal unwinder. */
2030
2031 static CORE_ADDR
2032 csky_frame_base_address (struct frame_info *this_frame, void **this_cache)
2033 {
2034 struct csky_unwind_cache *cache;
2035
2036 if (*this_cache == NULL)
2037 *this_cache = csky_frame_unwind_cache (this_frame);
2038 cache = (struct csky_unwind_cache *) *this_cache;
2039
2040 return cache->prev_sp - cache->framesize;
2041 }
2042
2043 static const struct frame_base csky_frame_base = {
2044 &csky_unwind_cache,
2045 csky_frame_base_address,
2046 csky_frame_base_address,
2047 csky_frame_base_address
2048 };
2049
2050 /* Implement the dummy_id gdbarch method. The frame ID's base
2051 needs to match the TOS value saved by save_dummy_frame_tos,
2052 and the PC should match the dummy frame's breakpoint. */
2053
2054 static struct frame_id
2055 csky_dummy_id (struct gdbarch *gdbarch, struct frame_info *this_frame)
2056 {
2057 unsigned int sp_regnum = CSKY_SP_REGNUM;
2058
2059 CORE_ADDR sp = get_frame_register_unsigned (this_frame, sp_regnum);
2060 return frame_id_build (sp, get_frame_pc (this_frame));
2061 }
2062
2063 /* Initialize register access method. */
2064
2065 static void
2066 csky_dwarf2_frame_init_reg (struct gdbarch *gdbarch, int regnum,
2067 struct dwarf2_frame_state_reg *reg,
2068 struct frame_info *this_frame)
2069 {
2070 if (regnum == gdbarch_pc_regnum (gdbarch))
2071 reg->how = DWARF2_FRAME_REG_RA;
2072 else if (regnum == gdbarch_sp_regnum (gdbarch))
2073 reg->how = DWARF2_FRAME_REG_CFA;
2074 }
2075
2076 /* Create csky register groups. */
2077
2078 static void
2079 csky_init_reggroup ()
2080 {
2081 cr_reggroup = reggroup_new ("cr", USER_REGGROUP);
2082 fr_reggroup = reggroup_new ("fr", USER_REGGROUP);
2083 vr_reggroup = reggroup_new ("vr", USER_REGGROUP);
2084 mmu_reggroup = reggroup_new ("mmu", USER_REGGROUP);
2085 prof_reggroup = reggroup_new ("profiling", USER_REGGROUP);
2086 }
2087
2088 /* Add register groups into reggroup list. */
2089
2090 static void
2091 csky_add_reggroups (struct gdbarch *gdbarch)
2092 {
2093 reggroup_add (gdbarch, all_reggroup);
2094 reggroup_add (gdbarch, general_reggroup);
2095 reggroup_add (gdbarch, cr_reggroup);
2096 reggroup_add (gdbarch, fr_reggroup);
2097 reggroup_add (gdbarch, vr_reggroup);
2098 reggroup_add (gdbarch, mmu_reggroup);
2099 reggroup_add (gdbarch, prof_reggroup);
2100 }
2101
2102 /* Return the groups that a CSKY register can be categorised into. */
2103
2104 static int
2105 csky_register_reggroup_p (struct gdbarch *gdbarch, int regnum,
2106 struct reggroup *reggroup)
2107 {
2108 int raw_p;
2109
2110 if (gdbarch_register_name (gdbarch, regnum) == NULL
2111 || gdbarch_register_name (gdbarch, regnum)[0] == '\0')
2112 return 0;
2113
2114 if (reggroup == all_reggroup)
2115 return 1;
2116
2117 raw_p = regnum < gdbarch_num_regs (gdbarch);
2118 if (reggroup == save_reggroup || reggroup == restore_reggroup)
2119 return raw_p;
2120
2121 if (((regnum >= CSKY_R0_REGNUM) && (regnum <= CSKY_R0_REGNUM + 31))
2122 && (reggroup == general_reggroup))
2123 return 1;
2124
2125 if (((regnum == CSKY_PC_REGNUM)
2126 || ((regnum >= CSKY_CR0_REGNUM)
2127 && (regnum <= CSKY_CR0_REGNUM + 30)))
2128 && (reggroup == cr_reggroup))
2129 return 2;
2130
2131 if ((((regnum >= CSKY_VR0_REGNUM) && (regnum <= CSKY_VR0_REGNUM + 15))
2132 || ((regnum >= CSKY_VCR0_REGNUM)
2133 && (regnum <= CSKY_VCR0_REGNUM + 2)))
2134 && (reggroup == vr_reggroup))
2135 return 3;
2136
2137 if (((regnum >= CSKY_MMU_REGNUM) && (regnum <= CSKY_MMU_REGNUM + 8))
2138 && (reggroup == mmu_reggroup))
2139 return 4;
2140
2141 if (((regnum >= CSKY_PROFCR_REGNUM)
2142 && (regnum <= CSKY_PROFCR_REGNUM + 48))
2143 && (reggroup == prof_reggroup))
2144 return 5;
2145
2146 if ((((regnum >= CSKY_FR0_REGNUM) && (regnum <= CSKY_FR0_REGNUM + 15))
2147 || ((regnum >= CSKY_VCR0_REGNUM) && (regnum <= CSKY_VCR0_REGNUM + 2)))
2148 && (reggroup == fr_reggroup))
2149 return 6;
2150
2151 return 0;
2152 }
2153
2154 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
2155
2156 static int
2157 csky_dwarf_reg_to_regnum (struct gdbarch *gdbarch, int dw_reg)
2158 {
2159 if (dw_reg < 0 || dw_reg >= CSKY_NUM_REGS)
2160 return -1;
2161 return dw_reg;
2162 }
2163
2164 /* Override interface for command: info register. */
2165
2166 static void
2167 csky_print_registers_info (struct gdbarch *gdbarch, struct ui_file *file,
2168 struct frame_info *frame, int regnum, int all)
2169 {
2170 /* Call default print_registers_info function. */
2171 default_print_registers_info (gdbarch, file, frame, regnum, all);
2172
2173 /* For command: info register. */
2174 if (regnum == -1 && all == 0)
2175 {
2176 default_print_registers_info (gdbarch, file, frame,
2177 CSKY_PC_REGNUM, 0);
2178 default_print_registers_info (gdbarch, file, frame,
2179 CSKY_EPC_REGNUM, 0);
2180 default_print_registers_info (gdbarch, file, frame,
2181 CSKY_CR0_REGNUM, 0);
2182 default_print_registers_info (gdbarch, file, frame,
2183 CSKY_EPSR_REGNUM, 0);
2184 }
2185 return;
2186 }
2187
2188 /* Initialize the current architecture based on INFO. If possible,
2189 re-use an architecture from ARCHES, which is a list of
2190 architectures already created during this debugging session.
2191
2192 Called at program startup, when reading a core file, and when
2193 reading a binary file. */
2194
2195 static struct gdbarch *
2196 csky_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
2197 {
2198 struct gdbarch *gdbarch;
2199 struct gdbarch_tdep *tdep;
2200
2201 /* Find a candidate among the list of pre-declared architectures. */
2202 arches = gdbarch_list_lookup_by_info (arches, &info);
2203 if (arches != NULL)
2204 return arches->gdbarch;
2205
2206 /* None found, create a new architecture from the information
2207 provided. */
2208 tdep = XCNEW (struct gdbarch_tdep);
2209 gdbarch = gdbarch_alloc (&info, tdep);
2210
2211 /* Target data types. */
2212 set_gdbarch_ptr_bit (gdbarch, 32);
2213 set_gdbarch_addr_bit (gdbarch, 32);
2214 set_gdbarch_short_bit (gdbarch, 16);
2215 set_gdbarch_int_bit (gdbarch, 32);
2216 set_gdbarch_long_bit (gdbarch, 32);
2217 set_gdbarch_long_long_bit (gdbarch, 64);
2218 set_gdbarch_float_bit (gdbarch, 32);
2219 set_gdbarch_double_bit (gdbarch, 64);
2220 set_gdbarch_float_format (gdbarch, floatformats_ieee_single);
2221 set_gdbarch_double_format (gdbarch, floatformats_ieee_double);
2222
2223 /* Information about the target architecture. */
2224 set_gdbarch_return_value (gdbarch, csky_return_value);
2225 set_gdbarch_breakpoint_kind_from_pc (gdbarch, csky_breakpoint_kind_from_pc);
2226 set_gdbarch_sw_breakpoint_from_kind (gdbarch, csky_sw_breakpoint_from_kind);
2227
2228 /* Register architecture. */
2229 set_gdbarch_num_regs (gdbarch, CSKY_NUM_REGS);
2230 set_gdbarch_pc_regnum (gdbarch, CSKY_PC_REGNUM);
2231 set_gdbarch_sp_regnum (gdbarch, CSKY_SP_REGNUM);
2232 set_gdbarch_register_name (gdbarch, csky_register_name);
2233 set_gdbarch_register_type (gdbarch, csky_register_type);
2234 set_gdbarch_read_pc (gdbarch, csky_read_pc);
2235 set_gdbarch_write_pc (gdbarch, csky_write_pc);
2236 set_gdbarch_print_registers_info (gdbarch, csky_print_registers_info);
2237 csky_add_reggroups (gdbarch);
2238 set_gdbarch_register_reggroup_p (gdbarch, csky_register_reggroup_p);
2239 set_gdbarch_stab_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2240 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, csky_dwarf_reg_to_regnum);
2241 dwarf2_frame_set_init_reg (gdbarch, csky_dwarf2_frame_init_reg);
2242
2243 /* Functions to analyze frames. */
2244 frame_base_set_default (gdbarch, &csky_frame_base);
2245 set_gdbarch_skip_prologue (gdbarch, csky_skip_prologue);
2246 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
2247 set_gdbarch_frame_align (gdbarch, csky_frame_align);
2248 set_gdbarch_stack_frame_destroyed_p (gdbarch, csky_stack_frame_destroyed_p);
2249
2250 /* Functions to access frame data. */
2251 set_gdbarch_unwind_pc (gdbarch, csky_unwind_pc);
2252 set_gdbarch_unwind_sp (gdbarch, csky_unwind_sp);
2253
2254 /* Functions handling dummy frames. */
2255 set_gdbarch_push_dummy_call (gdbarch, csky_push_dummy_call);
2256 set_gdbarch_dummy_id (gdbarch, csky_dummy_id);
2257
2258 /* Frame unwinders. Use DWARF debug info if available,
2259 otherwise use our own unwinder. */
2260 dwarf2_append_unwinders (gdbarch);
2261 frame_unwind_append_unwinder (gdbarch, &csky_stub_unwind);
2262 frame_unwind_append_unwinder (gdbarch, &csky_unwind_cache);
2263
2264 /* Breakpoints. */
2265 set_gdbarch_memory_insert_breakpoint (gdbarch,
2266 csky_memory_insert_breakpoint);
2267 set_gdbarch_memory_remove_breakpoint (gdbarch,
2268 csky_memory_remove_breakpoint);
2269
2270 /* Hook in ABI-specific overrides, if they have been registered. */
2271 gdbarch_init_osabi (info, gdbarch);
2272
2273 /* Support simple overlay manager. */
2274 set_gdbarch_overlay_update (gdbarch, simple_overlay_update);
2275 set_gdbarch_char_signed (gdbarch, 0);
2276 return gdbarch;
2277 }
2278
2279 void
2280 _initialize_csky_tdep (void)
2281 {
2282
2283 register_gdbarch_init (bfd_arch_csky, csky_gdbarch_init);
2284
2285 csky_init_reggroup ();
2286
2287 /* Allow debugging this file's internals. */
2288 add_setshow_boolean_cmd ("csky", class_maintenance, &csky_debug,
2289 _("Set C-Sky debugging."),
2290 _("Show C-Sky debugging."),
2291 _("When on, C-Sky specific debugging is enabled."),
2292 NULL,
2293 NULL,
2294 &setdebuglist, &showdebuglist);
2295 }
GDB Binutils - Deliverables
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