1 /* Target-dependent code for Mitsubishi D10V, for GDB.
3 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 Free Software
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Contributed by Martin Hunt, hunt@cygnus.com */
32 #include "gdb_string.h"
39 #include "arch-utils.h"
42 #include "floatformat.h"
45 struct frame_extra_info
56 unsigned long (*dmap_register
) (int nr
);
57 unsigned long (*imap_register
) (int nr
);
60 /* These are the addresses the D10V-EVA board maps data and
61 instruction memory to. */
63 #define DMEM_START 0x2000000
64 #define IMEM_START 0x1000000
65 #define STACK_START 0x200bffe
67 /* d10v register names. */
77 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
78 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
80 /* d10v calling convention. */
82 #define ARG1_REGNUM R0_REGNUM
84 #define RET1_REGNUM R0_REGNUM
88 extern void _initialize_d10v_tdep (void);
90 static void d10v_eva_prepare_to_trace (void);
92 static void d10v_eva_get_trace_data (void);
94 static int prologue_find_regs (unsigned short op
, struct frame_info
*fi
,
97 static void d10v_frame_init_saved_regs (struct frame_info
*);
99 static void do_d10v_pop_frame (struct frame_info
*fi
);
102 d10v_frame_chain_valid (CORE_ADDR chain
, struct frame_info
*frame
)
104 return ((chain
) != 0 && (frame
) != 0
105 && (frame
)->pc
> IMEM_START
106 && !inside_entry_file (FRAME_SAVED_PC (frame
)));
110 d10v_stack_align (CORE_ADDR len
)
112 return (len
+ 1) & ~1;
115 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
116 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
117 and TYPE is the type (which is known to be struct, union or array).
119 The d10v returns anything less than 8 bytes in size in
123 d10v_use_struct_convention (int gcc_p
, struct type
*type
)
127 /* The d10v only passes a struct in a register when that structure
128 has an alignment that matches the size of a register. */
129 /* If the structure doesn't fit in 4 registers, put it on the
131 if (TYPE_LENGTH (type
) > 8)
133 /* If the struct contains only one field, don't put it on the stack
134 - gcc can fit it in one or more registers. */
135 if (TYPE_NFIELDS (type
) == 1)
137 alignment
= TYPE_LENGTH (TYPE_FIELD_TYPE (type
, 0));
138 for (i
= 1; i
< TYPE_NFIELDS (type
); i
++)
140 /* If the alignment changes, just assume it goes on the
142 if (TYPE_LENGTH (TYPE_FIELD_TYPE (type
, i
)) != alignment
)
145 /* If the alignment is suitable for the d10v's 16 bit registers,
146 don't put it on the stack. */
147 if (alignment
== 2 || alignment
== 4)
153 static const unsigned char *
154 d10v_breakpoint_from_pc (CORE_ADDR
*pcptr
, int *lenptr
)
156 static unsigned char breakpoint
[] =
157 {0x2f, 0x90, 0x5e, 0x00};
158 *lenptr
= sizeof (breakpoint
);
162 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
163 when the reg_nr isn't valid. */
167 TS2_IMAP0_REGNUM
= 32,
168 TS2_DMAP_REGNUM
= 34,
169 TS2_NR_DMAP_REGS
= 1,
174 d10v_ts2_register_name (int reg_nr
)
176 static char *register_names
[] =
178 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
179 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
180 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
181 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
182 "imap0", "imap1", "dmap", "a0", "a1"
186 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
188 return register_names
[reg_nr
];
193 TS3_IMAP0_REGNUM
= 36,
194 TS3_DMAP0_REGNUM
= 38,
195 TS3_NR_DMAP_REGS
= 4,
200 d10v_ts3_register_name (int reg_nr
)
202 static char *register_names
[] =
204 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
205 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
206 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
207 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
211 "dmap0", "dmap1", "dmap2", "dmap3"
215 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
217 return register_names
[reg_nr
];
220 /* Access the DMAP/IMAP registers in a target independent way.
222 Divide the D10V's 64k data space into four 16k segments:
223 0x0000 -- 0x3fff, 0x4000 -- 0x7fff, 0x8000 -- 0xbfff, and
226 On the TS2, the first two segments (0x0000 -- 0x3fff, 0x4000 --
227 0x7fff) always map to the on-chip data RAM, and the fourth always
228 maps to I/O space. The third (0x8000 - 0xbfff) can be mapped into
229 unified memory or instruction memory, under the control of the
230 single DMAP register.
232 On the TS3, there are four DMAP registers, each of which controls
233 one of the segments. */
236 d10v_ts2_dmap_register (int reg_nr
)
244 return read_register (TS2_DMAP_REGNUM
);
251 d10v_ts3_dmap_register (int reg_nr
)
253 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
257 d10v_dmap_register (int reg_nr
)
259 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
263 d10v_ts2_imap_register (int reg_nr
)
265 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
269 d10v_ts3_imap_register (int reg_nr
)
271 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
275 d10v_imap_register (int reg_nr
)
277 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
280 /* MAP GDB's internal register numbering (determined by the layout fo
281 the REGISTER_BYTE array) onto the simulator's register
285 d10v_ts2_register_sim_regno (int nr
)
287 if (nr
>= TS2_IMAP0_REGNUM
288 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
289 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
290 if (nr
== TS2_DMAP_REGNUM
)
291 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
292 if (nr
>= TS2_A0_REGNUM
293 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
294 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
299 d10v_ts3_register_sim_regno (int nr
)
301 if (nr
>= TS3_IMAP0_REGNUM
302 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
303 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
304 if (nr
>= TS3_DMAP0_REGNUM
305 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
306 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
307 if (nr
>= TS3_A0_REGNUM
308 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
309 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
313 /* Index within `registers' of the first byte of the space for
317 d10v_register_byte (int reg_nr
)
319 if (reg_nr
< A0_REGNUM
)
321 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
322 return (A0_REGNUM
* 2
323 + (reg_nr
- A0_REGNUM
) * 8);
325 return (A0_REGNUM
* 2
327 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
330 /* Number of bytes of storage in the actual machine representation for
334 d10v_register_raw_size (int reg_nr
)
336 if (reg_nr
< A0_REGNUM
)
338 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
344 /* Return the GDB type object for the "standard" data type
345 of data in register N. */
348 d10v_register_virtual_type (int reg_nr
)
350 if (reg_nr
== PC_REGNUM
)
351 return builtin_type_void_func_ptr
;
352 else if (reg_nr
>= A0_REGNUM
353 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
354 return builtin_type_int64
;
356 return builtin_type_int16
;
360 d10v_daddr_p (CORE_ADDR x
)
362 return (((x
) & 0x3000000) == DMEM_START
);
366 d10v_iaddr_p (CORE_ADDR x
)
368 return (((x
) & 0x3000000) == IMEM_START
);
372 d10v_make_daddr (CORE_ADDR x
)
374 return ((x
) | DMEM_START
);
378 d10v_make_iaddr (CORE_ADDR x
)
380 if (d10v_iaddr_p (x
))
381 return x
; /* Idempotency -- x is already in the IMEM space. */
383 return (((x
) << 2) | IMEM_START
);
387 d10v_convert_iaddr_to_raw (CORE_ADDR x
)
389 return (((x
) >> 2) & 0xffff);
393 d10v_convert_daddr_to_raw (CORE_ADDR x
)
395 return ((x
) & 0xffff);
399 d10v_address_to_pointer (struct type
*type
, void *buf
, CORE_ADDR addr
)
401 /* Is it a code address? */
402 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
403 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
)
405 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
406 d10v_convert_iaddr_to_raw (addr
));
410 /* Strip off any upper segment bits. */
411 store_unsigned_integer (buf
, TYPE_LENGTH (type
),
412 d10v_convert_daddr_to_raw (addr
));
417 d10v_pointer_to_address (struct type
*type
, void *buf
)
419 CORE_ADDR addr
= extract_address (buf
, TYPE_LENGTH (type
));
421 /* Is it a code address? */
422 if (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
423 || TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_METHOD
424 || TYPE_CODE_SPACE (TYPE_TARGET_TYPE (type
)))
425 return d10v_make_iaddr (addr
);
427 return d10v_make_daddr (addr
);
431 d10v_integer_to_address (struct type
*type
, void *buf
)
434 val
= unpack_long (type
, buf
);
435 if (TYPE_CODE (type
) == TYPE_CODE_INT
436 && TYPE_LENGTH (type
) <= TYPE_LENGTH (builtin_type_void_data_ptr
))
437 /* Convert small integers that would would be directly copied into
438 a pointer variable into an address pointing into data space. */
439 return d10v_make_daddr (val
& 0xffff);
441 /* The value is too large to fit in a pointer. Assume this was
442 intentional and that the user in fact specified a raw address. */
446 /* Store the address of the place in which to copy the structure the
447 subroutine will return. This is called from call_function.
449 We store structs through a pointer passed in the first Argument
453 d10v_store_struct_return (CORE_ADDR addr
, CORE_ADDR sp
)
455 write_register (ARG1_REGNUM
, (addr
));
458 /* Write into appropriate registers a function return value
459 of type TYPE, given in virtual format.
461 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
464 d10v_store_return_value (struct type
*type
, char *valbuf
)
466 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
471 /* Extract from an array REGBUF containing the (raw) register state
472 the address in which a function should return its structure value,
473 as a CORE_ADDR (or an expression that can be used as one). */
476 d10v_extract_struct_value_address (char *regbuf
)
478 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
479 REGISTER_RAW_SIZE (ARG1_REGNUM
))
484 d10v_frame_saved_pc (struct frame_info
*frame
)
486 return ((frame
)->extra_info
->return_pc
);
489 /* Immediately after a function call, return the saved pc. We can't
490 use frame->return_pc beause that is determined by reading R13 off
491 the stack and that may not be written yet. */
494 d10v_saved_pc_after_call (struct frame_info
*frame
)
496 return ((read_register (LR_REGNUM
) << 2)
500 /* Discard from the stack the innermost frame, restoring all saved
504 d10v_pop_frame (void)
506 generic_pop_current_frame (do_d10v_pop_frame
);
510 do_d10v_pop_frame (struct frame_info
*fi
)
517 /* fill out fsr with the address of where each */
518 /* register was stored in the frame */
519 d10v_frame_init_saved_regs (fi
);
521 /* now update the current registers with the old values */
522 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
524 if (fi
->saved_regs
[regnum
])
526 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
527 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
530 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
532 if (fi
->saved_regs
[regnum
])
534 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
537 if (fi
->saved_regs
[PSW_REGNUM
])
539 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
542 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
543 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
544 target_store_registers (-1);
545 flush_cached_frames ();
549 check_prologue (unsigned short op
)
552 if ((op
& 0x7E1F) == 0x6C1F)
556 if ((op
& 0x7E3F) == 0x6E1F)
560 if ((op
& 0x7FE1) == 0x01E1)
572 if ((op
& 0x7E1F) == 0x681E)
576 if ((op
& 0x7E3F) == 0x3A1E)
583 d10v_skip_prologue (CORE_ADDR pc
)
586 unsigned short op1
, op2
;
587 CORE_ADDR func_addr
, func_end
;
588 struct symtab_and_line sal
;
590 /* If we have line debugging information, then the end of the */
591 /* prologue should the first assembly instruction of the first source line */
592 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
594 sal
= find_pc_line (func_addr
, 0);
595 if (sal
.end
&& sal
.end
< func_end
)
599 if (target_read_memory (pc
, (char *) &op
, 4))
600 return pc
; /* Can't access it -- assume no prologue. */
604 op
= (unsigned long) read_memory_integer (pc
, 4);
605 if ((op
& 0xC0000000) == 0xC0000000)
607 /* long instruction */
608 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
609 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
610 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
615 /* short instructions */
616 if ((op
& 0xC0000000) == 0x80000000)
618 op2
= (op
& 0x3FFF8000) >> 15;
623 op1
= (op
& 0x3FFF8000) >> 15;
626 if (check_prologue (op1
))
628 if (!check_prologue (op2
))
630 /* if the previous opcode was really part of the prologue */
631 /* and not just a NOP, then we want to break after both instructions */
645 /* Given a GDB frame, determine the address of the calling function's frame.
646 This will be used to create a new GDB frame struct, and then
647 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
651 d10v_frame_chain (struct frame_info
*fi
)
653 d10v_frame_init_saved_regs (fi
);
655 if (fi
->extra_info
->return_pc
== IMEM_START
656 || inside_entry_file (fi
->extra_info
->return_pc
))
657 return (CORE_ADDR
) 0;
659 if (!fi
->saved_regs
[FP_REGNUM
])
661 if (!fi
->saved_regs
[SP_REGNUM
]
662 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
663 return (CORE_ADDR
) 0;
665 return fi
->saved_regs
[SP_REGNUM
];
668 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
669 REGISTER_RAW_SIZE (FP_REGNUM
)))
670 return (CORE_ADDR
) 0;
672 return d10v_make_daddr (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
673 REGISTER_RAW_SIZE (FP_REGNUM
)));
676 static int next_addr
, uses_frame
;
679 prologue_find_regs (unsigned short op
, struct frame_info
*fi
, CORE_ADDR addr
)
684 if ((op
& 0x7E1F) == 0x6C1F)
686 n
= (op
& 0x1E0) >> 5;
688 fi
->saved_regs
[n
] = next_addr
;
693 else if ((op
& 0x7E3F) == 0x6E1F)
695 n
= (op
& 0x1E0) >> 5;
697 fi
->saved_regs
[n
] = next_addr
;
698 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
703 if ((op
& 0x7FE1) == 0x01E1)
705 n
= (op
& 0x1E) >> 1;
724 if ((op
& 0x7E1F) == 0x681E)
726 n
= (op
& 0x1E0) >> 5;
727 fi
->saved_regs
[n
] = next_addr
;
732 if ((op
& 0x7E3F) == 0x3A1E)
734 n
= (op
& 0x1E0) >> 5;
735 fi
->saved_regs
[n
] = next_addr
;
736 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
743 /* Put here the code to store, into fi->saved_regs, the addresses of
744 the saved registers of frame described by FRAME_INFO. This
745 includes special registers such as pc and fp saved in special ways
746 in the stack frame. sp is even more special: the address we return
747 for it IS the sp for the next frame. */
750 d10v_frame_init_saved_regs (struct frame_info
*fi
)
754 unsigned short op1
, op2
;
758 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
761 pc
= get_pc_function_start (fi
->pc
);
766 op
= (unsigned long) read_memory_integer (pc
, 4);
767 if ((op
& 0xC0000000) == 0xC0000000)
769 /* long instruction */
770 if ((op
& 0x3FFF0000) == 0x01FF0000)
773 short n
= op
& 0xFFFF;
776 else if ((op
& 0x3F0F0000) == 0x340F0000)
778 /* st rn, @(offset,sp) */
779 short offset
= op
& 0xFFFF;
780 short n
= (op
>> 20) & 0xF;
781 fi
->saved_regs
[n
] = next_addr
+ offset
;
783 else if ((op
& 0x3F1F0000) == 0x350F0000)
785 /* st2w rn, @(offset,sp) */
786 short offset
= op
& 0xFFFF;
787 short n
= (op
>> 20) & 0xF;
788 fi
->saved_regs
[n
] = next_addr
+ offset
;
789 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
796 /* short instructions */
797 if ((op
& 0xC0000000) == 0x80000000)
799 op2
= (op
& 0x3FFF8000) >> 15;
804 op1
= (op
& 0x3FFF8000) >> 15;
807 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
813 fi
->extra_info
->size
= -next_addr
;
816 fp
= d10v_make_daddr (read_register (SP_REGNUM
));
818 for (i
= 0; i
< NUM_REGS
- 1; i
++)
819 if (fi
->saved_regs
[i
])
821 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
824 if (fi
->saved_regs
[LR_REGNUM
])
826 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
827 fi
->extra_info
->return_pc
= d10v_make_iaddr (return_pc
);
831 fi
->extra_info
->return_pc
= d10v_make_iaddr (read_register (LR_REGNUM
));
834 /* th SP is not normally (ever?) saved, but check anyway */
835 if (!fi
->saved_regs
[SP_REGNUM
])
837 /* if the FP was saved, that means the current FP is valid, */
838 /* otherwise, it isn't being used, so we use the SP instead */
840 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
843 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
844 fi
->extra_info
->frameless
= 1;
845 fi
->saved_regs
[FP_REGNUM
] = 0;
851 d10v_init_extra_frame_info (int fromleaf
, struct frame_info
*fi
)
853 fi
->extra_info
= (struct frame_extra_info
*)
854 frame_obstack_alloc (sizeof (struct frame_extra_info
));
855 frame_saved_regs_zalloc (fi
);
857 fi
->extra_info
->frameless
= 0;
858 fi
->extra_info
->size
= 0;
859 fi
->extra_info
->return_pc
= 0;
861 /* The call dummy doesn't save any registers on the stack, so we can
863 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
869 d10v_frame_init_saved_regs (fi
);
874 show_regs (char *args
, int from_tty
)
877 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
878 (long) read_register (PC_REGNUM
),
879 (long) d10v_make_iaddr (read_register (PC_REGNUM
)),
880 (long) read_register (PSW_REGNUM
),
881 (long) read_register (24),
882 (long) read_register (25),
883 (long) read_register (23));
884 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
885 (long) read_register (0),
886 (long) read_register (1),
887 (long) read_register (2),
888 (long) read_register (3),
889 (long) read_register (4),
890 (long) read_register (5),
891 (long) read_register (6),
892 (long) read_register (7));
893 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
894 (long) read_register (8),
895 (long) read_register (9),
896 (long) read_register (10),
897 (long) read_register (11),
898 (long) read_register (12),
899 (long) read_register (13),
900 (long) read_register (14),
901 (long) read_register (15));
902 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
905 printf_filtered (" ");
906 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
908 if (NR_DMAP_REGS
== 1)
909 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
912 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
914 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
916 printf_filtered ("\n");
918 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
919 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
921 char num
[MAX_REGISTER_RAW_SIZE
];
923 printf_filtered (" ");
924 read_register_gen (a
, (char *) &num
);
925 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
927 printf_filtered ("%02x", (num
[i
] & 0xff));
930 printf_filtered ("\n");
934 d10v_read_pc (ptid_t ptid
)
940 save_ptid
= inferior_ptid
;
941 inferior_ptid
= ptid
;
942 pc
= (int) read_register (PC_REGNUM
);
943 inferior_ptid
= save_ptid
;
944 retval
= d10v_make_iaddr (pc
);
949 d10v_write_pc (CORE_ADDR val
, ptid_t ptid
)
953 save_ptid
= inferior_ptid
;
954 inferior_ptid
= ptid
;
955 write_register (PC_REGNUM
, d10v_convert_iaddr_to_raw (val
));
956 inferior_ptid
= save_ptid
;
962 return (d10v_make_daddr (read_register (SP_REGNUM
)));
966 d10v_write_sp (CORE_ADDR val
)
968 write_register (SP_REGNUM
, d10v_convert_daddr_to_raw (val
));
974 return (d10v_make_daddr (read_register (FP_REGNUM
)));
977 /* Function: push_return_address (pc)
978 Set up the return address for the inferior function call.
979 Needed for targets where we don't actually execute a JSR/BSR instruction */
982 d10v_push_return_address (CORE_ADDR pc
, CORE_ADDR sp
)
984 write_register (LR_REGNUM
, d10v_convert_iaddr_to_raw (CALL_DUMMY_ADDRESS ()));
989 /* When arguments must be pushed onto the stack, they go on in reverse
990 order. The below implements a FILO (stack) to do this. */
995 struct stack_item
*prev
;
999 static struct stack_item
*push_stack_item (struct stack_item
*prev
,
1000 void *contents
, int len
);
1001 static struct stack_item
*
1002 push_stack_item (struct stack_item
*prev
, void *contents
, int len
)
1004 struct stack_item
*si
;
1005 si
= xmalloc (sizeof (struct stack_item
));
1006 si
->data
= xmalloc (len
);
1009 memcpy (si
->data
, contents
, len
);
1013 static struct stack_item
*pop_stack_item (struct stack_item
*si
);
1014 static struct stack_item
*
1015 pop_stack_item (struct stack_item
*si
)
1017 struct stack_item
*dead
= si
;
1026 d10v_push_arguments (int nargs
, struct value
**args
, CORE_ADDR sp
,
1027 int struct_return
, CORE_ADDR struct_addr
)
1030 int regnum
= ARG1_REGNUM
;
1031 struct stack_item
*si
= NULL
;
1033 /* Fill in registers and arg lists */
1034 for (i
= 0; i
< nargs
; i
++)
1036 struct value
*arg
= args
[i
];
1037 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1038 char *contents
= VALUE_CONTENTS (arg
);
1039 int len
= TYPE_LENGTH (type
);
1040 /* printf ("push: type=%d len=%d\n", type->code, len); */
1042 int aligned_regnum
= (regnum
+ 1) & ~1;
1043 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1044 /* fits in a single register, do not align */
1046 long val
= extract_unsigned_integer (contents
, len
);
1047 write_register (regnum
++, val
);
1049 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1050 /* value fits in remaining registers, store keeping left
1054 regnum
= aligned_regnum
;
1055 for (b
= 0; b
< (len
& ~1); b
+= 2)
1057 long val
= extract_unsigned_integer (&contents
[b
], 2);
1058 write_register (regnum
++, val
);
1062 long val
= extract_unsigned_integer (&contents
[b
], 1);
1063 write_register (regnum
++, (val
<< 8));
1068 /* arg will go onto stack */
1069 regnum
= ARGN_REGNUM
+ 1;
1070 si
= push_stack_item (si
, contents
, len
);
1077 sp
= (sp
- si
->len
) & ~1;
1078 write_memory (sp
, si
->data
, si
->len
);
1079 si
= pop_stack_item (si
);
1086 /* Given a return value in `regbuf' with a type `valtype',
1087 extract and copy its value into `valbuf'. */
1090 d10v_extract_return_value (struct type
*type
, char regbuf
[REGISTER_BYTES
],
1094 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1096 len
= TYPE_LENGTH (type
);
1099 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1100 store_unsigned_integer (valbuf
, 1, c
);
1102 else if ((len
& 1) == 0)
1103 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1106 /* For return values of odd size, the first byte is in the
1107 least significant part of the first register. The
1108 remaining bytes in remaining registers. Interestingly,
1109 when such values are passed in, the last byte is in the
1110 most significant byte of that same register - wierd. */
1111 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1116 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1117 understands. Returns number of bytes that can be transfered
1118 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1119 (segmentation fault). Since the simulator knows all about how the
1120 VM system works, we just call that to do the translation. */
1123 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1124 CORE_ADDR
*targ_addr
, int *targ_len
)
1128 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1131 d10v_imap_register
);
1132 *targ_addr
= out_addr
;
1133 *targ_len
= out_len
;
1137 /* The following code implements access to, and display of, the D10V's
1138 instruction trace buffer. The buffer consists of 64K or more
1139 4-byte words of data, of which each words includes an 8-bit count,
1140 an 8-bit segment number, and a 16-bit instruction address.
1142 In theory, the trace buffer is continuously capturing instruction
1143 data that the CPU presents on its "debug bus", but in practice, the
1144 ROMified GDB stub only enables tracing when it continues or steps
1145 the program, and stops tracing when the program stops; so it
1146 actually works for GDB to read the buffer counter out of memory and
1147 then read each trace word. The counter records where the tracing
1148 stops, but there is no record of where it started, so we remember
1149 the PC when we resumed and then search backwards in the trace
1150 buffer for a word that includes that address. This is not perfect,
1151 because you will miss trace data if the resumption PC is the target
1152 of a branch. (The value of the buffer counter is semi-random, any
1153 trace data from a previous program stop is gone.) */
1155 /* The address of the last word recorded in the trace buffer. */
1157 #define DBBC_ADDR (0xd80000)
1159 /* The base of the trace buffer, at least for the "Board_0". */
1161 #define TRACE_BUFFER_BASE (0xf40000)
1163 static void trace_command (char *, int);
1165 static void untrace_command (char *, int);
1167 static void trace_info (char *, int);
1169 static void tdisassemble_command (char *, int);
1171 static void display_trace (int, int);
1173 /* True when instruction traces are being collected. */
1177 /* Remembered PC. */
1179 static CORE_ADDR last_pc
;
1181 /* True when trace output should be displayed whenever program stops. */
1183 static int trace_display
;
1185 /* True when trace listing should include source lines. */
1187 static int default_trace_show_source
= 1;
1198 trace_command (char *args
, int from_tty
)
1200 /* Clear the host-side trace buffer, allocating space if needed. */
1201 trace_data
.size
= 0;
1202 if (trace_data
.counts
== NULL
)
1203 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1204 if (trace_data
.addrs
== NULL
)
1205 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1209 printf_filtered ("Tracing is now on.\n");
1213 untrace_command (char *args
, int from_tty
)
1217 printf_filtered ("Tracing is now off.\n");
1221 trace_info (char *args
, int from_tty
)
1225 if (trace_data
.size
)
1227 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1229 for (i
= 0; i
< trace_data
.size
; ++i
)
1231 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1233 trace_data
.counts
[i
],
1234 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1235 paddr_nz (trace_data
.addrs
[i
]));
1239 printf_filtered ("No entries in trace buffer.\n");
1241 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1244 /* Print the instruction at address MEMADDR in debugged memory,
1245 on STREAM. Returns length of the instruction, in bytes. */
1248 print_insn (CORE_ADDR memaddr
, struct ui_file
*stream
)
1250 /* If there's no disassembler, something is very wrong. */
1251 if (tm_print_insn
== NULL
)
1252 internal_error (__FILE__
, __LINE__
,
1253 "print_insn: no disassembler");
1255 if (TARGET_BYTE_ORDER
== BFD_ENDIAN_BIG
)
1256 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1258 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1259 return TARGET_PRINT_INSN (memaddr
, &tm_print_insn_info
);
1263 d10v_eva_prepare_to_trace (void)
1268 last_pc
= read_register (PC_REGNUM
);
1271 /* Collect trace data from the target board and format it into a form
1272 more useful for display. */
1275 d10v_eva_get_trace_data (void)
1277 int count
, i
, j
, oldsize
;
1278 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1279 unsigned int last_trace
, trace_word
, next_word
;
1280 unsigned int *tmpspace
;
1285 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1287 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1289 /* Collect buffer contents from the target, stopping when we reach
1290 the word recorded when execution resumed. */
1293 while (last_trace
> 0)
1297 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1298 trace_addr
= trace_word
& 0xffff;
1300 /* Ignore an apparently nonsensical entry. */
1301 if (trace_addr
== 0xffd5)
1303 tmpspace
[count
++] = trace_word
;
1304 if (trace_addr
== last_pc
)
1310 /* Move the data to the host-side trace buffer, adjusting counts to
1311 include the last instruction executed and transforming the address
1312 into something that GDB likes. */
1314 for (i
= 0; i
< count
; ++i
)
1316 trace_word
= tmpspace
[i
];
1317 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1318 trace_addr
= trace_word
& 0xffff;
1319 next_cnt
= (next_word
>> 24) & 0xff;
1320 j
= trace_data
.size
+ count
- i
- 1;
1321 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1322 trace_data
.counts
[j
] = next_cnt
+ 1;
1325 oldsize
= trace_data
.size
;
1326 trace_data
.size
+= count
;
1331 display_trace (oldsize
, trace_data
.size
);
1335 tdisassemble_command (char *arg
, int from_tty
)
1338 CORE_ADDR low
, high
;
1344 high
= trace_data
.size
;
1346 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1348 low
= parse_and_eval_address (arg
);
1353 /* Two arguments. */
1354 *space_index
= '\0';
1355 low
= parse_and_eval_address (arg
);
1356 high
= parse_and_eval_address (space_index
+ 1);
1361 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1363 display_trace (low
, high
);
1365 printf_filtered ("End of trace dump.\n");
1366 gdb_flush (gdb_stdout
);
1370 display_trace (int low
, int high
)
1372 int i
, count
, trace_show_source
, first
, suppress
;
1373 CORE_ADDR next_address
;
1375 trace_show_source
= default_trace_show_source
;
1376 if (!have_full_symbols () && !have_partial_symbols ())
1378 trace_show_source
= 0;
1379 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1380 printf_filtered ("Trace will not display any source.\n");
1385 for (i
= low
; i
< high
; ++i
)
1387 next_address
= trace_data
.addrs
[i
];
1388 count
= trace_data
.counts
[i
];
1392 if (trace_show_source
)
1394 struct symtab_and_line sal
, sal_prev
;
1396 sal_prev
= find_pc_line (next_address
- 4, 0);
1397 sal
= find_pc_line (next_address
, 0);
1401 if (first
|| sal
.line
!= sal_prev
.line
)
1402 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1408 /* FIXME-32x64--assumes sal.pc fits in long. */
1409 printf_filtered ("No source file for address %s.\n",
1410 local_hex_string ((unsigned long) sal
.pc
));
1415 print_address (next_address
, gdb_stdout
);
1416 printf_filtered (":");
1417 printf_filtered ("\t");
1419 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1420 printf_filtered ("\n");
1421 gdb_flush (gdb_stdout
);
1427 static gdbarch_init_ftype d10v_gdbarch_init
;
1429 static struct gdbarch
*
1430 d10v_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1432 static LONGEST d10v_call_dummy_words
[] =
1434 struct gdbarch
*gdbarch
;
1436 struct gdbarch_tdep
*tdep
;
1437 gdbarch_register_name_ftype
*d10v_register_name
;
1438 gdbarch_register_sim_regno_ftype
*d10v_register_sim_regno
;
1440 /* Find a candidate among the list of pre-declared architectures. */
1441 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1443 return arches
->gdbarch
;
1445 /* None found, create a new architecture from the information
1447 tdep
= XMALLOC (struct gdbarch_tdep
);
1448 gdbarch
= gdbarch_alloc (&info
, tdep
);
1450 switch (info
.bfd_arch_info
->mach
)
1452 case bfd_mach_d10v_ts2
:
1454 d10v_register_name
= d10v_ts2_register_name
;
1455 d10v_register_sim_regno
= d10v_ts2_register_sim_regno
;
1456 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1457 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1458 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1459 tdep
->imap_register
= d10v_ts2_imap_register
;
1462 case bfd_mach_d10v_ts3
:
1464 d10v_register_name
= d10v_ts3_register_name
;
1465 d10v_register_sim_regno
= d10v_ts3_register_sim_regno
;
1466 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1467 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1468 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1469 tdep
->imap_register
= d10v_ts3_imap_register
;
1473 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1474 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1475 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1476 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1477 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1479 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1480 set_gdbarch_sp_regnum (gdbarch
, 15);
1481 set_gdbarch_fp_regnum (gdbarch
, 11);
1482 set_gdbarch_pc_regnum (gdbarch
, 18);
1483 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1484 set_gdbarch_register_size (gdbarch
, 2);
1485 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1486 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1487 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1488 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1489 set_gdbarch_register_virtual_size (gdbarch
, generic_register_virtual_size
);
1490 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1491 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1493 set_gdbarch_ptr_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1494 set_gdbarch_addr_bit (gdbarch
, 32);
1495 set_gdbarch_address_to_pointer (gdbarch
, d10v_address_to_pointer
);
1496 set_gdbarch_pointer_to_address (gdbarch
, d10v_pointer_to_address
);
1497 set_gdbarch_integer_to_address (gdbarch
, d10v_integer_to_address
);
1498 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1499 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1500 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1501 set_gdbarch_long_long_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1502 /* NOTE: The d10v as a 32 bit ``float'' and ``double''. ``long
1503 double'' is 64 bits. */
1504 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1505 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1506 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1507 switch (info
.byte_order
)
1509 case BFD_ENDIAN_BIG
:
1510 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_big
);
1511 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_big
);
1512 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_big
);
1514 case BFD_ENDIAN_LITTLE
:
1515 set_gdbarch_float_format (gdbarch
, &floatformat_ieee_single_little
);
1516 set_gdbarch_double_format (gdbarch
, &floatformat_ieee_single_little
);
1517 set_gdbarch_long_double_format (gdbarch
, &floatformat_ieee_double_little
);
1520 internal_error (__FILE__
, __LINE__
,
1521 "d10v_gdbarch_init: bad byte order for float format");
1524 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1525 set_gdbarch_call_dummy_length (gdbarch
, 0);
1526 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1527 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1528 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1529 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1530 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1531 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1532 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1533 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1534 set_gdbarch_call_dummy_p (gdbarch
, 1);
1535 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1536 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1537 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1539 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1540 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1541 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1542 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1544 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1545 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1546 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1547 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1549 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1550 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1552 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1554 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1555 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1556 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1557 set_gdbarch_function_start_offset (gdbarch
, 0);
1558 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1560 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1562 set_gdbarch_frame_args_skip (gdbarch
, 0);
1563 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1564 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1565 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1566 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1567 set_gdbarch_frame_args_address (gdbarch
, default_frame_address
);
1568 set_gdbarch_frame_locals_address (gdbarch
, default_frame_address
);
1569 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1570 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1571 set_gdbarch_stack_align (gdbarch
, d10v_stack_align
);
1573 set_gdbarch_register_sim_regno (gdbarch
, d10v_register_sim_regno
);
1574 set_gdbarch_extra_stack_alignment_needed (gdbarch
, 0);
1580 extern void (*target_resume_hook
) (void);
1581 extern void (*target_wait_loop_hook
) (void);
1584 _initialize_d10v_tdep (void)
1586 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1588 tm_print_insn
= print_insn_d10v
;
1590 target_resume_hook
= d10v_eva_prepare_to_trace
;
1591 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1593 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1595 add_com ("itrace", class_support
, trace_command
,
1596 "Enable tracing of instruction execution.");
1598 add_com ("iuntrace", class_support
, untrace_command
,
1599 "Disable tracing of instruction execution.");
1601 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1602 "Disassemble the trace buffer.\n\
1603 Two optional arguments specify a range of trace buffer entries\n\
1604 as reported by info trace (NOT addresses!).");
1606 add_info ("itrace", trace_info
,
1607 "Display info about the trace data buffer.");
1609 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1610 var_integer
, (char *) &trace_display
,
1611 "Set automatic display of trace.\n", &setlist
),
1613 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1614 var_integer
, (char *) &default_trace_show_source
,
1615 "Set display of source code with trace.\n", &setlist
),