1 /* Target-dependent code for Mitsubishi D10V, for GDB.
2 Copyright (C) 1996, 1997 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 /* Contributed by Martin Hunt, hunt@cygnus.com */
30 #include "gdb_string.h"
41 #define XMALLOC(TYPE) ((TYPE*) xmalloc (sizeof (TYPE)))
43 struct frame_extra_info
54 unsigned long (*dmap_register
) (int nr
);
55 unsigned long (*imap_register
) (int nr
);
56 int (*register_sim_regno
) (int nr
);
59 /* These are the addresses the D10V-EVA board maps data and
60 instruction memory to. */
62 #define DMEM_START 0x2000000
63 #define IMEM_START 0x1000000
64 #define STACK_START 0x0007ffe
66 /* d10v register names. */
76 #define NR_DMAP_REGS (gdbarch_tdep (current_gdbarch)->nr_dmap_regs)
77 #define A0_REGNUM (gdbarch_tdep (current_gdbarch)->a0_regnum)
79 /* d10v calling convention. */
81 #define ARG1_REGNUM R0_REGNUM
83 #define RET1_REGNUM R0_REGNUM
87 extern void _initialize_d10v_tdep
PARAMS ((void));
89 static void d10v_eva_prepare_to_trace
PARAMS ((void));
91 static void d10v_eva_get_trace_data
PARAMS ((void));
93 static int prologue_find_regs
PARAMS ((unsigned short op
, struct frame_info
* fi
, CORE_ADDR addr
));
95 extern void d10v_frame_init_saved_regs
PARAMS ((struct frame_info
*));
97 static void do_d10v_pop_frame
PARAMS ((struct frame_info
* fi
));
100 d10v_frame_chain_valid (chain
, frame
)
102 struct frame_info
*frame
; /* not used here */
104 return ((chain
) != 0 && (frame
) != 0 && (frame
)->pc
> IMEM_START
);
108 /* Should we use EXTRACT_STRUCT_VALUE_ADDRESS instead of
109 EXTRACT_RETURN_VALUE? GCC_P is true if compiled with gcc
110 and TYPE is the type (which is known to be struct, union or array).
112 The d10v returns anything less than 8 bytes in size in
116 d10v_use_struct_convention (gcc_p
, type
)
120 return (TYPE_LENGTH (type
) > 8);
125 d10v_breakpoint_from_pc (pcptr
, lenptr
)
129 static unsigned char breakpoint
[] =
130 {0x2f, 0x90, 0x5e, 0x00};
131 *lenptr
= sizeof (breakpoint
);
135 /* Map the REG_NR onto an ascii name. Return NULL or an empty string
136 when the reg_nr isn't valid. */
140 TS2_IMAP0_REGNUM
= 32,
141 TS2_DMAP_REGNUM
= 34,
142 TS2_NR_DMAP_REGS
= 1,
147 d10v_ts2_register_name (int reg_nr
)
149 static char *register_names
[] =
151 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
152 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
153 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
154 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
155 "imap0", "imap1", "dmap", "a0", "a1"
159 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
161 return register_names
[reg_nr
];
166 TS3_IMAP0_REGNUM
= 36,
167 TS3_DMAP0_REGNUM
= 38,
168 TS3_NR_DMAP_REGS
= 4,
173 d10v_ts3_register_name (int reg_nr
)
175 static char *register_names
[] =
177 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
178 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
179 "psw", "bpsw", "pc", "bpc", "cr4", "cr5", "cr6", "rpt_c",
180 "rpt_s", "rpt_e", "mod_s", "mod_e", "cr12", "cr13", "iba", "cr15",
184 "dmap0", "dmap1", "dmap2", "dmap3"
188 if (reg_nr
>= (sizeof (register_names
) / sizeof (*register_names
)))
190 return register_names
[reg_nr
];
193 /* Access the DMAP/IMAP registers in a target independant way. */
196 d10v_ts2_dmap_register (int reg_nr
)
204 return read_register (TS2_DMAP_REGNUM
);
211 d10v_ts3_dmap_register (int reg_nr
)
213 return read_register (TS3_DMAP0_REGNUM
+ reg_nr
);
217 d10v_dmap_register (int reg_nr
)
219 return gdbarch_tdep (current_gdbarch
)->dmap_register (reg_nr
);
223 d10v_ts2_imap_register (int reg_nr
)
225 return read_register (TS2_IMAP0_REGNUM
+ reg_nr
);
229 d10v_ts3_imap_register (int reg_nr
)
231 return read_register (TS3_IMAP0_REGNUM
+ reg_nr
);
235 d10v_imap_register (int reg_nr
)
237 return gdbarch_tdep (current_gdbarch
)->imap_register (reg_nr
);
240 /* MAP GDB's internal register numbering (determined by the layout fo
241 the REGISTER_BYTE array) onto the simulator's register
245 d10v_ts2_register_sim_regno (int nr
)
247 if (nr
>= TS2_IMAP0_REGNUM
248 && nr
< TS2_IMAP0_REGNUM
+ NR_IMAP_REGS
)
249 return nr
- TS2_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
250 if (nr
== TS2_DMAP_REGNUM
)
251 return nr
- TS2_DMAP_REGNUM
+ SIM_D10V_TS2_DMAP_REGNUM
;
252 if (nr
>= TS2_A0_REGNUM
253 && nr
< TS2_A0_REGNUM
+ NR_A_REGS
)
254 return nr
- TS2_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
259 d10v_ts3_register_sim_regno (int nr
)
261 if (nr
>= TS3_IMAP0_REGNUM
262 && nr
< TS3_IMAP0_REGNUM
+ NR_IMAP_REGS
)
263 return nr
- TS3_IMAP0_REGNUM
+ SIM_D10V_IMAP0_REGNUM
;
264 if (nr
>= TS3_DMAP0_REGNUM
265 && nr
< TS3_DMAP0_REGNUM
+ TS3_NR_DMAP_REGS
)
266 return nr
- TS3_DMAP0_REGNUM
+ SIM_D10V_DMAP0_REGNUM
;
267 if (nr
>= TS3_A0_REGNUM
268 && nr
< TS3_A0_REGNUM
+ NR_A_REGS
)
269 return nr
- TS3_A0_REGNUM
+ SIM_D10V_A0_REGNUM
;
274 d10v_register_sim_regno (int nr
)
276 return gdbarch_tdep (current_gdbarch
)->register_sim_regno (nr
);
279 /* Index within `registers' of the first byte of the space for
283 d10v_register_byte (reg_nr
)
286 if (reg_nr
< A0_REGNUM
)
288 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
289 return (A0_REGNUM
* 2
290 + (reg_nr
- A0_REGNUM
) * 8);
292 return (A0_REGNUM
* 2
294 + (reg_nr
- A0_REGNUM
- NR_A_REGS
) * 2);
297 /* Number of bytes of storage in the actual machine representation for
301 d10v_register_raw_size (reg_nr
)
304 if (reg_nr
< A0_REGNUM
)
306 else if (reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
312 /* Number of bytes of storage in the program's representation
316 d10v_register_virtual_size (reg_nr
)
319 return TYPE_LENGTH (REGISTER_VIRTUAL_TYPE (reg_nr
));
322 /* Return the GDB type object for the "standard" data type
323 of data in register N. */
326 d10v_register_virtual_type (reg_nr
)
329 if (reg_nr
>= A0_REGNUM
330 && reg_nr
< (A0_REGNUM
+ NR_A_REGS
))
331 return builtin_type_int64
;
332 else if (reg_nr
== PC_REGNUM
333 || reg_nr
== SP_REGNUM
)
334 return builtin_type_int32
;
336 return builtin_type_int16
;
339 /* convert $pc and $sp to/from virtual addresses */
341 d10v_register_convertible (nr
)
344 return ((nr
) == PC_REGNUM
|| (nr
) == SP_REGNUM
);
348 d10v_register_convert_to_virtual (regnum
, type
, from
, to
)
354 ULONGEST x
= extract_unsigned_integer (from
, REGISTER_RAW_SIZE (regnum
));
355 if (regnum
== PC_REGNUM
)
356 x
= (x
<< 2) | IMEM_START
;
359 store_unsigned_integer (to
, TYPE_LENGTH (type
), x
);
363 d10v_register_convert_to_raw (type
, regnum
, from
, to
)
369 ULONGEST x
= extract_unsigned_integer (from
, TYPE_LENGTH (type
));
371 if (regnum
== PC_REGNUM
)
373 store_unsigned_integer (to
, 2, x
);
381 return ((x
) | DMEM_START
);
388 return (((x
) << 2) | IMEM_START
);
395 return (((x
) & 0x3000000) == DMEM_START
);
402 return (((x
) & 0x3000000) == IMEM_START
);
407 d10v_convert_iaddr_to_raw (x
)
410 return (((x
) >> 2) & 0xffff);
414 d10v_convert_daddr_to_raw (x
)
417 return ((x
) & 0xffff);
420 /* Store the address of the place in which to copy the structure the
421 subroutine will return. This is called from call_function.
423 We store structs through a pointer passed in the first Argument
427 d10v_store_struct_return (addr
, sp
)
431 write_register (ARG1_REGNUM
, (addr
));
434 /* Write into appropriate registers a function return value
435 of type TYPE, given in virtual format.
437 Things always get returned in RET1_REGNUM, RET2_REGNUM, ... */
440 d10v_store_return_value (type
, valbuf
)
444 write_register_bytes (REGISTER_BYTE (RET1_REGNUM
),
449 /* Extract from an array REGBUF containing the (raw) register state
450 the address in which a function should return its structure value,
451 as a CORE_ADDR (or an expression that can be used as one). */
454 d10v_extract_struct_value_address (regbuf
)
457 return (extract_address ((regbuf
) + REGISTER_BYTE (ARG1_REGNUM
),
458 REGISTER_RAW_SIZE (ARG1_REGNUM
))
463 d10v_frame_saved_pc (frame
)
464 struct frame_info
*frame
;
466 return ((frame
)->extra_info
->return_pc
);
470 d10v_frame_args_address (fi
)
471 struct frame_info
*fi
;
477 d10v_frame_locals_address (fi
)
478 struct frame_info
*fi
;
483 /* Immediately after a function call, return the saved pc. We can't
484 use frame->return_pc beause that is determined by reading R13 off
485 the stack and that may not be written yet. */
488 d10v_saved_pc_after_call (frame
)
489 struct frame_info
*frame
;
491 return ((read_register (LR_REGNUM
) << 2)
495 /* Discard from the stack the innermost frame, restoring all saved
501 generic_pop_current_frame (do_d10v_pop_frame
);
505 do_d10v_pop_frame (fi
)
506 struct frame_info
*fi
;
513 /* fill out fsr with the address of where each */
514 /* register was stored in the frame */
515 d10v_frame_init_saved_regs (fi
);
517 /* now update the current registers with the old values */
518 for (regnum
= A0_REGNUM
; regnum
< A0_REGNUM
+ NR_A_REGS
; regnum
++)
520 if (fi
->saved_regs
[regnum
])
522 read_memory (fi
->saved_regs
[regnum
], raw_buffer
, REGISTER_RAW_SIZE (regnum
));
523 write_register_bytes (REGISTER_BYTE (regnum
), raw_buffer
, REGISTER_RAW_SIZE (regnum
));
526 for (regnum
= 0; regnum
< SP_REGNUM
; regnum
++)
528 if (fi
->saved_regs
[regnum
])
530 write_register (regnum
, read_memory_unsigned_integer (fi
->saved_regs
[regnum
], REGISTER_RAW_SIZE (regnum
)));
533 if (fi
->saved_regs
[PSW_REGNUM
])
535 write_register (PSW_REGNUM
, read_memory_unsigned_integer (fi
->saved_regs
[PSW_REGNUM
], REGISTER_RAW_SIZE (PSW_REGNUM
)));
538 write_register (PC_REGNUM
, read_register (LR_REGNUM
));
539 write_register (SP_REGNUM
, fp
+ fi
->extra_info
->size
);
540 target_store_registers (-1);
541 flush_cached_frames ();
549 if ((op
& 0x7E1F) == 0x6C1F)
553 if ((op
& 0x7E3F) == 0x6E1F)
557 if ((op
& 0x7FE1) == 0x01E1)
569 if ((op
& 0x7E1F) == 0x681E)
573 if ((op
& 0x7E3F) == 0x3A1E)
580 d10v_skip_prologue (pc
)
584 unsigned short op1
, op2
;
585 CORE_ADDR func_addr
, func_end
;
586 struct symtab_and_line sal
;
588 /* If we have line debugging information, then the end of the */
589 /* prologue should the first assembly instruction of the first source line */
590 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
592 sal
= find_pc_line (func_addr
, 0);
593 if (sal
.end
&& sal
.end
< func_end
)
597 if (target_read_memory (pc
, (char *) &op
, 4))
598 return pc
; /* Can't access it -- assume no prologue. */
602 op
= (unsigned long) read_memory_integer (pc
, 4);
603 if ((op
& 0xC0000000) == 0xC0000000)
605 /* long instruction */
606 if (((op
& 0x3FFF0000) != 0x01FF0000) && /* add3 sp,sp,n */
607 ((op
& 0x3F0F0000) != 0x340F0000) && /* st rn, @(offset,sp) */
608 ((op
& 0x3F1F0000) != 0x350F0000)) /* st2w rn, @(offset,sp) */
613 /* short instructions */
614 if ((op
& 0xC0000000) == 0x80000000)
616 op2
= (op
& 0x3FFF8000) >> 15;
621 op1
= (op
& 0x3FFF8000) >> 15;
624 if (check_prologue (op1
))
626 if (!check_prologue (op2
))
628 /* if the previous opcode was really part of the prologue */
629 /* and not just a NOP, then we want to break after both instructions */
643 /* Given a GDB frame, determine the address of the calling function's frame.
644 This will be used to create a new GDB frame struct, and then
645 INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
649 d10v_frame_chain (fi
)
650 struct frame_info
*fi
;
652 d10v_frame_init_saved_regs (fi
);
654 if (fi
->extra_info
->return_pc
== IMEM_START
655 || inside_entry_file (fi
->extra_info
->return_pc
))
656 return (CORE_ADDR
) 0;
658 if (!fi
->saved_regs
[FP_REGNUM
])
660 if (!fi
->saved_regs
[SP_REGNUM
]
661 || fi
->saved_regs
[SP_REGNUM
] == STACK_START
)
662 return (CORE_ADDR
) 0;
664 return fi
->saved_regs
[SP_REGNUM
];
667 if (!read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
668 REGISTER_RAW_SIZE (FP_REGNUM
)))
669 return (CORE_ADDR
) 0;
671 return D10V_MAKE_DADDR (read_memory_unsigned_integer (fi
->saved_regs
[FP_REGNUM
],
672 REGISTER_RAW_SIZE (FP_REGNUM
)));
675 static int next_addr
, uses_frame
;
678 prologue_find_regs (op
, fi
, addr
)
680 struct frame_info
*fi
;
686 if ((op
& 0x7E1F) == 0x6C1F)
688 n
= (op
& 0x1E0) >> 5;
690 fi
->saved_regs
[n
] = next_addr
;
695 else if ((op
& 0x7E3F) == 0x6E1F)
697 n
= (op
& 0x1E0) >> 5;
699 fi
->saved_regs
[n
] = next_addr
;
700 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
705 if ((op
& 0x7FE1) == 0x01E1)
707 n
= (op
& 0x1E) >> 1;
726 if ((op
& 0x7E1F) == 0x681E)
728 n
= (op
& 0x1E0) >> 5;
729 fi
->saved_regs
[n
] = next_addr
;
734 if ((op
& 0x7E3F) == 0x3A1E)
736 n
= (op
& 0x1E0) >> 5;
737 fi
->saved_regs
[n
] = next_addr
;
738 fi
->saved_regs
[n
+ 1] = next_addr
+ 2;
745 /* Put here the code to store, into fi->saved_regs, the addresses of
746 the saved registers of frame described by FRAME_INFO. This
747 includes special registers such as pc and fp saved in special ways
748 in the stack frame. sp is even more special: the address we return
749 for it IS the sp for the next frame. */
752 d10v_frame_init_saved_regs (fi
)
753 struct frame_info
*fi
;
757 unsigned short op1
, op2
;
761 memset (fi
->saved_regs
, 0, SIZEOF_FRAME_SAVED_REGS
);
764 pc
= get_pc_function_start (fi
->pc
);
769 op
= (unsigned long) read_memory_integer (pc
, 4);
770 if ((op
& 0xC0000000) == 0xC0000000)
772 /* long instruction */
773 if ((op
& 0x3FFF0000) == 0x01FF0000)
776 short n
= op
& 0xFFFF;
779 else if ((op
& 0x3F0F0000) == 0x340F0000)
781 /* st rn, @(offset,sp) */
782 short offset
= op
& 0xFFFF;
783 short n
= (op
>> 20) & 0xF;
784 fi
->saved_regs
[n
] = next_addr
+ offset
;
786 else if ((op
& 0x3F1F0000) == 0x350F0000)
788 /* st2w rn, @(offset,sp) */
789 short offset
= op
& 0xFFFF;
790 short n
= (op
>> 20) & 0xF;
791 fi
->saved_regs
[n
] = next_addr
+ offset
;
792 fi
->saved_regs
[n
+ 1] = next_addr
+ offset
+ 2;
799 /* short instructions */
800 if ((op
& 0xC0000000) == 0x80000000)
802 op2
= (op
& 0x3FFF8000) >> 15;
807 op1
= (op
& 0x3FFF8000) >> 15;
810 if (!prologue_find_regs (op1
, fi
, pc
) || !prologue_find_regs (op2
, fi
, pc
))
816 fi
->extra_info
->size
= -next_addr
;
819 fp
= D10V_MAKE_DADDR (read_register (SP_REGNUM
));
821 for (i
= 0; i
< NUM_REGS
- 1; i
++)
822 if (fi
->saved_regs
[i
])
824 fi
->saved_regs
[i
] = fp
- (next_addr
- fi
->saved_regs
[i
]);
827 if (fi
->saved_regs
[LR_REGNUM
])
829 CORE_ADDR return_pc
= read_memory_unsigned_integer (fi
->saved_regs
[LR_REGNUM
], REGISTER_RAW_SIZE (LR_REGNUM
));
830 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (return_pc
);
834 fi
->extra_info
->return_pc
= D10V_MAKE_IADDR (read_register (LR_REGNUM
));
837 /* th SP is not normally (ever?) saved, but check anyway */
838 if (!fi
->saved_regs
[SP_REGNUM
])
840 /* if the FP was saved, that means the current FP is valid, */
841 /* otherwise, it isn't being used, so we use the SP instead */
843 fi
->saved_regs
[SP_REGNUM
] = read_register (FP_REGNUM
) + fi
->extra_info
->size
;
846 fi
->saved_regs
[SP_REGNUM
] = fp
+ fi
->extra_info
->size
;
847 fi
->extra_info
->frameless
= 1;
848 fi
->saved_regs
[FP_REGNUM
] = 0;
854 d10v_init_extra_frame_info (fromleaf
, fi
)
856 struct frame_info
*fi
;
858 fi
->extra_info
= (struct frame_extra_info
*)
859 frame_obstack_alloc (sizeof (struct frame_extra_info
));
860 frame_saved_regs_zalloc (fi
);
862 fi
->extra_info
->frameless
= 0;
863 fi
->extra_info
->size
= 0;
864 fi
->extra_info
->return_pc
= 0;
866 /* The call dummy doesn't save any registers on the stack, so we can
868 if (PC_IN_CALL_DUMMY (fi
->pc
, fi
->frame
, fi
->frame
))
874 d10v_frame_init_saved_regs (fi
);
879 show_regs (args
, from_tty
)
884 printf_filtered ("PC=%04lx (0x%lx) PSW=%04lx RPT_S=%04lx RPT_E=%04lx RPT_C=%04lx\n",
885 (long) read_register (PC_REGNUM
),
886 (long) D10V_MAKE_IADDR (read_register (PC_REGNUM
)),
887 (long) read_register (PSW_REGNUM
),
888 (long) read_register (24),
889 (long) read_register (25),
890 (long) read_register (23));
891 printf_filtered ("R0-R7 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
892 (long) read_register (0),
893 (long) read_register (1),
894 (long) read_register (2),
895 (long) read_register (3),
896 (long) read_register (4),
897 (long) read_register (5),
898 (long) read_register (6),
899 (long) read_register (7));
900 printf_filtered ("R8-R15 %04lx %04lx %04lx %04lx %04lx %04lx %04lx %04lx\n",
901 (long) read_register (8),
902 (long) read_register (9),
903 (long) read_register (10),
904 (long) read_register (11),
905 (long) read_register (12),
906 (long) read_register (13),
907 (long) read_register (14),
908 (long) read_register (15));
909 for (a
= 0; a
< NR_IMAP_REGS
; a
++)
912 printf_filtered (" ");
913 printf_filtered ("IMAP%d %04lx", a
, d10v_imap_register (a
));
915 if (NR_DMAP_REGS
== 1)
916 printf_filtered (" DMAP %04lx\n", d10v_dmap_register (2));
919 for (a
= 0; a
< NR_DMAP_REGS
; a
++)
921 printf_filtered (" DMAP%d %04lx", a
, d10v_dmap_register (a
));
923 printf_filtered ("\n");
925 printf_filtered ("A0-A%d", NR_A_REGS
- 1);
926 for (a
= A0_REGNUM
; a
< A0_REGNUM
+ NR_A_REGS
; a
++)
928 char num
[MAX_REGISTER_RAW_SIZE
];
930 printf_filtered (" ");
931 read_register_gen (a
, (char *) &num
);
932 for (i
= 0; i
< MAX_REGISTER_RAW_SIZE
; i
++)
934 printf_filtered ("%02x", (num
[i
] & 0xff));
937 printf_filtered ("\n");
948 save_pid
= inferior_pid
;
950 pc
= (int) read_register (PC_REGNUM
);
951 inferior_pid
= save_pid
;
952 retval
= D10V_MAKE_IADDR (pc
);
957 d10v_write_pc (val
, pid
)
963 save_pid
= inferior_pid
;
965 write_register (PC_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (val
));
966 inferior_pid
= save_pid
;
972 return (D10V_MAKE_DADDR (read_register (SP_REGNUM
)));
979 write_register (SP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
986 write_register (FP_REGNUM
, D10V_CONVERT_DADDR_TO_RAW (val
));
992 return (D10V_MAKE_DADDR (read_register (FP_REGNUM
)));
995 /* Function: push_return_address (pc)
996 Set up the return address for the inferior function call.
997 Needed for targets where we don't actually execute a JSR/BSR instruction */
1000 d10v_push_return_address (pc
, sp
)
1004 write_register (LR_REGNUM
, D10V_CONVERT_IADDR_TO_RAW (CALL_DUMMY_ADDRESS ()));
1009 /* When arguments must be pushed onto the stack, they go on in reverse
1010 order. The below implements a FILO (stack) to do this. */
1015 struct stack_item
*prev
;
1019 static struct stack_item
*push_stack_item
PARAMS ((struct stack_item
* prev
, void *contents
, int len
));
1020 static struct stack_item
*
1021 push_stack_item (prev
, contents
, len
)
1022 struct stack_item
*prev
;
1026 struct stack_item
*si
;
1027 si
= xmalloc (sizeof (struct stack_item
));
1028 si
->data
= xmalloc (len
);
1031 memcpy (si
->data
, contents
, len
);
1035 static struct stack_item
*pop_stack_item
PARAMS ((struct stack_item
* si
));
1036 static struct stack_item
*
1038 struct stack_item
*si
;
1040 struct stack_item
*dead
= si
;
1049 d10v_push_arguments (nargs
, args
, sp
, struct_return
, struct_addr
)
1054 CORE_ADDR struct_addr
;
1057 int regnum
= ARG1_REGNUM
;
1058 struct stack_item
*si
= NULL
;
1060 /* Fill in registers and arg lists */
1061 for (i
= 0; i
< nargs
; i
++)
1063 value_ptr arg
= args
[i
];
1064 struct type
*type
= check_typedef (VALUE_TYPE (arg
));
1065 char *contents
= VALUE_CONTENTS (arg
);
1066 int len
= TYPE_LENGTH (type
);
1067 /* printf ("push: type=%d len=%d\n", type->code, len); */
1068 if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1070 /* pointers require special handling - first convert and
1072 long val
= extract_signed_integer (contents
, len
);
1074 if (TYPE_TARGET_TYPE (type
)
1075 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1077 /* function pointer */
1078 val
= D10V_CONVERT_IADDR_TO_RAW (val
);
1080 else if (D10V_IADDR_P (val
))
1082 /* also function pointer! */
1083 val
= D10V_CONVERT_DADDR_TO_RAW (val
);
1090 if (regnum
<= ARGN_REGNUM
)
1091 write_register (regnum
++, val
& 0xffff);
1095 /* arg will go onto stack */
1096 store_address (ptr
, 2, val
& 0xffff);
1097 si
= push_stack_item (si
, ptr
, 2);
1102 int aligned_regnum
= (regnum
+ 1) & ~1;
1103 if (len
<= 2 && regnum
<= ARGN_REGNUM
)
1104 /* fits in a single register, do not align */
1106 long val
= extract_unsigned_integer (contents
, len
);
1107 write_register (regnum
++, val
);
1109 else if (len
<= (ARGN_REGNUM
- aligned_regnum
+ 1) * 2)
1110 /* value fits in remaining registers, store keeping left
1114 regnum
= aligned_regnum
;
1115 for (b
= 0; b
< (len
& ~1); b
+= 2)
1117 long val
= extract_unsigned_integer (&contents
[b
], 2);
1118 write_register (regnum
++, val
);
1122 long val
= extract_unsigned_integer (&contents
[b
], 1);
1123 write_register (regnum
++, (val
<< 8));
1128 /* arg will go onto stack */
1129 regnum
= ARGN_REGNUM
+ 1;
1130 si
= push_stack_item (si
, contents
, len
);
1137 sp
= (sp
- si
->len
) & ~1;
1138 write_memory (sp
, si
->data
, si
->len
);
1139 si
= pop_stack_item (si
);
1146 /* Given a return value in `regbuf' with a type `valtype',
1147 extract and copy its value into `valbuf'. */
1150 d10v_extract_return_value (type
, regbuf
, valbuf
)
1152 char regbuf
[REGISTER_BYTES
];
1156 /* printf("RET: TYPE=%d len=%d r%d=0x%x\n",type->code, TYPE_LENGTH (type), RET1_REGNUM - R0_REGNUM, (int) extract_unsigned_integer (regbuf + REGISTER_BYTE(RET1_REGNUM), REGISTER_RAW_SIZE (RET1_REGNUM))); */
1157 if (TYPE_CODE (type
) == TYPE_CODE_PTR
1158 && TYPE_TARGET_TYPE (type
)
1159 && (TYPE_CODE (TYPE_TARGET_TYPE (type
)) == TYPE_CODE_FUNC
))
1161 /* pointer to function */
1164 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1165 store_address (valbuf
, 4, D10V_MAKE_IADDR (snum
));
1167 else if (TYPE_CODE (type
) == TYPE_CODE_PTR
)
1169 /* pointer to data */
1172 snum
= extract_address (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1173 store_address (valbuf
, 4, D10V_MAKE_DADDR (snum
));
1177 len
= TYPE_LENGTH (type
);
1180 unsigned short c
= extract_unsigned_integer (regbuf
+ REGISTER_BYTE (RET1_REGNUM
), REGISTER_RAW_SIZE (RET1_REGNUM
));
1181 store_unsigned_integer (valbuf
, 1, c
);
1183 else if ((len
& 1) == 0)
1184 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
), len
);
1187 /* For return values of odd size, the first byte is in the
1188 least significant part of the first register. The
1189 remaining bytes in remaining registers. Interestingly,
1190 when such values are passed in, the last byte is in the
1191 most significant byte of that same register - wierd. */
1192 memcpy (valbuf
, regbuf
+ REGISTER_BYTE (RET1_REGNUM
) + 1, len
);
1197 /* Translate a GDB virtual ADDR/LEN into a format the remote target
1198 understands. Returns number of bytes that can be transfered
1199 starting at TARG_ADDR. Return ZERO if no bytes can be transfered
1200 (segmentation fault). Since the simulator knows all about how the
1201 VM system works, we just call that to do the translation. */
1204 remote_d10v_translate_xfer_address (CORE_ADDR memaddr
, int nr_bytes
,
1205 CORE_ADDR
*targ_addr
, int *targ_len
)
1209 out_len
= sim_d10v_translate_addr (memaddr
, nr_bytes
,
1212 d10v_imap_register
);
1213 *targ_addr
= out_addr
;
1214 *targ_len
= out_len
;
1218 /* The following code implements access to, and display of, the D10V's
1219 instruction trace buffer. The buffer consists of 64K or more
1220 4-byte words of data, of which each words includes an 8-bit count,
1221 an 8-bit segment number, and a 16-bit instruction address.
1223 In theory, the trace buffer is continuously capturing instruction
1224 data that the CPU presents on its "debug bus", but in practice, the
1225 ROMified GDB stub only enables tracing when it continues or steps
1226 the program, and stops tracing when the program stops; so it
1227 actually works for GDB to read the buffer counter out of memory and
1228 then read each trace word. The counter records where the tracing
1229 stops, but there is no record of where it started, so we remember
1230 the PC when we resumed and then search backwards in the trace
1231 buffer for a word that includes that address. This is not perfect,
1232 because you will miss trace data if the resumption PC is the target
1233 of a branch. (The value of the buffer counter is semi-random, any
1234 trace data from a previous program stop is gone.) */
1236 /* The address of the last word recorded in the trace buffer. */
1238 #define DBBC_ADDR (0xd80000)
1240 /* The base of the trace buffer, at least for the "Board_0". */
1242 #define TRACE_BUFFER_BASE (0xf40000)
1244 static void trace_command
PARAMS ((char *, int));
1246 static void untrace_command
PARAMS ((char *, int));
1248 static void trace_info
PARAMS ((char *, int));
1250 static void tdisassemble_command
PARAMS ((char *, int));
1252 static void display_trace
PARAMS ((int, int));
1254 /* True when instruction traces are being collected. */
1258 /* Remembered PC. */
1260 static CORE_ADDR last_pc
;
1262 /* True when trace output should be displayed whenever program stops. */
1264 static int trace_display
;
1266 /* True when trace listing should include source lines. */
1268 static int default_trace_show_source
= 1;
1279 trace_command (args
, from_tty
)
1283 /* Clear the host-side trace buffer, allocating space if needed. */
1284 trace_data
.size
= 0;
1285 if (trace_data
.counts
== NULL
)
1286 trace_data
.counts
= (short *) xmalloc (65536 * sizeof (short));
1287 if (trace_data
.addrs
== NULL
)
1288 trace_data
.addrs
= (CORE_ADDR
*) xmalloc (65536 * sizeof (CORE_ADDR
));
1292 printf_filtered ("Tracing is now on.\n");
1296 untrace_command (args
, from_tty
)
1302 printf_filtered ("Tracing is now off.\n");
1306 trace_info (args
, from_tty
)
1312 if (trace_data
.size
)
1314 printf_filtered ("%d entries in trace buffer:\n", trace_data
.size
);
1316 for (i
= 0; i
< trace_data
.size
; ++i
)
1318 printf_filtered ("%d: %d instruction%s at 0x%s\n",
1320 trace_data
.counts
[i
],
1321 (trace_data
.counts
[i
] == 1 ? "" : "s"),
1322 paddr_nz (trace_data
.addrs
[i
]));
1326 printf_filtered ("No entries in trace buffer.\n");
1328 printf_filtered ("Tracing is currently %s.\n", (tracing
? "on" : "off"));
1331 /* Print the instruction at address MEMADDR in debugged memory,
1332 on STREAM. Returns length of the instruction, in bytes. */
1335 print_insn (memaddr
, stream
)
1339 /* If there's no disassembler, something is very wrong. */
1340 if (tm_print_insn
== NULL
)
1341 internal_error ("print_insn: no disassembler");
1343 if (TARGET_BYTE_ORDER
== BIG_ENDIAN
)
1344 tm_print_insn_info
.endian
= BFD_ENDIAN_BIG
;
1346 tm_print_insn_info
.endian
= BFD_ENDIAN_LITTLE
;
1347 return (*tm_print_insn
) (memaddr
, &tm_print_insn_info
);
1351 d10v_eva_prepare_to_trace ()
1356 last_pc
= read_register (PC_REGNUM
);
1359 /* Collect trace data from the target board and format it into a form
1360 more useful for display. */
1363 d10v_eva_get_trace_data ()
1365 int count
, i
, j
, oldsize
;
1366 int trace_addr
, trace_seg
, trace_cnt
, next_cnt
;
1367 unsigned int last_trace
, trace_word
, next_word
;
1368 unsigned int *tmpspace
;
1373 tmpspace
= xmalloc (65536 * sizeof (unsigned int));
1375 last_trace
= read_memory_unsigned_integer (DBBC_ADDR
, 2) << 2;
1377 /* Collect buffer contents from the target, stopping when we reach
1378 the word recorded when execution resumed. */
1381 while (last_trace
> 0)
1385 read_memory_unsigned_integer (TRACE_BUFFER_BASE
+ last_trace
, 4);
1386 trace_addr
= trace_word
& 0xffff;
1388 /* Ignore an apparently nonsensical entry. */
1389 if (trace_addr
== 0xffd5)
1391 tmpspace
[count
++] = trace_word
;
1392 if (trace_addr
== last_pc
)
1398 /* Move the data to the host-side trace buffer, adjusting counts to
1399 include the last instruction executed and transforming the address
1400 into something that GDB likes. */
1402 for (i
= 0; i
< count
; ++i
)
1404 trace_word
= tmpspace
[i
];
1405 next_word
= ((i
== 0) ? 0 : tmpspace
[i
- 1]);
1406 trace_addr
= trace_word
& 0xffff;
1407 next_cnt
= (next_word
>> 24) & 0xff;
1408 j
= trace_data
.size
+ count
- i
- 1;
1409 trace_data
.addrs
[j
] = (trace_addr
<< 2) + 0x1000000;
1410 trace_data
.counts
[j
] = next_cnt
+ 1;
1413 oldsize
= trace_data
.size
;
1414 trace_data
.size
+= count
;
1419 display_trace (oldsize
, trace_data
.size
);
1423 tdisassemble_command (arg
, from_tty
)
1428 CORE_ADDR low
, high
;
1434 high
= trace_data
.size
;
1436 else if (!(space_index
= (char *) strchr (arg
, ' ')))
1438 low
= parse_and_eval_address (arg
);
1443 /* Two arguments. */
1444 *space_index
= '\0';
1445 low
= parse_and_eval_address (arg
);
1446 high
= parse_and_eval_address (space_index
+ 1);
1451 printf_filtered ("Dump of trace from %s to %s:\n", paddr_u (low
), paddr_u (high
));
1453 display_trace (low
, high
);
1455 printf_filtered ("End of trace dump.\n");
1456 gdb_flush (gdb_stdout
);
1460 display_trace (low
, high
)
1463 int i
, count
, trace_show_source
, first
, suppress
;
1464 CORE_ADDR next_address
;
1466 trace_show_source
= default_trace_show_source
;
1467 if (!have_full_symbols () && !have_partial_symbols ())
1469 trace_show_source
= 0;
1470 printf_filtered ("No symbol table is loaded. Use the \"file\" command.\n");
1471 printf_filtered ("Trace will not display any source.\n");
1476 for (i
= low
; i
< high
; ++i
)
1478 next_address
= trace_data
.addrs
[i
];
1479 count
= trace_data
.counts
[i
];
1483 if (trace_show_source
)
1485 struct symtab_and_line sal
, sal_prev
;
1487 sal_prev
= find_pc_line (next_address
- 4, 0);
1488 sal
= find_pc_line (next_address
, 0);
1492 if (first
|| sal
.line
!= sal_prev
.line
)
1493 print_source_lines (sal
.symtab
, sal
.line
, sal
.line
+ 1, 0);
1499 /* FIXME-32x64--assumes sal.pc fits in long. */
1500 printf_filtered ("No source file for address %s.\n",
1501 local_hex_string ((unsigned long) sal
.pc
));
1506 print_address (next_address
, gdb_stdout
);
1507 printf_filtered (":");
1508 printf_filtered ("\t");
1510 next_address
= next_address
+ print_insn (next_address
, gdb_stdout
);
1511 printf_filtered ("\n");
1512 gdb_flush (gdb_stdout
);
1518 static gdbarch_init_ftype d10v_gdbarch_init
;
1520 static struct gdbarch
*
1521 d10v_gdbarch_init (info
, arches
)
1522 struct gdbarch_info info
;
1523 struct gdbarch_list
*arches
;
1525 static LONGEST d10v_call_dummy_words
[] =
1527 struct gdbarch
*gdbarch
;
1529 struct gdbarch_tdep
*tdep
;
1530 gdbarch_register_name_ftype
*d10v_register_name
;
1532 /* Find a candidate among the list of pre-declared architectures. */
1533 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1535 return arches
->gdbarch
;
1537 /* None found, create a new architecture from the information
1539 tdep
= XMALLOC (struct gdbarch_tdep
);
1540 gdbarch
= gdbarch_alloc (&info
, tdep
);
1542 switch (info
.bfd_arch_info
->mach
)
1544 case bfd_mach_d10v_ts2
:
1546 d10v_register_name
= d10v_ts2_register_name
;
1547 tdep
->a0_regnum
= TS2_A0_REGNUM
;
1548 tdep
->nr_dmap_regs
= TS2_NR_DMAP_REGS
;
1549 tdep
->register_sim_regno
= d10v_ts2_register_sim_regno
;
1550 tdep
->dmap_register
= d10v_ts2_dmap_register
;
1551 tdep
->imap_register
= d10v_ts2_imap_register
;
1554 case bfd_mach_d10v_ts3
:
1556 d10v_register_name
= d10v_ts3_register_name
;
1557 tdep
->a0_regnum
= TS3_A0_REGNUM
;
1558 tdep
->nr_dmap_regs
= TS3_NR_DMAP_REGS
;
1559 tdep
->register_sim_regno
= d10v_ts3_register_sim_regno
;
1560 tdep
->dmap_register
= d10v_ts3_dmap_register
;
1561 tdep
->imap_register
= d10v_ts3_imap_register
;
1565 set_gdbarch_read_pc (gdbarch
, d10v_read_pc
);
1566 set_gdbarch_write_pc (gdbarch
, d10v_write_pc
);
1567 set_gdbarch_read_fp (gdbarch
, d10v_read_fp
);
1568 set_gdbarch_write_fp (gdbarch
, d10v_write_fp
);
1569 set_gdbarch_read_sp (gdbarch
, d10v_read_sp
);
1570 set_gdbarch_write_sp (gdbarch
, d10v_write_sp
);
1572 set_gdbarch_num_regs (gdbarch
, d10v_num_regs
);
1573 set_gdbarch_sp_regnum (gdbarch
, 15);
1574 set_gdbarch_fp_regnum (gdbarch
, 11);
1575 set_gdbarch_pc_regnum (gdbarch
, 18);
1576 set_gdbarch_register_name (gdbarch
, d10v_register_name
);
1577 set_gdbarch_register_size (gdbarch
, 2);
1578 set_gdbarch_register_bytes (gdbarch
, (d10v_num_regs
- 2) * 2 + 16);
1579 set_gdbarch_register_byte (gdbarch
, d10v_register_byte
);
1580 set_gdbarch_register_raw_size (gdbarch
, d10v_register_raw_size
);
1581 set_gdbarch_max_register_raw_size (gdbarch
, 8);
1582 set_gdbarch_register_virtual_size (gdbarch
, d10v_register_virtual_size
);
1583 set_gdbarch_max_register_virtual_size (gdbarch
, 8);
1584 set_gdbarch_register_virtual_type (gdbarch
, d10v_register_virtual_type
);
1586 set_gdbarch_ptr_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1587 set_gdbarch_short_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1588 set_gdbarch_int_bit (gdbarch
, 2 * TARGET_CHAR_BIT
);
1589 set_gdbarch_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1590 set_gdbarch_long_long_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1591 set_gdbarch_float_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1592 set_gdbarch_double_bit (gdbarch
, 4 * TARGET_CHAR_BIT
);
1593 set_gdbarch_long_double_bit (gdbarch
, 8 * TARGET_CHAR_BIT
);
1595 set_gdbarch_use_generic_dummy_frames (gdbarch
, 1);
1596 set_gdbarch_call_dummy_length (gdbarch
, 0);
1597 set_gdbarch_call_dummy_location (gdbarch
, AT_ENTRY_POINT
);
1598 set_gdbarch_call_dummy_address (gdbarch
, entry_point_address
);
1599 set_gdbarch_call_dummy_breakpoint_offset_p (gdbarch
, 1);
1600 set_gdbarch_call_dummy_breakpoint_offset (gdbarch
, 0);
1601 set_gdbarch_call_dummy_start_offset (gdbarch
, 0);
1602 set_gdbarch_pc_in_call_dummy (gdbarch
, generic_pc_in_call_dummy
);
1603 set_gdbarch_call_dummy_words (gdbarch
, d10v_call_dummy_words
);
1604 set_gdbarch_sizeof_call_dummy_words (gdbarch
, sizeof (d10v_call_dummy_words
));
1605 set_gdbarch_call_dummy_p (gdbarch
, 1);
1606 set_gdbarch_call_dummy_stack_adjust_p (gdbarch
, 0);
1607 set_gdbarch_get_saved_register (gdbarch
, generic_get_saved_register
);
1608 set_gdbarch_fix_call_dummy (gdbarch
, generic_fix_call_dummy
);
1610 set_gdbarch_register_convertible (gdbarch
, d10v_register_convertible
);
1611 set_gdbarch_register_convert_to_virtual (gdbarch
, d10v_register_convert_to_virtual
);
1612 set_gdbarch_register_convert_to_raw (gdbarch
, d10v_register_convert_to_raw
);
1614 set_gdbarch_extract_return_value (gdbarch
, d10v_extract_return_value
);
1615 set_gdbarch_push_arguments (gdbarch
, d10v_push_arguments
);
1616 set_gdbarch_push_dummy_frame (gdbarch
, generic_push_dummy_frame
);
1617 set_gdbarch_push_return_address (gdbarch
, d10v_push_return_address
);
1619 set_gdbarch_d10v_make_daddr (gdbarch
, d10v_make_daddr
);
1620 set_gdbarch_d10v_make_iaddr (gdbarch
, d10v_make_iaddr
);
1621 set_gdbarch_d10v_daddr_p (gdbarch
, d10v_daddr_p
);
1622 set_gdbarch_d10v_iaddr_p (gdbarch
, d10v_iaddr_p
);
1623 set_gdbarch_d10v_convert_daddr_to_raw (gdbarch
, d10v_convert_daddr_to_raw
);
1624 set_gdbarch_d10v_convert_iaddr_to_raw (gdbarch
, d10v_convert_iaddr_to_raw
);
1626 set_gdbarch_store_struct_return (gdbarch
, d10v_store_struct_return
);
1627 set_gdbarch_store_return_value (gdbarch
, d10v_store_return_value
);
1628 set_gdbarch_extract_struct_value_address (gdbarch
, d10v_extract_struct_value_address
);
1629 set_gdbarch_use_struct_convention (gdbarch
, d10v_use_struct_convention
);
1631 set_gdbarch_frame_init_saved_regs (gdbarch
, d10v_frame_init_saved_regs
);
1632 set_gdbarch_init_extra_frame_info (gdbarch
, d10v_init_extra_frame_info
);
1634 set_gdbarch_pop_frame (gdbarch
, d10v_pop_frame
);
1636 set_gdbarch_skip_prologue (gdbarch
, d10v_skip_prologue
);
1637 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1638 set_gdbarch_decr_pc_after_break (gdbarch
, 4);
1639 set_gdbarch_function_start_offset (gdbarch
, 0);
1640 set_gdbarch_breakpoint_from_pc (gdbarch
, d10v_breakpoint_from_pc
);
1642 set_gdbarch_remote_translate_xfer_address (gdbarch
, remote_d10v_translate_xfer_address
);
1644 set_gdbarch_frame_args_skip (gdbarch
, 0);
1645 set_gdbarch_frameless_function_invocation (gdbarch
, frameless_look_for_prologue
);
1646 set_gdbarch_frame_chain (gdbarch
, d10v_frame_chain
);
1647 set_gdbarch_frame_chain_valid (gdbarch
, d10v_frame_chain_valid
);
1648 set_gdbarch_frame_saved_pc (gdbarch
, d10v_frame_saved_pc
);
1649 set_gdbarch_frame_args_address (gdbarch
, d10v_frame_args_address
);
1650 set_gdbarch_frame_locals_address (gdbarch
, d10v_frame_locals_address
);
1651 set_gdbarch_saved_pc_after_call (gdbarch
, d10v_saved_pc_after_call
);
1652 set_gdbarch_frame_num_args (gdbarch
, frame_num_args_unknown
);
1658 extern void (*target_resume_hook
) PARAMS ((void));
1659 extern void (*target_wait_loop_hook
) PARAMS ((void));
1662 _initialize_d10v_tdep ()
1664 register_gdbarch_init (bfd_arch_d10v
, d10v_gdbarch_init
);
1666 tm_print_insn
= print_insn_d10v
;
1668 target_resume_hook
= d10v_eva_prepare_to_trace
;
1669 target_wait_loop_hook
= d10v_eva_get_trace_data
;
1671 add_com ("regs", class_vars
, show_regs
, "Print all registers");
1673 add_com ("itrace", class_support
, trace_command
,
1674 "Enable tracing of instruction execution.");
1676 add_com ("iuntrace", class_support
, untrace_command
,
1677 "Disable tracing of instruction execution.");
1679 add_com ("itdisassemble", class_vars
, tdisassemble_command
,
1680 "Disassemble the trace buffer.\n\
1681 Two optional arguments specify a range of trace buffer entries\n\
1682 as reported by info trace (NOT addresses!).");
1684 add_info ("itrace", trace_info
,
1685 "Display info about the trace data buffer.");
1687 add_show_from_set (add_set_cmd ("itracedisplay", no_class
,
1688 var_integer
, (char *) &trace_display
,
1689 "Set automatic display of trace.\n", &setlist
),
1691 add_show_from_set (add_set_cmd ("itracesource", no_class
,
1692 var_integer
, (char *) &default_trace_show_source
,
1693 "Set display of source code with trace.\n", &setlist
),